ac97_pcm.c 20 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Universal interface for Audio Codec '97
  4. *
  5. * For more details look to AC '97 component specification revision 2.2
  6. * by Intel Corporation (http://developer.intel.com) and to datasheets
  7. * for specific codecs.
  8. *
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. */
  25. #include <sound/driver.h>
  26. #include <linux/delay.h>
  27. #include <linux/init.h>
  28. #include <linux/slab.h>
  29. #include <linux/mutex.h>
  30. #include <sound/core.h>
  31. #include <sound/pcm.h>
  32. #include <sound/control.h>
  33. #include <sound/ac97_codec.h>
  34. #include <sound/asoundef.h>
  35. #include "ac97_patch.h"
  36. #include "ac97_id.h"
  37. #include "ac97_local.h"
  38. /*
  39. * PCM support
  40. */
  41. static unsigned char rate_reg_tables[2][4][9] = {
  42. {
  43. /* standard rates */
  44. {
  45. /* 3&4 front, 7&8 rear, 6&9 center/lfe */
  46. AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
  47. AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
  48. 0xff, /* slot 5 */
  49. AC97_PCM_LFE_DAC_RATE, /* slot 6 */
  50. AC97_PCM_SURR_DAC_RATE, /* slot 7 */
  51. AC97_PCM_SURR_DAC_RATE, /* slot 8 */
  52. AC97_PCM_LFE_DAC_RATE, /* slot 9 */
  53. 0xff, /* slot 10 */
  54. 0xff, /* slot 11 */
  55. },
  56. {
  57. /* 7&8 front, 6&9 rear, 10&11 center/lfe */
  58. 0xff, /* slot 3 */
  59. 0xff, /* slot 4 */
  60. 0xff, /* slot 5 */
  61. AC97_PCM_SURR_DAC_RATE, /* slot 6 */
  62. AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
  63. AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
  64. AC97_PCM_SURR_DAC_RATE, /* slot 9 */
  65. AC97_PCM_LFE_DAC_RATE, /* slot 10 */
  66. AC97_PCM_LFE_DAC_RATE, /* slot 11 */
  67. },
  68. {
  69. /* 6&9 front, 10&11 rear, 3&4 center/lfe */
  70. AC97_PCM_LFE_DAC_RATE, /* slot 3 */
  71. AC97_PCM_LFE_DAC_RATE, /* slot 4 */
  72. 0xff, /* slot 5 */
  73. AC97_PCM_FRONT_DAC_RATE, /* slot 6 */
  74. 0xff, /* slot 7 */
  75. 0xff, /* slot 8 */
  76. AC97_PCM_FRONT_DAC_RATE, /* slot 9 */
  77. AC97_PCM_SURR_DAC_RATE, /* slot 10 */
  78. AC97_PCM_SURR_DAC_RATE, /* slot 11 */
  79. },
  80. {
  81. /* 10&11 front, 3&4 rear, 7&8 center/lfe */
  82. AC97_PCM_SURR_DAC_RATE, /* slot 3 */
  83. AC97_PCM_SURR_DAC_RATE, /* slot 4 */
  84. 0xff, /* slot 5 */
  85. 0xff, /* slot 6 */
  86. AC97_PCM_LFE_DAC_RATE, /* slot 7 */
  87. AC97_PCM_LFE_DAC_RATE, /* slot 8 */
  88. 0xff, /* slot 9 */
  89. AC97_PCM_FRONT_DAC_RATE, /* slot 10 */
  90. AC97_PCM_FRONT_DAC_RATE, /* slot 11 */
  91. },
  92. },
  93. {
  94. /* double rates */
  95. {
  96. /* 3&4 front, 7&8 front (t+1) */
  97. AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
  98. AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
  99. 0xff, /* slot 5 */
  100. 0xff, /* slot 6 */
  101. AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
  102. AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
  103. 0xff, /* slot 9 */
  104. 0xff, /* slot 10 */
  105. 0xff, /* slot 11 */
  106. },
  107. {
  108. /* not specified in the specification */
  109. 0xff, /* slot 3 */
  110. 0xff, /* slot 4 */
  111. 0xff, /* slot 5 */
  112. 0xff, /* slot 6 */
  113. 0xff, /* slot 7 */
  114. 0xff, /* slot 8 */
  115. 0xff, /* slot 9 */
  116. 0xff, /* slot 10 */
  117. 0xff, /* slot 11 */
  118. },
  119. {
  120. 0xff, /* slot 3 */
  121. 0xff, /* slot 4 */
  122. 0xff, /* slot 5 */
  123. 0xff, /* slot 6 */
  124. 0xff, /* slot 7 */
  125. 0xff, /* slot 8 */
  126. 0xff, /* slot 9 */
  127. 0xff, /* slot 10 */
  128. 0xff, /* slot 11 */
  129. },
  130. {
  131. 0xff, /* slot 3 */
  132. 0xff, /* slot 4 */
  133. 0xff, /* slot 5 */
  134. 0xff, /* slot 6 */
  135. 0xff, /* slot 7 */
  136. 0xff, /* slot 8 */
  137. 0xff, /* slot 9 */
  138. 0xff, /* slot 10 */
  139. 0xff, /* slot 11 */
  140. }
  141. }};
  142. /* FIXME: more various mappings for ADC? */
  143. static unsigned char rate_cregs[9] = {
  144. AC97_PCM_LR_ADC_RATE, /* 3 */
  145. AC97_PCM_LR_ADC_RATE, /* 4 */
  146. 0xff, /* 5 */
  147. AC97_PCM_MIC_ADC_RATE, /* 6 */
  148. 0xff, /* 7 */
  149. 0xff, /* 8 */
  150. 0xff, /* 9 */
  151. 0xff, /* 10 */
  152. 0xff, /* 11 */
  153. };
  154. static unsigned char get_slot_reg(struct ac97_pcm *pcm, unsigned short cidx,
  155. unsigned short slot, int dbl)
  156. {
  157. if (slot < 3)
  158. return 0xff;
  159. if (slot > 11)
  160. return 0xff;
  161. if (pcm->spdif)
  162. return AC97_SPDIF; /* pseudo register */
  163. if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK)
  164. return rate_reg_tables[dbl][pcm->r[dbl].rate_table[cidx]][slot - 3];
  165. else
  166. return rate_cregs[slot - 3];
  167. }
  168. static int set_spdif_rate(struct snd_ac97 *ac97, unsigned short rate)
  169. {
  170. unsigned short old, bits, reg, mask;
  171. unsigned int sbits;
  172. if (! (ac97->ext_id & AC97_EI_SPDIF))
  173. return -ENODEV;
  174. /* TODO: double rate support */
  175. if (ac97->flags & AC97_CS_SPDIF) {
  176. switch (rate) {
  177. case 48000: bits = 0; break;
  178. case 44100: bits = 1 << AC97_SC_SPSR_SHIFT; break;
  179. default: /* invalid - disable output */
  180. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  181. return -EINVAL;
  182. }
  183. reg = AC97_CSR_SPDIF;
  184. mask = 1 << AC97_SC_SPSR_SHIFT;
  185. } else {
  186. if (ac97->id == AC97_ID_CM9739 && rate != 48000) {
  187. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  188. return -EINVAL;
  189. }
  190. switch (rate) {
  191. case 44100: bits = AC97_SC_SPSR_44K; break;
  192. case 48000: bits = AC97_SC_SPSR_48K; break;
  193. case 32000: bits = AC97_SC_SPSR_32K; break;
  194. default: /* invalid - disable output */
  195. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  196. return -EINVAL;
  197. }
  198. reg = AC97_SPDIF;
  199. mask = AC97_SC_SPSR_MASK;
  200. }
  201. mutex_lock(&ac97->reg_mutex);
  202. old = snd_ac97_read(ac97, reg) & mask;
  203. if (old != bits) {
  204. snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
  205. snd_ac97_update_bits_nolock(ac97, reg, mask, bits);
  206. /* update the internal spdif bits */
  207. sbits = ac97->spdif_status;
  208. if (sbits & IEC958_AES0_PROFESSIONAL) {
  209. sbits &= ~IEC958_AES0_PRO_FS;
  210. switch (rate) {
  211. case 44100: sbits |= IEC958_AES0_PRO_FS_44100; break;
  212. case 48000: sbits |= IEC958_AES0_PRO_FS_48000; break;
  213. case 32000: sbits |= IEC958_AES0_PRO_FS_32000; break;
  214. }
  215. } else {
  216. sbits &= ~(IEC958_AES3_CON_FS << 24);
  217. switch (rate) {
  218. case 44100: sbits |= IEC958_AES3_CON_FS_44100<<24; break;
  219. case 48000: sbits |= IEC958_AES3_CON_FS_48000<<24; break;
  220. case 32000: sbits |= IEC958_AES3_CON_FS_32000<<24; break;
  221. }
  222. }
  223. ac97->spdif_status = sbits;
  224. }
  225. snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF);
  226. mutex_unlock(&ac97->reg_mutex);
  227. return 0;
  228. }
  229. /**
  230. * snd_ac97_set_rate - change the rate of the given input/output.
  231. * @ac97: the ac97 instance
  232. * @reg: the register to change
  233. * @rate: the sample rate to set
  234. *
  235. * Changes the rate of the given input/output on the codec.
  236. * If the codec doesn't support VAR, the rate must be 48000 (except
  237. * for SPDIF).
  238. *
  239. * The valid registers are AC97_PMC_MIC_ADC_RATE,
  240. * AC97_PCM_FRONT_DAC_RATE, AC97_PCM_LR_ADC_RATE.
  241. * AC97_PCM_SURR_DAC_RATE and AC97_PCM_LFE_DAC_RATE are accepted
  242. * if the codec supports them.
  243. * AC97_SPDIF is accepted as a pseudo register to modify the SPDIF
  244. * status bits.
  245. *
  246. * Returns zero if successful, or a negative error code on failure.
  247. */
  248. int snd_ac97_set_rate(struct snd_ac97 *ac97, int reg, unsigned int rate)
  249. {
  250. int dbl;
  251. unsigned int tmp;
  252. dbl = rate > 48000;
  253. if (dbl) {
  254. if (!(ac97->flags & AC97_DOUBLE_RATE))
  255. return -EINVAL;
  256. if (reg != AC97_PCM_FRONT_DAC_RATE)
  257. return -EINVAL;
  258. }
  259. switch (reg) {
  260. case AC97_PCM_MIC_ADC_RATE:
  261. if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRM) == 0) /* MIC VRA */
  262. if (rate != 48000)
  263. return -EINVAL;
  264. break;
  265. case AC97_PCM_FRONT_DAC_RATE:
  266. case AC97_PCM_LR_ADC_RATE:
  267. if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRA) == 0) /* VRA */
  268. if (rate != 48000 && rate != 96000)
  269. return -EINVAL;
  270. break;
  271. case AC97_PCM_SURR_DAC_RATE:
  272. if (! (ac97->scaps & AC97_SCAP_SURROUND_DAC))
  273. return -EINVAL;
  274. break;
  275. case AC97_PCM_LFE_DAC_RATE:
  276. if (! (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
  277. return -EINVAL;
  278. break;
  279. case AC97_SPDIF:
  280. /* special case */
  281. return set_spdif_rate(ac97, rate);
  282. default:
  283. return -EINVAL;
  284. }
  285. if (dbl)
  286. rate /= 2;
  287. tmp = (rate * ac97->bus->clock) / 48000;
  288. if (tmp > 65535)
  289. return -EINVAL;
  290. if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE)
  291. snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
  292. AC97_EA_DRA, dbl ? AC97_EA_DRA : 0);
  293. snd_ac97_update(ac97, reg, tmp & 0xffff);
  294. snd_ac97_read(ac97, reg);
  295. if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) {
  296. /* Intel controllers require double rate data to be put in
  297. * slots 7+8
  298. */
  299. snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE,
  300. AC97_GP_DRSS_MASK,
  301. dbl ? AC97_GP_DRSS_78 : 0);
  302. snd_ac97_read(ac97, AC97_GENERAL_PURPOSE);
  303. }
  304. return 0;
  305. }
  306. static unsigned short get_pslots(struct snd_ac97 *ac97, unsigned char *rate_table, unsigned short *spdif_slots)
  307. {
  308. if (!ac97_is_audio(ac97))
  309. return 0;
  310. if (ac97_is_rev22(ac97) || ac97_can_amap(ac97)) {
  311. unsigned short slots = 0;
  312. if (ac97_is_rev22(ac97)) {
  313. /* Note: it's simply emulation of AMAP behaviour */
  314. u16 es;
  315. es = ac97->regs[AC97_EXTENDED_ID] &= ~AC97_EI_DACS_SLOT_MASK;
  316. switch (ac97->addr) {
  317. case 1:
  318. case 2: es |= (1<<AC97_EI_DACS_SLOT_SHIFT); break;
  319. case 3: es |= (2<<AC97_EI_DACS_SLOT_SHIFT); break;
  320. }
  321. snd_ac97_write_cache(ac97, AC97_EXTENDED_ID, es);
  322. }
  323. switch (ac97->addr) {
  324. case 0:
  325. slots |= (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
  326. if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
  327. slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
  328. if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
  329. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  330. if (ac97->ext_id & AC97_EI_SPDIF) {
  331. if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
  332. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
  333. else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
  334. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
  335. else
  336. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  337. }
  338. *rate_table = 0;
  339. break;
  340. case 1:
  341. case 2:
  342. slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
  343. if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
  344. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  345. if (ac97->ext_id & AC97_EI_SPDIF) {
  346. if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
  347. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
  348. else
  349. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  350. }
  351. *rate_table = 1;
  352. break;
  353. case 3:
  354. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  355. if (ac97->ext_id & AC97_EI_SPDIF)
  356. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  357. *rate_table = 2;
  358. break;
  359. }
  360. return slots;
  361. } else {
  362. unsigned short slots;
  363. slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
  364. if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
  365. slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
  366. if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
  367. slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
  368. if (ac97->ext_id & AC97_EI_SPDIF) {
  369. if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
  370. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
  371. else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
  372. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
  373. else
  374. *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
  375. }
  376. *rate_table = 0;
  377. return slots;
  378. }
  379. }
  380. static unsigned short get_cslots(struct snd_ac97 *ac97)
  381. {
  382. unsigned short slots;
  383. if (!ac97_is_audio(ac97))
  384. return 0;
  385. slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
  386. slots |= (1<<AC97_SLOT_MIC);
  387. return slots;
  388. }
  389. static unsigned int get_rates(struct ac97_pcm *pcm, unsigned int cidx, unsigned short slots, int dbl)
  390. {
  391. int i, idx;
  392. unsigned int rates = ~0;
  393. unsigned char reg;
  394. for (i = 3; i < 12; i++) {
  395. if (!(slots & (1 << i)))
  396. continue;
  397. reg = get_slot_reg(pcm, cidx, i, dbl);
  398. switch (reg) {
  399. case AC97_PCM_FRONT_DAC_RATE: idx = AC97_RATES_FRONT_DAC; break;
  400. case AC97_PCM_SURR_DAC_RATE: idx = AC97_RATES_SURR_DAC; break;
  401. case AC97_PCM_LFE_DAC_RATE: idx = AC97_RATES_LFE_DAC; break;
  402. case AC97_PCM_LR_ADC_RATE: idx = AC97_RATES_ADC; break;
  403. case AC97_PCM_MIC_ADC_RATE: idx = AC97_RATES_MIC_ADC; break;
  404. default: idx = AC97_RATES_SPDIF; break;
  405. }
  406. rates &= pcm->r[dbl].codec[cidx]->rates[idx];
  407. }
  408. if (!dbl)
  409. rates &= ~(SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 |
  410. SNDRV_PCM_RATE_96000);
  411. return rates;
  412. }
  413. /**
  414. * snd_ac97_pcm_assign - assign AC97 slots to given PCM streams
  415. * @bus: the ac97 bus instance
  416. * @pcms_count: count of PCMs to be assigned
  417. * @pcms: PCMs to be assigned
  418. *
  419. * It assigns available AC97 slots for given PCMs. If none or only
  420. * some slots are available, pcm->xxx.slots and pcm->xxx.rslots[] members
  421. * are reduced and might be zero.
  422. */
  423. int snd_ac97_pcm_assign(struct snd_ac97_bus *bus,
  424. unsigned short pcms_count,
  425. const struct ac97_pcm *pcms)
  426. {
  427. int i, j, k;
  428. const struct ac97_pcm *pcm;
  429. struct ac97_pcm *rpcms, *rpcm;
  430. unsigned short avail_slots[2][4];
  431. unsigned char rate_table[2][4];
  432. unsigned short tmp, slots;
  433. unsigned short spdif_slots[4];
  434. unsigned int rates;
  435. struct snd_ac97 *codec;
  436. rpcms = kcalloc(pcms_count, sizeof(struct ac97_pcm), GFP_KERNEL);
  437. if (rpcms == NULL)
  438. return -ENOMEM;
  439. memset(avail_slots, 0, sizeof(avail_slots));
  440. memset(rate_table, 0, sizeof(rate_table));
  441. memset(spdif_slots, 0, sizeof(spdif_slots));
  442. for (i = 0; i < 4; i++) {
  443. codec = bus->codec[i];
  444. if (!codec)
  445. continue;
  446. avail_slots[0][i] = get_pslots(codec, &rate_table[0][i], &spdif_slots[i]);
  447. avail_slots[1][i] = get_cslots(codec);
  448. if (!(codec->scaps & AC97_SCAP_INDEP_SDIN)) {
  449. for (j = 0; j < i; j++) {
  450. if (bus->codec[j])
  451. avail_slots[1][i] &= ~avail_slots[1][j];
  452. }
  453. }
  454. }
  455. /* first step - exclusive devices */
  456. for (i = 0; i < pcms_count; i++) {
  457. pcm = &pcms[i];
  458. rpcm = &rpcms[i];
  459. /* low-level driver thinks that it's more clever */
  460. if (pcm->copy_flag) {
  461. *rpcm = *pcm;
  462. continue;
  463. }
  464. rpcm->stream = pcm->stream;
  465. rpcm->exclusive = pcm->exclusive;
  466. rpcm->spdif = pcm->spdif;
  467. rpcm->private_value = pcm->private_value;
  468. rpcm->bus = bus;
  469. rpcm->rates = ~0;
  470. slots = pcm->r[0].slots;
  471. for (j = 0; j < 4 && slots; j++) {
  472. if (!bus->codec[j])
  473. continue;
  474. rates = ~0;
  475. if (pcm->spdif && pcm->stream == 0)
  476. tmp = spdif_slots[j];
  477. else
  478. tmp = avail_slots[pcm->stream][j];
  479. if (pcm->exclusive) {
  480. /* exclusive access */
  481. tmp &= slots;
  482. for (k = 0; k < i; k++) {
  483. if (rpcm->stream == rpcms[k].stream)
  484. tmp &= ~rpcms[k].r[0].rslots[j];
  485. }
  486. } else {
  487. /* non-exclusive access */
  488. tmp &= pcm->r[0].slots;
  489. }
  490. if (tmp) {
  491. rpcm->r[0].rslots[j] = tmp;
  492. rpcm->r[0].codec[j] = bus->codec[j];
  493. rpcm->r[0].rate_table[j] = rate_table[pcm->stream][j];
  494. if (bus->no_vra)
  495. rates = SNDRV_PCM_RATE_48000;
  496. else
  497. rates = get_rates(rpcm, j, tmp, 0);
  498. if (pcm->exclusive)
  499. avail_slots[pcm->stream][j] &= ~tmp;
  500. }
  501. slots &= ~tmp;
  502. rpcm->r[0].slots |= tmp;
  503. rpcm->rates &= rates;
  504. }
  505. /* for double rate, we check the first codec only */
  506. if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK &&
  507. bus->codec[0] && (bus->codec[0]->flags & AC97_DOUBLE_RATE) &&
  508. rate_table[pcm->stream][0] == 0) {
  509. tmp = (1<<AC97_SLOT_PCM_LEFT) | (1<<AC97_SLOT_PCM_RIGHT) |
  510. (1<<AC97_SLOT_PCM_LEFT_0) | (1<<AC97_SLOT_PCM_RIGHT_0);
  511. if ((tmp & pcm->r[1].slots) == tmp) {
  512. rpcm->r[1].slots = tmp;
  513. rpcm->r[1].rslots[0] = tmp;
  514. rpcm->r[1].rate_table[0] = 0;
  515. rpcm->r[1].codec[0] = bus->codec[0];
  516. if (pcm->exclusive)
  517. avail_slots[pcm->stream][0] &= ~tmp;
  518. if (bus->no_vra)
  519. rates = SNDRV_PCM_RATE_96000;
  520. else
  521. rates = get_rates(rpcm, 0, tmp, 1);
  522. rpcm->rates |= rates;
  523. }
  524. }
  525. if (rpcm->rates == ~0)
  526. rpcm->rates = 0; /* not used */
  527. }
  528. bus->pcms_count = pcms_count;
  529. bus->pcms = rpcms;
  530. return 0;
  531. }
  532. /**
  533. * snd_ac97_pcm_open - opens the given AC97 pcm
  534. * @pcm: the ac97 pcm instance
  535. * @rate: rate in Hz, if codec does not support VRA, this value must be 48000Hz
  536. * @cfg: output stream characteristics
  537. * @slots: a subset of allocated slots (snd_ac97_pcm_assign) for this pcm
  538. *
  539. * It locks the specified slots and sets the given rate to AC97 registers.
  540. */
  541. int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate,
  542. enum ac97_pcm_cfg cfg, unsigned short slots)
  543. {
  544. struct snd_ac97_bus *bus;
  545. int i, cidx, r, ok_flag;
  546. unsigned int reg_ok[4] = {0,0,0,0};
  547. unsigned char reg;
  548. int err = 0;
  549. r = rate > 48000;
  550. bus = pcm->bus;
  551. if (cfg == AC97_PCM_CFG_SPDIF) {
  552. int err;
  553. for (cidx = 0; cidx < 4; cidx++)
  554. if (bus->codec[cidx] && (bus->codec[cidx]->ext_id & AC97_EI_SPDIF)) {
  555. err = set_spdif_rate(bus->codec[cidx], rate);
  556. if (err < 0)
  557. return err;
  558. }
  559. }
  560. spin_lock_irq(&pcm->bus->bus_lock);
  561. for (i = 3; i < 12; i++) {
  562. if (!(slots & (1 << i)))
  563. continue;
  564. ok_flag = 0;
  565. for (cidx = 0; cidx < 4; cidx++) {
  566. if (bus->used_slots[pcm->stream][cidx] & (1 << i)) {
  567. spin_unlock_irq(&pcm->bus->bus_lock);
  568. err = -EBUSY;
  569. goto error;
  570. }
  571. if (pcm->r[r].rslots[cidx] & (1 << i)) {
  572. bus->used_slots[pcm->stream][cidx] |= (1 << i);
  573. ok_flag++;
  574. }
  575. }
  576. if (!ok_flag) {
  577. spin_unlock_irq(&pcm->bus->bus_lock);
  578. snd_printk(KERN_ERR "cannot find configuration for AC97 slot %i\n", i);
  579. err = -EAGAIN;
  580. goto error;
  581. }
  582. }
  583. spin_unlock_irq(&pcm->bus->bus_lock);
  584. for (i = 3; i < 12; i++) {
  585. if (!(slots & (1 << i)))
  586. continue;
  587. for (cidx = 0; cidx < 4; cidx++) {
  588. if (pcm->r[r].rslots[cidx] & (1 << i)) {
  589. reg = get_slot_reg(pcm, cidx, i, r);
  590. if (reg == 0xff) {
  591. snd_printk(KERN_ERR "invalid AC97 slot %i?\n", i);
  592. continue;
  593. }
  594. if (reg_ok[cidx] & (1 << (reg - AC97_PCM_FRONT_DAC_RATE)))
  595. continue;
  596. //printk(KERN_DEBUG "setting ac97 reg 0x%x to rate %d\n", reg, rate);
  597. err = snd_ac97_set_rate(pcm->r[r].codec[cidx], reg, rate);
  598. if (err < 0)
  599. snd_printk(KERN_ERR "error in snd_ac97_set_rate: cidx=%d, reg=0x%x, rate=%d, err=%d\n", cidx, reg, rate, err);
  600. else
  601. reg_ok[cidx] |= (1 << (reg - AC97_PCM_FRONT_DAC_RATE));
  602. }
  603. }
  604. }
  605. pcm->aslots = slots;
  606. return 0;
  607. error:
  608. pcm->aslots = slots;
  609. snd_ac97_pcm_close(pcm);
  610. return err;
  611. }
  612. /**
  613. * snd_ac97_pcm_close - closes the given AC97 pcm
  614. * @pcm: the ac97 pcm instance
  615. *
  616. * It frees the locked AC97 slots.
  617. */
  618. int snd_ac97_pcm_close(struct ac97_pcm *pcm)
  619. {
  620. struct snd_ac97_bus *bus;
  621. unsigned short slots = pcm->aslots;
  622. int i, cidx;
  623. bus = pcm->bus;
  624. spin_lock_irq(&pcm->bus->bus_lock);
  625. for (i = 3; i < 12; i++) {
  626. if (!(slots & (1 << i)))
  627. continue;
  628. for (cidx = 0; cidx < 4; cidx++)
  629. bus->used_slots[pcm->stream][cidx] &= ~(1 << i);
  630. }
  631. pcm->aslots = 0;
  632. spin_unlock_irq(&pcm->bus->bus_lock);
  633. return 0;
  634. }
  635. static int double_rate_hw_constraint_rate(struct snd_pcm_hw_params *params,
  636. struct snd_pcm_hw_rule *rule)
  637. {
  638. struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
  639. if (channels->min > 2) {
  640. static const struct snd_interval single_rates = {
  641. .min = 1,
  642. .max = 48000,
  643. };
  644. struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
  645. return snd_interval_refine(rate, &single_rates);
  646. }
  647. return 0;
  648. }
  649. static int double_rate_hw_constraint_channels(struct snd_pcm_hw_params *params,
  650. struct snd_pcm_hw_rule *rule)
  651. {
  652. struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
  653. if (rate->min > 48000) {
  654. static const struct snd_interval double_rate_channels = {
  655. .min = 2,
  656. .max = 2,
  657. };
  658. struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
  659. return snd_interval_refine(channels, &double_rate_channels);
  660. }
  661. return 0;
  662. }
  663. /**
  664. * snd_ac97_pcm_double_rate_rules - set double rate constraints
  665. * @runtime: the runtime of the ac97 front playback pcm
  666. *
  667. * Installs the hardware constraint rules to prevent using double rates and
  668. * more than two channels at the same time.
  669. */
  670. int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime)
  671. {
  672. int err;
  673. err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  674. double_rate_hw_constraint_rate, NULL,
  675. SNDRV_PCM_HW_PARAM_CHANNELS, -1);
  676. if (err < 0)
  677. return err;
  678. err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
  679. double_rate_hw_constraint_channels, NULL,
  680. SNDRV_PCM_HW_PARAM_RATE, -1);
  681. return err;
  682. }