uda1341.c 28 KB

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  1. /*
  2. * Philips UDA1341 mixer device driver
  3. * Copyright (c) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz>
  4. *
  5. * Portions are Copyright (C) 2000 Lernout & Hauspie Speech Products, N.V.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License.
  9. *
  10. * History:
  11. *
  12. * 2002-03-13 Tomas Kasparek initial release - based on uda1341.c from OSS
  13. * 2002-03-28 Tomas Kasparek basic mixer is working (volume, bass, treble)
  14. * 2002-03-30 Tomas Kasparek proc filesystem support, complete mixer and DSP
  15. * features support
  16. * 2002-04-12 Tomas Kasparek proc interface update, code cleanup
  17. * 2002-05-12 Tomas Kasparek another code cleanup
  18. */
  19. /* $Id: uda1341.c,v 1.18 2005/11/17 14:17:21 tiwai Exp $ */
  20. #include <sound/driver.h>
  21. #include <linux/module.h>
  22. #include <linux/init.h>
  23. #include <linux/types.h>
  24. #include <linux/slab.h>
  25. #include <linux/errno.h>
  26. #include <linux/ioctl.h>
  27. #include <asm/uaccess.h>
  28. #include <sound/core.h>
  29. #include <sound/control.h>
  30. #include <sound/initval.h>
  31. #include <sound/info.h>
  32. #include <linux/l3/l3.h>
  33. #include <sound/uda1341.h>
  34. /* {{{ HW regs definition */
  35. #define STAT0 0x00
  36. #define STAT1 0x80
  37. #define STAT_MASK 0x80
  38. #define DATA0_0 0x00
  39. #define DATA0_1 0x40
  40. #define DATA0_2 0x80
  41. #define DATA_MASK 0xc0
  42. #define IS_DATA0(x) ((x) >= data0_0 && (x) <= data0_2)
  43. #define IS_DATA1(x) ((x) == data1)
  44. #define IS_STATUS(x) ((x) == stat0 || (x) == stat1)
  45. #define IS_EXTEND(x) ((x) >= ext0 && (x) <= ext6)
  46. /* }}} */
  47. static const char *peak_names[] = {
  48. "before",
  49. "after",
  50. };
  51. static const char *filter_names[] = {
  52. "flat",
  53. "min",
  54. "min",
  55. "max",
  56. };
  57. static const char *mixer_names[] = {
  58. "double differential",
  59. "input channel 1 (line in)",
  60. "input channel 2 (microphone)",
  61. "digital mixer",
  62. };
  63. static const char *deemp_names[] = {
  64. "none",
  65. "32 kHz",
  66. "44.1 kHz",
  67. "48 kHz",
  68. };
  69. enum uda1341_regs_names {
  70. stat0,
  71. stat1,
  72. data0_0,
  73. data0_1,
  74. data0_2,
  75. data1,
  76. ext0,
  77. ext1,
  78. ext2,
  79. empty,
  80. ext4,
  81. ext5,
  82. ext6,
  83. uda1341_reg_last,
  84. };
  85. static const char *uda1341_reg_names[] = {
  86. "stat 0 ",
  87. "stat 1 ",
  88. "data 00",
  89. "data 01",
  90. "data 02",
  91. "data 1 ",
  92. "ext 0",
  93. "ext 1",
  94. "ext 2",
  95. "empty",
  96. "ext 4",
  97. "ext 5",
  98. "ext 6",
  99. };
  100. static const int uda1341_enum_items[] = {
  101. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  102. 2, //peak - before/after
  103. 4, //deemp - none/32/44.1/48
  104. 0,
  105. 4, //filter - flat/min/min/max
  106. 0, 0, 0,
  107. 4, //mixer - differ/line/mic/mixer
  108. 0, 0, 0, 0, 0,
  109. };
  110. static const char ** uda1341_enum_names[] = {
  111. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  112. peak_names, //peak - before/after
  113. deemp_names, //deemp - none/32/44.1/48
  114. NULL,
  115. filter_names, //filter - flat/min/min/max
  116. NULL, NULL, NULL,
  117. mixer_names, //mixer - differ/line/mic/mixer
  118. NULL, NULL, NULL, NULL, NULL,
  119. };
  120. typedef int uda1341_cfg[CMD_LAST];
  121. struct uda1341 {
  122. int (*write) (struct l3_client *uda1341, unsigned short reg, unsigned short val);
  123. int (*read) (struct l3_client *uda1341, unsigned short reg);
  124. unsigned char regs[uda1341_reg_last];
  125. int active;
  126. spinlock_t reg_lock;
  127. struct snd_card *card;
  128. uda1341_cfg cfg;
  129. #ifdef CONFIG_PM
  130. unsigned char suspend_regs[uda1341_reg_last];
  131. uda1341_cfg suspend_cfg;
  132. #endif
  133. };
  134. /* transfer 8bit integer into string with binary representation */
  135. static void int2str_bin8(uint8_t val, char *buf)
  136. {
  137. const int size = sizeof(val) * 8;
  138. int i;
  139. for (i= 0; i < size; i++){
  140. *(buf++) = (val >> (size - 1)) ? '1' : '0';
  141. val <<= 1;
  142. }
  143. *buf = '\0'; //end the string with zero
  144. }
  145. /* {{{ HW manipulation routines */
  146. static int snd_uda1341_codec_write(struct l3_client *clnt, unsigned short reg, unsigned short val)
  147. {
  148. struct uda1341 *uda = clnt->driver_data;
  149. unsigned char buf[2] = { 0xc0, 0xe0 }; // for EXT addressing
  150. int err = 0;
  151. uda->regs[reg] = val;
  152. if (uda->active) {
  153. if (IS_DATA0(reg)) {
  154. err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)&val, 1);
  155. } else if (IS_DATA1(reg)) {
  156. err = l3_write(clnt, UDA1341_DATA1, (const unsigned char *)&val, 1);
  157. } else if (IS_STATUS(reg)) {
  158. err = l3_write(clnt, UDA1341_STATUS, (const unsigned char *)&val, 1);
  159. } else if (IS_EXTEND(reg)) {
  160. buf[0] |= (reg - ext0) & 0x7; //EXT address
  161. buf[1] |= val; //EXT data
  162. err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)buf, 2);
  163. }
  164. } else
  165. printk(KERN_ERR "UDA1341 codec not active!\n");
  166. return err;
  167. }
  168. static int snd_uda1341_codec_read(struct l3_client *clnt, unsigned short reg)
  169. {
  170. unsigned char val;
  171. int err;
  172. err = l3_read(clnt, reg, &val, 1);
  173. if (err == 1)
  174. // use just 6bits - the rest is address of the reg
  175. return val & 63;
  176. return err < 0 ? err : -EIO;
  177. }
  178. static inline int snd_uda1341_valid_reg(struct l3_client *clnt, unsigned short reg)
  179. {
  180. return reg < uda1341_reg_last;
  181. }
  182. static int snd_uda1341_update_bits(struct l3_client *clnt, unsigned short reg,
  183. unsigned short mask, unsigned short shift,
  184. unsigned short value, int flush)
  185. {
  186. int change;
  187. unsigned short old, new;
  188. struct uda1341 *uda = clnt->driver_data;
  189. #if 0
  190. printk(KERN_DEBUG "update_bits: reg: %s mask: %d shift: %d val: %d\n",
  191. uda1341_reg_names[reg], mask, shift, value);
  192. #endif
  193. if (!snd_uda1341_valid_reg(clnt, reg))
  194. return -EINVAL;
  195. spin_lock(&uda->reg_lock);
  196. old = uda->regs[reg];
  197. new = (old & ~(mask << shift)) | (value << shift);
  198. change = old != new;
  199. if (change) {
  200. if (flush) uda->write(clnt, reg, new);
  201. uda->regs[reg] = new;
  202. }
  203. spin_unlock(&uda->reg_lock);
  204. return change;
  205. }
  206. static int snd_uda1341_cfg_write(struct l3_client *clnt, unsigned short what,
  207. unsigned short value, int flush)
  208. {
  209. struct uda1341 *uda = clnt->driver_data;
  210. int ret = 0;
  211. #ifdef CONFIG_PM
  212. int reg;
  213. #endif
  214. #if 0
  215. printk(KERN_DEBUG "cfg_write what: %d value: %d\n", what, value);
  216. #endif
  217. uda->cfg[what] = value;
  218. switch(what) {
  219. case CMD_RESET:
  220. ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, 1, flush); // MUTE
  221. ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 1, flush); // RESET
  222. ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 0, flush); // RESTORE
  223. uda->cfg[CMD_RESET]=0;
  224. break;
  225. case CMD_FS:
  226. ret = snd_uda1341_update_bits(clnt, stat0, 3, 4, value, flush);
  227. break;
  228. case CMD_FORMAT:
  229. ret = snd_uda1341_update_bits(clnt, stat0, 7, 1, value, flush);
  230. break;
  231. case CMD_OGAIN:
  232. ret = snd_uda1341_update_bits(clnt, stat1, 1, 6, value, flush);
  233. break;
  234. case CMD_IGAIN:
  235. ret = snd_uda1341_update_bits(clnt, stat1, 1, 5, value, flush);
  236. break;
  237. case CMD_DAC:
  238. ret = snd_uda1341_update_bits(clnt, stat1, 1, 0, value, flush);
  239. break;
  240. case CMD_ADC:
  241. ret = snd_uda1341_update_bits(clnt, stat1, 1, 1, value, flush);
  242. break;
  243. case CMD_VOLUME:
  244. ret = snd_uda1341_update_bits(clnt, data0_0, 63, 0, value, flush);
  245. break;
  246. case CMD_BASS:
  247. ret = snd_uda1341_update_bits(clnt, data0_1, 15, 2, value, flush);
  248. break;
  249. case CMD_TREBBLE:
  250. ret = snd_uda1341_update_bits(clnt, data0_1, 3, 0, value, flush);
  251. break;
  252. case CMD_PEAK:
  253. ret = snd_uda1341_update_bits(clnt, data0_2, 1, 5, value, flush);
  254. break;
  255. case CMD_DEEMP:
  256. ret = snd_uda1341_update_bits(clnt, data0_2, 3, 3, value, flush);
  257. break;
  258. case CMD_MUTE:
  259. ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, value, flush);
  260. break;
  261. case CMD_FILTER:
  262. ret = snd_uda1341_update_bits(clnt, data0_2, 3, 0, value, flush);
  263. break;
  264. case CMD_CH1:
  265. ret = snd_uda1341_update_bits(clnt, ext0, 31, 0, value, flush);
  266. break;
  267. case CMD_CH2:
  268. ret = snd_uda1341_update_bits(clnt, ext1, 31, 0, value, flush);
  269. break;
  270. case CMD_MIC:
  271. ret = snd_uda1341_update_bits(clnt, ext2, 7, 2, value, flush);
  272. break;
  273. case CMD_MIXER:
  274. ret = snd_uda1341_update_bits(clnt, ext2, 3, 0, value, flush);
  275. break;
  276. case CMD_AGC:
  277. ret = snd_uda1341_update_bits(clnt, ext4, 1, 4, value, flush);
  278. break;
  279. case CMD_IG:
  280. ret = snd_uda1341_update_bits(clnt, ext4, 3, 0, value & 0x3, flush);
  281. ret = snd_uda1341_update_bits(clnt, ext5, 31, 0, value >> 2, flush);
  282. break;
  283. case CMD_AGC_TIME:
  284. ret = snd_uda1341_update_bits(clnt, ext6, 7, 2, value, flush);
  285. break;
  286. case CMD_AGC_LEVEL:
  287. ret = snd_uda1341_update_bits(clnt, ext6, 3, 0, value, flush);
  288. break;
  289. #ifdef CONFIG_PM
  290. case CMD_SUSPEND:
  291. for (reg = stat0; reg < uda1341_reg_last; reg++)
  292. uda->suspend_regs[reg] = uda->regs[reg];
  293. for (reg = 0; reg < CMD_LAST; reg++)
  294. uda->suspend_cfg[reg] = uda->cfg[reg];
  295. break;
  296. case CMD_RESUME:
  297. for (reg = stat0; reg < uda1341_reg_last; reg++)
  298. snd_uda1341_codec_write(clnt, reg, uda->suspend_regs[reg]);
  299. for (reg = 0; reg < CMD_LAST; reg++)
  300. uda->cfg[reg] = uda->suspend_cfg[reg];
  301. break;
  302. #endif
  303. default:
  304. ret = -EINVAL;
  305. break;
  306. }
  307. if (!uda->active)
  308. printk(KERN_ERR "UDA1341 codec not active!\n");
  309. return ret;
  310. }
  311. /* }}} */
  312. /* {{{ Proc interface */
  313. #ifdef CONFIG_PROC_FS
  314. static const char *format_names[] = {
  315. "I2S-bus",
  316. "LSB 16bits",
  317. "LSB 18bits",
  318. "LSB 20bits",
  319. "MSB",
  320. "in LSB 16bits/out MSB",
  321. "in LSB 18bits/out MSB",
  322. "in LSB 20bits/out MSB",
  323. };
  324. static const char *fs_names[] = {
  325. "512*fs",
  326. "384*fs",
  327. "256*fs",
  328. "Unused - bad value!",
  329. };
  330. static const char* bass_values[][16] = {
  331. {"0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB",
  332. "0 dB", "0 dB", "0 dB", "0 dB", "undefined", }, //flat
  333. {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB",
  334. "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min
  335. {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB",
  336. "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min
  337. {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "20 dB",
  338. "22 dB", "24 dB", "24 dB", "24 dB", "undefined",}, // max
  339. };
  340. static const char *mic_sens_value[] = {
  341. "-3 dB", "0 dB", "3 dB", "9 dB", "15 dB", "21 dB", "27 dB", "not used",
  342. };
  343. static const unsigned short AGC_atime[] = {
  344. 11, 16, 11, 16, 21, 11, 16, 21,
  345. };
  346. static const unsigned short AGC_dtime[] = {
  347. 100, 100, 200, 200, 200, 400, 400, 400,
  348. };
  349. static const char *AGC_level[] = {
  350. "-9.0", "-11.5", "-15.0", "-17.5",
  351. };
  352. static const char *ig_small_value[] = {
  353. "-3.0", "-2.5", "-2.0", "-1.5", "-1.0", "-0.5",
  354. };
  355. /*
  356. * this was computed as peak_value[i] = pow((63-i)*1.42,1.013)
  357. *
  358. * UDA1341 datasheet on page 21: Peak value (dB) = (Peak level - 63.5)*5*log2
  359. * There is an table with these values [level]=value: [3]=-90.31, [7]=-84.29
  360. * [61]=-2.78, [62] = -1.48, [63] = 0.0
  361. * I tried to compute it, but using but even using logarithm with base either 10 or 2
  362. * i was'n able to get values in the table from the formula. So I constructed another
  363. * formula (see above) to interpolate the values as good as possible. If there is some
  364. * mistake, please contact me on tomas.kasparek@seznam.cz. Thanks.
  365. * UDA1341TS datasheet is available at:
  366. * http://www-us9.semiconductors.com/acrobat/datasheets/UDA1341TS_3.pdf
  367. */
  368. static const char *peak_value[] = {
  369. "-INF dB", "N.A.", "N.A", "90.31 dB", "N.A.", "N.A.", "N.A.", "-84.29 dB",
  370. "-82.65 dB", "-81.13 dB", "-79.61 dB", "-78.09 dB", "-76.57 dB", "-75.05 dB", "-73.53 dB",
  371. "-72.01 dB", "-70.49 dB", "-68.97 dB", "-67.45 dB", "-65.93 dB", "-64.41 dB", "-62.90 dB",
  372. "-61.38 dB", "-59.86 dB", "-58.35 dB", "-56.83 dB", "-55.32 dB", "-53.80 dB", "-52.29 dB",
  373. "-50.78 dB", "-49.26 dB", "-47.75 dB", "-46.24 dB", "-44.73 dB", "-43.22 dB", "-41.71 dB",
  374. "-40.20 dB", "-38.69 dB", "-37.19 dB", "-35.68 dB", "-34.17 dB", "-32.67 dB", "-31.17 dB",
  375. "-29.66 dB", "-28.16 dB", "-26.66 dB", "-25.16 dB", "-23.66 dB", "-22.16 dB", "-20.67 dB",
  376. "-19.17 dB", "-17.68 dB", "-16.19 dB", "-14.70 dB", "-13.21 dB", "-11.72 dB", "-10.24 dB",
  377. "-8.76 dB", "-7.28 dB", "-5.81 dB", "-4.34 dB", "-2.88 dB", "-1.43 dB", "0.00 dB",
  378. };
  379. static void snd_uda1341_proc_read(struct snd_info_entry *entry,
  380. struct snd_info_buffer *buffer)
  381. {
  382. struct l3_client *clnt = entry->private_data;
  383. struct uda1341 *uda = clnt->driver_data;
  384. int peak;
  385. peak = snd_uda1341_codec_read(clnt, UDA1341_DATA1);
  386. if (peak < 0)
  387. peak = 0;
  388. snd_iprintf(buffer, "%s\n\n", uda->card->longname);
  389. // for information about computed values see UDA1341TS datasheet pages 15 - 21
  390. snd_iprintf(buffer, "DAC power : %s\n", uda->cfg[CMD_DAC] ? "on" : "off");
  391. snd_iprintf(buffer, "ADC power : %s\n", uda->cfg[CMD_ADC] ? "on" : "off");
  392. snd_iprintf(buffer, "Clock frequency : %s\n", fs_names[uda->cfg[CMD_FS]]);
  393. snd_iprintf(buffer, "Data format : %s\n\n", format_names[uda->cfg[CMD_FORMAT]]);
  394. snd_iprintf(buffer, "Filter mode : %s\n", filter_names[uda->cfg[CMD_FILTER]]);
  395. snd_iprintf(buffer, "Mixer mode : %s\n", mixer_names[uda->cfg[CMD_MIXER]]);
  396. snd_iprintf(buffer, "De-emphasis : %s\n", deemp_names[uda->cfg[CMD_DEEMP]]);
  397. snd_iprintf(buffer, "Peak detection pos. : %s\n", uda->cfg[CMD_PEAK] ? "after" : "before");
  398. snd_iprintf(buffer, "Peak value : %s\n\n", peak_value[peak]);
  399. snd_iprintf(buffer, "Automatic Gain Ctrl : %s\n", uda->cfg[CMD_AGC] ? "on" : "off");
  400. snd_iprintf(buffer, "AGC attack time : %d ms\n", AGC_atime[uda->cfg[CMD_AGC_TIME]]);
  401. snd_iprintf(buffer, "AGC decay time : %d ms\n", AGC_dtime[uda->cfg[CMD_AGC_TIME]]);
  402. snd_iprintf(buffer, "AGC output level : %s dB\n\n", AGC_level[uda->cfg[CMD_AGC_LEVEL]]);
  403. snd_iprintf(buffer, "Mute : %s\n", uda->cfg[CMD_MUTE] ? "on" : "off");
  404. if (uda->cfg[CMD_VOLUME] == 0)
  405. snd_iprintf(buffer, "Volume : 0 dB\n");
  406. else if (uda->cfg[CMD_VOLUME] < 62)
  407. snd_iprintf(buffer, "Volume : %d dB\n", -1*uda->cfg[CMD_VOLUME] +1);
  408. else
  409. snd_iprintf(buffer, "Volume : -INF dB\n");
  410. snd_iprintf(buffer, "Bass : %s\n", bass_values[uda->cfg[CMD_FILTER]][uda->cfg[CMD_BASS]]);
  411. snd_iprintf(buffer, "Trebble : %d dB\n", uda->cfg[CMD_FILTER] ? 2*uda->cfg[CMD_TREBBLE] : 0);
  412. snd_iprintf(buffer, "Input Gain (6dB) : %s\n", uda->cfg[CMD_IGAIN] ? "on" : "off");
  413. snd_iprintf(buffer, "Output Gain (6dB) : %s\n", uda->cfg[CMD_OGAIN] ? "on" : "off");
  414. snd_iprintf(buffer, "Mic sensitivity : %s\n", mic_sens_value[uda->cfg[CMD_MIC]]);
  415. if(uda->cfg[CMD_CH1] < 31)
  416. snd_iprintf(buffer, "Mixer gain channel 1: -%d.%c dB\n",
  417. ((uda->cfg[CMD_CH1] >> 1) * 3) + (uda->cfg[CMD_CH1] & 1),
  418. uda->cfg[CMD_CH1] & 1 ? '5' : '0');
  419. else
  420. snd_iprintf(buffer, "Mixer gain channel 1: -INF dB\n");
  421. if(uda->cfg[CMD_CH2] < 31)
  422. snd_iprintf(buffer, "Mixer gain channel 2: -%d.%c dB\n",
  423. ((uda->cfg[CMD_CH2] >> 1) * 3) + (uda->cfg[CMD_CH2] & 1),
  424. uda->cfg[CMD_CH2] & 1 ? '5' : '0');
  425. else
  426. snd_iprintf(buffer, "Mixer gain channel 2: -INF dB\n");
  427. if(uda->cfg[CMD_IG] > 5)
  428. snd_iprintf(buffer, "Input Amp. Gain ch 2: %d.%c dB\n",
  429. (uda->cfg[CMD_IG] >> 1) -3, uda->cfg[CMD_IG] & 1 ? '5' : '0');
  430. else
  431. snd_iprintf(buffer, "Input Amp. Gain ch 2: %s dB\n", ig_small_value[uda->cfg[CMD_IG]]);
  432. }
  433. static void snd_uda1341_proc_regs_read(struct snd_info_entry *entry,
  434. struct snd_info_buffer *buffer)
  435. {
  436. struct l3_client *clnt = entry->private_data;
  437. struct uda1341 *uda = clnt->driver_data;
  438. int reg;
  439. char buf[12];
  440. for (reg = 0; reg < uda1341_reg_last; reg ++) {
  441. if (reg == empty)
  442. continue;
  443. int2str_bin8(uda->regs[reg], buf);
  444. snd_iprintf(buffer, "%s = %s\n", uda1341_reg_names[reg], buf);
  445. }
  446. int2str_bin8(snd_uda1341_codec_read(clnt, UDA1341_DATA1), buf);
  447. snd_iprintf(buffer, "DATA1 = %s\n", buf);
  448. }
  449. #endif /* CONFIG_PROC_FS */
  450. static void __devinit snd_uda1341_proc_init(struct snd_card *card, struct l3_client *clnt)
  451. {
  452. struct snd_info_entry *entry;
  453. if (! snd_card_proc_new(card, "uda1341", &entry))
  454. snd_info_set_text_ops(entry, clnt, 1024, snd_uda1341_proc_read);
  455. if (! snd_card_proc_new(card, "uda1341-regs", &entry))
  456. snd_info_set_text_ops(entry, clnt, 1024, snd_uda1341_proc_regs_read);
  457. }
  458. /* }}} */
  459. /* {{{ Mixer controls setting */
  460. /* {{{ UDA1341 single functions */
  461. #define UDA1341_SINGLE(xname, where, reg, shift, mask, invert) \
  462. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_single, \
  463. .get = snd_uda1341_get_single, .put = snd_uda1341_put_single, \
  464. .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \
  465. }
  466. static int snd_uda1341_info_single(struct snd_kcontrol *kcontrol,
  467. struct snd_ctl_elem_info *uinfo)
  468. {
  469. int mask = (kcontrol->private_value >> 12) & 63;
  470. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  471. uinfo->count = 1;
  472. uinfo->value.integer.min = 0;
  473. uinfo->value.integer.max = mask;
  474. return 0;
  475. }
  476. static int snd_uda1341_get_single(struct snd_kcontrol *kcontrol,
  477. struct snd_ctl_elem_value *ucontrol)
  478. {
  479. struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
  480. struct uda1341 *uda = clnt->driver_data;
  481. int where = kcontrol->private_value & 31;
  482. int mask = (kcontrol->private_value >> 12) & 63;
  483. int invert = (kcontrol->private_value >> 18) & 1;
  484. ucontrol->value.integer.value[0] = uda->cfg[where];
  485. if (invert)
  486. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  487. return 0;
  488. }
  489. static int snd_uda1341_put_single(struct snd_kcontrol *kcontrol,
  490. struct snd_ctl_elem_value *ucontrol)
  491. {
  492. struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
  493. struct uda1341 *uda = clnt->driver_data;
  494. int where = kcontrol->private_value & 31;
  495. int reg = (kcontrol->private_value >> 5) & 15;
  496. int shift = (kcontrol->private_value >> 9) & 7;
  497. int mask = (kcontrol->private_value >> 12) & 63;
  498. int invert = (kcontrol->private_value >> 18) & 1;
  499. unsigned short val;
  500. val = (ucontrol->value.integer.value[0] & mask);
  501. if (invert)
  502. val = mask - val;
  503. uda->cfg[where] = val;
  504. return snd_uda1341_update_bits(clnt, reg, mask, shift, val, FLUSH);
  505. }
  506. /* }}} */
  507. /* {{{ UDA1341 enum functions */
  508. #define UDA1341_ENUM(xname, where, reg, shift, mask, invert) \
  509. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_enum, \
  510. .get = snd_uda1341_get_enum, .put = snd_uda1341_put_enum, \
  511. .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \
  512. }
  513. static int snd_uda1341_info_enum(struct snd_kcontrol *kcontrol,
  514. struct snd_ctl_elem_info *uinfo)
  515. {
  516. int where = kcontrol->private_value & 31;
  517. const char **texts;
  518. // this register we don't handle this way
  519. if (!uda1341_enum_items[where])
  520. return -EINVAL;
  521. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  522. uinfo->count = 1;
  523. uinfo->value.enumerated.items = uda1341_enum_items[where];
  524. if (uinfo->value.enumerated.item >= uda1341_enum_items[where])
  525. uinfo->value.enumerated.item = uda1341_enum_items[where] - 1;
  526. texts = uda1341_enum_names[where];
  527. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  528. return 0;
  529. }
  530. static int snd_uda1341_get_enum(struct snd_kcontrol *kcontrol,
  531. struct snd_ctl_elem_value *ucontrol)
  532. {
  533. struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
  534. struct uda1341 *uda = clnt->driver_data;
  535. int where = kcontrol->private_value & 31;
  536. ucontrol->value.enumerated.item[0] = uda->cfg[where];
  537. return 0;
  538. }
  539. static int snd_uda1341_put_enum(struct snd_kcontrol *kcontrol,
  540. struct snd_ctl_elem_value *ucontrol)
  541. {
  542. struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
  543. struct uda1341 *uda = clnt->driver_data;
  544. int where = kcontrol->private_value & 31;
  545. int reg = (kcontrol->private_value >> 5) & 15;
  546. int shift = (kcontrol->private_value >> 9) & 7;
  547. int mask = (kcontrol->private_value >> 12) & 63;
  548. uda->cfg[where] = (ucontrol->value.enumerated.item[0] & mask);
  549. return snd_uda1341_update_bits(clnt, reg, mask, shift, uda->cfg[where], FLUSH);
  550. }
  551. /* }}} */
  552. /* {{{ UDA1341 2regs functions */
  553. #define UDA1341_2REGS(xname, where, reg_1, reg_2, shift_1, shift_2, mask_1, mask_2, invert) \
  554. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_uda1341_info_2regs, \
  555. .get = snd_uda1341_get_2regs, .put = snd_uda1341_put_2regs, \
  556. .private_value = where | (reg_1 << 5) | (reg_2 << 9) | (shift_1 << 13) | (shift_2 << 16) | \
  557. (mask_1 << 19) | (mask_2 << 25) | (invert << 31) \
  558. }
  559. static int snd_uda1341_info_2regs(struct snd_kcontrol *kcontrol,
  560. struct snd_ctl_elem_info *uinfo)
  561. {
  562. int mask_1 = (kcontrol->private_value >> 19) & 63;
  563. int mask_2 = (kcontrol->private_value >> 25) & 63;
  564. int mask;
  565. mask = (mask_2 + 1) * (mask_1 + 1) - 1;
  566. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  567. uinfo->count = 1;
  568. uinfo->value.integer.min = 0;
  569. uinfo->value.integer.max = mask;
  570. return 0;
  571. }
  572. static int snd_uda1341_get_2regs(struct snd_kcontrol *kcontrol,
  573. struct snd_ctl_elem_value *ucontrol)
  574. {
  575. struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
  576. struct uda1341 *uda = clnt->driver_data;
  577. int where = kcontrol->private_value & 31;
  578. int mask_1 = (kcontrol->private_value >> 19) & 63;
  579. int mask_2 = (kcontrol->private_value >> 25) & 63;
  580. int invert = (kcontrol->private_value >> 31) & 1;
  581. int mask;
  582. mask = (mask_2 + 1) * (mask_1 + 1) - 1;
  583. ucontrol->value.integer.value[0] = uda->cfg[where];
  584. if (invert)
  585. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  586. return 0;
  587. }
  588. static int snd_uda1341_put_2regs(struct snd_kcontrol *kcontrol,
  589. struct snd_ctl_elem_value *ucontrol)
  590. {
  591. struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
  592. struct uda1341 *uda = clnt->driver_data;
  593. int where = kcontrol->private_value & 31;
  594. int reg_1 = (kcontrol->private_value >> 5) & 15;
  595. int reg_2 = (kcontrol->private_value >> 9) & 15;
  596. int shift_1 = (kcontrol->private_value >> 13) & 7;
  597. int shift_2 = (kcontrol->private_value >> 16) & 7;
  598. int mask_1 = (kcontrol->private_value >> 19) & 63;
  599. int mask_2 = (kcontrol->private_value >> 25) & 63;
  600. int invert = (kcontrol->private_value >> 31) & 1;
  601. int mask;
  602. unsigned short val1, val2, val;
  603. val = ucontrol->value.integer.value[0];
  604. mask = (mask_2 + 1) * (mask_1 + 1) - 1;
  605. val1 = val & mask_1;
  606. val2 = (val / (mask_1 + 1)) & mask_2;
  607. if (invert) {
  608. val1 = mask_1 - val1;
  609. val2 = mask_2 - val2;
  610. }
  611. uda->cfg[where] = invert ? mask - val : val;
  612. //FIXME - return value
  613. snd_uda1341_update_bits(clnt, reg_1, mask_1, shift_1, val1, FLUSH);
  614. return snd_uda1341_update_bits(clnt, reg_2, mask_2, shift_2, val2, FLUSH);
  615. }
  616. /* }}} */
  617. static struct snd_kcontrol_new snd_uda1341_controls[] = {
  618. UDA1341_SINGLE("Master Playback Switch", CMD_MUTE, data0_2, 2, 1, 1),
  619. UDA1341_SINGLE("Master Playback Volume", CMD_VOLUME, data0_0, 0, 63, 1),
  620. UDA1341_SINGLE("Bass Playback Volume", CMD_BASS, data0_1, 2, 15, 0),
  621. UDA1341_SINGLE("Treble Playback Volume", CMD_TREBBLE, data0_1, 0, 3, 0),
  622. UDA1341_SINGLE("Input Gain Switch", CMD_IGAIN, stat1, 5, 1, 0),
  623. UDA1341_SINGLE("Output Gain Switch", CMD_OGAIN, stat1, 6, 1, 0),
  624. UDA1341_SINGLE("Mixer Gain Channel 1 Volume", CMD_CH1, ext0, 0, 31, 1),
  625. UDA1341_SINGLE("Mixer Gain Channel 2 Volume", CMD_CH2, ext1, 0, 31, 1),
  626. UDA1341_SINGLE("Mic Sensitivity Volume", CMD_MIC, ext2, 2, 7, 0),
  627. UDA1341_SINGLE("AGC Output Level", CMD_AGC_LEVEL, ext6, 0, 3, 0),
  628. UDA1341_SINGLE("AGC Time Constant", CMD_AGC_TIME, ext6, 2, 7, 0),
  629. UDA1341_SINGLE("AGC Time Constant Switch", CMD_AGC, ext4, 4, 1, 0),
  630. UDA1341_SINGLE("DAC Power", CMD_DAC, stat1, 0, 1, 0),
  631. UDA1341_SINGLE("ADC Power", CMD_ADC, stat1, 1, 1, 0),
  632. UDA1341_ENUM("Peak detection", CMD_PEAK, data0_2, 5, 1, 0),
  633. UDA1341_ENUM("De-emphasis", CMD_DEEMP, data0_2, 3, 3, 0),
  634. UDA1341_ENUM("Mixer mode", CMD_MIXER, ext2, 0, 3, 0),
  635. UDA1341_ENUM("Filter mode", CMD_FILTER, data0_2, 0, 3, 0),
  636. UDA1341_2REGS("Gain Input Amplifier Gain (channel 2)", CMD_IG, ext4, ext5, 0, 0, 3, 31, 0),
  637. };
  638. static void uda1341_free(struct l3_client *clnt)
  639. {
  640. l3_detach_client(clnt); // calls kfree for driver_data (struct uda1341)
  641. kfree(clnt);
  642. }
  643. static int uda1341_dev_free(struct snd_device *device)
  644. {
  645. struct l3_client *clnt = device->device_data;
  646. uda1341_free(clnt);
  647. return 0;
  648. }
  649. int __init snd_chip_uda1341_mixer_new(struct snd_card *card, struct l3_client **clntp)
  650. {
  651. static struct snd_device_ops ops = {
  652. .dev_free = uda1341_dev_free,
  653. };
  654. struct l3_client *clnt;
  655. int idx, err;
  656. snd_assert(card != NULL, return -EINVAL);
  657. clnt = kzalloc(sizeof(*clnt), GFP_KERNEL);
  658. if (clnt == NULL)
  659. return -ENOMEM;
  660. if ((err = l3_attach_client(clnt, "l3-bit-sa1100-gpio", UDA1341_ALSA_NAME))) {
  661. kfree(clnt);
  662. return err;
  663. }
  664. for (idx = 0; idx < ARRAY_SIZE(snd_uda1341_controls); idx++) {
  665. if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_uda1341_controls[idx], clnt))) < 0) {
  666. uda1341_free(clnt);
  667. return err;
  668. }
  669. }
  670. if ((err = snd_device_new(card, SNDRV_DEV_CODEC, clnt, &ops)) < 0) {
  671. uda1341_free(clnt);
  672. return err;
  673. }
  674. *clntp = clnt;
  675. strcpy(card->mixername, "UDA1341TS Mixer");
  676. ((struct uda1341 *)clnt->driver_data)->card = card;
  677. snd_uda1341_proc_init(card, clnt);
  678. return 0;
  679. }
  680. /* }}} */
  681. /* {{{ L3 operations */
  682. static int uda1341_attach(struct l3_client *clnt)
  683. {
  684. struct uda1341 *uda;
  685. uda = kzalloc(sizeof(*uda), 0, GFP_KERNEL);
  686. if (!uda)
  687. return -ENOMEM;
  688. /* init fixed parts of my copy of registers */
  689. uda->regs[stat0] = STAT0;
  690. uda->regs[stat1] = STAT1;
  691. uda->regs[data0_0] = DATA0_0;
  692. uda->regs[data0_1] = DATA0_1;
  693. uda->regs[data0_2] = DATA0_2;
  694. uda->write = snd_uda1341_codec_write;
  695. uda->read = snd_uda1341_codec_read;
  696. spin_lock_init(&uda->reg_lock);
  697. clnt->driver_data = uda;
  698. return 0;
  699. }
  700. static void uda1341_detach(struct l3_client *clnt)
  701. {
  702. kfree(clnt->driver_data);
  703. }
  704. static int
  705. uda1341_command(struct l3_client *clnt, int cmd, void *arg)
  706. {
  707. if (cmd != CMD_READ_REG)
  708. return snd_uda1341_cfg_write(clnt, cmd, (int) arg, FLUSH);
  709. return snd_uda1341_codec_read(clnt, (int) arg);
  710. }
  711. static int uda1341_open(struct l3_client *clnt)
  712. {
  713. struct uda1341 *uda = clnt->driver_data;
  714. uda->active = 1;
  715. /* init default configuration */
  716. snd_uda1341_cfg_write(clnt, CMD_RESET, 0, REGS_ONLY);
  717. snd_uda1341_cfg_write(clnt, CMD_FS, F256, FLUSH); // unknown state after reset
  718. snd_uda1341_cfg_write(clnt, CMD_FORMAT, LSB16, FLUSH); // unknown state after reset
  719. snd_uda1341_cfg_write(clnt, CMD_OGAIN, ON, FLUSH); // default off after reset
  720. snd_uda1341_cfg_write(clnt, CMD_IGAIN, ON, FLUSH); // default off after reset
  721. snd_uda1341_cfg_write(clnt, CMD_DAC, ON, FLUSH); // ??? default value after reset
  722. snd_uda1341_cfg_write(clnt, CMD_ADC, ON, FLUSH); // ??? default value after reset
  723. snd_uda1341_cfg_write(clnt, CMD_VOLUME, 20, FLUSH); // default 0dB after reset
  724. snd_uda1341_cfg_write(clnt, CMD_BASS, 0, REGS_ONLY); // default value after reset
  725. snd_uda1341_cfg_write(clnt, CMD_TREBBLE, 0, REGS_ONLY); // default value after reset
  726. snd_uda1341_cfg_write(clnt, CMD_PEAK, AFTER, REGS_ONLY);// default value after reset
  727. snd_uda1341_cfg_write(clnt, CMD_DEEMP, NONE, REGS_ONLY);// default value after reset
  728. //at this moment should be QMUTED by h3600_audio_init
  729. snd_uda1341_cfg_write(clnt, CMD_MUTE, OFF, REGS_ONLY); // default value after reset
  730. snd_uda1341_cfg_write(clnt, CMD_FILTER, MAX, FLUSH); // defaul flat after reset
  731. snd_uda1341_cfg_write(clnt, CMD_CH1, 31, FLUSH); // default value after reset
  732. snd_uda1341_cfg_write(clnt, CMD_CH2, 4, FLUSH); // default value after reset
  733. snd_uda1341_cfg_write(clnt, CMD_MIC, 4, FLUSH); // default 0dB after reset
  734. snd_uda1341_cfg_write(clnt, CMD_MIXER, MIXER, FLUSH); // default doub.dif.mode
  735. snd_uda1341_cfg_write(clnt, CMD_AGC, OFF, FLUSH); // default value after reset
  736. snd_uda1341_cfg_write(clnt, CMD_IG, 0, FLUSH); // unknown state after reset
  737. snd_uda1341_cfg_write(clnt, CMD_AGC_TIME, 0, FLUSH); // default value after reset
  738. snd_uda1341_cfg_write(clnt, CMD_AGC_LEVEL, 0, FLUSH); // default value after reset
  739. return 0;
  740. }
  741. static void uda1341_close(struct l3_client *clnt)
  742. {
  743. struct uda1341 *uda = clnt->driver_data;
  744. uda->active = 0;
  745. }
  746. /* }}} */
  747. /* {{{ Module and L3 initialization */
  748. static struct l3_ops uda1341_ops = {
  749. .open = uda1341_open,
  750. .command = uda1341_command,
  751. .close = uda1341_close,
  752. };
  753. static struct l3_driver uda1341_driver = {
  754. .name = UDA1341_ALSA_NAME,
  755. .attach_client = uda1341_attach,
  756. .detach_client = uda1341_detach,
  757. .ops = &uda1341_ops,
  758. .owner = THIS_MODULE,
  759. };
  760. static int __init uda1341_init(void)
  761. {
  762. return l3_add_driver(&uda1341_driver);
  763. }
  764. static void __exit uda1341_exit(void)
  765. {
  766. l3_del_driver(&uda1341_driver);
  767. }
  768. module_init(uda1341_init);
  769. module_exit(uda1341_exit);
  770. MODULE_AUTHOR("Tomas Kasparek <tomas.kasparek@seznam.cz>");
  771. MODULE_LICENSE("GPL");
  772. MODULE_DESCRIPTION("Philips UDA1341 CODEC driver for ALSA");
  773. MODULE_SUPPORTED_DEVICE("{{UDA1341,UDA1341TS}}");
  774. EXPORT_SYMBOL(snd_chip_uda1341_mixer_new);
  775. /* }}} */
  776. /*
  777. * Local variables:
  778. * indent-tabs-mode: t
  779. * End:
  780. */