vx_core.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822
  1. /*
  2. * Driver for Digigram VX soundcards
  3. *
  4. * Hardware core part
  5. *
  6. * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <sound/driver.h>
  23. #include <linux/delay.h>
  24. #include <linux/slab.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/init.h>
  27. #include <linux/device.h>
  28. #include <linux/firmware.h>
  29. #include <sound/core.h>
  30. #include <sound/pcm.h>
  31. #include <sound/asoundef.h>
  32. #include <sound/info.h>
  33. #include <asm/io.h>
  34. #include <sound/vx_core.h>
  35. #include "vx_cmd.h"
  36. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  37. MODULE_DESCRIPTION("Common routines for Digigram VX drivers");
  38. MODULE_LICENSE("GPL");
  39. /*
  40. * vx_check_reg_bit - wait for the specified bit is set/reset on a register
  41. * @reg: register to check
  42. * @mask: bit mask
  43. * @bit: resultant bit to be checked
  44. * @time: time-out of loop in msec
  45. *
  46. * returns zero if a bit matches, or a negative error code.
  47. */
  48. int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time)
  49. {
  50. unsigned long end_time = jiffies + (time * HZ + 999) / 1000;
  51. #ifdef CONFIG_SND_DEBUG
  52. static char *reg_names[VX_REG_MAX] = {
  53. "ICR", "CVR", "ISR", "IVR", "RXH", "RXM", "RXL",
  54. "DMA", "CDSP", "RFREQ", "RUER/V2", "DATA", "MEMIRQ",
  55. "ACQ", "BIT0", "BIT1", "MIC0", "MIC1", "MIC2",
  56. "MIC3", "INTCSR", "CNTRL", "GPIOC",
  57. "LOFREQ", "HIFREQ", "CSUER", "RUER"
  58. };
  59. #endif
  60. do {
  61. if ((snd_vx_inb(chip, reg) & mask) == bit)
  62. return 0;
  63. //msleep(10);
  64. } while (time_after_eq(end_time, jiffies));
  65. snd_printd(KERN_DEBUG "vx_check_reg_bit: timeout, reg=%s, mask=0x%x, val=0x%x\n", reg_names[reg], mask, snd_vx_inb(chip, reg));
  66. return -EIO;
  67. }
  68. /*
  69. * vx_send_irq_dsp - set command irq bit
  70. * @num: the requested IRQ type, IRQ_XXX
  71. *
  72. * this triggers the specified IRQ request
  73. * returns 0 if successful, or a negative error code.
  74. *
  75. */
  76. static int vx_send_irq_dsp(struct vx_core *chip, int num)
  77. {
  78. int nirq;
  79. /* wait for Hc = 0 */
  80. if (snd_vx_check_reg_bit(chip, VX_CVR, CVR_HC, 0, 200) < 0)
  81. return -EIO;
  82. nirq = num;
  83. if (vx_has_new_dsp(chip))
  84. nirq += VXP_IRQ_OFFSET;
  85. vx_outb(chip, CVR, (nirq >> 1) | CVR_HC);
  86. return 0;
  87. }
  88. /*
  89. * vx_reset_chk - reset CHK bit on ISR
  90. *
  91. * returns 0 if successful, or a negative error code.
  92. */
  93. static int vx_reset_chk(struct vx_core *chip)
  94. {
  95. /* Reset irq CHK */
  96. if (vx_send_irq_dsp(chip, IRQ_RESET_CHK) < 0)
  97. return -EIO;
  98. /* Wait until CHK = 0 */
  99. if (vx_check_isr(chip, ISR_CHK, 0, 200) < 0)
  100. return -EIO;
  101. return 0;
  102. }
  103. /*
  104. * vx_transfer_end - terminate message transfer
  105. * @cmd: IRQ message to send (IRQ_MESS_XXX_END)
  106. *
  107. * returns 0 if successful, or a negative error code.
  108. * the error code can be VX-specific, retrieved via vx_get_error().
  109. * NB: call with spinlock held!
  110. */
  111. static int vx_transfer_end(struct vx_core *chip, int cmd)
  112. {
  113. int err;
  114. if ((err = vx_reset_chk(chip)) < 0)
  115. return err;
  116. /* irq MESS_READ/WRITE_END */
  117. if ((err = vx_send_irq_dsp(chip, cmd)) < 0)
  118. return err;
  119. /* Wait CHK = 1 */
  120. if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
  121. return err;
  122. /* If error, Read RX */
  123. if ((err = vx_inb(chip, ISR)) & ISR_ERR) {
  124. if ((err = vx_wait_for_rx_full(chip)) < 0) {
  125. snd_printd(KERN_DEBUG "transfer_end: error in rx_full\n");
  126. return err;
  127. }
  128. err = vx_inb(chip, RXH) << 16;
  129. err |= vx_inb(chip, RXM) << 8;
  130. err |= vx_inb(chip, RXL);
  131. snd_printd(KERN_DEBUG "transfer_end: error = 0x%x\n", err);
  132. return -(VX_ERR_MASK | err);
  133. }
  134. return 0;
  135. }
  136. /*
  137. * vx_read_status - return the status rmh
  138. * @rmh: rmh record to store the status
  139. *
  140. * returns 0 if successful, or a negative error code.
  141. * the error code can be VX-specific, retrieved via vx_get_error().
  142. * NB: call with spinlock held!
  143. */
  144. static int vx_read_status(struct vx_core *chip, struct vx_rmh *rmh)
  145. {
  146. int i, err, val, size;
  147. /* no read necessary? */
  148. if (rmh->DspStat == RMH_SSIZE_FIXED && rmh->LgStat == 0)
  149. return 0;
  150. /* Wait for RX full (with timeout protection)
  151. * The first word of status is in RX
  152. */
  153. err = vx_wait_for_rx_full(chip);
  154. if (err < 0)
  155. return err;
  156. /* Read RX */
  157. val = vx_inb(chip, RXH) << 16;
  158. val |= vx_inb(chip, RXM) << 8;
  159. val |= vx_inb(chip, RXL);
  160. /* If status given by DSP, let's decode its size */
  161. switch (rmh->DspStat) {
  162. case RMH_SSIZE_ARG:
  163. size = val & 0xff;
  164. rmh->Stat[0] = val & 0xffff00;
  165. rmh->LgStat = size + 1;
  166. break;
  167. case RMH_SSIZE_MASK:
  168. /* Let's count the arg numbers from a mask */
  169. rmh->Stat[0] = val;
  170. size = 0;
  171. while (val) {
  172. if (val & 0x01)
  173. size++;
  174. val >>= 1;
  175. }
  176. rmh->LgStat = size + 1;
  177. break;
  178. default:
  179. /* else retrieve the status length given by the driver */
  180. size = rmh->LgStat;
  181. rmh->Stat[0] = val; /* Val is the status 1st word */
  182. size--; /* hence adjust remaining length */
  183. break;
  184. }
  185. if (size < 1)
  186. return 0;
  187. snd_assert(size <= SIZE_MAX_STATUS, return -EINVAL);
  188. for (i = 1; i <= size; i++) {
  189. /* trigger an irq MESS_WRITE_NEXT */
  190. err = vx_send_irq_dsp(chip, IRQ_MESS_WRITE_NEXT);
  191. if (err < 0)
  192. return err;
  193. /* Wait for RX full (with timeout protection) */
  194. err = vx_wait_for_rx_full(chip);
  195. if (err < 0)
  196. return err;
  197. rmh->Stat[i] = vx_inb(chip, RXH) << 16;
  198. rmh->Stat[i] |= vx_inb(chip, RXM) << 8;
  199. rmh->Stat[i] |= vx_inb(chip, RXL);
  200. }
  201. return vx_transfer_end(chip, IRQ_MESS_WRITE_END);
  202. }
  203. #define MASK_MORE_THAN_1_WORD_COMMAND 0x00008000
  204. #define MASK_1_WORD_COMMAND 0x00ff7fff
  205. /*
  206. * vx_send_msg_nolock - send a DSP message and read back the status
  207. * @rmh: the rmh record to send and receive
  208. *
  209. * returns 0 if successful, or a negative error code.
  210. * the error code can be VX-specific, retrieved via vx_get_error().
  211. *
  212. * this function doesn't call spinlock at all.
  213. */
  214. int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh)
  215. {
  216. int i, err;
  217. if (chip->chip_status & VX_STAT_IS_STALE)
  218. return -EBUSY;
  219. if ((err = vx_reset_chk(chip)) < 0) {
  220. snd_printd(KERN_DEBUG "vx_send_msg: vx_reset_chk error\n");
  221. return err;
  222. }
  223. #if 0
  224. printk(KERN_DEBUG "rmh: cmd = 0x%06x, length = %d, stype = %d\n",
  225. rmh->Cmd[0], rmh->LgCmd, rmh->DspStat);
  226. if (rmh->LgCmd > 1) {
  227. printk(KERN_DEBUG " ");
  228. for (i = 1; i < rmh->LgCmd; i++)
  229. printk("0x%06x ", rmh->Cmd[i]);
  230. printk("\n");
  231. }
  232. #endif
  233. /* Check bit M is set according to length of the command */
  234. if (rmh->LgCmd > 1)
  235. rmh->Cmd[0] |= MASK_MORE_THAN_1_WORD_COMMAND;
  236. else
  237. rmh->Cmd[0] &= MASK_1_WORD_COMMAND;
  238. /* Wait for TX empty */
  239. if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) {
  240. snd_printd(KERN_DEBUG "vx_send_msg: wait tx empty error\n");
  241. return err;
  242. }
  243. /* Write Cmd[0] */
  244. vx_outb(chip, TXH, (rmh->Cmd[0] >> 16) & 0xff);
  245. vx_outb(chip, TXM, (rmh->Cmd[0] >> 8) & 0xff);
  246. vx_outb(chip, TXL, rmh->Cmd[0] & 0xff);
  247. /* Trigger irq MESSAGE */
  248. if ((err = vx_send_irq_dsp(chip, IRQ_MESSAGE)) < 0) {
  249. snd_printd(KERN_DEBUG "vx_send_msg: send IRQ_MESSAGE error\n");
  250. return err;
  251. }
  252. /* Wait for CHK = 1 */
  253. if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
  254. return err;
  255. /* If error, get error value from RX */
  256. if (vx_inb(chip, ISR) & ISR_ERR) {
  257. if ((err = vx_wait_for_rx_full(chip)) < 0) {
  258. snd_printd(KERN_DEBUG "vx_send_msg: rx_full read error\n");
  259. return err;
  260. }
  261. err = vx_inb(chip, RXH) << 16;
  262. err |= vx_inb(chip, RXM) << 8;
  263. err |= vx_inb(chip, RXL);
  264. snd_printd(KERN_DEBUG "msg got error = 0x%x at cmd[0]\n", err);
  265. err = -(VX_ERR_MASK | err);
  266. return err;
  267. }
  268. /* Send the other words */
  269. if (rmh->LgCmd > 1) {
  270. for (i = 1; i < rmh->LgCmd; i++) {
  271. /* Wait for TX ready */
  272. if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) {
  273. snd_printd(KERN_DEBUG "vx_send_msg: tx_ready error\n");
  274. return err;
  275. }
  276. /* Write Cmd[i] */
  277. vx_outb(chip, TXH, (rmh->Cmd[i] >> 16) & 0xff);
  278. vx_outb(chip, TXM, (rmh->Cmd[i] >> 8) & 0xff);
  279. vx_outb(chip, TXL, rmh->Cmd[i] & 0xff);
  280. /* Trigger irq MESS_READ_NEXT */
  281. if ((err = vx_send_irq_dsp(chip, IRQ_MESS_READ_NEXT)) < 0) {
  282. snd_printd(KERN_DEBUG "vx_send_msg: IRQ_READ_NEXT error\n");
  283. return err;
  284. }
  285. }
  286. /* Wait for TX empty */
  287. if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) {
  288. snd_printd(KERN_DEBUG "vx_send_msg: TX_READY error\n");
  289. return err;
  290. }
  291. /* End of transfer */
  292. err = vx_transfer_end(chip, IRQ_MESS_READ_END);
  293. if (err < 0)
  294. return err;
  295. }
  296. return vx_read_status(chip, rmh);
  297. }
  298. /*
  299. * vx_send_msg - send a DSP message with spinlock
  300. * @rmh: the rmh record to send and receive
  301. *
  302. * returns 0 if successful, or a negative error code.
  303. * see vx_send_msg_nolock().
  304. */
  305. int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh)
  306. {
  307. unsigned long flags;
  308. int err;
  309. spin_lock_irqsave(&chip->lock, flags);
  310. err = vx_send_msg_nolock(chip, rmh);
  311. spin_unlock_irqrestore(&chip->lock, flags);
  312. return err;
  313. }
  314. /*
  315. * vx_send_rih_nolock - send an RIH to xilinx
  316. * @cmd: the command to send
  317. *
  318. * returns 0 if successful, or a negative error code.
  319. * the error code can be VX-specific, retrieved via vx_get_error().
  320. *
  321. * this function doesn't call spinlock at all.
  322. *
  323. * unlike RMH, no command is sent to DSP.
  324. */
  325. int vx_send_rih_nolock(struct vx_core *chip, int cmd)
  326. {
  327. int err;
  328. if (chip->chip_status & VX_STAT_IS_STALE)
  329. return -EBUSY;
  330. #if 0
  331. printk(KERN_DEBUG "send_rih: cmd = 0x%x\n", cmd);
  332. #endif
  333. if ((err = vx_reset_chk(chip)) < 0)
  334. return err;
  335. /* send the IRQ */
  336. if ((err = vx_send_irq_dsp(chip, cmd)) < 0)
  337. return err;
  338. /* Wait CHK = 1 */
  339. if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
  340. return err;
  341. /* If error, read RX */
  342. if (vx_inb(chip, ISR) & ISR_ERR) {
  343. if ((err = vx_wait_for_rx_full(chip)) < 0)
  344. return err;
  345. err = vx_inb(chip, RXH) << 16;
  346. err |= vx_inb(chip, RXM) << 8;
  347. err |= vx_inb(chip, RXL);
  348. return -(VX_ERR_MASK | err);
  349. }
  350. return 0;
  351. }
  352. /*
  353. * vx_send_rih - send an RIH with spinlock
  354. * @cmd: the command to send
  355. *
  356. * see vx_send_rih_nolock().
  357. */
  358. int vx_send_rih(struct vx_core *chip, int cmd)
  359. {
  360. unsigned long flags;
  361. int err;
  362. spin_lock_irqsave(&chip->lock, flags);
  363. err = vx_send_rih_nolock(chip, cmd);
  364. spin_unlock_irqrestore(&chip->lock, flags);
  365. return err;
  366. }
  367. #define END_OF_RESET_WAIT_TIME 500 /* us */
  368. /**
  369. * snd_vx_boot_xilinx - boot up the xilinx interface
  370. * @boot: the boot record to load
  371. */
  372. int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *boot)
  373. {
  374. unsigned int i;
  375. int no_fillup = vx_has_new_dsp(chip);
  376. /* check the length of boot image */
  377. snd_assert(boot->size > 0, return -EINVAL);
  378. snd_assert(boot->size % 3 == 0, return -EINVAL);
  379. #if 0
  380. {
  381. /* more strict check */
  382. unsigned int c = ((u32)boot->data[0] << 16) | ((u32)boot->data[1] << 8) | boot->data[2];
  383. snd_assert(boot->size == (c + 2) * 3, return -EINVAL);
  384. }
  385. #endif
  386. /* reset dsp */
  387. vx_reset_dsp(chip);
  388. udelay(END_OF_RESET_WAIT_TIME); /* another wait? */
  389. /* download boot strap */
  390. for (i = 0; i < 0x600; i += 3) {
  391. if (i >= boot->size) {
  392. if (no_fillup)
  393. break;
  394. if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) {
  395. snd_printk(KERN_ERR "dsp boot failed at %d\n", i);
  396. return -EIO;
  397. }
  398. vx_outb(chip, TXH, 0);
  399. vx_outb(chip, TXM, 0);
  400. vx_outb(chip, TXL, 0);
  401. } else {
  402. unsigned char *image = boot->data + i;
  403. if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) {
  404. snd_printk(KERN_ERR "dsp boot failed at %d\n", i);
  405. return -EIO;
  406. }
  407. vx_outb(chip, TXH, image[0]);
  408. vx_outb(chip, TXM, image[1]);
  409. vx_outb(chip, TXL, image[2]);
  410. }
  411. }
  412. return 0;
  413. }
  414. /*
  415. * vx_test_irq_src - query the source of interrupts
  416. *
  417. * called from irq handler only
  418. */
  419. static int vx_test_irq_src(struct vx_core *chip, unsigned int *ret)
  420. {
  421. int err;
  422. vx_init_rmh(&chip->irq_rmh, CMD_TEST_IT);
  423. spin_lock(&chip->lock);
  424. err = vx_send_msg_nolock(chip, &chip->irq_rmh);
  425. if (err < 0)
  426. *ret = 0;
  427. else
  428. *ret = chip->irq_rmh.Stat[0];
  429. spin_unlock(&chip->lock);
  430. return err;
  431. }
  432. /*
  433. * vx_interrupt - soft irq handler
  434. */
  435. static void vx_interrupt(unsigned long private_data)
  436. {
  437. struct vx_core *chip = (struct vx_core *) private_data;
  438. unsigned int events;
  439. if (chip->chip_status & VX_STAT_IS_STALE)
  440. return;
  441. if (vx_test_irq_src(chip, &events) < 0)
  442. return;
  443. #if 0
  444. if (events & 0x000800)
  445. printk(KERN_ERR "DSP Stream underrun ! IRQ events = 0x%x\n", events);
  446. #endif
  447. // printk(KERN_DEBUG "IRQ events = 0x%x\n", events);
  448. /* We must prevent any application using this DSP
  449. * and block any further request until the application
  450. * either unregisters or reloads the DSP
  451. */
  452. if (events & FATAL_DSP_ERROR) {
  453. snd_printk(KERN_ERR "vx_core: fatal DSP error!!\n");
  454. return;
  455. }
  456. /* The start on time code conditions are filled (ie the time code
  457. * received by the board is equal to one of those given to it).
  458. */
  459. if (events & TIME_CODE_EVENT_PENDING)
  460. ; /* so far, nothing to do yet */
  461. /* The frequency has changed on the board (UER mode). */
  462. if (events & FREQUENCY_CHANGE_EVENT_PENDING)
  463. vx_change_frequency(chip);
  464. /* update the pcm streams */
  465. vx_pcm_update_intr(chip, events);
  466. }
  467. /**
  468. * snd_vx_irq_handler - interrupt handler
  469. */
  470. irqreturn_t snd_vx_irq_handler(int irq, void *dev, struct pt_regs *regs)
  471. {
  472. struct vx_core *chip = dev;
  473. if (! (chip->chip_status & VX_STAT_CHIP_INIT) ||
  474. (chip->chip_status & VX_STAT_IS_STALE))
  475. return IRQ_NONE;
  476. if (! vx_test_and_ack(chip))
  477. tasklet_hi_schedule(&chip->tq);
  478. return IRQ_HANDLED;
  479. }
  480. /*
  481. */
  482. static void vx_reset_board(struct vx_core *chip, int cold_reset)
  483. {
  484. snd_assert(chip->ops->reset_board, return);
  485. /* current source, later sync'ed with target */
  486. chip->audio_source = VX_AUDIO_SRC_LINE;
  487. if (cold_reset) {
  488. chip->audio_source_target = chip->audio_source;
  489. chip->clock_source = INTERNAL_QUARTZ;
  490. chip->clock_mode = VX_CLOCK_MODE_AUTO;
  491. chip->freq = 48000;
  492. chip->uer_detected = VX_UER_MODE_NOT_PRESENT;
  493. chip->uer_bits = SNDRV_PCM_DEFAULT_CON_SPDIF;
  494. }
  495. chip->ops->reset_board(chip, cold_reset);
  496. vx_reset_codec(chip, cold_reset);
  497. vx_set_internal_clock(chip, chip->freq);
  498. /* Reset the DSP */
  499. vx_reset_dsp(chip);
  500. if (vx_is_pcmcia(chip)) {
  501. /* Acknowledge any pending IRQ and reset the MEMIRQ flag. */
  502. vx_test_and_ack(chip);
  503. vx_validate_irq(chip, 1);
  504. }
  505. /* init CBits */
  506. vx_set_iec958_status(chip, chip->uer_bits);
  507. }
  508. /*
  509. * proc interface
  510. */
  511. static void vx_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
  512. {
  513. struct vx_core *chip = entry->private_data;
  514. static char *audio_src_vxp[] = { "Line", "Mic", "Digital" };
  515. static char *audio_src_vx2[] = { "Analog", "Analog", "Digital" };
  516. static char *clock_mode[] = { "Auto", "Internal", "External" };
  517. static char *clock_src[] = { "Internal", "External" };
  518. static char *uer_type[] = { "Consumer", "Professional", "Not Present" };
  519. snd_iprintf(buffer, "%s\n", chip->card->longname);
  520. snd_iprintf(buffer, "Xilinx Firmware: %s\n",
  521. chip->chip_status & VX_STAT_XILINX_LOADED ? "Loaded" : "No");
  522. snd_iprintf(buffer, "Device Initialized: %s\n",
  523. chip->chip_status & VX_STAT_DEVICE_INIT ? "Yes" : "No");
  524. snd_iprintf(buffer, "DSP audio info:");
  525. if (chip->audio_info & VX_AUDIO_INFO_REAL_TIME)
  526. snd_iprintf(buffer, " realtime");
  527. if (chip->audio_info & VX_AUDIO_INFO_OFFLINE)
  528. snd_iprintf(buffer, " offline");
  529. if (chip->audio_info & VX_AUDIO_INFO_MPEG1)
  530. snd_iprintf(buffer, " mpeg1");
  531. if (chip->audio_info & VX_AUDIO_INFO_MPEG2)
  532. snd_iprintf(buffer, " mpeg2");
  533. if (chip->audio_info & VX_AUDIO_INFO_LINEAR_8)
  534. snd_iprintf(buffer, " linear8");
  535. if (chip->audio_info & VX_AUDIO_INFO_LINEAR_16)
  536. snd_iprintf(buffer, " linear16");
  537. if (chip->audio_info & VX_AUDIO_INFO_LINEAR_24)
  538. snd_iprintf(buffer, " linear24");
  539. snd_iprintf(buffer, "\n");
  540. snd_iprintf(buffer, "Input Source: %s\n", vx_is_pcmcia(chip) ?
  541. audio_src_vxp[chip->audio_source] :
  542. audio_src_vx2[chip->audio_source]);
  543. snd_iprintf(buffer, "Clock Mode: %s\n", clock_mode[chip->clock_mode]);
  544. snd_iprintf(buffer, "Clock Source: %s\n", clock_src[chip->clock_source]);
  545. snd_iprintf(buffer, "Frequency: %d\n", chip->freq);
  546. snd_iprintf(buffer, "Detected Frequency: %d\n", chip->freq_detected);
  547. snd_iprintf(buffer, "Detected UER type: %s\n", uer_type[chip->uer_detected]);
  548. snd_iprintf(buffer, "Min/Max/Cur IBL: %d/%d/%d (granularity=%d)\n",
  549. chip->ibl.min_size, chip->ibl.max_size, chip->ibl.size,
  550. chip->ibl.granularity);
  551. }
  552. static void vx_proc_init(struct vx_core *chip)
  553. {
  554. struct snd_info_entry *entry;
  555. if (! snd_card_proc_new(chip->card, "vx-status", &entry))
  556. snd_info_set_text_ops(entry, chip, 1024, vx_proc_read);
  557. }
  558. /**
  559. * snd_vx_dsp_boot - load the DSP boot
  560. */
  561. int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *boot)
  562. {
  563. int err;
  564. int cold_reset = !(chip->chip_status & VX_STAT_DEVICE_INIT);
  565. vx_reset_board(chip, cold_reset);
  566. vx_validate_irq(chip, 0);
  567. if ((err = snd_vx_load_boot_image(chip, boot)) < 0)
  568. return err;
  569. msleep(10);
  570. return 0;
  571. }
  572. /**
  573. * snd_vx_dsp_load - load the DSP image
  574. */
  575. int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp)
  576. {
  577. unsigned int i;
  578. int err;
  579. unsigned int csum = 0;
  580. unsigned char *image, *cptr;
  581. snd_assert(dsp->size % 3 == 0, return -EINVAL);
  582. vx_toggle_dac_mute(chip, 1);
  583. /* Transfert data buffer from PC to DSP */
  584. for (i = 0; i < dsp->size; i += 3) {
  585. image = dsp->data + i;
  586. /* Wait DSP ready for a new read */
  587. if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) {
  588. printk("dsp loading error at position %d\n", i);
  589. return err;
  590. }
  591. cptr = image;
  592. csum ^= *cptr;
  593. csum = (csum >> 24) | (csum << 8);
  594. vx_outb(chip, TXH, *cptr++);
  595. csum ^= *cptr;
  596. csum = (csum >> 24) | (csum << 8);
  597. vx_outb(chip, TXM, *cptr++);
  598. csum ^= *cptr;
  599. csum = (csum >> 24) | (csum << 8);
  600. vx_outb(chip, TXL, *cptr++);
  601. }
  602. snd_printdd(KERN_DEBUG "checksum = 0x%08x\n", csum);
  603. msleep(200);
  604. if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
  605. return err;
  606. vx_toggle_dac_mute(chip, 0);
  607. vx_test_and_ack(chip);
  608. vx_validate_irq(chip, 1);
  609. return 0;
  610. }
  611. #ifdef CONFIG_PM
  612. /*
  613. * suspend
  614. */
  615. int snd_vx_suspend(struct vx_core *chip, pm_message_t state)
  616. {
  617. unsigned int i;
  618. snd_power_change_state(chip->card, SNDRV_CTL_POWER_D3hot);
  619. chip->chip_status |= VX_STAT_IN_SUSPEND;
  620. for (i = 0; i < chip->hw->num_codecs; i++)
  621. snd_pcm_suspend_all(chip->pcm[i]);
  622. return 0;
  623. }
  624. /*
  625. * resume
  626. */
  627. int snd_vx_resume(struct vx_core *chip)
  628. {
  629. int i, err;
  630. chip->chip_status &= ~VX_STAT_CHIP_INIT;
  631. for (i = 0; i < 4; i++) {
  632. if (! chip->firmware[i])
  633. continue;
  634. err = chip->ops->load_dsp(chip, i, chip->firmware[i]);
  635. if (err < 0) {
  636. snd_printk(KERN_ERR "vx: firmware resume error at DSP %d\n", i);
  637. return -EIO;
  638. }
  639. }
  640. chip->chip_status |= VX_STAT_CHIP_INIT;
  641. chip->chip_status &= ~VX_STAT_IN_SUSPEND;
  642. snd_power_change_state(chip->card, SNDRV_CTL_POWER_D0);
  643. return 0;
  644. }
  645. #endif
  646. /**
  647. * snd_vx_create - constructor for struct vx_core
  648. * @hw: hardware specific record
  649. *
  650. * this function allocates the instance and prepare for the hardware
  651. * initialization.
  652. *
  653. * return the instance pointer if successful, NULL in error.
  654. */
  655. struct vx_core *snd_vx_create(struct snd_card *card, struct snd_vx_hardware *hw,
  656. struct snd_vx_ops *ops,
  657. int extra_size)
  658. {
  659. struct vx_core *chip;
  660. snd_assert(card && hw && ops, return NULL);
  661. chip = kzalloc(sizeof(*chip) + extra_size, GFP_KERNEL);
  662. if (! chip) {
  663. snd_printk(KERN_ERR "vx_core: no memory\n");
  664. return NULL;
  665. }
  666. spin_lock_init(&chip->lock);
  667. spin_lock_init(&chip->irq_lock);
  668. chip->irq = -1;
  669. chip->hw = hw;
  670. chip->type = hw->type;
  671. chip->ops = ops;
  672. tasklet_init(&chip->tq, vx_interrupt, (unsigned long)chip);
  673. mutex_init(&chip->mixer_mutex);
  674. chip->card = card;
  675. card->private_data = chip;
  676. strcpy(card->driver, hw->name);
  677. sprintf(card->shortname, "Digigram %s", hw->name);
  678. vx_proc_init(chip);
  679. return chip;
  680. }
  681. /*
  682. * module entries
  683. */
  684. static int __init alsa_vx_core_init(void)
  685. {
  686. return 0;
  687. }
  688. static void __exit alsa_vx_core_exit(void)
  689. {
  690. }
  691. module_init(alsa_vx_core_init)
  692. module_exit(alsa_vx_core_exit)
  693. /*
  694. * exports
  695. */
  696. EXPORT_SYMBOL(snd_vx_check_reg_bit);
  697. EXPORT_SYMBOL(snd_vx_create);
  698. EXPORT_SYMBOL(snd_vx_setup_firmware);
  699. EXPORT_SYMBOL(snd_vx_free_firmware);
  700. EXPORT_SYMBOL(snd_vx_irq_handler);
  701. EXPORT_SYMBOL(snd_vx_dsp_boot);
  702. EXPORT_SYMBOL(snd_vx_dsp_load);
  703. EXPORT_SYMBOL(snd_vx_load_boot_image);
  704. #ifdef CONFIG_PM
  705. EXPORT_SYMBOL(snd_vx_suspend);
  706. EXPORT_SYMBOL(snd_vx_resume);
  707. #endif