elf.h 7.1 KB

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  1. /*
  2. * include/asm-xtensa/elf.h
  3. *
  4. * ELF register definitions
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. *
  10. * Copyright (C) 2001 - 2005 Tensilica Inc.
  11. */
  12. #ifndef _XTENSA_ELF_H
  13. #define _XTENSA_ELF_H
  14. #include <asm/ptrace.h>
  15. #include <asm/coprocessor.h>
  16. #include <xtensa/config/core.h>
  17. /* Xtensa processor ELF architecture-magic number */
  18. #define EM_XTENSA 94
  19. #define EM_XTENSA_OLD 0xABC7
  20. /* ELF register definitions. This is needed for core dump support. */
  21. /*
  22. * elf_gregset_t contains the application-level state in the following order:
  23. * Processor info: config_version, cpuxy
  24. * Processor state: pc, ps, exccause, excvaddr, wb, ws,
  25. * lbeg, lend, lcount, sar
  26. * GP regs: ar0 - arXX
  27. */
  28. typedef unsigned long elf_greg_t;
  29. typedef struct {
  30. elf_greg_t xchal_config_id0;
  31. elf_greg_t xchal_config_id1;
  32. elf_greg_t cpux;
  33. elf_greg_t cpuy;
  34. elf_greg_t pc;
  35. elf_greg_t ps;
  36. elf_greg_t exccause;
  37. elf_greg_t excvaddr;
  38. elf_greg_t windowbase;
  39. elf_greg_t windowstart;
  40. elf_greg_t lbeg;
  41. elf_greg_t lend;
  42. elf_greg_t lcount;
  43. elf_greg_t sar;
  44. elf_greg_t syscall;
  45. elf_greg_t ar[XCHAL_NUM_AREGS];
  46. } xtensa_gregset_t;
  47. #define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))
  48. typedef elf_greg_t elf_gregset_t[ELF_NGREG];
  49. /*
  50. * Compute the size of the coprocessor and extra state layout (register info)
  51. * table (in bytes).
  52. * This is actually the maximum size of the table, as opposed to the size,
  53. * which is available from the _xtensa_reginfo_table_size global variable.
  54. *
  55. * (See also arch/xtensa/kernel/coprocessor.S)
  56. *
  57. */
  58. #ifndef XCHAL_EXTRA_SA_CONTENTS_LIBDB_NUM
  59. # define XTENSA_CPE_LTABLE_SIZE 0
  60. #else
  61. # define XTENSA_CPE_SEGMENT(num) (num ? (1+num) : 0)
  62. # define XTENSA_CPE_LTABLE_ENTRIES \
  63. ( XTENSA_CPE_SEGMENT(XCHAL_EXTRA_SA_CONTENTS_LIBDB_NUM) \
  64. + XTENSA_CPE_SEGMENT(XCHAL_CP0_SA_CONTENTS_LIBDB_NUM) \
  65. + XTENSA_CPE_SEGMENT(XCHAL_CP1_SA_CONTENTS_LIBDB_NUM) \
  66. + XTENSA_CPE_SEGMENT(XCHAL_CP2_SA_CONTENTS_LIBDB_NUM) \
  67. + XTENSA_CPE_SEGMENT(XCHAL_CP3_SA_CONTENTS_LIBDB_NUM) \
  68. + XTENSA_CPE_SEGMENT(XCHAL_CP4_SA_CONTENTS_LIBDB_NUM) \
  69. + XTENSA_CPE_SEGMENT(XCHAL_CP5_SA_CONTENTS_LIBDB_NUM) \
  70. + XTENSA_CPE_SEGMENT(XCHAL_CP6_SA_CONTENTS_LIBDB_NUM) \
  71. + XTENSA_CPE_SEGMENT(XCHAL_CP7_SA_CONTENTS_LIBDB_NUM) \
  72. + 1 /* final entry */ \
  73. )
  74. # define XTENSA_CPE_LTABLE_SIZE (XTENSA_CPE_LTABLE_ENTRIES * 8)
  75. #endif
  76. /*
  77. * Instantiations of the elf_fpregset_t type contain, in most
  78. * architectures, the floating point (FPU) register set.
  79. * For Xtensa, this type is extended to contain all custom state,
  80. * ie. coprocessor and "extra" (non-coprocessor) state (including,
  81. * for example, TIE-defined states and register files; as well
  82. * as other optional processor state).
  83. * This includes FPU state if a floating-point coprocessor happens
  84. * to have been configured within the Xtensa processor.
  85. *
  86. * TOTAL_FPREGS_SIZE is the required size (without rounding)
  87. * of elf_fpregset_t. It provides space for the following:
  88. *
  89. * a) 32-bit mask of active coprocessors for this task (similar
  90. * to CPENABLE in single-threaded Xtensa processor systems)
  91. *
  92. * b) table describing the layout of custom states (ie. of
  93. * individual registers, etc) within the save areas
  94. *
  95. * c) save areas for each coprocessor and for non-coprocessor
  96. * ("extra") state
  97. *
  98. * Note that save areas may require up to 16-byte alignment when
  99. * accessed by save/restore sequences. We do not need to ensure
  100. * such alignment in an elf_fpregset_t structure because custom
  101. * state is not directly loaded/stored into it; rather, save area
  102. * contents are copied to elf_fpregset_t from the active save areas
  103. * (see 'struct task_struct' definition in processor.h for that)
  104. * using memcpy(). But we do allow space for such alignment,
  105. * to allow optimizations of layout and copying.
  106. */
  107. #define TOTAL_FPREGS_SIZE \
  108. (4 + XTENSA_CPE_LTABLE_SIZE + XTENSA_CP_EXTRA_SIZE)
  109. #define ELF_NFPREG \
  110. ((TOTAL_FPREGS_SIZE + sizeof(elf_fpreg_t) - 1) / sizeof(elf_fpreg_t))
  111. typedef unsigned int elf_fpreg_t;
  112. typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
  113. #define ELF_CORE_COPY_REGS(_eregs, _pregs) \
  114. xtensa_elf_core_copy_regs (&_eregs, _pregs);
  115. extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *);
  116. /*
  117. * This is used to ensure we don't load something for the wrong architecture.
  118. */
  119. #define elf_check_arch(x) ( ( (x)->e_machine == EM_XTENSA ) || \
  120. ( (x)->e_machine == EM_XTENSA_OLD ) )
  121. /*
  122. * These are used to set parameters in the core dumps.
  123. */
  124. #ifdef __XTENSA_EL__
  125. # define ELF_DATA ELFDATA2LSB
  126. #elif defined(__XTENSA_EB__)
  127. # define ELF_DATA ELFDATA2MSB
  128. #else
  129. # error processor byte order undefined!
  130. #endif
  131. #define ELF_CLASS ELFCLASS32
  132. #define ELF_ARCH EM_XTENSA
  133. #define USE_ELF_CORE_DUMP
  134. #define ELF_EXEC_PAGESIZE PAGE_SIZE
  135. /*
  136. * This is the location that an ET_DYN program is loaded if exec'ed. Typical
  137. * use of this is to invoke "./ld.so someprog" to test out a new version of
  138. * the loader. We need to make sure that it is out of the way of the program
  139. * that it will "exec", and that there is sufficient room for the brk.
  140. */
  141. #define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
  142. /*
  143. * This yields a mask that user programs can use to figure out what
  144. * instruction set this CPU supports. This could be done in user space,
  145. * but it's not easy, and we've already done it here.
  146. */
  147. #define ELF_HWCAP (0)
  148. /*
  149. * This yields a string that ld.so will use to load implementation
  150. * specific libraries for optimization. This is more specific in
  151. * intent than poking at uname or /proc/cpuinfo.
  152. * For the moment, we have only optimizations for the Intel generations,
  153. * but that could change...
  154. */
  155. #define ELF_PLATFORM (NULL)
  156. /*
  157. * The Xtensa processor ABI says that when the program starts, a2
  158. * contains a pointer to a function which might be registered using
  159. * `atexit'. This provides a mean for the dynamic linker to call
  160. * DT_FINI functions for shared libraries that have been loaded before
  161. * the code runs.
  162. *
  163. * A value of 0 tells we have no such handler.
  164. *
  165. * We might as well make sure everything else is cleared too (except
  166. * for the stack pointer in a1), just to make things more
  167. * deterministic. Also, clearing a0 terminates debugger backtraces.
  168. */
  169. #define ELF_PLAT_INIT(_r, load_addr) \
  170. do { _r->areg[0]=0; /*_r->areg[1]=0;*/ _r->areg[2]=0; _r->areg[3]=0; \
  171. _r->areg[4]=0; _r->areg[5]=0; _r->areg[6]=0; _r->areg[7]=0; \
  172. _r->areg[8]=0; _r->areg[9]=0; _r->areg[10]=0; _r->areg[11]=0; \
  173. _r->areg[12]=0; _r->areg[13]=0; _r->areg[14]=0; _r->areg[15]=0; \
  174. } while (0)
  175. #ifdef __KERNEL__
  176. #define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
  177. struct task_struct;
  178. extern void do_copy_regs (xtensa_gregset_t*, struct pt_regs*,
  179. struct task_struct*);
  180. extern void do_restore_regs (xtensa_gregset_t*, struct pt_regs*,
  181. struct task_struct*);
  182. extern void do_save_fpregs (elf_fpregset_t*, struct pt_regs*,
  183. struct task_struct*);
  184. extern int do_restore_fpregs (elf_fpregset_t*, struct pt_regs*,
  185. struct task_struct*);
  186. #endif /* __KERNEL__ */
  187. #endif /* _XTENSA_ELF_H */