atomic.h 7.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294
  1. /*
  2. * include/asm-xtensa/atomic.h
  3. *
  4. * Atomic operations that C can't guarantee us. Useful for resource counting..
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. *
  10. * Copyright (C) 2001 - 2005 Tensilica Inc.
  11. */
  12. #ifndef _XTENSA_ATOMIC_H
  13. #define _XTENSA_ATOMIC_H
  14. #include <linux/config.h>
  15. #include <linux/stringify.h>
  16. typedef struct { volatile int counter; } atomic_t;
  17. #ifdef __KERNEL__
  18. #include <asm/processor.h>
  19. #include <asm/system.h>
  20. #define ATOMIC_INIT(i) { (i) }
  21. /*
  22. * This Xtensa implementation assumes that the right mechanism
  23. * for exclusion is for locking interrupts to level 1.
  24. *
  25. * Locking interrupts looks like this:
  26. *
  27. * rsil a15, 1
  28. * <code>
  29. * wsr a15, PS
  30. * rsync
  31. *
  32. * Note that a15 is used here because the register allocation
  33. * done by the compiler is not guaranteed and a window overflow
  34. * may not occur between the rsil and wsr instructions. By using
  35. * a15 in the rsil, the machine is guaranteed to be in a state
  36. * where no register reference will cause an overflow.
  37. */
  38. /**
  39. * atomic_read - read atomic variable
  40. * @v: pointer of type atomic_t
  41. *
  42. * Atomically reads the value of @v.
  43. */
  44. #define atomic_read(v) ((v)->counter)
  45. /**
  46. * atomic_set - set atomic variable
  47. * @v: pointer of type atomic_t
  48. * @i: required value
  49. *
  50. * Atomically sets the value of @v to @i.
  51. */
  52. #define atomic_set(v,i) ((v)->counter = (i))
  53. /**
  54. * atomic_add - add integer to atomic variable
  55. * @i: integer value to add
  56. * @v: pointer of type atomic_t
  57. *
  58. * Atomically adds @i to @v.
  59. */
  60. static inline void atomic_add(int i, atomic_t * v)
  61. {
  62. unsigned int vval;
  63. __asm__ __volatile__(
  64. "rsil a15, "__stringify(LOCKLEVEL)"\n\t"
  65. "l32i %0, %2, 0 \n\t"
  66. "add %0, %0, %1 \n\t"
  67. "s32i %0, %2, 0 \n\t"
  68. "wsr a15, "__stringify(PS)" \n\t"
  69. "rsync \n"
  70. : "=&a" (vval)
  71. : "a" (i), "a" (v)
  72. : "a15", "memory"
  73. );
  74. }
  75. /**
  76. * atomic_sub - subtract the atomic variable
  77. * @i: integer value to subtract
  78. * @v: pointer of type atomic_t
  79. *
  80. * Atomically subtracts @i from @v.
  81. */
  82. static inline void atomic_sub(int i, atomic_t *v)
  83. {
  84. unsigned int vval;
  85. __asm__ __volatile__(
  86. "rsil a15, "__stringify(LOCKLEVEL)"\n\t"
  87. "l32i %0, %2, 0 \n\t"
  88. "sub %0, %0, %1 \n\t"
  89. "s32i %0, %2, 0 \n\t"
  90. "wsr a15, "__stringify(PS)" \n\t"
  91. "rsync \n"
  92. : "=&a" (vval)
  93. : "a" (i), "a" (v)
  94. : "a15", "memory"
  95. );
  96. }
  97. /*
  98. * We use atomic_{add|sub}_return to define other functions.
  99. */
  100. static inline int atomic_add_return(int i, atomic_t * v)
  101. {
  102. unsigned int vval;
  103. __asm__ __volatile__(
  104. "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
  105. "l32i %0, %2, 0 \n\t"
  106. "add %0, %0, %1 \n\t"
  107. "s32i %0, %2, 0 \n\t"
  108. "wsr a15, "__stringify(PS)" \n\t"
  109. "rsync \n"
  110. : "=&a" (vval)
  111. : "a" (i), "a" (v)
  112. : "a15", "memory"
  113. );
  114. return vval;
  115. }
  116. static inline int atomic_sub_return(int i, atomic_t * v)
  117. {
  118. unsigned int vval;
  119. __asm__ __volatile__(
  120. "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
  121. "l32i %0, %2, 0 \n\t"
  122. "sub %0, %0, %1 \n\t"
  123. "s32i %0, %2, 0 \n\t"
  124. "wsr a15, "__stringify(PS)" \n\t"
  125. "rsync \n"
  126. : "=&a" (vval)
  127. : "a" (i), "a" (v)
  128. : "a15", "memory"
  129. );
  130. return vval;
  131. }
  132. /**
  133. * atomic_sub_and_test - subtract value from variable and test result
  134. * @i: integer value to subtract
  135. * @v: pointer of type atomic_t
  136. *
  137. * Atomically subtracts @i from @v and returns
  138. * true if the result is zero, or false for all
  139. * other cases.
  140. */
  141. #define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
  142. /**
  143. * atomic_inc - increment atomic variable
  144. * @v: pointer of type atomic_t
  145. *
  146. * Atomically increments @v by 1.
  147. */
  148. #define atomic_inc(v) atomic_add(1,(v))
  149. /**
  150. * atomic_inc - increment atomic variable
  151. * @v: pointer of type atomic_t
  152. *
  153. * Atomically increments @v by 1.
  154. */
  155. #define atomic_inc_return(v) atomic_add_return(1,(v))
  156. /**
  157. * atomic_dec - decrement atomic variable
  158. * @v: pointer of type atomic_t
  159. *
  160. * Atomically decrements @v by 1.
  161. */
  162. #define atomic_dec(v) atomic_sub(1,(v))
  163. /**
  164. * atomic_dec_return - decrement atomic variable
  165. * @v: pointer of type atomic_t
  166. *
  167. * Atomically decrements @v by 1.
  168. */
  169. #define atomic_dec_return(v) atomic_sub_return(1,(v))
  170. /**
  171. * atomic_dec_and_test - decrement and test
  172. * @v: pointer of type atomic_t
  173. *
  174. * Atomically decrements @v by 1 and
  175. * returns true if the result is 0, or false for all other
  176. * cases.
  177. */
  178. #define atomic_dec_and_test(v) (atomic_sub_return(1,(v)) == 0)
  179. /**
  180. * atomic_inc_and_test - increment and test
  181. * @v: pointer of type atomic_t
  182. *
  183. * Atomically increments @v by 1
  184. * and returns true if the result is zero, or false for all
  185. * other cases.
  186. */
  187. #define atomic_inc_and_test(v) (atomic_add_return(1,(v)) == 0)
  188. /**
  189. * atomic_add_negative - add and test if negative
  190. * @v: pointer of type atomic_t
  191. * @i: integer value to add
  192. *
  193. * Atomically adds @i to @v and returns true
  194. * if the result is negative, or false when
  195. * result is greater than or equal to zero.
  196. */
  197. #define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0)
  198. #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
  199. #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
  200. /**
  201. * atomic_add_unless - add unless the number is a given value
  202. * @v: pointer of type atomic_t
  203. * @a: the amount to add to v...
  204. * @u: ...unless v is equal to u.
  205. *
  206. * Atomically adds @a to @v, so long as it was not @u.
  207. * Returns non-zero if @v was not @u, and zero otherwise.
  208. */
  209. #define atomic_add_unless(v, a, u) \
  210. ({ \
  211. int c, old; \
  212. c = atomic_read(v); \
  213. while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
  214. c = old; \
  215. c != (u); \
  216. })
  217. #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
  218. static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
  219. {
  220. unsigned int all_f = -1;
  221. unsigned int vval;
  222. __asm__ __volatile__(
  223. "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
  224. "l32i %0, %2, 0 \n\t"
  225. "xor %1, %4, %3 \n\t"
  226. "and %0, %0, %4 \n\t"
  227. "s32i %0, %2, 0 \n\t"
  228. "wsr a15, "__stringify(PS)" \n\t"
  229. "rsync \n"
  230. : "=&a" (vval), "=a" (mask)
  231. : "a" (v), "a" (all_f), "1" (mask)
  232. : "a15", "memory"
  233. );
  234. }
  235. static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
  236. {
  237. unsigned int vval;
  238. __asm__ __volatile__(
  239. "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
  240. "l32i %0, %2, 0 \n\t"
  241. "or %0, %0, %1 \n\t"
  242. "s32i %0, %2, 0 \n\t"
  243. "wsr a15, "__stringify(PS)" \n\t"
  244. "rsync \n"
  245. : "=&a" (vval)
  246. : "a" (mask), "a" (v)
  247. : "a15", "memory"
  248. );
  249. }
  250. /* Atomic operations are already serializing */
  251. #define smp_mb__before_atomic_dec() barrier()
  252. #define smp_mb__after_atomic_dec() barrier()
  253. #define smp_mb__before_atomic_inc() barrier()
  254. #define smp_mb__after_atomic_inc() barrier()
  255. #include <asm-generic/atomic.h>
  256. #endif /* __KERNEL__ */
  257. #endif /* _XTENSA_ATOMIC_H */