ma.h 3.4 KB

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  1. /*
  2. * include/asm-v850/ma.h -- V850E/MA series of cpu chips
  3. *
  4. * Copyright (C) 2001,02,03 NEC Electronics Corporation
  5. * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
  6. *
  7. * This file is subject to the terms and conditions of the GNU General
  8. * Public License. See the file COPYING in the main directory of this
  9. * archive for more details.
  10. *
  11. * Written by Miles Bader <miles@gnu.org>
  12. */
  13. #ifndef __V850_MA_H__
  14. #define __V850_MA_H__
  15. /* The MA series uses the V850E cpu core. */
  16. #include <asm/v850e.h>
  17. /* For <asm/entry.h> */
  18. /* We use on-chip RAM, for a few miscellaneous variables that must be
  19. accessible using a load instruction relative to R0. The amount
  20. varies between chip models, but there's always at least 4K, and it
  21. should always start at FFFFC000. */
  22. #define R0_RAM_ADDR 0xFFFFC000
  23. /* MA series UART details. */
  24. #define V850E_UART_BASE_FREQ CPU_CLOCK_FREQ
  25. /* This is a function that gets called before configuring the UART. */
  26. #define V850E_UART_PRE_CONFIGURE ma_uart_pre_configure
  27. #ifndef __ASSEMBLY__
  28. extern void ma_uart_pre_configure (unsigned chan,
  29. unsigned cflags, unsigned baud);
  30. #endif
  31. /* MA series timer C details. */
  32. #define V850E_TIMER_C_BASE_ADDR 0xFFFFF600
  33. /* MA series timer D details. */
  34. #define V850E_TIMER_D_BASE_ADDR 0xFFFFF540
  35. #define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0)
  36. #define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2)
  37. #define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4)
  38. #define V850E_TIMER_D_BASE_FREQ CPU_CLOCK_FREQ
  39. /* Port 0 */
  40. /* Direct I/O. Bits 0-7 are pins P00-P07. */
  41. #define MA_PORT0_IO_ADDR 0xFFFFF400
  42. #define MA_PORT0_IO (*(volatile u8 *)MA_PORT0_IO_ADDR)
  43. /* Port mode (for direct I/O, 0 = output, 1 = input). */
  44. #define MA_PORT0_PM_ADDR 0xFFFFF420
  45. #define MA_PORT0_PM (*(volatile u8 *)MA_PORT0_PM_ADDR)
  46. /* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
  47. #define MA_PORT0_PMC_ADDR 0xFFFFF440
  48. #define MA_PORT0_PMC (*(volatile u8 *)MA_PORT0_PMC_ADDR)
  49. /* Port function control (for P04-P07, 0 = IRQ, 1 = DMARQ). */
  50. #define MA_PORT0_PFC_ADDR 0xFFFFF460
  51. #define MA_PORT0_PFC (*(volatile u8 *)MA_PORT0_PFC_ADDR)
  52. /* Port 1 */
  53. /* Direct I/O. Bits 0-3 are pins P10-P13. */
  54. #define MA_PORT1_IO_ADDR 0xFFFFF402
  55. #define MA_PORT1_IO (*(volatile u8 *)MA_PORT1_IO_ADDR)
  56. /* Port mode (for direct I/O, 0 = output, 1 = input). */
  57. #define MA_PORT1_PM_ADDR 0xFFFFF420
  58. #define MA_PORT1_PM (*(volatile u8 *)MA_PORT1_PM_ADDR)
  59. /* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
  60. #define MA_PORT1_PMC_ADDR 0xFFFFF442
  61. #define MA_PORT1_PMC (*(volatile u8 *)MA_PORT1_PMC_ADDR)
  62. /* Port 4 */
  63. /* Direct I/O. Bits 0-5 are pins P40-P45. */
  64. #define MA_PORT4_IO_ADDR 0xFFFFF408
  65. #define MA_PORT4_IO (*(volatile u8 *)MA_PORT4_IO_ADDR)
  66. /* Port mode (for direct I/O, 0 = output, 1 = input). */
  67. #define MA_PORT4_PM_ADDR 0xFFFFF428
  68. #define MA_PORT4_PM (*(volatile u8 *)MA_PORT4_PM_ADDR)
  69. /* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
  70. #define MA_PORT4_PMC_ADDR 0xFFFFF448
  71. #define MA_PORT4_PMC (*(volatile u8 *)MA_PORT4_PMC_ADDR)
  72. /* Port function control (for serial interfaces, 0 = CSI, 1 = UART). */
  73. #define MA_PORT4_PFC_ADDR 0xFFFFF468
  74. #define MA_PORT4_PFC (*(volatile u8 *)MA_PORT4_PFC_ADDR)
  75. #ifndef __ASSEMBLY__
  76. /* Initialize MA chip interrupts. */
  77. extern void ma_init_irqs (void);
  78. #endif /* !__ASSEMBLY__ */
  79. #endif /* __V850_MA_H__ */