hardware.h 2.8 KB

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  1. /*
  2. * linux/include/asm-arm/arch-arc/hardware.h
  3. *
  4. * Copyright (C) 1996-1999 Russell King.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This file contains the hardware definitions of the
  11. * Acorn Archimedes/A5000 machines.
  12. *
  13. * Modifications:
  14. * 04-04-1998 PJB/RMK Merged arc and a5k versions
  15. */
  16. #ifndef __ASM_HARDWARE_H
  17. #define __ASM_HARDWARE_H
  18. #include <linux/config.h>
  19. /*
  20. * What hardware must be present - these can be tested by the kernel
  21. * source.
  22. */
  23. #define HAS_IOC
  24. #define HAS_MEMC
  25. #define HAS_VIDC
  26. #define VDMA_ALIGNMENT PAGE_SIZE
  27. #define VDMA_XFERSIZE 16
  28. #define VDMA_INIT 0
  29. #define VDMA_START 1
  30. #define VDMA_END 2
  31. #ifndef __ASSEMBLY__
  32. extern void memc_write(unsigned int reg, unsigned long val);
  33. #define video_set_dma(start,end,offset) \
  34. do { \
  35. memc_write (VDMA_START, (start >> 2)); \
  36. memc_write (VDMA_END, (end - VDMA_XFERSIZE) >> 2); \
  37. memc_write (VDMA_INIT, (offset >> 2)); \
  38. } while (0)
  39. #endif
  40. /* Hardware addresses of major areas.
  41. * *_START is the physical address
  42. * *_SIZE is the size of the region
  43. * *_BASE is the virtual address
  44. */
  45. #define IO_START 0x03000000
  46. #define IO_SIZE 0x01000000
  47. #define IO_BASE 0x03000000
  48. /*
  49. * Screen mapping information
  50. */
  51. #define SCREEN_START 0x02000000
  52. #define SCREEN_END 0x02078000
  53. #define SCREEN_SIZE 0x00078000
  54. #define SCREEN_BASE 0x02000000
  55. #define EXPMASK_BASE 0x03360000
  56. #define IOEB_BASE 0x03350000
  57. #define VIDC_BASE 0x03400000
  58. #define LATCHA_BASE 0x03250040
  59. #define LATCHB_BASE 0x03250018
  60. #define IOC_BASE 0x03200000
  61. #define FLOPPYDMA_BASE 0x0302a000
  62. #define PCIO_BASE 0x03010000
  63. // FIXME - are the below correct?
  64. #define PODSLOT_IOC0_BASE 0x03240000
  65. #define PODSLOT_IOC_SIZE (1 << 14)
  66. #define PODSLOT_MEMC_BASE 0x03000000
  67. #define PODSLOT_MEMC_SIZE (1 << 14)
  68. #define vidc_writel(val) __raw_writel(val, VIDC_BASE)
  69. #ifndef __ASSEMBLY__
  70. /*
  71. * for use with inb/outb
  72. */
  73. #define IOEB_VID_CTL (IOEB_BASE + 0x48)
  74. #define IOEB_PRESENT (IOEB_BASE + 0x50)
  75. #define IOEB_PSCLR (IOEB_BASE + 0x58)
  76. #define IOEB_MONTYPE (IOEB_BASE + 0x70)
  77. //FIXME - These adresses are weird - ISTR some weirdo address shifting stuff was going on here...
  78. #define IO_EC_IOC_BASE 0x80090000
  79. #define IO_EC_MEMC_BASE 0x80000000
  80. #ifdef CONFIG_ARCH_ARC
  81. /* A680 hardware */
  82. #define WD1973_BASE 0x03290000
  83. #define WD1973_LATCH 0x03350000
  84. #define Z8530_BASE 0x032b0008
  85. #define SCSI_BASE 0x03100000
  86. #endif
  87. #endif
  88. #define EXPMASK_STATUS (EXPMASK_BASE + 0x00)
  89. #define EXPMASK_ENABLE (EXPMASK_BASE + 0x04)
  90. #endif