io.h 4.6 KB

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  1. /*
  2. * linux/include/asm-arm/arch-omap/io.h
  3. *
  4. * IO definitions for TI OMAP processors and boards
  5. *
  6. * Copied from linux/include/asm-arm/arch-sa1100/io.h
  7. * Copyright (C) 1997-1999 Russell King
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  15. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  16. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  17. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  18. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  20. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  22. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24. *
  25. * You should have received a copy of the GNU General Public License along
  26. * with this program; if not, write to the Free Software Foundation, Inc.,
  27. * 675 Mass Ave, Cambridge, MA 02139, USA.
  28. *
  29. * Modifications:
  30. * 06-12-1997 RMK Created.
  31. * 07-04-1999 RMK Major cleanup
  32. */
  33. #ifndef __ASM_ARM_ARCH_IO_H
  34. #define __ASM_ARM_ARCH_IO_H
  35. #include <asm/hardware.h>
  36. #define IO_SPACE_LIMIT 0xffffffff
  37. /*
  38. * We don't actually have real ISA nor PCI buses, but there is so many
  39. * drivers out there that might just work if we fake them...
  40. */
  41. #define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
  42. #define __mem_pci(a) (a)
  43. #define __mem_isa(a) (a)
  44. /*
  45. * ----------------------------------------------------------------------------
  46. * I/O mapping
  47. * ----------------------------------------------------------------------------
  48. */
  49. #define PCIO_BASE 0
  50. #if defined(CONFIG_ARCH_OMAP1)
  51. #define IO_PHYS 0xFFFB0000
  52. #define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
  53. #define IO_SIZE 0x40000
  54. #define IO_VIRT (IO_PHYS - IO_OFFSET)
  55. #define IO_ADDRESS(pa) ((pa) - IO_OFFSET)
  56. #define io_p2v(pa) ((pa) - IO_OFFSET)
  57. #define io_v2p(va) ((va) + IO_OFFSET)
  58. #elif defined(CONFIG_ARCH_OMAP2)
  59. /* We map both L3 and L4 on OMAP2 */
  60. #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */
  61. #define L3_24XX_VIRT 0xf8000000
  62. #define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
  63. #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */
  64. #define L4_24XX_VIRT 0xd8000000
  65. #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
  66. #define IO_OFFSET 0x90000000
  67. #define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
  68. #define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
  69. #define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
  70. #endif
  71. #ifndef __ASSEMBLER__
  72. /*
  73. * Functions to access the OMAP IO region
  74. *
  75. * NOTE: - Use omap_read/write[bwl] for physical register addresses
  76. * - Use __raw_read/write[bwl]() for virtual register addresses
  77. * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses
  78. * - DO NOT use hardcoded virtual addresses to allow changing the
  79. * IO address space again if needed
  80. */
  81. #define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a))
  82. #define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a))
  83. #define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a))
  84. #define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v))
  85. #define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v))
  86. #define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v))
  87. /* 16 bit uses LDRH/STRH, base +/- offset_8 */
  88. typedef struct { volatile u16 offset[256]; } __regbase16;
  89. #define __REGV16(vaddr) ((__regbase16 *)((vaddr)&~0xff)) \
  90. ->offset[((vaddr)&0xff)>>1]
  91. #define __REG16(paddr) __REGV16(io_p2v(paddr))
  92. /* 8/32 bit uses LDR/STR, base +/- offset_12 */
  93. typedef struct { volatile u8 offset[4096]; } __regbase8;
  94. #define __REGV8(vaddr) ((__regbase8 *)((vaddr)&~4095)) \
  95. ->offset[((vaddr)&4095)>>0]
  96. #define __REG8(paddr) __REGV8(io_p2v(paddr))
  97. typedef struct { volatile u32 offset[4096]; } __regbase32;
  98. #define __REGV32(vaddr) ((__regbase32 *)((vaddr)&~4095)) \
  99. ->offset[((vaddr)&4095)>>2]
  100. #define __REG32(paddr) __REGV32(io_p2v(paddr))
  101. extern void omap1_map_common_io(void);
  102. extern void omap1_init_common_hw(void);
  103. extern void omap2_map_common_io(void);
  104. extern void omap2_init_common_hw(void);
  105. #else
  106. #define __REG8(paddr) io_p2v(paddr)
  107. #define __REG16(paddr) io_p2v(paddr)
  108. #define __REG32(paddr) io_p2v(paddr)
  109. #endif
  110. #endif