pmagb-b-fb.c 9.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379
  1. /*
  2. * linux/drivers/video/pmagb-b-fb.c
  3. *
  4. * PMAGB-B TURBOchannel Smart Frame Buffer (SFB) card support,
  5. * derived from:
  6. * "HP300 Topcat framebuffer support (derived from macfb of all things)
  7. * Phil Blundell <philb@gnu.org> 1998", the original code can be
  8. * found in the file hpfb.c in the same directory.
  9. *
  10. * DECstation related code Copyright (C) 1999, 2000, 2001 by
  11. * Michael Engel <engel@unix-ag.org>,
  12. * Karsten Merker <merker@linuxtag.org> and
  13. * Harald Koerfgen.
  14. * Copyright (c) 2005 Maciej W. Rozycki
  15. *
  16. * This file is subject to the terms and conditions of the GNU General
  17. * Public License. See the file COPYING in the main directory of this
  18. * archive for more details.
  19. */
  20. #include <linux/compiler.h>
  21. #include <linux/delay.h>
  22. #include <linux/errno.h>
  23. #include <linux/fb.h>
  24. #include <linux/init.h>
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/types.h>
  28. #include <asm/io.h>
  29. #include <asm/system.h>
  30. #include <asm/dec/tc.h>
  31. #include <video/pmagb-b-fb.h>
  32. struct pmagbbfb_par {
  33. struct fb_info *next;
  34. volatile void __iomem *mmio;
  35. volatile void __iomem *smem;
  36. volatile u32 __iomem *sfb;
  37. volatile u32 __iomem *dac;
  38. unsigned int osc0;
  39. unsigned int osc1;
  40. int slot;
  41. };
  42. static struct fb_info *root_pmagbbfb_dev;
  43. static struct fb_var_screeninfo pmagbbfb_defined __initdata = {
  44. .bits_per_pixel = 8,
  45. .red.length = 8,
  46. .green.length = 8,
  47. .blue.length = 8,
  48. .activate = FB_ACTIVATE_NOW,
  49. .height = -1,
  50. .width = -1,
  51. .accel_flags = FB_ACCEL_NONE,
  52. .sync = FB_SYNC_ON_GREEN,
  53. .vmode = FB_VMODE_NONINTERLACED,
  54. };
  55. static struct fb_fix_screeninfo pmagbbfb_fix __initdata = {
  56. .id = "PMAGB-BA",
  57. .smem_len = (2048 * 1024),
  58. .type = FB_TYPE_PACKED_PIXELS,
  59. .visual = FB_VISUAL_PSEUDOCOLOR,
  60. .mmio_len = PMAGB_B_FBMEM,
  61. };
  62. static inline void sfb_write(struct pmagbbfb_par *par, unsigned int reg, u32 v)
  63. {
  64. writel(v, par->sfb + reg / 4);
  65. }
  66. static inline u32 sfb_read(struct pmagbbfb_par *par, unsigned int reg)
  67. {
  68. return readl(par->sfb + reg / 4);
  69. }
  70. static inline void dac_write(struct pmagbbfb_par *par, unsigned int reg, u8 v)
  71. {
  72. writeb(v, par->dac + reg / 4);
  73. }
  74. static inline u8 dac_read(struct pmagbbfb_par *par, unsigned int reg)
  75. {
  76. return readb(par->dac + reg / 4);
  77. }
  78. static inline void gp0_write(struct pmagbbfb_par *par, u32 v)
  79. {
  80. writel(v, par->mmio + PMAGB_B_GP0);
  81. }
  82. /*
  83. * Set the palette.
  84. */
  85. static int pmagbbfb_setcolreg(unsigned int regno, unsigned int red,
  86. unsigned int green, unsigned int blue,
  87. unsigned int transp, struct fb_info *info)
  88. {
  89. struct pmagbbfb_par *par = info->par;
  90. BUG_ON(regno >= info->cmap.len);
  91. red >>= 8; /* The cmap fields are 16 bits */
  92. green >>= 8; /* wide, but the hardware colormap */
  93. blue >>= 8; /* registers are only 8 bits wide */
  94. mb();
  95. dac_write(par, BT459_ADDR_LO, regno);
  96. dac_write(par, BT459_ADDR_HI, 0x00);
  97. wmb();
  98. dac_write(par, BT459_CMAP, red);
  99. wmb();
  100. dac_write(par, BT459_CMAP, green);
  101. wmb();
  102. dac_write(par, BT459_CMAP, blue);
  103. return 0;
  104. }
  105. static struct fb_ops pmagbbfb_ops = {
  106. .owner = THIS_MODULE,
  107. .fb_setcolreg = pmagbbfb_setcolreg,
  108. .fb_fillrect = cfb_fillrect,
  109. .fb_copyarea = cfb_copyarea,
  110. .fb_imageblit = cfb_imageblit,
  111. };
  112. /*
  113. * Turn the hardware cursor off.
  114. */
  115. static void __init pmagbbfb_erase_cursor(struct fb_info *info)
  116. {
  117. struct pmagbbfb_par *par = info->par;
  118. mb();
  119. dac_write(par, BT459_ADDR_LO, 0x00);
  120. dac_write(par, BT459_ADDR_HI, 0x03);
  121. wmb();
  122. dac_write(par, BT459_DATA, 0x00);
  123. }
  124. /*
  125. * Set up screen parameters.
  126. */
  127. static void __init pmagbbfb_screen_setup(struct fb_info *info)
  128. {
  129. struct pmagbbfb_par *par = info->par;
  130. info->var.xres = ((sfb_read(par, SFB_REG_VID_HOR) >>
  131. SFB_VID_HOR_PIX_SHIFT) & SFB_VID_HOR_PIX_MASK) * 4;
  132. info->var.xres_virtual = info->var.xres;
  133. info->var.yres = (sfb_read(par, SFB_REG_VID_VER) >>
  134. SFB_VID_VER_SL_SHIFT) & SFB_VID_VER_SL_MASK;
  135. info->var.yres_virtual = info->var.yres;
  136. info->var.left_margin = ((sfb_read(par, SFB_REG_VID_HOR) >>
  137. SFB_VID_HOR_BP_SHIFT) &
  138. SFB_VID_HOR_BP_MASK) * 4;
  139. info->var.right_margin = ((sfb_read(par, SFB_REG_VID_HOR) >>
  140. SFB_VID_HOR_FP_SHIFT) &
  141. SFB_VID_HOR_FP_MASK) * 4;
  142. info->var.upper_margin = (sfb_read(par, SFB_REG_VID_VER) >>
  143. SFB_VID_VER_BP_SHIFT) & SFB_VID_VER_BP_MASK;
  144. info->var.lower_margin = (sfb_read(par, SFB_REG_VID_VER) >>
  145. SFB_VID_VER_FP_SHIFT) & SFB_VID_VER_FP_MASK;
  146. info->var.hsync_len = ((sfb_read(par, SFB_REG_VID_HOR) >>
  147. SFB_VID_HOR_SYN_SHIFT) &
  148. SFB_VID_HOR_SYN_MASK) * 4;
  149. info->var.vsync_len = (sfb_read(par, SFB_REG_VID_VER) >>
  150. SFB_VID_VER_SYN_SHIFT) & SFB_VID_VER_SYN_MASK;
  151. info->fix.line_length = info->var.xres;
  152. };
  153. /*
  154. * Determine oscillator configuration.
  155. */
  156. static void __init pmagbbfb_osc_setup(struct fb_info *info)
  157. {
  158. static unsigned int pmagbbfb_freqs[] __initdata = {
  159. 130808, 119843, 104000, 92980, 74367, 72800,
  160. 69197, 66000, 65000, 50350, 36000, 32000, 25175
  161. };
  162. struct pmagbbfb_par *par = info->par;
  163. u32 count0 = 8, count1 = 8, counttc = 16 * 256 + 8;
  164. u32 freq0, freq1, freqtc = get_tc_speed() / 250;
  165. int i, j;
  166. gp0_write(par, 0); /* select Osc0 */
  167. for (j = 0; j < 16; j++) {
  168. mb();
  169. sfb_write(par, SFB_REG_TCCLK_COUNT, 0);
  170. mb();
  171. for (i = 0; i < 100; i++) { /* nominally max. 20.5us */
  172. if (sfb_read(par, SFB_REG_TCCLK_COUNT) == 0)
  173. break;
  174. udelay(1);
  175. }
  176. count0 += sfb_read(par, SFB_REG_VIDCLK_COUNT);
  177. }
  178. gp0_write(par, 1); /* select Osc1 */
  179. for (j = 0; j < 16; j++) {
  180. mb();
  181. sfb_write(par, SFB_REG_TCCLK_COUNT, 0);
  182. for (i = 0; i < 100; i++) { /* nominally max. 20.5us */
  183. if (sfb_read(par, SFB_REG_TCCLK_COUNT) == 0)
  184. break;
  185. udelay(1);
  186. }
  187. count1 += sfb_read(par, SFB_REG_VIDCLK_COUNT);
  188. }
  189. freq0 = (freqtc * count0 + counttc / 2) / counttc;
  190. par->osc0 = freq0;
  191. if (freq0 >= pmagbbfb_freqs[0] - (pmagbbfb_freqs[0] + 32) / 64 &&
  192. freq0 <= pmagbbfb_freqs[0] + (pmagbbfb_freqs[0] + 32) / 64)
  193. par->osc0 = pmagbbfb_freqs[0];
  194. freq1 = (par->osc0 * count1 + count0 / 2) / count0;
  195. par->osc1 = freq1;
  196. for (i = 0; i < ARRAY_SIZE(pmagbbfb_freqs); i++)
  197. if (freq1 >= pmagbbfb_freqs[i] -
  198. (pmagbbfb_freqs[i] + 128) / 256 &&
  199. freq1 <= pmagbbfb_freqs[i] +
  200. (pmagbbfb_freqs[i] + 128) / 256) {
  201. par->osc1 = pmagbbfb_freqs[i];
  202. break;
  203. }
  204. if (par->osc0 - par->osc1 <= (par->osc0 + par->osc1 + 256) / 512 ||
  205. par->osc1 - par->osc0 <= (par->osc0 + par->osc1 + 256) / 512)
  206. par->osc1 = 0;
  207. gp0_write(par, par->osc1 != 0); /* reselect OscX */
  208. info->var.pixclock = par->osc1 ?
  209. (1000000000 + par->osc1 / 2) / par->osc1 :
  210. (1000000000 + par->osc0 / 2) / par->osc0;
  211. };
  212. static int __init pmagbbfb_init_one(int slot)
  213. {
  214. char freq0[12], freq1[12];
  215. struct fb_info *info;
  216. struct pmagbbfb_par *par;
  217. unsigned long base_addr;
  218. u32 vid_base;
  219. info = framebuffer_alloc(sizeof(struct pmagbbfb_par), NULL);
  220. if (!info)
  221. return -ENOMEM;
  222. par = info->par;
  223. par->slot = slot;
  224. claim_tc_card(par->slot);
  225. base_addr = get_tc_base_addr(par->slot);
  226. par->next = root_pmagbbfb_dev;
  227. root_pmagbbfb_dev = info;
  228. if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
  229. goto err_alloc;
  230. info->fbops = &pmagbbfb_ops;
  231. info->fix = pmagbbfb_fix;
  232. info->var = pmagbbfb_defined;
  233. info->flags = FBINFO_DEFAULT;
  234. /* MMIO mapping setup. */
  235. info->fix.mmio_start = base_addr;
  236. par->mmio = ioremap_nocache(info->fix.mmio_start, info->fix.mmio_len);
  237. if (!par->mmio)
  238. goto err_cmap;
  239. par->sfb = par->mmio + PMAGB_B_SFB;
  240. par->dac = par->mmio + PMAGB_B_BT459;
  241. /* Frame buffer mapping setup. */
  242. info->fix.smem_start = base_addr + PMAGB_B_FBMEM;
  243. par->smem = ioremap_nocache(info->fix.smem_start, info->fix.smem_len);
  244. if (!par->smem)
  245. goto err_mmio_map;
  246. vid_base = sfb_read(par, SFB_REG_VID_BASE);
  247. info->screen_base = (void __iomem *)par->smem + vid_base * 0x1000;
  248. info->screen_size = info->fix.smem_len - 2 * vid_base * 0x1000;
  249. pmagbbfb_erase_cursor(info);
  250. pmagbbfb_screen_setup(info);
  251. pmagbbfb_osc_setup(info);
  252. if (register_framebuffer(info) < 0)
  253. goto err_smem_map;
  254. snprintf(freq0, sizeof(freq0), "%u.%03uMHz",
  255. par->osc0 / 1000, par->osc0 % 1000);
  256. snprintf(freq1, sizeof(freq1), "%u.%03uMHz",
  257. par->osc1 / 1000, par->osc1 % 1000);
  258. pr_info("fb%d: %s frame buffer device in slot %d\n",
  259. info->node, info->fix.id, par->slot);
  260. pr_info("fb%d: Osc0: %s, Osc1: %s, Osc%u selected\n",
  261. info->node, freq0, par->osc1 ? freq1 : "disabled",
  262. par->osc1 != 0);
  263. return 0;
  264. err_smem_map:
  265. iounmap(par->smem);
  266. err_mmio_map:
  267. iounmap(par->mmio);
  268. err_cmap:
  269. fb_dealloc_cmap(&info->cmap);
  270. err_alloc:
  271. root_pmagbbfb_dev = par->next;
  272. release_tc_card(par->slot);
  273. framebuffer_release(info);
  274. return -ENXIO;
  275. }
  276. static void __exit pmagbbfb_exit_one(void)
  277. {
  278. struct fb_info *info = root_pmagbbfb_dev;
  279. struct pmagbbfb_par *par = info->par;
  280. unregister_framebuffer(info);
  281. iounmap(par->smem);
  282. iounmap(par->mmio);
  283. fb_dealloc_cmap(&info->cmap);
  284. root_pmagbbfb_dev = par->next;
  285. release_tc_card(par->slot);
  286. framebuffer_release(info);
  287. }
  288. /*
  289. * Initialise the framebuffer.
  290. */
  291. static int __init pmagbbfb_init(void)
  292. {
  293. int count = 0;
  294. int slot;
  295. if (fb_get_options("pmagbbfb", NULL))
  296. return -ENXIO;
  297. while ((slot = search_tc_card("PMAGB-BA")) >= 0) {
  298. if (pmagbbfb_init_one(slot) < 0)
  299. break;
  300. count++;
  301. }
  302. return (count > 0) ? 0 : -ENXIO;
  303. }
  304. static void __exit pmagbbfb_exit(void)
  305. {
  306. while (root_pmagbbfb_dev)
  307. pmagbbfb_exit_one();
  308. }
  309. module_init(pmagbbfb_init);
  310. module_exit(pmagbbfb_exit);
  311. MODULE_LICENSE("GPL");