radeon_i2c.c 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265
  1. #include <linux/config.h>
  2. #include <linux/module.h>
  3. #include <linux/kernel.h>
  4. #include <linux/sched.h>
  5. #include <linux/delay.h>
  6. #include <linux/pci.h>
  7. #include <linux/fb.h>
  8. #include <linux/i2c.h>
  9. #include <linux/i2c-id.h>
  10. #include <linux/i2c-algo-bit.h>
  11. #include <asm/io.h>
  12. #include <video/radeon.h>
  13. #include "radeonfb.h"
  14. #include "../edid.h"
  15. #define RADEON_DDC 0x50
  16. static void radeon_gpio_setscl(void* data, int state)
  17. {
  18. struct radeon_i2c_chan *chan = data;
  19. struct radeonfb_info *rinfo = chan->rinfo;
  20. u32 val;
  21. val = INREG(chan->ddc_reg) & ~(VGA_DDC_CLK_OUT_EN);
  22. if (!state)
  23. val |= VGA_DDC_CLK_OUT_EN;
  24. OUTREG(chan->ddc_reg, val);
  25. (void)INREG(chan->ddc_reg);
  26. }
  27. static void radeon_gpio_setsda(void* data, int state)
  28. {
  29. struct radeon_i2c_chan *chan = data;
  30. struct radeonfb_info *rinfo = chan->rinfo;
  31. u32 val;
  32. val = INREG(chan->ddc_reg) & ~(VGA_DDC_DATA_OUT_EN);
  33. if (!state)
  34. val |= VGA_DDC_DATA_OUT_EN;
  35. OUTREG(chan->ddc_reg, val);
  36. (void)INREG(chan->ddc_reg);
  37. }
  38. static int radeon_gpio_getscl(void* data)
  39. {
  40. struct radeon_i2c_chan *chan = data;
  41. struct radeonfb_info *rinfo = chan->rinfo;
  42. u32 val;
  43. val = INREG(chan->ddc_reg);
  44. return (val & VGA_DDC_CLK_INPUT) ? 1 : 0;
  45. }
  46. static int radeon_gpio_getsda(void* data)
  47. {
  48. struct radeon_i2c_chan *chan = data;
  49. struct radeonfb_info *rinfo = chan->rinfo;
  50. u32 val;
  51. val = INREG(chan->ddc_reg);
  52. return (val & VGA_DDC_DATA_INPUT) ? 1 : 0;
  53. }
  54. static int radeon_setup_i2c_bus(struct radeon_i2c_chan *chan, const char *name)
  55. {
  56. int rc;
  57. strcpy(chan->adapter.name, name);
  58. chan->adapter.owner = THIS_MODULE;
  59. chan->adapter.id = I2C_HW_B_RADEON;
  60. chan->adapter.algo_data = &chan->algo;
  61. chan->adapter.dev.parent = &chan->rinfo->pdev->dev;
  62. chan->algo.setsda = radeon_gpio_setsda;
  63. chan->algo.setscl = radeon_gpio_setscl;
  64. chan->algo.getsda = radeon_gpio_getsda;
  65. chan->algo.getscl = radeon_gpio_getscl;
  66. chan->algo.udelay = 40;
  67. chan->algo.timeout = 20;
  68. chan->algo.data = chan;
  69. i2c_set_adapdata(&chan->adapter, chan);
  70. /* Raise SCL and SDA */
  71. radeon_gpio_setsda(chan, 1);
  72. radeon_gpio_setscl(chan, 1);
  73. udelay(20);
  74. rc = i2c_bit_add_bus(&chan->adapter);
  75. if (rc == 0)
  76. dev_dbg(&chan->rinfo->pdev->dev, "I2C bus %s registered.\n", name);
  77. else
  78. dev_warn(&chan->rinfo->pdev->dev, "Failed to register I2C bus %s.\n", name);
  79. return rc;
  80. }
  81. void radeon_create_i2c_busses(struct radeonfb_info *rinfo)
  82. {
  83. rinfo->i2c[0].rinfo = rinfo;
  84. rinfo->i2c[0].ddc_reg = GPIO_MONID;
  85. radeon_setup_i2c_bus(&rinfo->i2c[0], "monid");
  86. rinfo->i2c[1].rinfo = rinfo;
  87. rinfo->i2c[1].ddc_reg = GPIO_DVI_DDC;
  88. radeon_setup_i2c_bus(&rinfo->i2c[1], "dvi");
  89. rinfo->i2c[2].rinfo = rinfo;
  90. rinfo->i2c[2].ddc_reg = GPIO_VGA_DDC;
  91. radeon_setup_i2c_bus(&rinfo->i2c[2], "vga");
  92. rinfo->i2c[3].rinfo = rinfo;
  93. rinfo->i2c[3].ddc_reg = GPIO_CRT2_DDC;
  94. radeon_setup_i2c_bus(&rinfo->i2c[3], "crt2");
  95. }
  96. void radeon_delete_i2c_busses(struct radeonfb_info *rinfo)
  97. {
  98. if (rinfo->i2c[0].rinfo)
  99. i2c_bit_del_bus(&rinfo->i2c[0].adapter);
  100. rinfo->i2c[0].rinfo = NULL;
  101. if (rinfo->i2c[1].rinfo)
  102. i2c_bit_del_bus(&rinfo->i2c[1].adapter);
  103. rinfo->i2c[1].rinfo = NULL;
  104. if (rinfo->i2c[2].rinfo)
  105. i2c_bit_del_bus(&rinfo->i2c[2].adapter);
  106. rinfo->i2c[2].rinfo = NULL;
  107. if (rinfo->i2c[3].rinfo)
  108. i2c_bit_del_bus(&rinfo->i2c[3].adapter);
  109. rinfo->i2c[3].rinfo = NULL;
  110. }
  111. static u8 *radeon_do_probe_i2c_edid(struct radeon_i2c_chan *chan)
  112. {
  113. u8 start = 0x0;
  114. struct i2c_msg msgs[] = {
  115. {
  116. .addr = RADEON_DDC,
  117. .len = 1,
  118. .buf = &start,
  119. }, {
  120. .addr = RADEON_DDC,
  121. .flags = I2C_M_RD,
  122. .len = EDID_LENGTH,
  123. },
  124. };
  125. u8 *buf;
  126. buf = kmalloc(EDID_LENGTH, GFP_KERNEL);
  127. if (!buf) {
  128. dev_warn(&chan->rinfo->pdev->dev, "Out of memory!\n");
  129. return NULL;
  130. }
  131. msgs[1].buf = buf;
  132. if (i2c_transfer(&chan->adapter, msgs, 2) == 2)
  133. return buf;
  134. dev_dbg(&chan->rinfo->pdev->dev, "Unable to read EDID block.\n");
  135. kfree(buf);
  136. return NULL;
  137. }
  138. int radeon_probe_i2c_connector(struct radeonfb_info *rinfo, int conn, u8 **out_edid)
  139. {
  140. u32 reg = rinfo->i2c[conn-1].ddc_reg;
  141. u8 *edid = NULL;
  142. int i, j;
  143. OUTREG(reg, INREG(reg) &
  144. ~(VGA_DDC_DATA_OUTPUT | VGA_DDC_CLK_OUTPUT));
  145. OUTREG(reg, INREG(reg) & ~(VGA_DDC_CLK_OUT_EN));
  146. (void)INREG(reg);
  147. for (i = 0; i < 3; i++) {
  148. /* For some old monitors we need the
  149. * following process to initialize/stop DDC
  150. */
  151. OUTREG(reg, INREG(reg) & ~(VGA_DDC_DATA_OUT_EN));
  152. (void)INREG(reg);
  153. msleep(13);
  154. OUTREG(reg, INREG(reg) & ~(VGA_DDC_CLK_OUT_EN));
  155. (void)INREG(reg);
  156. for (j = 0; j < 5; j++) {
  157. msleep(10);
  158. if (INREG(reg) & VGA_DDC_CLK_INPUT)
  159. break;
  160. }
  161. if (j == 5)
  162. continue;
  163. OUTREG(reg, INREG(reg) | VGA_DDC_DATA_OUT_EN);
  164. (void)INREG(reg);
  165. msleep(15);
  166. OUTREG(reg, INREG(reg) | VGA_DDC_CLK_OUT_EN);
  167. (void)INREG(reg);
  168. msleep(15);
  169. OUTREG(reg, INREG(reg) & ~(VGA_DDC_DATA_OUT_EN));
  170. (void)INREG(reg);
  171. msleep(15);
  172. /* Do the real work */
  173. edid = radeon_do_probe_i2c_edid(&rinfo->i2c[conn-1]);
  174. OUTREG(reg, INREG(reg) |
  175. (VGA_DDC_DATA_OUT_EN | VGA_DDC_CLK_OUT_EN));
  176. (void)INREG(reg);
  177. msleep(15);
  178. OUTREG(reg, INREG(reg) & ~(VGA_DDC_CLK_OUT_EN));
  179. (void)INREG(reg);
  180. for (j = 0; j < 10; j++) {
  181. msleep(10);
  182. if (INREG(reg) & VGA_DDC_CLK_INPUT)
  183. break;
  184. }
  185. OUTREG(reg, INREG(reg) & ~(VGA_DDC_DATA_OUT_EN));
  186. (void)INREG(reg);
  187. msleep(15);
  188. OUTREG(reg, INREG(reg) |
  189. (VGA_DDC_DATA_OUT_EN | VGA_DDC_CLK_OUT_EN));
  190. (void)INREG(reg);
  191. if (edid)
  192. break;
  193. }
  194. /* Release the DDC lines when done or the Apple Cinema HD display
  195. * will switch off
  196. */
  197. OUTREG(reg, INREG(reg) & ~(VGA_DDC_CLK_OUT_EN | VGA_DDC_DATA_OUT_EN));
  198. (void)INREG(reg);
  199. if (out_edid)
  200. *out_edid = edid;
  201. if (!edid) {
  202. RTRACE("radeonfb: I2C (port %d) ... not found\n", conn);
  203. return MT_NONE;
  204. }
  205. if (edid[0x14] & 0x80) {
  206. /* Fix detection using BIOS tables */
  207. if (rinfo->is_mobility /*&& conn == ddc_dvi*/ &&
  208. (INREG(LVDS_GEN_CNTL) & LVDS_ON)) {
  209. RTRACE("radeonfb: I2C (port %d) ... found LVDS panel\n", conn);
  210. return MT_LCD;
  211. } else {
  212. RTRACE("radeonfb: I2C (port %d) ... found TMDS panel\n", conn);
  213. return MT_DFP;
  214. }
  215. }
  216. RTRACE("radeonfb: I2C (port %d) ... found CRT display\n", conn);
  217. return MT_CRT;
  218. }