asix.c 23 KB

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  1. /*
  2. * ASIX AX8817X based USB 2.0 Ethernet Devices
  3. * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com>
  4. * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
  5. * Copyright (c) 2002-2003 TiVo Inc.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. // #define DEBUG // error path messages, extra info
  22. // #define VERBOSE // more; success messages
  23. #include <linux/config.h>
  24. #include <linux/module.h>
  25. #include <linux/kmod.h>
  26. #include <linux/sched.h>
  27. #include <linux/init.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/ethtool.h>
  31. #include <linux/workqueue.h>
  32. #include <linux/mii.h>
  33. #include <linux/usb.h>
  34. #include <linux/crc32.h>
  35. #include "usbnet.h"
  36. /* ASIX AX8817X based USB 2.0 Ethernet Devices */
  37. #define AX_CMD_SET_SW_MII 0x06
  38. #define AX_CMD_READ_MII_REG 0x07
  39. #define AX_CMD_WRITE_MII_REG 0x08
  40. #define AX_CMD_SET_HW_MII 0x0a
  41. #define AX_CMD_READ_EEPROM 0x0b
  42. #define AX_CMD_WRITE_EEPROM 0x0c
  43. #define AX_CMD_WRITE_ENABLE 0x0d
  44. #define AX_CMD_WRITE_DISABLE 0x0e
  45. #define AX_CMD_WRITE_RX_CTL 0x10
  46. #define AX_CMD_READ_IPG012 0x11
  47. #define AX_CMD_WRITE_IPG0 0x12
  48. #define AX_CMD_WRITE_IPG1 0x13
  49. #define AX_CMD_WRITE_IPG2 0x14
  50. #define AX_CMD_WRITE_MULTI_FILTER 0x16
  51. #define AX_CMD_READ_NODE_ID 0x17
  52. #define AX_CMD_READ_PHY_ID 0x19
  53. #define AX_CMD_READ_MEDIUM_STATUS 0x1a
  54. #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
  55. #define AX_CMD_READ_MONITOR_MODE 0x1c
  56. #define AX_CMD_WRITE_MONITOR_MODE 0x1d
  57. #define AX_CMD_WRITE_GPIOS 0x1f
  58. #define AX_CMD_SW_RESET 0x20
  59. #define AX_CMD_SW_PHY_STATUS 0x21
  60. #define AX_CMD_SW_PHY_SELECT 0x22
  61. #define AX88772_CMD_READ_NODE_ID 0x13
  62. #define AX_MONITOR_MODE 0x01
  63. #define AX_MONITOR_LINK 0x02
  64. #define AX_MONITOR_MAGIC 0x04
  65. #define AX_MONITOR_HSFS 0x10
  66. /* AX88172 Medium Status Register values */
  67. #define AX_MEDIUM_FULL_DUPLEX 0x02
  68. #define AX_MEDIUM_TX_ABORT_ALLOW 0x04
  69. #define AX_MEDIUM_FLOW_CONTROL_EN 0x10
  70. #define AX_MCAST_FILTER_SIZE 8
  71. #define AX_MAX_MCAST 64
  72. #define AX_EEPROM_LEN 0x40
  73. #define AX_SWRESET_CLEAR 0x00
  74. #define AX_SWRESET_RR 0x01
  75. #define AX_SWRESET_RT 0x02
  76. #define AX_SWRESET_PRTE 0x04
  77. #define AX_SWRESET_PRL 0x08
  78. #define AX_SWRESET_BZ 0x10
  79. #define AX_SWRESET_IPRL 0x20
  80. #define AX_SWRESET_IPPD 0x40
  81. #define AX88772_IPG0_DEFAULT 0x15
  82. #define AX88772_IPG1_DEFAULT 0x0c
  83. #define AX88772_IPG2_DEFAULT 0x12
  84. #define AX88772_MEDIUM_FULL_DUPLEX 0x0002
  85. #define AX88772_MEDIUM_RESERVED 0x0004
  86. #define AX88772_MEDIUM_RX_FC_ENABLE 0x0010
  87. #define AX88772_MEDIUM_TX_FC_ENABLE 0x0020
  88. #define AX88772_MEDIUM_PAUSE_FORMAT 0x0080
  89. #define AX88772_MEDIUM_RX_ENABLE 0x0100
  90. #define AX88772_MEDIUM_100MB 0x0200
  91. #define AX88772_MEDIUM_DEFAULT \
  92. (AX88772_MEDIUM_FULL_DUPLEX | AX88772_MEDIUM_RX_FC_ENABLE | \
  93. AX88772_MEDIUM_TX_FC_ENABLE | AX88772_MEDIUM_100MB | \
  94. AX88772_MEDIUM_RESERVED | AX88772_MEDIUM_RX_ENABLE )
  95. #define AX_EEPROM_MAGIC 0xdeadbeef
  96. /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
  97. struct asix_data {
  98. u8 multi_filter[AX_MCAST_FILTER_SIZE];
  99. };
  100. struct ax88172_int_data {
  101. u16 res1;
  102. u8 link;
  103. u16 res2;
  104. u8 status;
  105. u16 res3;
  106. } __attribute__ ((packed));
  107. static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  108. u16 size, void *data)
  109. {
  110. return usb_control_msg(
  111. dev->udev,
  112. usb_rcvctrlpipe(dev->udev, 0),
  113. cmd,
  114. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  115. value,
  116. index,
  117. data,
  118. size,
  119. USB_CTRL_GET_TIMEOUT);
  120. }
  121. static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  122. u16 size, void *data)
  123. {
  124. return usb_control_msg(
  125. dev->udev,
  126. usb_sndctrlpipe(dev->udev, 0),
  127. cmd,
  128. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  129. value,
  130. index,
  131. data,
  132. size,
  133. USB_CTRL_SET_TIMEOUT);
  134. }
  135. static void asix_async_cmd_callback(struct urb *urb, struct pt_regs *regs)
  136. {
  137. struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
  138. if (urb->status < 0)
  139. printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
  140. urb->status);
  141. kfree(req);
  142. usb_free_urb(urb);
  143. }
  144. static inline int asix_set_sw_mii(struct usbnet *dev)
  145. {
  146. int ret;
  147. ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
  148. if (ret < 0)
  149. devdbg(dev, "Failed to enable software MII access");
  150. return ret;
  151. }
  152. static inline int asix_set_hw_mii(struct usbnet *dev)
  153. {
  154. int ret;
  155. ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
  156. if (ret < 0)
  157. devdbg(dev, "Failed to enable hardware MII access");
  158. return ret;
  159. }
  160. static inline int asix_get_phyid(struct usbnet *dev)
  161. {
  162. int ret = 0;
  163. void *buf;
  164. buf = kmalloc(2, GFP_KERNEL);
  165. if (!buf)
  166. goto out1;
  167. if ((ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID,
  168. 0, 0, 2, buf)) < 2) {
  169. devdbg(dev, "Error reading PHYID register: %02x", ret);
  170. goto out2;
  171. }
  172. ret = *((u8 *)buf + 1);
  173. out2:
  174. kfree(buf);
  175. out1:
  176. return ret;
  177. }
  178. static int asix_sw_reset(struct usbnet *dev, u8 flags)
  179. {
  180. int ret;
  181. ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
  182. if (ret < 0)
  183. devdbg(dev,"Failed to send software reset: %02x", ret);
  184. return ret;
  185. }
  186. static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
  187. {
  188. int ret;
  189. ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
  190. if (ret < 0)
  191. devdbg(dev, "Failed to write RX_CTL mode: %02x", ret);
  192. return ret;
  193. }
  194. static void asix_status(struct usbnet *dev, struct urb *urb)
  195. {
  196. struct ax88172_int_data *event;
  197. int link;
  198. if (urb->actual_length < 8)
  199. return;
  200. event = urb->transfer_buffer;
  201. link = event->link & 0x01;
  202. if (netif_carrier_ok(dev->net) != link) {
  203. if (link) {
  204. netif_carrier_on(dev->net);
  205. usbnet_defer_kevent (dev, EVENT_LINK_RESET );
  206. } else
  207. netif_carrier_off(dev->net);
  208. devdbg(dev, "Link Status is: %d", link);
  209. }
  210. }
  211. static void
  212. asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
  213. u16 size, void *data)
  214. {
  215. struct usb_ctrlrequest *req;
  216. int status;
  217. struct urb *urb;
  218. if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
  219. devdbg(dev, "Error allocating URB in write_cmd_async!");
  220. return;
  221. }
  222. if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
  223. deverr(dev, "Failed to allocate memory for control request");
  224. usb_free_urb(urb);
  225. return;
  226. }
  227. req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
  228. req->bRequest = cmd;
  229. req->wValue = cpu_to_le16(value);
  230. req->wIndex = cpu_to_le16(index);
  231. req->wLength = cpu_to_le16(size);
  232. usb_fill_control_urb(urb, dev->udev,
  233. usb_sndctrlpipe(dev->udev, 0),
  234. (void *)req, data, size,
  235. asix_async_cmd_callback, req);
  236. if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
  237. deverr(dev, "Error submitting the control message: status=%d",
  238. status);
  239. kfree(req);
  240. usb_free_urb(urb);
  241. }
  242. }
  243. static void asix_set_multicast(struct net_device *net)
  244. {
  245. struct usbnet *dev = netdev_priv(net);
  246. struct asix_data *data = (struct asix_data *)&dev->data;
  247. u8 rx_ctl = 0x8c;
  248. if (net->flags & IFF_PROMISC) {
  249. rx_ctl |= 0x01;
  250. } else if (net->flags & IFF_ALLMULTI
  251. || net->mc_count > AX_MAX_MCAST) {
  252. rx_ctl |= 0x02;
  253. } else if (net->mc_count == 0) {
  254. /* just broadcast and directed */
  255. } else {
  256. /* We use the 20 byte dev->data
  257. * for our 8 byte filter buffer
  258. * to avoid allocating memory that
  259. * is tricky to free later */
  260. struct dev_mc_list *mc_list = net->mc_list;
  261. u32 crc_bits;
  262. int i;
  263. memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
  264. /* Build the multicast hash filter. */
  265. for (i = 0; i < net->mc_count; i++) {
  266. crc_bits =
  267. ether_crc(ETH_ALEN,
  268. mc_list->dmi_addr) >> 26;
  269. data->multi_filter[crc_bits >> 3] |=
  270. 1 << (crc_bits & 7);
  271. mc_list = mc_list->next;
  272. }
  273. asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
  274. AX_MCAST_FILTER_SIZE, data->multi_filter);
  275. rx_ctl |= 0x10;
  276. }
  277. asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
  278. }
  279. static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
  280. {
  281. struct usbnet *dev = netdev_priv(netdev);
  282. u16 res;
  283. asix_set_sw_mii(dev);
  284. asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
  285. (__u16)loc, 2, (u16 *)&res);
  286. asix_set_hw_mii(dev);
  287. return res & 0xffff;
  288. }
  289. /* same as above, but converts resulting value to cpu byte order */
  290. static int asix_mdio_read_le(struct net_device *netdev, int phy_id, int loc)
  291. {
  292. return le16_to_cpu(asix_mdio_read(netdev,phy_id, loc));
  293. }
  294. static void
  295. asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
  296. {
  297. struct usbnet *dev = netdev_priv(netdev);
  298. u16 res = val;
  299. asix_set_sw_mii(dev);
  300. asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id,
  301. (__u16)loc, 2, (u16 *)&res);
  302. asix_set_hw_mii(dev);
  303. }
  304. /* same as above, but converts new value to le16 byte order before writing */
  305. static void
  306. asix_mdio_write_le(struct net_device *netdev, int phy_id, int loc, int val)
  307. {
  308. asix_mdio_write( netdev, phy_id, loc, cpu_to_le16(val) );
  309. }
  310. static int ax88172_link_reset(struct usbnet *dev)
  311. {
  312. u16 lpa;
  313. u16 adv;
  314. u16 res;
  315. u8 mode;
  316. mode = AX_MEDIUM_TX_ABORT_ALLOW | AX_MEDIUM_FLOW_CONTROL_EN;
  317. lpa = asix_mdio_read_le(dev->net, dev->mii.phy_id, MII_LPA);
  318. adv = asix_mdio_read_le(dev->net, dev->mii.phy_id, MII_ADVERTISE);
  319. res = mii_nway_result(lpa|adv);
  320. if (res & LPA_DUPLEX)
  321. mode |= AX_MEDIUM_FULL_DUPLEX;
  322. asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
  323. return 0;
  324. }
  325. static void
  326. asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
  327. {
  328. struct usbnet *dev = netdev_priv(net);
  329. u8 opt;
  330. if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
  331. wolinfo->supported = 0;
  332. wolinfo->wolopts = 0;
  333. return;
  334. }
  335. wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
  336. wolinfo->wolopts = 0;
  337. if (opt & AX_MONITOR_MODE) {
  338. if (opt & AX_MONITOR_LINK)
  339. wolinfo->wolopts |= WAKE_PHY;
  340. if (opt & AX_MONITOR_MAGIC)
  341. wolinfo->wolopts |= WAKE_MAGIC;
  342. }
  343. }
  344. static int
  345. asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
  346. {
  347. struct usbnet *dev = netdev_priv(net);
  348. u8 opt = 0;
  349. u8 buf[1];
  350. if (wolinfo->wolopts & WAKE_PHY)
  351. opt |= AX_MONITOR_LINK;
  352. if (wolinfo->wolopts & WAKE_MAGIC)
  353. opt |= AX_MONITOR_MAGIC;
  354. if (opt != 0)
  355. opt |= AX_MONITOR_MODE;
  356. if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
  357. opt, 0, 0, &buf) < 0)
  358. return -EINVAL;
  359. return 0;
  360. }
  361. static int asix_get_eeprom_len(struct net_device *net)
  362. {
  363. return AX_EEPROM_LEN;
  364. }
  365. static int asix_get_eeprom(struct net_device *net,
  366. struct ethtool_eeprom *eeprom, u8 *data)
  367. {
  368. struct usbnet *dev = netdev_priv(net);
  369. u16 *ebuf = (u16 *)data;
  370. int i;
  371. /* Crude hack to ensure that we don't overwrite memory
  372. * if an odd length is supplied
  373. */
  374. if (eeprom->len % 2)
  375. return -EINVAL;
  376. eeprom->magic = AX_EEPROM_MAGIC;
  377. /* ax8817x returns 2 bytes from eeprom on read */
  378. for (i=0; i < eeprom->len / 2; i++) {
  379. if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
  380. eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
  381. return -EINVAL;
  382. }
  383. return 0;
  384. }
  385. static void asix_get_drvinfo (struct net_device *net,
  386. struct ethtool_drvinfo *info)
  387. {
  388. /* Inherit standard device info */
  389. usbnet_get_drvinfo(net, info);
  390. info->eedump_len = 0x3e;
  391. }
  392. static int asix_get_settings(struct net_device *net, struct ethtool_cmd *cmd)
  393. {
  394. struct usbnet *dev = netdev_priv(net);
  395. return mii_ethtool_gset(&dev->mii,cmd);
  396. }
  397. static int asix_set_settings(struct net_device *net, struct ethtool_cmd *cmd)
  398. {
  399. struct usbnet *dev = netdev_priv(net);
  400. return mii_ethtool_sset(&dev->mii,cmd);
  401. }
  402. /* We need to override some ethtool_ops so we require our
  403. own structure so we don't interfere with other usbnet
  404. devices that may be connected at the same time. */
  405. static struct ethtool_ops ax88172_ethtool_ops = {
  406. .get_drvinfo = asix_get_drvinfo,
  407. .get_link = ethtool_op_get_link,
  408. .get_msglevel = usbnet_get_msglevel,
  409. .set_msglevel = usbnet_set_msglevel,
  410. .get_wol = asix_get_wol,
  411. .set_wol = asix_set_wol,
  412. .get_eeprom_len = asix_get_eeprom_len,
  413. .get_eeprom = asix_get_eeprom,
  414. .get_settings = asix_get_settings,
  415. .set_settings = asix_set_settings,
  416. };
  417. static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
  418. {
  419. struct usbnet *dev = netdev_priv(net);
  420. return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
  421. }
  422. static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
  423. {
  424. int ret = 0;
  425. void *buf;
  426. int i;
  427. unsigned long gpio_bits = dev->driver_info->data;
  428. usbnet_get_endpoints(dev,intf);
  429. buf = kmalloc(ETH_ALEN, GFP_KERNEL);
  430. if(!buf) {
  431. ret = -ENOMEM;
  432. goto out1;
  433. }
  434. /* Toggle the GPIOs in a manufacturer/model specific way */
  435. for (i = 2; i >= 0; i--) {
  436. if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
  437. (gpio_bits >> (i * 8)) & 0xff, 0, 0,
  438. buf)) < 0)
  439. goto out2;
  440. msleep(5);
  441. }
  442. if ((ret = asix_write_rx_ctl(dev,0x80)) < 0)
  443. goto out2;
  444. /* Get the MAC address */
  445. memset(buf, 0, ETH_ALEN);
  446. if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
  447. 0, 0, 6, buf)) < 0) {
  448. dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
  449. goto out2;
  450. }
  451. memcpy(dev->net->dev_addr, buf, ETH_ALEN);
  452. /* Initialize MII structure */
  453. dev->mii.dev = dev->net;
  454. dev->mii.mdio_read = asix_mdio_read;
  455. dev->mii.mdio_write = asix_mdio_write;
  456. dev->mii.phy_id_mask = 0x3f;
  457. dev->mii.reg_num_mask = 0x1f;
  458. dev->mii.phy_id = asix_get_phyid(dev);
  459. dev->net->do_ioctl = asix_ioctl;
  460. dev->net->set_multicast_list = asix_set_multicast;
  461. dev->net->ethtool_ops = &ax88172_ethtool_ops;
  462. asix_mdio_write_le(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
  463. asix_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE,
  464. ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
  465. mii_nway_restart(&dev->mii);
  466. return 0;
  467. out2:
  468. kfree(buf);
  469. out1:
  470. return ret;
  471. }
  472. static struct ethtool_ops ax88772_ethtool_ops = {
  473. .get_drvinfo = asix_get_drvinfo,
  474. .get_link = ethtool_op_get_link,
  475. .get_msglevel = usbnet_get_msglevel,
  476. .set_msglevel = usbnet_set_msglevel,
  477. .get_wol = asix_get_wol,
  478. .set_wol = asix_set_wol,
  479. .get_eeprom_len = asix_get_eeprom_len,
  480. .get_eeprom = asix_get_eeprom,
  481. .get_settings = asix_get_settings,
  482. .set_settings = asix_set_settings,
  483. };
  484. static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
  485. {
  486. int ret;
  487. void *buf;
  488. usbnet_get_endpoints(dev,intf);
  489. buf = kmalloc(6, GFP_KERNEL);
  490. if(!buf) {
  491. dbg ("Cannot allocate memory for buffer");
  492. ret = -ENOMEM;
  493. goto out1;
  494. }
  495. if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
  496. 0x00B0, 0, 0, buf)) < 0)
  497. goto out2;
  498. msleep(5);
  499. if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
  500. 0x0001, 0, 0, buf)) < 0) {
  501. dbg("Select PHY #1 failed: %d", ret);
  502. goto out2;
  503. }
  504. if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD)) < 0)
  505. goto out2;
  506. msleep(150);
  507. if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0)
  508. goto out2;
  509. msleep(150);
  510. if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
  511. goto out2;
  512. msleep(150);
  513. if ((ret = asix_write_rx_ctl(dev, 0x00)) < 0)
  514. goto out2;
  515. /* Get the MAC address */
  516. memset(buf, 0, ETH_ALEN);
  517. if ((ret = asix_read_cmd(dev, AX88772_CMD_READ_NODE_ID,
  518. 0, 0, ETH_ALEN, buf)) < 0) {
  519. dbg("Failed to read MAC address: %d", ret);
  520. goto out2;
  521. }
  522. memcpy(dev->net->dev_addr, buf, ETH_ALEN);
  523. if ((ret = asix_set_sw_mii(dev)) < 0)
  524. goto out2;
  525. if (((ret = asix_read_cmd(dev, AX_CMD_READ_MII_REG,
  526. 0x0010, 2, 2, buf)) < 0)
  527. || (*((u16 *)buf) != 0x003b)) {
  528. dbg("Read PHY register 2 must be 0x3b00: %d", ret);
  529. goto out2;
  530. }
  531. /* Initialize MII structure */
  532. dev->mii.dev = dev->net;
  533. dev->mii.mdio_read = asix_mdio_read;
  534. dev->mii.mdio_write = asix_mdio_write;
  535. dev->mii.phy_id_mask = 0xff;
  536. dev->mii.reg_num_mask = 0xff;
  537. dev->net->do_ioctl = asix_ioctl;
  538. dev->mii.phy_id = asix_get_phyid(dev);
  539. if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
  540. goto out2;
  541. msleep(150);
  542. if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
  543. goto out2;
  544. msleep(150);
  545. dev->net->set_multicast_list = asix_set_multicast;
  546. dev->net->ethtool_ops = &ax88772_ethtool_ops;
  547. asix_mdio_write_le(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
  548. asix_mdio_write_le(dev->net, dev->mii.phy_id, MII_ADVERTISE,
  549. ADVERTISE_ALL | ADVERTISE_CSMA);
  550. mii_nway_restart(&dev->mii);
  551. if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE,
  552. AX88772_MEDIUM_DEFAULT, 0, 0, buf)) < 0) {
  553. dbg("Write medium mode register: %d", ret);
  554. goto out2;
  555. }
  556. if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
  557. AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
  558. AX88772_IPG2_DEFAULT, 0, buf)) < 0) {
  559. dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
  560. goto out2;
  561. }
  562. if ((ret = asix_set_hw_mii(dev)) < 0)
  563. goto out2;
  564. /* Set RX_CTL to default values with 2k buffer, and enable cactus */
  565. if ((ret = asix_write_rx_ctl(dev, 0x0088)) < 0)
  566. goto out2;
  567. kfree(buf);
  568. /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
  569. if (dev->driver_info->flags & FLAG_FRAMING_AX) {
  570. /* hard_mtu is still the default - the device does not support
  571. jumbo eth frames */
  572. dev->rx_urb_size = 2048;
  573. }
  574. return 0;
  575. out2:
  576. kfree(buf);
  577. out1:
  578. return ret;
  579. }
  580. static int ax88772_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
  581. {
  582. u8 *head;
  583. u32 header;
  584. char *packet;
  585. struct sk_buff *ax_skb;
  586. u16 size;
  587. head = (u8 *) skb->data;
  588. memcpy(&header, head, sizeof(header));
  589. le32_to_cpus(&header);
  590. packet = head + sizeof(header);
  591. skb_pull(skb, 4);
  592. while (skb->len > 0) {
  593. if ((short)(header & 0x0000ffff) !=
  594. ~((short)((header & 0xffff0000) >> 16))) {
  595. devdbg(dev,"header length data is error");
  596. }
  597. /* get the packet length */
  598. size = (u16) (header & 0x0000ffff);
  599. if ((skb->len) - ((size + 1) & 0xfffe) == 0)
  600. return 2;
  601. if (size > ETH_FRAME_LEN) {
  602. devdbg(dev,"invalid rx length %d", size);
  603. return 0;
  604. }
  605. ax_skb = skb_clone(skb, GFP_ATOMIC);
  606. if (ax_skb) {
  607. ax_skb->len = size;
  608. ax_skb->data = packet;
  609. ax_skb->tail = packet + size;
  610. usbnet_skb_return(dev, ax_skb);
  611. } else {
  612. return 0;
  613. }
  614. skb_pull(skb, (size + 1) & 0xfffe);
  615. if (skb->len == 0)
  616. break;
  617. head = (u8 *) skb->data;
  618. memcpy(&header, head, sizeof(header));
  619. le32_to_cpus(&header);
  620. packet = head + sizeof(header);
  621. skb_pull(skb, 4);
  622. }
  623. if (skb->len < 0) {
  624. devdbg(dev,"invalid rx length %d", skb->len);
  625. return 0;
  626. }
  627. return 1;
  628. }
  629. static struct sk_buff *ax88772_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
  630. gfp_t flags)
  631. {
  632. int padlen;
  633. int headroom = skb_headroom(skb);
  634. int tailroom = skb_tailroom(skb);
  635. u32 packet_len;
  636. u32 padbytes = 0xffff0000;
  637. padlen = ((skb->len + 4) % 512) ? 0 : 4;
  638. if ((!skb_cloned(skb))
  639. && ((headroom + tailroom) >= (4 + padlen))) {
  640. if ((headroom < 4) || (tailroom < padlen)) {
  641. skb->data = memmove(skb->head + 4, skb->data, skb->len);
  642. skb->tail = skb->data + skb->len;
  643. }
  644. } else {
  645. struct sk_buff *skb2;
  646. skb2 = skb_copy_expand(skb, 4, padlen, flags);
  647. dev_kfree_skb_any(skb);
  648. skb = skb2;
  649. if (!skb)
  650. return NULL;
  651. }
  652. skb_push(skb, 4);
  653. packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
  654. memcpy(skb->data, &packet_len, sizeof(packet_len));
  655. if ((skb->len % 512) == 0) {
  656. memcpy( skb->tail, &padbytes, sizeof(padbytes));
  657. skb_put(skb, sizeof(padbytes));
  658. }
  659. return skb;
  660. }
  661. static int ax88772_link_reset(struct usbnet *dev)
  662. {
  663. u16 lpa;
  664. u16 adv;
  665. u16 res;
  666. u16 mode;
  667. mode = AX88772_MEDIUM_DEFAULT;
  668. lpa = asix_mdio_read_le(dev->net, dev->mii.phy_id, MII_LPA);
  669. adv = asix_mdio_read_le(dev->net, dev->mii.phy_id, MII_ADVERTISE);
  670. res = mii_nway_result(lpa|adv);
  671. if ((res & LPA_DUPLEX) == 0)
  672. mode &= ~AX88772_MEDIUM_FULL_DUPLEX;
  673. if ((res & LPA_100) == 0)
  674. mode &= ~AX88772_MEDIUM_100MB;
  675. asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
  676. return 0;
  677. }
  678. static const struct driver_info ax8817x_info = {
  679. .description = "ASIX AX8817x USB 2.0 Ethernet",
  680. .bind = ax88172_bind,
  681. .status = asix_status,
  682. .link_reset = ax88172_link_reset,
  683. .reset = ax88172_link_reset,
  684. .flags = FLAG_ETHER,
  685. .data = 0x00130103,
  686. };
  687. static const struct driver_info dlink_dub_e100_info = {
  688. .description = "DLink DUB-E100 USB Ethernet",
  689. .bind = ax88172_bind,
  690. .status = asix_status,
  691. .link_reset = ax88172_link_reset,
  692. .reset = ax88172_link_reset,
  693. .flags = FLAG_ETHER,
  694. .data = 0x009f9d9f,
  695. };
  696. static const struct driver_info netgear_fa120_info = {
  697. .description = "Netgear FA-120 USB Ethernet",
  698. .bind = ax88172_bind,
  699. .status = asix_status,
  700. .link_reset = ax88172_link_reset,
  701. .reset = ax88172_link_reset,
  702. .flags = FLAG_ETHER,
  703. .data = 0x00130103,
  704. };
  705. static const struct driver_info hawking_uf200_info = {
  706. .description = "Hawking UF200 USB Ethernet",
  707. .bind = ax88172_bind,
  708. .status = asix_status,
  709. .link_reset = ax88172_link_reset,
  710. .reset = ax88172_link_reset,
  711. .flags = FLAG_ETHER,
  712. .data = 0x001f1d1f,
  713. };
  714. static const struct driver_info ax88772_info = {
  715. .description = "ASIX AX88772 USB 2.0 Ethernet",
  716. .bind = ax88772_bind,
  717. .status = asix_status,
  718. .link_reset = ax88772_link_reset,
  719. .reset = ax88772_link_reset,
  720. .flags = FLAG_ETHER | FLAG_FRAMING_AX,
  721. .rx_fixup = ax88772_rx_fixup,
  722. .tx_fixup = ax88772_tx_fixup,
  723. };
  724. static const struct usb_device_id products [] = {
  725. {
  726. // Linksys USB200M
  727. USB_DEVICE (0x077b, 0x2226),
  728. .driver_info = (unsigned long) &ax8817x_info,
  729. }, {
  730. // Netgear FA120
  731. USB_DEVICE (0x0846, 0x1040),
  732. .driver_info = (unsigned long) &netgear_fa120_info,
  733. }, {
  734. // DLink DUB-E100
  735. USB_DEVICE (0x2001, 0x1a00),
  736. .driver_info = (unsigned long) &dlink_dub_e100_info,
  737. }, {
  738. // Intellinet, ST Lab USB Ethernet
  739. USB_DEVICE (0x0b95, 0x1720),
  740. .driver_info = (unsigned long) &ax8817x_info,
  741. }, {
  742. // Hawking UF200, TrendNet TU2-ET100
  743. USB_DEVICE (0x07b8, 0x420a),
  744. .driver_info = (unsigned long) &hawking_uf200_info,
  745. }, {
  746. // Billionton Systems, USB2AR
  747. USB_DEVICE (0x08dd, 0x90ff),
  748. .driver_info = (unsigned long) &ax8817x_info,
  749. }, {
  750. // ATEN UC210T
  751. USB_DEVICE (0x0557, 0x2009),
  752. .driver_info = (unsigned long) &ax8817x_info,
  753. }, {
  754. // Buffalo LUA-U2-KTX
  755. USB_DEVICE (0x0411, 0x003d),
  756. .driver_info = (unsigned long) &ax8817x_info,
  757. }, {
  758. // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
  759. USB_DEVICE (0x6189, 0x182d),
  760. .driver_info = (unsigned long) &ax8817x_info,
  761. }, {
  762. // corega FEther USB2-TX
  763. USB_DEVICE (0x07aa, 0x0017),
  764. .driver_info = (unsigned long) &ax8817x_info,
  765. }, {
  766. // Surecom EP-1427X-2
  767. USB_DEVICE (0x1189, 0x0893),
  768. .driver_info = (unsigned long) &ax8817x_info,
  769. }, {
  770. // goodway corp usb gwusb2e
  771. USB_DEVICE (0x1631, 0x6200),
  772. .driver_info = (unsigned long) &ax8817x_info,
  773. }, {
  774. // ASIX AX88772 10/100
  775. USB_DEVICE (0x0b95, 0x7720),
  776. .driver_info = (unsigned long) &ax88772_info,
  777. }, {
  778. // Linksys USB200M Rev 2
  779. USB_DEVICE (0x13b1, 0x0018),
  780. .driver_info = (unsigned long) &ax88772_info,
  781. }, {
  782. // 0Q0 cable ethernet
  783. USB_DEVICE (0x1557, 0x7720),
  784. .driver_info = (unsigned long) &ax88772_info,
  785. },
  786. { }, // END
  787. };
  788. MODULE_DEVICE_TABLE(usb, products);
  789. static struct usb_driver asix_driver = {
  790. .name = "asix",
  791. .id_table = products,
  792. .probe = usbnet_probe,
  793. .suspend = usbnet_suspend,
  794. .resume = usbnet_resume,
  795. .disconnect = usbnet_disconnect,
  796. };
  797. static int __init asix_init(void)
  798. {
  799. return usb_register(&asix_driver);
  800. }
  801. module_init(asix_init);
  802. static void __exit asix_exit(void)
  803. {
  804. usb_deregister(&asix_driver);
  805. }
  806. module_exit(asix_exit);
  807. MODULE_AUTHOR("David Hollis");
  808. MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
  809. MODULE_LICENSE("GPL");