ohci-omap.c 13 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2005 David Brownell
  6. * (C) Copyright 2002 Hewlett-Packard Company
  7. *
  8. * OMAP Bus Glue
  9. *
  10. * Modified for OMAP by Tony Lindgren <tony@atomide.com>
  11. * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc.
  12. * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com>
  13. *
  14. * This file is licenced under the GPL.
  15. */
  16. #include <linux/signal.h> /* SA_INTERRUPT */
  17. #include <linux/jiffies.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/clk.h>
  20. #include <asm/hardware.h>
  21. #include <asm/io.h>
  22. #include <asm/mach-types.h>
  23. #include <asm/arch/mux.h>
  24. #include <asm/arch/irqs.h>
  25. #include <asm/arch/gpio.h>
  26. #include <asm/arch/fpga.h>
  27. #include <asm/arch/usb.h>
  28. /* OMAP-1510 OHCI has its own MMU for DMA */
  29. #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */
  30. #define OMAP1510_LB_CLOCK_DIV 0xfffec10c
  31. #define OMAP1510_LB_MMU_CTL 0xfffec208
  32. #define OMAP1510_LB_MMU_LCK 0xfffec224
  33. #define OMAP1510_LB_MMU_LD_TLB 0xfffec228
  34. #define OMAP1510_LB_MMU_CAM_H 0xfffec22c
  35. #define OMAP1510_LB_MMU_CAM_L 0xfffec230
  36. #define OMAP1510_LB_MMU_RAM_H 0xfffec234
  37. #define OMAP1510_LB_MMU_RAM_L 0xfffec238
  38. #ifndef CONFIG_ARCH_OMAP
  39. #error "This file is OMAP bus glue. CONFIG_OMAP must be defined."
  40. #endif
  41. #ifdef CONFIG_TPS65010
  42. #include <asm/arch/tps65010.h>
  43. #else
  44. #define LOW 0
  45. #define HIGH 1
  46. #define GPIO1 1
  47. static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value)
  48. {
  49. return 0;
  50. }
  51. #endif
  52. extern int usb_disabled(void);
  53. extern int ocpi_enable(void);
  54. static struct clk *usb_host_ck;
  55. static void omap_ohci_clock_power(int on)
  56. {
  57. if (on) {
  58. clk_enable(usb_host_ck);
  59. /* guesstimate for T5 == 1x 32K clock + APLL lock time */
  60. udelay(100);
  61. } else {
  62. clk_disable(usb_host_ck);
  63. }
  64. }
  65. /*
  66. * Board specific gang-switched transceiver power on/off.
  67. * NOTE: OSK supplies power from DC, not battery.
  68. */
  69. static int omap_ohci_transceiver_power(int on)
  70. {
  71. if (on) {
  72. if (machine_is_omap_innovator() && cpu_is_omap1510())
  73. fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
  74. | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
  75. INNOVATOR_FPGA_CAM_USB_CONTROL);
  76. else if (machine_is_omap_osk())
  77. tps65010_set_gpio_out_value(GPIO1, LOW);
  78. } else {
  79. if (machine_is_omap_innovator() && cpu_is_omap1510())
  80. fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
  81. & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
  82. INNOVATOR_FPGA_CAM_USB_CONTROL);
  83. else if (machine_is_omap_osk())
  84. tps65010_set_gpio_out_value(GPIO1, HIGH);
  85. }
  86. return 0;
  87. }
  88. /*
  89. * OMAP-1510 specific Local Bus clock on/off
  90. */
  91. static int omap_1510_local_bus_power(int on)
  92. {
  93. if (on) {
  94. omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
  95. udelay(200);
  96. } else {
  97. omap_writel(0, OMAP1510_LB_MMU_CTL);
  98. }
  99. return 0;
  100. }
  101. /*
  102. * OMAP-1510 specific Local Bus initialization
  103. * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
  104. * See also arch/mach-omap/memory.h for __virt_to_dma() and
  105. * __dma_to_virt() which need to match with the physical
  106. * Local Bus address below.
  107. */
  108. static int omap_1510_local_bus_init(void)
  109. {
  110. unsigned int tlb;
  111. unsigned long lbaddr, physaddr;
  112. omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
  113. OMAP1510_LB_CLOCK_DIV);
  114. /* Configure the Local Bus MMU table */
  115. for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
  116. lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
  117. physaddr = tlb * 0x00100000 + PHYS_OFFSET;
  118. omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
  119. omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
  120. OMAP1510_LB_MMU_CAM_L);
  121. omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
  122. omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
  123. omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
  124. omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
  125. }
  126. /* Enable the walking table */
  127. omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
  128. udelay(200);
  129. return 0;
  130. }
  131. #ifdef CONFIG_USB_OTG
  132. static void start_hnp(struct ohci_hcd *ohci)
  133. {
  134. const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1;
  135. unsigned long flags;
  136. otg_start_hnp(ohci->transceiver);
  137. local_irq_save(flags);
  138. ohci->transceiver->state = OTG_STATE_A_SUSPEND;
  139. writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]);
  140. OTG_CTRL_REG &= ~OTG_A_BUSREQ;
  141. local_irq_restore(flags);
  142. }
  143. #endif
  144. /*-------------------------------------------------------------------------*/
  145. static int omap_start_hc(struct ohci_hcd *ohci, struct platform_device *pdev)
  146. {
  147. struct omap_usb_config *config = pdev->dev.platform_data;
  148. int need_transceiver = (config->otg != 0);
  149. int ret;
  150. dev_dbg(&pdev->dev, "starting USB Controller\n");
  151. if (config->otg) {
  152. ohci_to_hcd(ohci)->self.otg_port = config->otg;
  153. /* default/minimum OTG power budget: 8 mA */
  154. ohci_to_hcd(ohci)->power_budget = 8;
  155. }
  156. /* boards can use OTG transceivers in non-OTG modes */
  157. need_transceiver = need_transceiver
  158. || machine_is_omap_h2() || machine_is_omap_h3();
  159. if (cpu_is_omap16xx())
  160. ocpi_enable();
  161. #ifdef CONFIG_ARCH_OMAP_OTG
  162. if (need_transceiver) {
  163. ohci->transceiver = otg_get_transceiver();
  164. if (ohci->transceiver) {
  165. int status = otg_set_host(ohci->transceiver,
  166. &ohci_to_hcd(ohci)->self);
  167. dev_dbg(&pdev->dev, "init %s transceiver, status %d\n",
  168. ohci->transceiver->label, status);
  169. if (status) {
  170. if (ohci->transceiver)
  171. put_device(ohci->transceiver->dev);
  172. return status;
  173. }
  174. } else {
  175. dev_err(&pdev->dev, "can't find transceiver\n");
  176. return -ENODEV;
  177. }
  178. }
  179. #endif
  180. omap_ohci_clock_power(1);
  181. if (cpu_is_omap1510()) {
  182. omap_1510_local_bus_power(1);
  183. omap_1510_local_bus_init();
  184. }
  185. if ((ret = ohci_init(ohci)) < 0)
  186. return ret;
  187. /* board-specific power switching and overcurrent support */
  188. if (machine_is_omap_osk() || machine_is_omap_innovator()) {
  189. u32 rh = roothub_a (ohci);
  190. /* power switching (ganged by default) */
  191. rh &= ~RH_A_NPS;
  192. /* TPS2045 switch for internal transceiver (port 1) */
  193. if (machine_is_omap_osk()) {
  194. ohci_to_hcd(ohci)->power_budget = 250;
  195. rh &= ~RH_A_NOCP;
  196. /* gpio9 for overcurrent detction */
  197. omap_cfg_reg(W8_1610_GPIO9);
  198. omap_request_gpio(9);
  199. omap_set_gpio_direction(9, 1 /* IN */);
  200. /* for paranoia's sake: disable USB.PUEN */
  201. omap_cfg_reg(W4_USB_HIGHZ);
  202. }
  203. ohci_writel(ohci, rh, &ohci->regs->roothub.a);
  204. distrust_firmware = 0;
  205. }
  206. /* FIXME khubd hub requests should manage power switching */
  207. omap_ohci_transceiver_power(1);
  208. /* board init will have already handled HMC and mux setup.
  209. * any external transceiver should already be initialized
  210. * too, so all configured ports use the right signaling now.
  211. */
  212. return 0;
  213. }
  214. static void omap_stop_hc(struct platform_device *pdev)
  215. {
  216. dev_dbg(&pdev->dev, "stopping USB Controller\n");
  217. omap_ohci_clock_power(0);
  218. }
  219. /*-------------------------------------------------------------------------*/
  220. void usb_hcd_omap_remove (struct usb_hcd *, struct platform_device *);
  221. /* configure so an HC device and id are always provided */
  222. /* always called with process context; sleeping is OK */
  223. /**
  224. * usb_hcd_omap_probe - initialize OMAP-based HCDs
  225. * Context: !in_interrupt()
  226. *
  227. * Allocates basic resources for this USB host controller, and
  228. * then invokes the start() method for the HCD associated with it
  229. * through the hotplug entry's driver_data.
  230. */
  231. int usb_hcd_omap_probe (const struct hc_driver *driver,
  232. struct platform_device *pdev)
  233. {
  234. int retval, irq;
  235. struct usb_hcd *hcd = 0;
  236. struct ohci_hcd *ohci;
  237. if (pdev->num_resources != 2) {
  238. printk(KERN_ERR "hcd probe: invalid num_resources: %i\n",
  239. pdev->num_resources);
  240. return -ENODEV;
  241. }
  242. if (pdev->resource[0].flags != IORESOURCE_MEM
  243. || pdev->resource[1].flags != IORESOURCE_IRQ) {
  244. printk(KERN_ERR "hcd probe: invalid resource type\n");
  245. return -ENODEV;
  246. }
  247. usb_host_ck = clk_get(0, "usb_hhc_ck");
  248. if (IS_ERR(usb_host_ck))
  249. return PTR_ERR(usb_host_ck);
  250. hcd = usb_create_hcd (driver, &pdev->dev, pdev->dev.bus_id);
  251. if (!hcd) {
  252. retval = -ENOMEM;
  253. goto err0;
  254. }
  255. hcd->rsrc_start = pdev->resource[0].start;
  256. hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
  257. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
  258. dev_dbg(&pdev->dev, "request_mem_region failed\n");
  259. retval = -EBUSY;
  260. goto err1;
  261. }
  262. hcd->regs = (void __iomem *) (int) IO_ADDRESS(hcd->rsrc_start);
  263. ohci = hcd_to_ohci(hcd);
  264. ohci_hcd_init(ohci);
  265. retval = omap_start_hc(ohci, pdev);
  266. if (retval < 0)
  267. goto err2;
  268. irq = platform_get_irq(pdev, 0);
  269. if (irq < 0) {
  270. retval = -ENXIO;
  271. goto err2;
  272. }
  273. retval = usb_add_hcd(hcd, irq, SA_INTERRUPT);
  274. if (retval == 0)
  275. return retval;
  276. omap_stop_hc(pdev);
  277. err2:
  278. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  279. err1:
  280. usb_put_hcd(hcd);
  281. err0:
  282. clk_put(usb_host_ck);
  283. return retval;
  284. }
  285. /* may be called with controller, bus, and devices active */
  286. /**
  287. * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs
  288. * @dev: USB Host Controller being removed
  289. * Context: !in_interrupt()
  290. *
  291. * Reverses the effect of usb_hcd_omap_probe(), first invoking
  292. * the HCD's stop() method. It is always called from a thread
  293. * context, normally "rmmod", "apmd", or something similar.
  294. *
  295. */
  296. void usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev)
  297. {
  298. usb_remove_hcd(hcd);
  299. if (machine_is_omap_osk())
  300. omap_free_gpio(9);
  301. omap_stop_hc(pdev);
  302. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  303. usb_put_hcd(hcd);
  304. clk_put(usb_host_ck);
  305. }
  306. /*-------------------------------------------------------------------------*/
  307. static int __devinit
  308. ohci_omap_start (struct usb_hcd *hcd)
  309. {
  310. struct omap_usb_config *config;
  311. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  312. int ret;
  313. config = hcd->self.controller->platform_data;
  314. if (config->otg || config->rwc)
  315. writel(OHCI_CTRL_RWC, &ohci->regs->control);
  316. if ((ret = ohci_run (ohci)) < 0) {
  317. dev_err(hcd->self.controller, "can't start\n");
  318. ohci_stop (hcd);
  319. return ret;
  320. }
  321. return 0;
  322. }
  323. /*-------------------------------------------------------------------------*/
  324. static const struct hc_driver ohci_omap_hc_driver = {
  325. .description = hcd_name,
  326. .product_desc = "OMAP OHCI",
  327. .hcd_priv_size = sizeof(struct ohci_hcd),
  328. /*
  329. * generic hardware linkage
  330. */
  331. .irq = ohci_irq,
  332. .flags = HCD_USB11 | HCD_MEMORY,
  333. /*
  334. * basic lifecycle operations
  335. */
  336. .start = ohci_omap_start,
  337. .stop = ohci_stop,
  338. /*
  339. * managing i/o requests and associated device resources
  340. */
  341. .urb_enqueue = ohci_urb_enqueue,
  342. .urb_dequeue = ohci_urb_dequeue,
  343. .endpoint_disable = ohci_endpoint_disable,
  344. /*
  345. * scheduling support
  346. */
  347. .get_frame_number = ohci_get_frame,
  348. /*
  349. * root hub support
  350. */
  351. .hub_status_data = ohci_hub_status_data,
  352. .hub_control = ohci_hub_control,
  353. #ifdef CONFIG_PM
  354. .bus_suspend = ohci_bus_suspend,
  355. .bus_resume = ohci_bus_resume,
  356. #endif
  357. .start_port_reset = ohci_start_port_reset,
  358. };
  359. /*-------------------------------------------------------------------------*/
  360. static int ohci_hcd_omap_drv_probe(struct platform_device *dev)
  361. {
  362. return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev);
  363. }
  364. static int ohci_hcd_omap_drv_remove(struct platform_device *dev)
  365. {
  366. struct usb_hcd *hcd = platform_get_drvdata(dev);
  367. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  368. usb_hcd_omap_remove(hcd, dev);
  369. if (ohci->transceiver) {
  370. (void) otg_set_host(ohci->transceiver, 0);
  371. put_device(ohci->transceiver->dev);
  372. }
  373. platform_set_drvdata(dev, NULL);
  374. return 0;
  375. }
  376. /*-------------------------------------------------------------------------*/
  377. #ifdef CONFIG_PM
  378. static int ohci_omap_suspend(struct platform_device *dev, pm_message_t message)
  379. {
  380. struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev));
  381. if (time_before(jiffies, ohci->next_statechange))
  382. msleep(5);
  383. ohci->next_statechange = jiffies;
  384. omap_ohci_clock_power(0);
  385. ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED;
  386. dev->power.power_state = PMSG_SUSPEND;
  387. return 0;
  388. }
  389. static int ohci_omap_resume(struct platform_device *dev)
  390. {
  391. struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev));
  392. if (time_before(jiffies, ohci->next_statechange))
  393. msleep(5);
  394. ohci->next_statechange = jiffies;
  395. omap_ohci_clock_power(1);
  396. dev->power.power_state = PMSG_ON;
  397. usb_hcd_resume_root_hub(dev_get_drvdata(dev));
  398. return 0;
  399. }
  400. #endif
  401. /*-------------------------------------------------------------------------*/
  402. /*
  403. * Driver definition to register with the OMAP bus
  404. */
  405. static struct platform_driver ohci_hcd_omap_driver = {
  406. .probe = ohci_hcd_omap_drv_probe,
  407. .remove = ohci_hcd_omap_drv_remove,
  408. #ifdef CONFIG_PM
  409. .suspend = ohci_omap_suspend,
  410. .resume = ohci_omap_resume,
  411. #endif
  412. .driver = {
  413. .owner = THIS_MODULE,
  414. .name = "ohci",
  415. },
  416. };
  417. static int __init ohci_hcd_omap_init (void)
  418. {
  419. printk (KERN_DEBUG "%s: " DRIVER_INFO " (OMAP)\n", hcd_name);
  420. if (usb_disabled())
  421. return -ENODEV;
  422. pr_debug("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
  423. sizeof (struct ed), sizeof (struct td));
  424. return platform_driver_register(&ohci_hcd_omap_driver);
  425. }
  426. static void __exit ohci_hcd_omap_cleanup (void)
  427. {
  428. platform_driver_unregister(&ohci_hcd_omap_driver);
  429. }
  430. module_init (ohci_hcd_omap_init);
  431. module_exit (ohci_hcd_omap_cleanup);