ohci-hcd.c 26 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
  6. *
  7. * [ Initialisation is based on Linus' ]
  8. * [ uhci code and gregs ohci fragments ]
  9. * [ (C) Copyright 1999 Linus Torvalds ]
  10. * [ (C) Copyright 1999 Gregory P. Smith]
  11. *
  12. *
  13. * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  14. * interfaces (though some non-x86 Intel chips use it). It supports
  15. * smarter hardware than UHCI. A download link for the spec available
  16. * through the http://www.usb.org website.
  17. *
  18. * History:
  19. *
  20. * 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer)
  21. * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net)
  22. * 2003/02/24 show registers in sysfs (Kevin Brosius)
  23. *
  24. * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
  25. * bandwidth accounting; if debugging, show schedules in driverfs
  26. * 2002/07/19 fixes to management of ED and schedule state.
  27. * 2002/06/09 SA-1111 support (Christopher Hoover)
  28. * 2002/06/01 remember frame when HC won't see EDs any more; use that info
  29. * to fix urb unlink races caused by interrupt latency assumptions;
  30. * minor ED field and function naming updates
  31. * 2002/01/18 package as a patch for 2.5.3; this should match the
  32. * 2.4.17 kernel modulo some bugs being fixed.
  33. *
  34. * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
  35. * from post-2.4.5 patches.
  36. * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
  37. * 2001/09/07 match PCI PM changes, errnos from Linus' tree
  38. * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
  39. * pbook pci quirks gone (please fix pbook pci sw!) (db)
  40. *
  41. * 2001/04/08 Identify version on module load (gb)
  42. * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
  43. pci_map_single (db)
  44. * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
  45. * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
  46. *
  47. * 2000/09/26 fixed races in removing the private portion of the urb
  48. * 2000/09/07 disable bulk and control lists when unlinking the last
  49. * endpoint descriptor in order to avoid unrecoverable errors on
  50. * the Lucent chips. (rwc@sgi)
  51. * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
  52. * urb unlink probs, indentation fixes
  53. * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
  54. * device unplugs.
  55. * 2000/06/28 use PCI hotplug framework, for better power management
  56. * and for Cardbus support (David Brownell)
  57. * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
  58. * when the controller loses power; handle UE; cleanup; ...
  59. *
  60. * v5.2 1999/12/07 URB 3rd preview,
  61. * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
  62. * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
  63. * i386: HUB, Keyboard, Mouse, Printer
  64. *
  65. * v4.3 1999/10/27 multiple HCs, bulk_request
  66. * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
  67. * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
  68. * v4.0 1999/08/18
  69. * v3.0 1999/06/25
  70. * v2.1 1999/05/09 code clean up
  71. * v2.0 1999/05/04
  72. * v1.0 1999/04/27 initial release
  73. *
  74. * This file is licenced under the GPL.
  75. */
  76. #include <linux/config.h>
  77. #include <linux/module.h>
  78. #include <linux/moduleparam.h>
  79. #include <linux/pci.h>
  80. #include <linux/kernel.h>
  81. #include <linux/delay.h>
  82. #include <linux/ioport.h>
  83. #include <linux/sched.h>
  84. #include <linux/slab.h>
  85. #include <linux/smp_lock.h>
  86. #include <linux/errno.h>
  87. #include <linux/init.h>
  88. #include <linux/timer.h>
  89. #include <linux/list.h>
  90. #include <linux/usb.h>
  91. #include <linux/usb_otg.h>
  92. #include <linux/dma-mapping.h>
  93. #include <linux/dmapool.h>
  94. #include <linux/reboot.h>
  95. #include <asm/io.h>
  96. #include <asm/irq.h>
  97. #include <asm/system.h>
  98. #include <asm/unaligned.h>
  99. #include <asm/byteorder.h>
  100. #include "../core/hcd.h"
  101. #define DRIVER_VERSION "2005 April 22"
  102. #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
  103. #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
  104. /*-------------------------------------------------------------------------*/
  105. #undef OHCI_VERBOSE_DEBUG /* not always helpful */
  106. /* For initializing controller (mask in an HCFS mode too) */
  107. #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
  108. #define OHCI_INTR_INIT \
  109. (OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_RD | OHCI_INTR_WDH)
  110. #ifdef __hppa__
  111. /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
  112. #define IR_DISABLE
  113. #endif
  114. #ifdef CONFIG_ARCH_OMAP
  115. /* OMAP doesn't support IR (no SMM; not needed) */
  116. #define IR_DISABLE
  117. #endif
  118. /*-------------------------------------------------------------------------*/
  119. static const char hcd_name [] = "ohci_hcd";
  120. #include "ohci.h"
  121. static void ohci_dump (struct ohci_hcd *ohci, int verbose);
  122. static int ohci_init (struct ohci_hcd *ohci);
  123. static void ohci_stop (struct usb_hcd *hcd);
  124. static int ohci_reboot (struct notifier_block *, unsigned long , void *);
  125. #include "ohci-hub.c"
  126. #include "ohci-dbg.c"
  127. #include "ohci-mem.c"
  128. #include "ohci-q.c"
  129. /*
  130. * On architectures with edge-triggered interrupts we must never return
  131. * IRQ_NONE.
  132. */
  133. #if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */
  134. #define IRQ_NOTMINE IRQ_HANDLED
  135. #else
  136. #define IRQ_NOTMINE IRQ_NONE
  137. #endif
  138. /* Some boards misreport power switching/overcurrent */
  139. static int distrust_firmware = 1;
  140. module_param (distrust_firmware, bool, 0);
  141. MODULE_PARM_DESC (distrust_firmware,
  142. "true to distrust firmware power/overcurrent setup");
  143. /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
  144. static int no_handshake = 0;
  145. module_param (no_handshake, bool, 0);
  146. MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
  147. /*-------------------------------------------------------------------------*/
  148. /*
  149. * queue up an urb for anything except the root hub
  150. */
  151. static int ohci_urb_enqueue (
  152. struct usb_hcd *hcd,
  153. struct usb_host_endpoint *ep,
  154. struct urb *urb,
  155. gfp_t mem_flags
  156. ) {
  157. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  158. struct ed *ed;
  159. urb_priv_t *urb_priv;
  160. unsigned int pipe = urb->pipe;
  161. int i, size = 0;
  162. unsigned long flags;
  163. int retval = 0;
  164. #ifdef OHCI_VERBOSE_DEBUG
  165. urb_print (urb, "SUB", usb_pipein (pipe));
  166. #endif
  167. /* every endpoint has a ed, locate and maybe (re)initialize it */
  168. if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
  169. return -ENOMEM;
  170. /* for the private part of the URB we need the number of TDs (size) */
  171. switch (ed->type) {
  172. case PIPE_CONTROL:
  173. /* td_submit_urb() doesn't yet handle these */
  174. if (urb->transfer_buffer_length > 4096)
  175. return -EMSGSIZE;
  176. /* 1 TD for setup, 1 for ACK, plus ... */
  177. size = 2;
  178. /* FALLTHROUGH */
  179. // case PIPE_INTERRUPT:
  180. // case PIPE_BULK:
  181. default:
  182. /* one TD for every 4096 Bytes (can be upto 8K) */
  183. size += urb->transfer_buffer_length / 4096;
  184. /* ... and for any remaining bytes ... */
  185. if ((urb->transfer_buffer_length % 4096) != 0)
  186. size++;
  187. /* ... and maybe a zero length packet to wrap it up */
  188. if (size == 0)
  189. size++;
  190. else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
  191. && (urb->transfer_buffer_length
  192. % usb_maxpacket (urb->dev, pipe,
  193. usb_pipeout (pipe))) == 0)
  194. size++;
  195. break;
  196. case PIPE_ISOCHRONOUS: /* number of packets from URB */
  197. size = urb->number_of_packets;
  198. break;
  199. }
  200. /* allocate the private part of the URB */
  201. urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
  202. mem_flags);
  203. if (!urb_priv)
  204. return -ENOMEM;
  205. memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
  206. INIT_LIST_HEAD (&urb_priv->pending);
  207. urb_priv->length = size;
  208. urb_priv->ed = ed;
  209. /* allocate the TDs (deferring hash chain updates) */
  210. for (i = 0; i < size; i++) {
  211. urb_priv->td [i] = td_alloc (ohci, mem_flags);
  212. if (!urb_priv->td [i]) {
  213. urb_priv->length = i;
  214. urb_free_priv (ohci, urb_priv);
  215. return -ENOMEM;
  216. }
  217. }
  218. spin_lock_irqsave (&ohci->lock, flags);
  219. /* don't submit to a dead HC */
  220. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
  221. retval = -ENODEV;
  222. goto fail;
  223. }
  224. if (!HC_IS_RUNNING(hcd->state)) {
  225. retval = -ENODEV;
  226. goto fail;
  227. }
  228. /* in case of unlink-during-submit */
  229. spin_lock (&urb->lock);
  230. if (urb->status != -EINPROGRESS) {
  231. spin_unlock (&urb->lock);
  232. urb->hcpriv = urb_priv;
  233. finish_urb (ohci, urb, NULL);
  234. retval = 0;
  235. goto fail;
  236. }
  237. /* schedule the ed if needed */
  238. if (ed->state == ED_IDLE) {
  239. retval = ed_schedule (ohci, ed);
  240. if (retval < 0)
  241. goto fail0;
  242. if (ed->type == PIPE_ISOCHRONOUS) {
  243. u16 frame = ohci_frame_no(ohci);
  244. /* delay a few frames before the first TD */
  245. frame += max_t (u16, 8, ed->interval);
  246. frame &= ~(ed->interval - 1);
  247. frame |= ed->branch;
  248. urb->start_frame = frame;
  249. /* yes, only URB_ISO_ASAP is supported, and
  250. * urb->start_frame is never used as input.
  251. */
  252. }
  253. } else if (ed->type == PIPE_ISOCHRONOUS)
  254. urb->start_frame = ed->last_iso + ed->interval;
  255. /* fill the TDs and link them to the ed; and
  256. * enable that part of the schedule, if needed
  257. * and update count of queued periodic urbs
  258. */
  259. urb->hcpriv = urb_priv;
  260. td_submit_urb (ohci, urb);
  261. fail0:
  262. spin_unlock (&urb->lock);
  263. fail:
  264. if (retval)
  265. urb_free_priv (ohci, urb_priv);
  266. spin_unlock_irqrestore (&ohci->lock, flags);
  267. return retval;
  268. }
  269. /*
  270. * decouple the URB from the HC queues (TDs, urb_priv); it's
  271. * already marked using urb->status. reporting is always done
  272. * asynchronously, and we might be dealing with an urb that's
  273. * partially transferred, or an ED with other urbs being unlinked.
  274. */
  275. static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
  276. {
  277. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  278. unsigned long flags;
  279. #ifdef OHCI_VERBOSE_DEBUG
  280. urb_print (urb, "UNLINK", 1);
  281. #endif
  282. spin_lock_irqsave (&ohci->lock, flags);
  283. if (HC_IS_RUNNING(hcd->state)) {
  284. urb_priv_t *urb_priv;
  285. /* Unless an IRQ completed the unlink while it was being
  286. * handed to us, flag it for unlink and giveback, and force
  287. * some upcoming INTR_SF to call finish_unlinks()
  288. */
  289. urb_priv = urb->hcpriv;
  290. if (urb_priv) {
  291. if (urb_priv->ed->state == ED_OPER)
  292. start_ed_unlink (ohci, urb_priv->ed);
  293. }
  294. } else {
  295. /*
  296. * with HC dead, we won't respect hc queue pointers
  297. * any more ... just clean up every urb's memory.
  298. */
  299. if (urb->hcpriv)
  300. finish_urb (ohci, urb, NULL);
  301. }
  302. spin_unlock_irqrestore (&ohci->lock, flags);
  303. return 0;
  304. }
  305. /*-------------------------------------------------------------------------*/
  306. /* frees config/altsetting state for endpoints,
  307. * including ED memory, dummy TD, and bulk/intr data toggle
  308. */
  309. static void
  310. ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  311. {
  312. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  313. unsigned long flags;
  314. struct ed *ed = ep->hcpriv;
  315. unsigned limit = 1000;
  316. /* ASSERT: any requests/urbs are being unlinked */
  317. /* ASSERT: nobody can be submitting urbs for this any more */
  318. if (!ed)
  319. return;
  320. rescan:
  321. spin_lock_irqsave (&ohci->lock, flags);
  322. if (!HC_IS_RUNNING (hcd->state)) {
  323. sanitize:
  324. ed->state = ED_IDLE;
  325. finish_unlinks (ohci, 0, NULL);
  326. }
  327. switch (ed->state) {
  328. case ED_UNLINK: /* wait for hw to finish? */
  329. /* major IRQ delivery trouble loses INTR_SF too... */
  330. if (limit-- == 0) {
  331. ohci_warn (ohci, "IRQ INTR_SF lossage\n");
  332. goto sanitize;
  333. }
  334. spin_unlock_irqrestore (&ohci->lock, flags);
  335. schedule_timeout_uninterruptible(1);
  336. goto rescan;
  337. case ED_IDLE: /* fully unlinked */
  338. if (list_empty (&ed->td_list)) {
  339. td_free (ohci, ed->dummy);
  340. ed_free (ohci, ed);
  341. break;
  342. }
  343. /* else FALL THROUGH */
  344. default:
  345. /* caller was supposed to have unlinked any requests;
  346. * that's not our job. can't recover; must leak ed.
  347. */
  348. ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
  349. ed, ep->desc.bEndpointAddress, ed->state,
  350. list_empty (&ed->td_list) ? "" : " (has tds)");
  351. td_free (ohci, ed->dummy);
  352. break;
  353. }
  354. ep->hcpriv = NULL;
  355. spin_unlock_irqrestore (&ohci->lock, flags);
  356. return;
  357. }
  358. static int ohci_get_frame (struct usb_hcd *hcd)
  359. {
  360. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  361. return ohci_frame_no(ohci);
  362. }
  363. static void ohci_usb_reset (struct ohci_hcd *ohci)
  364. {
  365. ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
  366. ohci->hc_control &= OHCI_CTRL_RWC;
  367. ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
  368. }
  369. /* reboot notifier forcibly disables IRQs and DMA, helping kexec and
  370. * other cases where the next software may expect clean state from the
  371. * "firmware". this is bus-neutral, unlike shutdown() methods.
  372. */
  373. static int
  374. ohci_reboot (struct notifier_block *block, unsigned long code, void *null)
  375. {
  376. struct ohci_hcd *ohci;
  377. ohci = container_of (block, struct ohci_hcd, reboot_notifier);
  378. ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
  379. ohci_usb_reset (ohci);
  380. /* flush the writes */
  381. (void) ohci_readl (ohci, &ohci->regs->control);
  382. return 0;
  383. }
  384. /*-------------------------------------------------------------------------*
  385. * HC functions
  386. *-------------------------------------------------------------------------*/
  387. /* init memory, and kick BIOS/SMM off */
  388. static int ohci_init (struct ohci_hcd *ohci)
  389. {
  390. int ret;
  391. struct usb_hcd *hcd = ohci_to_hcd(ohci);
  392. disable (ohci);
  393. ohci->regs = hcd->regs;
  394. ohci->next_statechange = jiffies;
  395. /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
  396. * was never needed for most non-PCI systems ... remove the code?
  397. */
  398. #ifndef IR_DISABLE
  399. /* SMM owns the HC? not for long! */
  400. if (!no_handshake && ohci_readl (ohci,
  401. &ohci->regs->control) & OHCI_CTRL_IR) {
  402. u32 temp;
  403. ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
  404. /* this timeout is arbitrary. we make it long, so systems
  405. * depending on usb keyboards may be usable even if the
  406. * BIOS/SMM code seems pretty broken.
  407. */
  408. temp = 500; /* arbitrary: five seconds */
  409. ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
  410. ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
  411. while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
  412. msleep (10);
  413. if (--temp == 0) {
  414. ohci_err (ohci, "USB HC takeover failed!"
  415. " (BIOS/SMM bug)\n");
  416. return -EBUSY;
  417. }
  418. }
  419. ohci_usb_reset (ohci);
  420. }
  421. #endif
  422. /* Disable HC interrupts */
  423. ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
  424. /* flush the writes, and save key bits like RWC */
  425. if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
  426. ohci->hc_control |= OHCI_CTRL_RWC;
  427. /* Read the number of ports unless overridden */
  428. if (ohci->num_ports == 0)
  429. ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
  430. if (ohci->hcca)
  431. return 0;
  432. ohci->hcca = dma_alloc_coherent (hcd->self.controller,
  433. sizeof *ohci->hcca, &ohci->hcca_dma, 0);
  434. if (!ohci->hcca)
  435. return -ENOMEM;
  436. if ((ret = ohci_mem_init (ohci)) < 0)
  437. ohci_stop (hcd);
  438. else {
  439. register_reboot_notifier (&ohci->reboot_notifier);
  440. create_debug_files (ohci);
  441. }
  442. return ret;
  443. }
  444. /*-------------------------------------------------------------------------*/
  445. /* Start an OHCI controller, set the BUS operational
  446. * resets USB and controller
  447. * enable interrupts
  448. */
  449. static int ohci_run (struct ohci_hcd *ohci)
  450. {
  451. u32 mask, temp;
  452. int first = ohci->fminterval == 0;
  453. struct usb_hcd *hcd = ohci_to_hcd(ohci);
  454. disable (ohci);
  455. /* boot firmware should have set this up (5.1.1.3.1) */
  456. if (first) {
  457. temp = ohci_readl (ohci, &ohci->regs->fminterval);
  458. ohci->fminterval = temp & 0x3fff;
  459. if (ohci->fminterval != FI)
  460. ohci_dbg (ohci, "fminterval delta %d\n",
  461. ohci->fminterval - FI);
  462. ohci->fminterval |= FSMP (ohci->fminterval) << 16;
  463. /* also: power/overcurrent flags in roothub.a */
  464. }
  465. /* Reset USB nearly "by the book". RemoteWakeupConnected was
  466. * saved if boot firmware (BIOS/SMM/...) told us it's connected,
  467. * or if bus glue did the same (e.g. for PCI add-in cards with
  468. * PCI PM support).
  469. */
  470. ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n",
  471. hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
  472. ohci_readl (ohci, &ohci->regs->control));
  473. if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
  474. && !device_may_wakeup(hcd->self.controller))
  475. device_init_wakeup(hcd->self.controller, 1);
  476. switch (ohci->hc_control & OHCI_CTRL_HCFS) {
  477. case OHCI_USB_OPER:
  478. temp = 0;
  479. break;
  480. case OHCI_USB_SUSPEND:
  481. case OHCI_USB_RESUME:
  482. ohci->hc_control &= OHCI_CTRL_RWC;
  483. ohci->hc_control |= OHCI_USB_RESUME;
  484. temp = 10 /* msec wait */;
  485. break;
  486. // case OHCI_USB_RESET:
  487. default:
  488. ohci->hc_control &= OHCI_CTRL_RWC;
  489. ohci->hc_control |= OHCI_USB_RESET;
  490. temp = 50 /* msec wait */;
  491. break;
  492. }
  493. ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
  494. // flush the writes
  495. (void) ohci_readl (ohci, &ohci->regs->control);
  496. msleep(temp);
  497. temp = roothub_a (ohci);
  498. if (!(temp & RH_A_NPS)) {
  499. /* power down each port */
  500. for (temp = 0; temp < ohci->num_ports; temp++)
  501. ohci_writel (ohci, RH_PS_LSDA,
  502. &ohci->regs->roothub.portstatus [temp]);
  503. }
  504. // flush those writes
  505. (void) ohci_readl (ohci, &ohci->regs->control);
  506. memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
  507. /* 2msec timelimit here means no irqs/preempt */
  508. spin_lock_irq (&ohci->lock);
  509. retry:
  510. /* HC Reset requires max 10 us delay */
  511. ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus);
  512. temp = 30; /* ... allow extra time */
  513. while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
  514. if (--temp == 0) {
  515. spin_unlock_irq (&ohci->lock);
  516. ohci_err (ohci, "USB HC reset timed out!\n");
  517. return -1;
  518. }
  519. udelay (1);
  520. }
  521. /* now we're in the SUSPEND state ... must go OPERATIONAL
  522. * within 2msec else HC enters RESUME
  523. *
  524. * ... but some hardware won't init fmInterval "by the book"
  525. * (SiS, OPTi ...), so reset again instead. SiS doesn't need
  526. * this if we write fmInterval after we're OPERATIONAL.
  527. * Unclear about ALi, ServerWorks, and others ... this could
  528. * easily be a longstanding bug in chip init on Linux.
  529. */
  530. if (ohci->flags & OHCI_QUIRK_INITRESET) {
  531. ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
  532. // flush those writes
  533. (void) ohci_readl (ohci, &ohci->regs->control);
  534. }
  535. /* Tell the controller where the control and bulk lists are
  536. * The lists are empty now. */
  537. ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
  538. ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
  539. /* a reset clears this */
  540. ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
  541. periodic_reinit (ohci);
  542. /* some OHCI implementations are finicky about how they init.
  543. * bogus values here mean not even enumeration could work.
  544. */
  545. if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
  546. || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
  547. if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
  548. ohci->flags |= OHCI_QUIRK_INITRESET;
  549. ohci_dbg (ohci, "enabling initreset quirk\n");
  550. goto retry;
  551. }
  552. spin_unlock_irq (&ohci->lock);
  553. ohci_err (ohci, "init err (%08x %04x)\n",
  554. ohci_readl (ohci, &ohci->regs->fminterval),
  555. ohci_readl (ohci, &ohci->regs->periodicstart));
  556. return -EOVERFLOW;
  557. }
  558. /* start controller operations */
  559. ohci->hc_control &= OHCI_CTRL_RWC;
  560. ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
  561. ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
  562. hcd->state = HC_STATE_RUNNING;
  563. /* wake on ConnectStatusChange, matching external hubs */
  564. ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
  565. /* Choose the interrupts we care about now, others later on demand */
  566. mask = OHCI_INTR_INIT;
  567. ohci_writel (ohci, mask, &ohci->regs->intrstatus);
  568. ohci_writel (ohci, mask, &ohci->regs->intrenable);
  569. /* handle root hub init quirks ... */
  570. temp = roothub_a (ohci);
  571. temp &= ~(RH_A_PSM | RH_A_OCPM);
  572. if (ohci->flags & OHCI_QUIRK_SUPERIO) {
  573. /* NSC 87560 and maybe others */
  574. temp |= RH_A_NOCP;
  575. temp &= ~(RH_A_POTPGT | RH_A_NPS);
  576. ohci_writel (ohci, temp, &ohci->regs->roothub.a);
  577. } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
  578. /* hub power always on; required for AMD-756 and some
  579. * Mac platforms. ganged overcurrent reporting, if any.
  580. */
  581. temp |= RH_A_NPS;
  582. ohci_writel (ohci, temp, &ohci->regs->roothub.a);
  583. }
  584. ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
  585. ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
  586. &ohci->regs->roothub.b);
  587. // flush those writes
  588. (void) ohci_readl (ohci, &ohci->regs->control);
  589. spin_unlock_irq (&ohci->lock);
  590. // POTPGT delay is bits 24-31, in 2 ms units.
  591. mdelay ((temp >> 23) & 0x1fe);
  592. hcd->state = HC_STATE_RUNNING;
  593. ohci_dump (ohci, 1);
  594. return 0;
  595. }
  596. /*-------------------------------------------------------------------------*/
  597. /* an interrupt happens */
  598. static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
  599. {
  600. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  601. struct ohci_regs __iomem *regs = ohci->regs;
  602. int ints;
  603. /* we can eliminate a (slow) ohci_readl()
  604. if _only_ WDH caused this irq */
  605. if ((ohci->hcca->done_head != 0)
  606. && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
  607. & 0x01)) {
  608. ints = OHCI_INTR_WDH;
  609. /* cardbus/... hardware gone before remove() */
  610. } else if ((ints = ohci_readl (ohci, &regs->intrstatus)) == ~(u32)0) {
  611. disable (ohci);
  612. ohci_dbg (ohci, "device removed!\n");
  613. return IRQ_HANDLED;
  614. /* interrupt for some other device? */
  615. } else if ((ints &= ohci_readl (ohci, &regs->intrenable)) == 0) {
  616. return IRQ_NOTMINE;
  617. }
  618. if (ints & OHCI_INTR_UE) {
  619. disable (ohci);
  620. ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
  621. // e.g. due to PCI Master/Target Abort
  622. ohci_dump (ohci, 1);
  623. ohci_usb_reset (ohci);
  624. }
  625. if (ints & OHCI_INTR_RD) {
  626. ohci_vdbg (ohci, "resume detect\n");
  627. ohci_writel (ohci, OHCI_INTR_RD, &regs->intrstatus);
  628. if (hcd->state != HC_STATE_QUIESCING)
  629. usb_hcd_resume_root_hub(hcd);
  630. }
  631. if (ints & OHCI_INTR_WDH) {
  632. if (HC_IS_RUNNING(hcd->state))
  633. ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrdisable);
  634. spin_lock (&ohci->lock);
  635. dl_done_list (ohci, ptregs);
  636. spin_unlock (&ohci->lock);
  637. if (HC_IS_RUNNING(hcd->state))
  638. ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable);
  639. }
  640. /* could track INTR_SO to reduce available PCI/... bandwidth */
  641. /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
  642. * when there's still unlinking to be done (next frame).
  643. */
  644. spin_lock (&ohci->lock);
  645. if (ohci->ed_rm_list)
  646. finish_unlinks (ohci, ohci_frame_no(ohci), ptregs);
  647. if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
  648. && HC_IS_RUNNING(hcd->state))
  649. ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
  650. spin_unlock (&ohci->lock);
  651. if (HC_IS_RUNNING(hcd->state)) {
  652. ohci_writel (ohci, ints, &regs->intrstatus);
  653. ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
  654. // flush those writes
  655. (void) ohci_readl (ohci, &ohci->regs->control);
  656. }
  657. return IRQ_HANDLED;
  658. }
  659. /*-------------------------------------------------------------------------*/
  660. static void ohci_stop (struct usb_hcd *hcd)
  661. {
  662. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  663. ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
  664. hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
  665. hcd->state);
  666. ohci_dump (ohci, 1);
  667. flush_scheduled_work();
  668. ohci_usb_reset (ohci);
  669. ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
  670. remove_debug_files (ohci);
  671. unregister_reboot_notifier (&ohci->reboot_notifier);
  672. ohci_mem_cleanup (ohci);
  673. if (ohci->hcca) {
  674. dma_free_coherent (hcd->self.controller,
  675. sizeof *ohci->hcca,
  676. ohci->hcca, ohci->hcca_dma);
  677. ohci->hcca = NULL;
  678. ohci->hcca_dma = 0;
  679. }
  680. }
  681. /*-------------------------------------------------------------------------*/
  682. /* must not be called from interrupt context */
  683. #ifdef CONFIG_PM
  684. static int ohci_restart (struct ohci_hcd *ohci)
  685. {
  686. int temp;
  687. int i;
  688. struct urb_priv *priv;
  689. /* mark any devices gone, so they do nothing till khubd disconnects.
  690. * recycle any "live" eds/tds (and urbs) right away.
  691. * later, khubd disconnect processing will recycle the other state,
  692. * (either as disconnect/reconnect, or maybe someday as a reset).
  693. */
  694. spin_lock_irq(&ohci->lock);
  695. disable (ohci);
  696. usb_root_hub_lost_power(ohci_to_hcd(ohci)->self.root_hub);
  697. if (!list_empty (&ohci->pending))
  698. ohci_dbg(ohci, "abort schedule...\n");
  699. list_for_each_entry (priv, &ohci->pending, pending) {
  700. struct urb *urb = priv->td[0]->urb;
  701. struct ed *ed = priv->ed;
  702. switch (ed->state) {
  703. case ED_OPER:
  704. ed->state = ED_UNLINK;
  705. ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
  706. ed_deschedule (ohci, ed);
  707. ed->ed_next = ohci->ed_rm_list;
  708. ed->ed_prev = NULL;
  709. ohci->ed_rm_list = ed;
  710. /* FALLTHROUGH */
  711. case ED_UNLINK:
  712. break;
  713. default:
  714. ohci_dbg(ohci, "bogus ed %p state %d\n",
  715. ed, ed->state);
  716. }
  717. spin_lock (&urb->lock);
  718. urb->status = -ESHUTDOWN;
  719. spin_unlock (&urb->lock);
  720. }
  721. finish_unlinks (ohci, 0, NULL);
  722. spin_unlock_irq(&ohci->lock);
  723. /* paranoia, in case that didn't work: */
  724. /* empty the interrupt branches */
  725. for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
  726. for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
  727. /* no EDs to remove */
  728. ohci->ed_rm_list = NULL;
  729. /* empty control and bulk lists */
  730. ohci->ed_controltail = NULL;
  731. ohci->ed_bulktail = NULL;
  732. if ((temp = ohci_run (ohci)) < 0) {
  733. ohci_err (ohci, "can't restart, %d\n", temp);
  734. return temp;
  735. } else {
  736. /* here we "know" root ports should always stay powered,
  737. * and that if we try to turn them back on the root hub
  738. * will respond to CSC processing.
  739. */
  740. i = ohci->num_ports;
  741. while (i--)
  742. ohci_writel (ohci, RH_PS_PSS,
  743. &ohci->regs->roothub.portstatus [temp]);
  744. ohci_dbg (ohci, "restart complete\n");
  745. }
  746. return 0;
  747. }
  748. #endif
  749. /*-------------------------------------------------------------------------*/
  750. #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
  751. MODULE_AUTHOR (DRIVER_AUTHOR);
  752. MODULE_DESCRIPTION (DRIVER_INFO);
  753. MODULE_LICENSE ("GPL");
  754. #ifdef CONFIG_PCI
  755. #include "ohci-pci.c"
  756. #endif
  757. #ifdef CONFIG_SA1111
  758. #include "ohci-sa1111.c"
  759. #endif
  760. #ifdef CONFIG_ARCH_S3C2410
  761. #include "ohci-s3c2410.c"
  762. #endif
  763. #ifdef CONFIG_ARCH_OMAP
  764. #include "ohci-omap.c"
  765. #endif
  766. #ifdef CONFIG_ARCH_LH7A404
  767. #include "ohci-lh7a404.c"
  768. #endif
  769. #ifdef CONFIG_PXA27x
  770. #include "ohci-pxa27x.c"
  771. #endif
  772. #ifdef CONFIG_SOC_AU1X00
  773. #include "ohci-au1xxx.c"
  774. #endif
  775. #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
  776. #include "ohci-ppc-soc.c"
  777. #endif
  778. #ifdef CONFIG_ARCH_AT91RM9200
  779. #include "ohci-at91.c"
  780. #endif
  781. #if !(defined(CONFIG_PCI) \
  782. || defined(CONFIG_SA1111) \
  783. || defined(CONFIG_ARCH_S3C2410) \
  784. || defined(CONFIG_ARCH_OMAP) \
  785. || defined (CONFIG_ARCH_LH7A404) \
  786. || defined (CONFIG_PXA27x) \
  787. || defined (CONFIG_SOC_AU1X00) \
  788. || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \
  789. || defined (CONFIG_ARCH_AT91RM9200) \
  790. )
  791. #error "missing bus glue for ohci-hcd"
  792. #endif