ohci-dbg.c 18 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
  6. *
  7. * This file is licenced under the GPL.
  8. */
  9. /*-------------------------------------------------------------------------*/
  10. #ifdef DEBUG
  11. #define edstring(ed_type) ({ char *temp; \
  12. switch (ed_type) { \
  13. case PIPE_CONTROL: temp = "ctrl"; break; \
  14. case PIPE_BULK: temp = "bulk"; break; \
  15. case PIPE_INTERRUPT: temp = "intr"; break; \
  16. default: temp = "isoc"; break; \
  17. }; temp;})
  18. #define pipestring(pipe) edstring(usb_pipetype(pipe))
  19. /* debug| print the main components of an URB
  20. * small: 0) header + data packets 1) just header
  21. */
  22. static void __attribute__((unused))
  23. urb_print (struct urb * urb, char * str, int small)
  24. {
  25. unsigned int pipe= urb->pipe;
  26. if (!urb->dev || !urb->dev->bus) {
  27. dbg("%s URB: no dev", str);
  28. return;
  29. }
  30. #ifndef OHCI_VERBOSE_DEBUG
  31. if (urb->status != 0)
  32. #endif
  33. dbg("%s %p dev=%d ep=%d%s-%s flags=%x len=%d/%d stat=%d",
  34. str,
  35. urb,
  36. usb_pipedevice (pipe),
  37. usb_pipeendpoint (pipe),
  38. usb_pipeout (pipe)? "out" : "in",
  39. pipestring (pipe),
  40. urb->transfer_flags,
  41. urb->actual_length,
  42. urb->transfer_buffer_length,
  43. urb->status);
  44. #ifdef OHCI_VERBOSE_DEBUG
  45. if (!small) {
  46. int i, len;
  47. if (usb_pipecontrol (pipe)) {
  48. printk (KERN_DEBUG __FILE__ ": setup(8):");
  49. for (i = 0; i < 8 ; i++)
  50. printk (" %02x", ((__u8 *) urb->setup_packet) [i]);
  51. printk ("\n");
  52. }
  53. if (urb->transfer_buffer_length > 0 && urb->transfer_buffer) {
  54. printk (KERN_DEBUG __FILE__ ": data(%d/%d):",
  55. urb->actual_length,
  56. urb->transfer_buffer_length);
  57. len = usb_pipeout (pipe)?
  58. urb->transfer_buffer_length: urb->actual_length;
  59. for (i = 0; i < 16 && i < len; i++)
  60. printk (" %02x", ((__u8 *) urb->transfer_buffer) [i]);
  61. printk ("%s stat:%d\n", i < len? "...": "", urb->status);
  62. }
  63. }
  64. #endif
  65. }
  66. #define ohci_dbg_sw(ohci, next, size, format, arg...) \
  67. do { \
  68. if (next) { \
  69. unsigned s_len; \
  70. s_len = scnprintf (*next, *size, format, ## arg ); \
  71. *size -= s_len; *next += s_len; \
  72. } else \
  73. ohci_dbg(ohci,format, ## arg ); \
  74. } while (0);
  75. static void ohci_dump_intr_mask (
  76. struct ohci_hcd *ohci,
  77. char *label,
  78. u32 mask,
  79. char **next,
  80. unsigned *size)
  81. {
  82. ohci_dbg_sw (ohci, next, size, "%s 0x%08x%s%s%s%s%s%s%s%s%s\n",
  83. label,
  84. mask,
  85. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  86. (mask & OHCI_INTR_OC) ? " OC" : "",
  87. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  88. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  89. (mask & OHCI_INTR_UE) ? " UE" : "",
  90. (mask & OHCI_INTR_RD) ? " RD" : "",
  91. (mask & OHCI_INTR_SF) ? " SF" : "",
  92. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  93. (mask & OHCI_INTR_SO) ? " SO" : ""
  94. );
  95. }
  96. static void maybe_print_eds (
  97. struct ohci_hcd *ohci,
  98. char *label,
  99. u32 value,
  100. char **next,
  101. unsigned *size)
  102. {
  103. if (value)
  104. ohci_dbg_sw (ohci, next, size, "%s %08x\n", label, value);
  105. }
  106. static char *hcfs2string (int state)
  107. {
  108. switch (state) {
  109. case OHCI_USB_RESET: return "reset";
  110. case OHCI_USB_RESUME: return "resume";
  111. case OHCI_USB_OPER: return "operational";
  112. case OHCI_USB_SUSPEND: return "suspend";
  113. }
  114. return "?";
  115. }
  116. // dump control and status registers
  117. static void
  118. ohci_dump_status (struct ohci_hcd *controller, char **next, unsigned *size)
  119. {
  120. struct ohci_regs __iomem *regs = controller->regs;
  121. u32 temp;
  122. temp = ohci_readl (controller, &regs->revision) & 0xff;
  123. ohci_dbg_sw (controller, next, size,
  124. "OHCI %d.%d, %s legacy support registers\n",
  125. 0x03 & (temp >> 4), (temp & 0x0f),
  126. (temp & 0x0100) ? "with" : "NO");
  127. temp = ohci_readl (controller, &regs->control);
  128. ohci_dbg_sw (controller, next, size,
  129. "control 0x%03x%s%s%s HCFS=%s%s%s%s%s CBSR=%d\n",
  130. temp,
  131. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  132. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  133. (temp & OHCI_CTRL_IR) ? " IR" : "",
  134. hcfs2string (temp & OHCI_CTRL_HCFS),
  135. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  136. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  137. (temp & OHCI_CTRL_IE) ? " IE" : "",
  138. (temp & OHCI_CTRL_PLE) ? " PLE" : "",
  139. temp & OHCI_CTRL_CBSR
  140. );
  141. temp = ohci_readl (controller, &regs->cmdstatus);
  142. ohci_dbg_sw (controller, next, size,
  143. "cmdstatus 0x%05x SOC=%d%s%s%s%s\n", temp,
  144. (temp & OHCI_SOC) >> 16,
  145. (temp & OHCI_OCR) ? " OCR" : "",
  146. (temp & OHCI_BLF) ? " BLF" : "",
  147. (temp & OHCI_CLF) ? " CLF" : "",
  148. (temp & OHCI_HCR) ? " HCR" : ""
  149. );
  150. ohci_dump_intr_mask (controller, "intrstatus",
  151. ohci_readl (controller, &regs->intrstatus),
  152. next, size);
  153. ohci_dump_intr_mask (controller, "intrenable",
  154. ohci_readl (controller, &regs->intrenable),
  155. next, size);
  156. // intrdisable always same as intrenable
  157. maybe_print_eds (controller, "ed_periodcurrent",
  158. ohci_readl (controller, &regs->ed_periodcurrent),
  159. next, size);
  160. maybe_print_eds (controller, "ed_controlhead",
  161. ohci_readl (controller, &regs->ed_controlhead),
  162. next, size);
  163. maybe_print_eds (controller, "ed_controlcurrent",
  164. ohci_readl (controller, &regs->ed_controlcurrent),
  165. next, size);
  166. maybe_print_eds (controller, "ed_bulkhead",
  167. ohci_readl (controller, &regs->ed_bulkhead),
  168. next, size);
  169. maybe_print_eds (controller, "ed_bulkcurrent",
  170. ohci_readl (controller, &regs->ed_bulkcurrent),
  171. next, size);
  172. maybe_print_eds (controller, "donehead",
  173. ohci_readl (controller, &regs->donehead), next, size);
  174. }
  175. #define dbg_port_sw(hc,num,value,next,size) \
  176. ohci_dbg_sw (hc, next, size, \
  177. "roothub.portstatus [%d] " \
  178. "0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
  179. num, temp, \
  180. (temp & RH_PS_PRSC) ? " PRSC" : "", \
  181. (temp & RH_PS_OCIC) ? " OCIC" : "", \
  182. (temp & RH_PS_PSSC) ? " PSSC" : "", \
  183. (temp & RH_PS_PESC) ? " PESC" : "", \
  184. (temp & RH_PS_CSC) ? " CSC" : "", \
  185. \
  186. (temp & RH_PS_LSDA) ? " LSDA" : "", \
  187. (temp & RH_PS_PPS) ? " PPS" : "", \
  188. (temp & RH_PS_PRS) ? " PRS" : "", \
  189. (temp & RH_PS_POCI) ? " POCI" : "", \
  190. (temp & RH_PS_PSS) ? " PSS" : "", \
  191. \
  192. (temp & RH_PS_PES) ? " PES" : "", \
  193. (temp & RH_PS_CCS) ? " CCS" : "" \
  194. );
  195. static void
  196. ohci_dump_roothub (
  197. struct ohci_hcd *controller,
  198. int verbose,
  199. char **next,
  200. unsigned *size)
  201. {
  202. u32 temp, i;
  203. temp = roothub_a (controller);
  204. if (temp == ~(u32)0)
  205. return;
  206. if (verbose) {
  207. ohci_dbg_sw (controller, next, size,
  208. "roothub.a %08x POTPGT=%d%s%s%s%s%s NDP=%d(%d)\n", temp,
  209. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  210. (temp & RH_A_NOCP) ? " NOCP" : "",
  211. (temp & RH_A_OCPM) ? " OCPM" : "",
  212. (temp & RH_A_DT) ? " DT" : "",
  213. (temp & RH_A_NPS) ? " NPS" : "",
  214. (temp & RH_A_PSM) ? " PSM" : "",
  215. (temp & RH_A_NDP), controller->num_ports
  216. );
  217. temp = roothub_b (controller);
  218. ohci_dbg_sw (controller, next, size,
  219. "roothub.b %08x PPCM=%04x DR=%04x\n",
  220. temp,
  221. (temp & RH_B_PPCM) >> 16,
  222. (temp & RH_B_DR)
  223. );
  224. temp = roothub_status (controller);
  225. ohci_dbg_sw (controller, next, size,
  226. "roothub.status %08x%s%s%s%s%s%s\n",
  227. temp,
  228. (temp & RH_HS_CRWE) ? " CRWE" : "",
  229. (temp & RH_HS_OCIC) ? " OCIC" : "",
  230. (temp & RH_HS_LPSC) ? " LPSC" : "",
  231. (temp & RH_HS_DRWE) ? " DRWE" : "",
  232. (temp & RH_HS_OCI) ? " OCI" : "",
  233. (temp & RH_HS_LPS) ? " LPS" : ""
  234. );
  235. }
  236. for (i = 0; i < controller->num_ports; i++) {
  237. temp = roothub_portstatus (controller, i);
  238. dbg_port_sw (controller, i, temp, next, size);
  239. }
  240. }
  241. static void ohci_dump (struct ohci_hcd *controller, int verbose)
  242. {
  243. ohci_dbg (controller, "OHCI controller state\n");
  244. // dumps some of the state we know about
  245. ohci_dump_status (controller, NULL, NULL);
  246. if (controller->hcca)
  247. ohci_dbg (controller,
  248. "hcca frame #%04x\n", ohci_frame_no(controller));
  249. ohci_dump_roothub (controller, 1, NULL, NULL);
  250. }
  251. static const char data0 [] = "DATA0";
  252. static const char data1 [] = "DATA1";
  253. static void ohci_dump_td (const struct ohci_hcd *ohci, const char *label,
  254. const struct td *td)
  255. {
  256. u32 tmp = hc32_to_cpup (ohci, &td->hwINFO);
  257. ohci_dbg (ohci, "%s td %p%s; urb %p index %d; hw next td %08x\n",
  258. label, td,
  259. (tmp & TD_DONE) ? " (DONE)" : "",
  260. td->urb, td->index,
  261. hc32_to_cpup (ohci, &td->hwNextTD));
  262. if ((tmp & TD_ISO) == 0) {
  263. const char *toggle, *pid;
  264. u32 cbp, be;
  265. switch (tmp & TD_T) {
  266. case TD_T_DATA0: toggle = data0; break;
  267. case TD_T_DATA1: toggle = data1; break;
  268. case TD_T_TOGGLE: toggle = "(CARRY)"; break;
  269. default: toggle = "(?)"; break;
  270. }
  271. switch (tmp & TD_DP) {
  272. case TD_DP_SETUP: pid = "SETUP"; break;
  273. case TD_DP_IN: pid = "IN"; break;
  274. case TD_DP_OUT: pid = "OUT"; break;
  275. default: pid = "(bad pid)"; break;
  276. }
  277. ohci_dbg (ohci, " info %08x CC=%x %s DI=%d %s %s\n", tmp,
  278. TD_CC_GET(tmp), /* EC, */ toggle,
  279. (tmp & TD_DI) >> 21, pid,
  280. (tmp & TD_R) ? "R" : "");
  281. cbp = hc32_to_cpup (ohci, &td->hwCBP);
  282. be = hc32_to_cpup (ohci, &td->hwBE);
  283. ohci_dbg (ohci, " cbp %08x be %08x (len %d)\n", cbp, be,
  284. cbp ? (be + 1 - cbp) : 0);
  285. } else {
  286. unsigned i;
  287. ohci_dbg (ohci, " info %08x CC=%x FC=%d DI=%d SF=%04x\n", tmp,
  288. TD_CC_GET(tmp),
  289. (tmp >> 24) & 0x07,
  290. (tmp & TD_DI) >> 21,
  291. tmp & 0x0000ffff);
  292. ohci_dbg (ohci, " bp0 %08x be %08x\n",
  293. hc32_to_cpup (ohci, &td->hwCBP) & ~0x0fff,
  294. hc32_to_cpup (ohci, &td->hwBE));
  295. for (i = 0; i < MAXPSW; i++) {
  296. u16 psw = ohci_hwPSW (ohci, td, i);
  297. int cc = (psw >> 12) & 0x0f;
  298. ohci_dbg (ohci, " psw [%d] = %2x, CC=%x %s=%d\n", i,
  299. psw, cc,
  300. (cc >= 0x0e) ? "OFFSET" : "SIZE",
  301. psw & 0x0fff);
  302. }
  303. }
  304. }
  305. /* caller MUST own hcd spinlock if verbose is set! */
  306. static void __attribute__((unused))
  307. ohci_dump_ed (const struct ohci_hcd *ohci, const char *label,
  308. const struct ed *ed, int verbose)
  309. {
  310. u32 tmp = hc32_to_cpu (ohci, ed->hwINFO);
  311. char *type = "";
  312. ohci_dbg (ohci, "%s, ed %p state 0x%x type %s; next ed %08x\n",
  313. label,
  314. ed, ed->state, edstring (ed->type),
  315. hc32_to_cpup (ohci, &ed->hwNextED));
  316. switch (tmp & (ED_IN|ED_OUT)) {
  317. case ED_OUT: type = "-OUT"; break;
  318. case ED_IN: type = "-IN"; break;
  319. /* else from TDs ... control */
  320. }
  321. ohci_dbg (ohci,
  322. " info %08x MAX=%d%s%s%s%s EP=%d%s DEV=%d\n", tmp,
  323. 0x03ff & (tmp >> 16),
  324. (tmp & ED_DEQUEUE) ? " DQ" : "",
  325. (tmp & ED_ISO) ? " ISO" : "",
  326. (tmp & ED_SKIP) ? " SKIP" : "",
  327. (tmp & ED_LOWSPEED) ? " LOW" : "",
  328. 0x000f & (tmp >> 7),
  329. type,
  330. 0x007f & tmp);
  331. tmp = hc32_to_cpup (ohci, &ed->hwHeadP);
  332. ohci_dbg (ohci, " tds: head %08x %s%s tail %08x%s\n",
  333. tmp,
  334. (tmp & ED_C) ? data1 : data0,
  335. (tmp & ED_H) ? " HALT" : "",
  336. hc32_to_cpup (ohci, &ed->hwTailP),
  337. verbose ? "" : " (not listing)");
  338. if (verbose) {
  339. struct list_head *tmp;
  340. /* use ed->td_list because HC concurrently modifies
  341. * hwNextTD as it accumulates ed_donelist.
  342. */
  343. list_for_each (tmp, &ed->td_list) {
  344. struct td *td;
  345. td = list_entry (tmp, struct td, td_list);
  346. ohci_dump_td (ohci, " ->", td);
  347. }
  348. }
  349. }
  350. #else
  351. static inline void ohci_dump (struct ohci_hcd *controller, int verbose) {}
  352. #undef OHCI_VERBOSE_DEBUG
  353. #endif /* DEBUG */
  354. /*-------------------------------------------------------------------------*/
  355. #ifdef STUB_DEBUG_FILES
  356. static inline void create_debug_files (struct ohci_hcd *bus) { }
  357. static inline void remove_debug_files (struct ohci_hcd *bus) { }
  358. #else
  359. static ssize_t
  360. show_list (struct ohci_hcd *ohci, char *buf, size_t count, struct ed *ed)
  361. {
  362. unsigned temp, size = count;
  363. if (!ed)
  364. return 0;
  365. /* print first --> last */
  366. while (ed->ed_prev)
  367. ed = ed->ed_prev;
  368. /* dump a snapshot of the bulk or control schedule */
  369. while (ed) {
  370. u32 info = hc32_to_cpu (ohci, ed->hwINFO);
  371. u32 headp = hc32_to_cpu (ohci, ed->hwHeadP);
  372. struct list_head *entry;
  373. struct td *td;
  374. temp = scnprintf (buf, size,
  375. "ed/%p %cs dev%d ep%d%s max %d %08x%s%s %s",
  376. ed,
  377. (info & ED_LOWSPEED) ? 'l' : 'f',
  378. info & 0x7f,
  379. (info >> 7) & 0xf,
  380. (info & ED_IN) ? "in" : "out",
  381. 0x03ff & (info >> 16),
  382. info,
  383. (info & ED_SKIP) ? " s" : "",
  384. (headp & ED_H) ? " H" : "",
  385. (headp & ED_C) ? data1 : data0);
  386. size -= temp;
  387. buf += temp;
  388. list_for_each (entry, &ed->td_list) {
  389. u32 cbp, be;
  390. td = list_entry (entry, struct td, td_list);
  391. info = hc32_to_cpup (ohci, &td->hwINFO);
  392. cbp = hc32_to_cpup (ohci, &td->hwCBP);
  393. be = hc32_to_cpup (ohci, &td->hwBE);
  394. temp = scnprintf (buf, size,
  395. "\n\ttd %p %s %d cc=%x urb %p (%08x)",
  396. td,
  397. ({ char *pid;
  398. switch (info & TD_DP) {
  399. case TD_DP_SETUP: pid = "setup"; break;
  400. case TD_DP_IN: pid = "in"; break;
  401. case TD_DP_OUT: pid = "out"; break;
  402. default: pid = "(?)"; break;
  403. } pid;}),
  404. cbp ? (be + 1 - cbp) : 0,
  405. TD_CC_GET (info), td->urb, info);
  406. size -= temp;
  407. buf += temp;
  408. }
  409. temp = scnprintf (buf, size, "\n");
  410. size -= temp;
  411. buf += temp;
  412. ed = ed->ed_next;
  413. }
  414. return count - size;
  415. }
  416. static ssize_t
  417. show_async (struct class_device *class_dev, char *buf)
  418. {
  419. struct usb_bus *bus;
  420. struct usb_hcd *hcd;
  421. struct ohci_hcd *ohci;
  422. size_t temp;
  423. unsigned long flags;
  424. bus = class_get_devdata(class_dev);
  425. hcd = bus->hcpriv;
  426. ohci = hcd_to_ohci(hcd);
  427. /* display control and bulk lists together, for simplicity */
  428. spin_lock_irqsave (&ohci->lock, flags);
  429. temp = show_list (ohci, buf, PAGE_SIZE, ohci->ed_controltail);
  430. temp += show_list (ohci, buf + temp, PAGE_SIZE - temp, ohci->ed_bulktail);
  431. spin_unlock_irqrestore (&ohci->lock, flags);
  432. return temp;
  433. }
  434. static CLASS_DEVICE_ATTR (async, S_IRUGO, show_async, NULL);
  435. #define DBG_SCHED_LIMIT 64
  436. static ssize_t
  437. show_periodic (struct class_device *class_dev, char *buf)
  438. {
  439. struct usb_bus *bus;
  440. struct usb_hcd *hcd;
  441. struct ohci_hcd *ohci;
  442. struct ed **seen, *ed;
  443. unsigned long flags;
  444. unsigned temp, size, seen_count;
  445. char *next;
  446. unsigned i;
  447. if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, SLAB_ATOMIC)))
  448. return 0;
  449. seen_count = 0;
  450. bus = class_get_devdata(class_dev);
  451. hcd = bus->hcpriv;
  452. ohci = hcd_to_ohci(hcd);
  453. next = buf;
  454. size = PAGE_SIZE;
  455. temp = scnprintf (next, size, "size = %d\n", NUM_INTS);
  456. size -= temp;
  457. next += temp;
  458. /* dump a snapshot of the periodic schedule (and load) */
  459. spin_lock_irqsave (&ohci->lock, flags);
  460. for (i = 0; i < NUM_INTS; i++) {
  461. if (!(ed = ohci->periodic [i]))
  462. continue;
  463. temp = scnprintf (next, size, "%2d [%3d]:", i, ohci->load [i]);
  464. size -= temp;
  465. next += temp;
  466. do {
  467. temp = scnprintf (next, size, " ed%d/%p",
  468. ed->interval, ed);
  469. size -= temp;
  470. next += temp;
  471. for (temp = 0; temp < seen_count; temp++) {
  472. if (seen [temp] == ed)
  473. break;
  474. }
  475. /* show more info the first time around */
  476. if (temp == seen_count) {
  477. u32 info = hc32_to_cpu (ohci, ed->hwINFO);
  478. struct list_head *entry;
  479. unsigned qlen = 0;
  480. /* qlen measured here in TDs, not urbs */
  481. list_for_each (entry, &ed->td_list)
  482. qlen++;
  483. temp = scnprintf (next, size,
  484. " (%cs dev%d ep%d%s-%s qlen %u"
  485. " max %d %08x%s%s)",
  486. (info & ED_LOWSPEED) ? 'l' : 'f',
  487. info & 0x7f,
  488. (info >> 7) & 0xf,
  489. (info & ED_IN) ? "in" : "out",
  490. (info & ED_ISO) ? "iso" : "int",
  491. qlen,
  492. 0x03ff & (info >> 16),
  493. info,
  494. (info & ED_SKIP) ? " K" : "",
  495. (ed->hwHeadP &
  496. cpu_to_hc32(ohci, ED_H)) ?
  497. " H" : "");
  498. size -= temp;
  499. next += temp;
  500. if (seen_count < DBG_SCHED_LIMIT)
  501. seen [seen_count++] = ed;
  502. ed = ed->ed_next;
  503. } else {
  504. /* we've seen it and what's after */
  505. temp = 0;
  506. ed = NULL;
  507. }
  508. } while (ed);
  509. temp = scnprintf (next, size, "\n");
  510. size -= temp;
  511. next += temp;
  512. }
  513. spin_unlock_irqrestore (&ohci->lock, flags);
  514. kfree (seen);
  515. return PAGE_SIZE - size;
  516. }
  517. static CLASS_DEVICE_ATTR (periodic, S_IRUGO, show_periodic, NULL);
  518. #undef DBG_SCHED_LIMIT
  519. static ssize_t
  520. show_registers (struct class_device *class_dev, char *buf)
  521. {
  522. struct usb_bus *bus;
  523. struct usb_hcd *hcd;
  524. struct ohci_hcd *ohci;
  525. struct ohci_regs __iomem *regs;
  526. unsigned long flags;
  527. unsigned temp, size;
  528. char *next;
  529. u32 rdata;
  530. bus = class_get_devdata(class_dev);
  531. hcd = bus->hcpriv;
  532. ohci = hcd_to_ohci(hcd);
  533. regs = ohci->regs;
  534. next = buf;
  535. size = PAGE_SIZE;
  536. spin_lock_irqsave (&ohci->lock, flags);
  537. /* dump driver info, then registers in spec order */
  538. ohci_dbg_sw (ohci, &next, &size,
  539. "bus %s, device %s\n"
  540. "%s\n"
  541. "%s version " DRIVER_VERSION "\n",
  542. hcd->self.controller->bus->name,
  543. hcd->self.controller->bus_id,
  544. hcd->product_desc,
  545. hcd_name);
  546. if (bus->controller->power.power_state.event) {
  547. size -= scnprintf (next, size,
  548. "SUSPENDED (no register access)\n");
  549. goto done;
  550. }
  551. ohci_dump_status(ohci, &next, &size);
  552. /* hcca */
  553. if (ohci->hcca)
  554. ohci_dbg_sw (ohci, &next, &size,
  555. "hcca frame 0x%04x\n", ohci_frame_no(ohci));
  556. /* other registers mostly affect frame timings */
  557. rdata = ohci_readl (ohci, &regs->fminterval);
  558. temp = scnprintf (next, size,
  559. "fmintvl 0x%08x %sFSMPS=0x%04x FI=0x%04x\n",
  560. rdata, (rdata >> 31) ? "FIT " : "",
  561. (rdata >> 16) & 0xefff, rdata & 0xffff);
  562. size -= temp;
  563. next += temp;
  564. rdata = ohci_readl (ohci, &regs->fmremaining);
  565. temp = scnprintf (next, size, "fmremaining 0x%08x %sFR=0x%04x\n",
  566. rdata, (rdata >> 31) ? "FRT " : "",
  567. rdata & 0x3fff);
  568. size -= temp;
  569. next += temp;
  570. rdata = ohci_readl (ohci, &regs->periodicstart);
  571. temp = scnprintf (next, size, "periodicstart 0x%04x\n",
  572. rdata & 0x3fff);
  573. size -= temp;
  574. next += temp;
  575. rdata = ohci_readl (ohci, &regs->lsthresh);
  576. temp = scnprintf (next, size, "lsthresh 0x%04x\n",
  577. rdata & 0x3fff);
  578. size -= temp;
  579. next += temp;
  580. /* roothub */
  581. ohci_dump_roothub (ohci, 1, &next, &size);
  582. done:
  583. spin_unlock_irqrestore (&ohci->lock, flags);
  584. return PAGE_SIZE - size;
  585. }
  586. static CLASS_DEVICE_ATTR (registers, S_IRUGO, show_registers, NULL);
  587. static inline void create_debug_files (struct ohci_hcd *ohci)
  588. {
  589. struct class_device *cldev = ohci_to_hcd(ohci)->self.class_dev;
  590. class_device_create_file(cldev, &class_device_attr_async);
  591. class_device_create_file(cldev, &class_device_attr_periodic);
  592. class_device_create_file(cldev, &class_device_attr_registers);
  593. ohci_dbg (ohci, "created debug files\n");
  594. }
  595. static inline void remove_debug_files (struct ohci_hcd *ohci)
  596. {
  597. struct class_device *cldev = ohci_to_hcd(ohci)->self.class_dev;
  598. class_device_remove_file(cldev, &class_device_attr_async);
  599. class_device_remove_file(cldev, &class_device_attr_periodic);
  600. class_device_remove_file(cldev, &class_device_attr_registers);
  601. }
  602. #endif
  603. /*-------------------------------------------------------------------------*/