ehci-q.c 30 KB

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  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
  22. *
  23. * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
  24. * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  25. * buffers needed for the larger number). We use one QH per endpoint, queue
  26. * multiple urbs (all three types) per endpoint. URBs may need several qtds.
  27. *
  28. * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  29. * interrupts) needs careful scheduling. Performance improvements can be
  30. * an ongoing challenge. That's in "ehci-sched.c".
  31. *
  32. * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  33. * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  34. * (b) special fields in qh entries or (c) split iso entries. TTs will
  35. * buffer low/full speed data so the host collects it at high speed.
  36. */
  37. /*-------------------------------------------------------------------------*/
  38. /* fill a qtd, returning how much of the buffer we were able to queue up */
  39. static int
  40. qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
  41. int token, int maxpacket)
  42. {
  43. int i, count;
  44. u64 addr = buf;
  45. /* one buffer entry per 4K ... first might be short or unaligned */
  46. qtd->hw_buf [0] = cpu_to_le32 ((u32)addr);
  47. qtd->hw_buf_hi [0] = cpu_to_le32 ((u32)(addr >> 32));
  48. count = 0x1000 - (buf & 0x0fff); /* rest of that page */
  49. if (likely (len < count)) /* ... iff needed */
  50. count = len;
  51. else {
  52. buf += 0x1000;
  53. buf &= ~0x0fff;
  54. /* per-qtd limit: from 16K to 20K (best alignment) */
  55. for (i = 1; count < len && i < 5; i++) {
  56. addr = buf;
  57. qtd->hw_buf [i] = cpu_to_le32 ((u32)addr);
  58. qtd->hw_buf_hi [i] = cpu_to_le32 ((u32)(addr >> 32));
  59. buf += 0x1000;
  60. if ((count + 0x1000) < len)
  61. count += 0x1000;
  62. else
  63. count = len;
  64. }
  65. /* short packets may only terminate transfers */
  66. if (count != len)
  67. count -= (count % maxpacket);
  68. }
  69. qtd->hw_token = cpu_to_le32 ((count << 16) | token);
  70. qtd->length = count;
  71. return count;
  72. }
  73. /*-------------------------------------------------------------------------*/
  74. static inline void
  75. qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  76. {
  77. /* writes to an active overlay are unsafe */
  78. BUG_ON(qh->qh_state != QH_STATE_IDLE);
  79. qh->hw_qtd_next = QTD_NEXT (qtd->qtd_dma);
  80. qh->hw_alt_next = EHCI_LIST_END;
  81. /* Except for control endpoints, we make hardware maintain data
  82. * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  83. * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  84. * ever clear it.
  85. */
  86. if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) {
  87. unsigned is_out, epnum;
  88. is_out = !(qtd->hw_token & cpu_to_le32(1 << 8));
  89. epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f;
  90. if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
  91. qh->hw_token &= ~__constant_cpu_to_le32 (QTD_TOGGLE);
  92. usb_settoggle (qh->dev, epnum, is_out, 1);
  93. }
  94. }
  95. /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
  96. wmb ();
  97. qh->hw_token &= __constant_cpu_to_le32 (QTD_TOGGLE | QTD_STS_PING);
  98. }
  99. /* if it weren't for a common silicon quirk (writing the dummy into the qh
  100. * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
  101. * recovery (including urb dequeue) would need software changes to a QH...
  102. */
  103. static void
  104. qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
  105. {
  106. struct ehci_qtd *qtd;
  107. if (list_empty (&qh->qtd_list))
  108. qtd = qh->dummy;
  109. else {
  110. qtd = list_entry (qh->qtd_list.next,
  111. struct ehci_qtd, qtd_list);
  112. /* first qtd may already be partially processed */
  113. if (cpu_to_le32 (qtd->qtd_dma) == qh->hw_current)
  114. qtd = NULL;
  115. }
  116. if (qtd)
  117. qh_update (ehci, qh, qtd);
  118. }
  119. /*-------------------------------------------------------------------------*/
  120. static void qtd_copy_status (
  121. struct ehci_hcd *ehci,
  122. struct urb *urb,
  123. size_t length,
  124. u32 token
  125. )
  126. {
  127. /* count IN/OUT bytes, not SETUP (even short packets) */
  128. if (likely (QTD_PID (token) != 2))
  129. urb->actual_length += length - QTD_LENGTH (token);
  130. /* don't modify error codes */
  131. if (unlikely (urb->status != -EINPROGRESS))
  132. return;
  133. /* force cleanup after short read; not always an error */
  134. if (unlikely (IS_SHORT_READ (token)))
  135. urb->status = -EREMOTEIO;
  136. /* serious "can't proceed" faults reported by the hardware */
  137. if (token & QTD_STS_HALT) {
  138. if (token & QTD_STS_BABBLE) {
  139. /* FIXME "must" disable babbling device's port too */
  140. urb->status = -EOVERFLOW;
  141. } else if (token & QTD_STS_MMF) {
  142. /* fs/ls interrupt xfer missed the complete-split */
  143. urb->status = -EPROTO;
  144. } else if (token & QTD_STS_DBE) {
  145. urb->status = (QTD_PID (token) == 1) /* IN ? */
  146. ? -ENOSR /* hc couldn't read data */
  147. : -ECOMM; /* hc couldn't write data */
  148. } else if (token & QTD_STS_XACT) {
  149. /* timeout, bad crc, wrong PID, etc; retried */
  150. if (QTD_CERR (token))
  151. urb->status = -EPIPE;
  152. else {
  153. ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
  154. urb->dev->devpath,
  155. usb_pipeendpoint (urb->pipe),
  156. usb_pipein (urb->pipe) ? "in" : "out");
  157. urb->status = -EPROTO;
  158. }
  159. /* CERR nonzero + no errors + halt --> stall */
  160. } else if (QTD_CERR (token))
  161. urb->status = -EPIPE;
  162. else /* unknown */
  163. urb->status = -EPROTO;
  164. ehci_vdbg (ehci,
  165. "dev%d ep%d%s qtd token %08x --> status %d\n",
  166. usb_pipedevice (urb->pipe),
  167. usb_pipeendpoint (urb->pipe),
  168. usb_pipein (urb->pipe) ? "in" : "out",
  169. token, urb->status);
  170. /* if async CSPLIT failed, try cleaning out the TT buffer */
  171. if (urb->status != -EPIPE
  172. && urb->dev->tt && !usb_pipeint (urb->pipe)
  173. && ((token & QTD_STS_MMF) != 0
  174. || QTD_CERR(token) == 0)
  175. && (!ehci_is_TDI(ehci)
  176. || urb->dev->tt->hub !=
  177. ehci_to_hcd(ehci)->self.root_hub)) {
  178. #ifdef DEBUG
  179. struct usb_device *tt = urb->dev->tt->hub;
  180. dev_dbg (&tt->dev,
  181. "clear tt buffer port %d, a%d ep%d t%08x\n",
  182. urb->dev->ttport, urb->dev->devnum,
  183. usb_pipeendpoint (urb->pipe), token);
  184. #endif /* DEBUG */
  185. usb_hub_tt_clear_buffer (urb->dev, urb->pipe);
  186. }
  187. }
  188. }
  189. static void
  190. ehci_urb_done (struct ehci_hcd *ehci, struct urb *urb, struct pt_regs *regs)
  191. __releases(ehci->lock)
  192. __acquires(ehci->lock)
  193. {
  194. if (likely (urb->hcpriv != NULL)) {
  195. struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
  196. /* S-mask in a QH means it's an interrupt urb */
  197. if ((qh->hw_info2 & __constant_cpu_to_le32 (QH_SMASK)) != 0) {
  198. /* ... update hc-wide periodic stats (for usbfs) */
  199. ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
  200. }
  201. qh_put (qh);
  202. }
  203. spin_lock (&urb->lock);
  204. urb->hcpriv = NULL;
  205. switch (urb->status) {
  206. case -EINPROGRESS: /* success */
  207. urb->status = 0;
  208. default: /* fault */
  209. COUNT (ehci->stats.complete);
  210. break;
  211. case -EREMOTEIO: /* fault or normal */
  212. if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
  213. urb->status = 0;
  214. COUNT (ehci->stats.complete);
  215. break;
  216. case -ECONNRESET: /* canceled */
  217. case -ENOENT:
  218. COUNT (ehci->stats.unlink);
  219. break;
  220. }
  221. spin_unlock (&urb->lock);
  222. #ifdef EHCI_URB_TRACE
  223. ehci_dbg (ehci,
  224. "%s %s urb %p ep%d%s status %d len %d/%d\n",
  225. __FUNCTION__, urb->dev->devpath, urb,
  226. usb_pipeendpoint (urb->pipe),
  227. usb_pipein (urb->pipe) ? "in" : "out",
  228. urb->status,
  229. urb->actual_length, urb->transfer_buffer_length);
  230. #endif
  231. /* complete() can reenter this HCD */
  232. spin_unlock (&ehci->lock);
  233. usb_hcd_giveback_urb (ehci_to_hcd(ehci), urb, regs);
  234. spin_lock (&ehci->lock);
  235. }
  236. static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
  237. static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
  238. static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
  239. static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
  240. /*
  241. * Process and free completed qtds for a qh, returning URBs to drivers.
  242. * Chases up to qh->hw_current. Returns number of completions called,
  243. * indicating how much "real" work we did.
  244. */
  245. #define HALT_BIT __constant_cpu_to_le32(QTD_STS_HALT)
  246. static unsigned
  247. qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh, struct pt_regs *regs)
  248. {
  249. struct ehci_qtd *last = NULL, *end = qh->dummy;
  250. struct list_head *entry, *tmp;
  251. int stopped;
  252. unsigned count = 0;
  253. int do_status = 0;
  254. u8 state;
  255. if (unlikely (list_empty (&qh->qtd_list)))
  256. return count;
  257. /* completions (or tasks on other cpus) must never clobber HALT
  258. * till we've gone through and cleaned everything up, even when
  259. * they add urbs to this qh's queue or mark them for unlinking.
  260. *
  261. * NOTE: unlinking expects to be done in queue order.
  262. */
  263. state = qh->qh_state;
  264. qh->qh_state = QH_STATE_COMPLETING;
  265. stopped = (state == QH_STATE_IDLE);
  266. /* remove de-activated QTDs from front of queue.
  267. * after faults (including short reads), cleanup this urb
  268. * then let the queue advance.
  269. * if queue is stopped, handles unlinks.
  270. */
  271. list_for_each_safe (entry, tmp, &qh->qtd_list) {
  272. struct ehci_qtd *qtd;
  273. struct urb *urb;
  274. u32 token = 0;
  275. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  276. urb = qtd->urb;
  277. /* clean up any state from previous QTD ...*/
  278. if (last) {
  279. if (likely (last->urb != urb)) {
  280. ehci_urb_done (ehci, last->urb, regs);
  281. count++;
  282. }
  283. ehci_qtd_free (ehci, last);
  284. last = NULL;
  285. }
  286. /* ignore urbs submitted during completions we reported */
  287. if (qtd == end)
  288. break;
  289. /* hardware copies qtd out of qh overlay */
  290. rmb ();
  291. token = le32_to_cpu (qtd->hw_token);
  292. /* always clean up qtds the hc de-activated */
  293. if ((token & QTD_STS_ACTIVE) == 0) {
  294. if ((token & QTD_STS_HALT) != 0) {
  295. stopped = 1;
  296. /* magic dummy for some short reads; qh won't advance.
  297. * that silicon quirk can kick in with this dummy too.
  298. */
  299. } else if (IS_SHORT_READ (token)
  300. && !(qtd->hw_alt_next & EHCI_LIST_END)) {
  301. stopped = 1;
  302. goto halt;
  303. }
  304. /* stop scanning when we reach qtds the hc is using */
  305. } else if (likely (!stopped
  306. && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
  307. break;
  308. } else {
  309. stopped = 1;
  310. if (unlikely (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)))
  311. urb->status = -ESHUTDOWN;
  312. /* ignore active urbs unless some previous qtd
  313. * for the urb faulted (including short read) or
  314. * its urb was canceled. we may patch qh or qtds.
  315. */
  316. if (likely (urb->status == -EINPROGRESS))
  317. continue;
  318. /* issue status after short control reads */
  319. if (unlikely (do_status != 0)
  320. && QTD_PID (token) == 0 /* OUT */) {
  321. do_status = 0;
  322. continue;
  323. }
  324. /* token in overlay may be most current */
  325. if (state == QH_STATE_IDLE
  326. && cpu_to_le32 (qtd->qtd_dma)
  327. == qh->hw_current)
  328. token = le32_to_cpu (qh->hw_token);
  329. /* force halt for unlinked or blocked qh, so we'll
  330. * patch the qh later and so that completions can't
  331. * activate it while we "know" it's stopped.
  332. */
  333. if ((HALT_BIT & qh->hw_token) == 0) {
  334. halt:
  335. qh->hw_token |= HALT_BIT;
  336. wmb ();
  337. }
  338. }
  339. /* remove it from the queue */
  340. spin_lock (&urb->lock);
  341. qtd_copy_status (ehci, urb, qtd->length, token);
  342. do_status = (urb->status == -EREMOTEIO)
  343. && usb_pipecontrol (urb->pipe);
  344. spin_unlock (&urb->lock);
  345. if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
  346. last = list_entry (qtd->qtd_list.prev,
  347. struct ehci_qtd, qtd_list);
  348. last->hw_next = qtd->hw_next;
  349. }
  350. list_del (&qtd->qtd_list);
  351. last = qtd;
  352. }
  353. /* last urb's completion might still need calling */
  354. if (likely (last != NULL)) {
  355. ehci_urb_done (ehci, last->urb, regs);
  356. count++;
  357. ehci_qtd_free (ehci, last);
  358. }
  359. /* restore original state; caller must unlink or relink */
  360. qh->qh_state = state;
  361. /* be sure the hardware's done with the qh before refreshing
  362. * it after fault cleanup, or recovering from silicon wrongly
  363. * overlaying the dummy qtd (which reduces DMA chatter).
  364. */
  365. if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) {
  366. switch (state) {
  367. case QH_STATE_IDLE:
  368. qh_refresh(ehci, qh);
  369. break;
  370. case QH_STATE_LINKED:
  371. /* should be rare for periodic transfers,
  372. * except maybe high bandwidth ...
  373. */
  374. if ((__constant_cpu_to_le32 (QH_SMASK)
  375. & qh->hw_info2) != 0) {
  376. intr_deschedule (ehci, qh);
  377. (void) qh_schedule (ehci, qh);
  378. } else
  379. unlink_async (ehci, qh);
  380. break;
  381. /* otherwise, unlink already started */
  382. }
  383. }
  384. return count;
  385. }
  386. /*-------------------------------------------------------------------------*/
  387. // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
  388. #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
  389. // ... and packet size, for any kind of endpoint descriptor
  390. #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
  391. /*
  392. * reverse of qh_urb_transaction: free a list of TDs.
  393. * used for cleanup after errors, before HC sees an URB's TDs.
  394. */
  395. static void qtd_list_free (
  396. struct ehci_hcd *ehci,
  397. struct urb *urb,
  398. struct list_head *qtd_list
  399. ) {
  400. struct list_head *entry, *temp;
  401. list_for_each_safe (entry, temp, qtd_list) {
  402. struct ehci_qtd *qtd;
  403. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  404. list_del (&qtd->qtd_list);
  405. ehci_qtd_free (ehci, qtd);
  406. }
  407. }
  408. /*
  409. * create a list of filled qtds for this URB; won't link into qh.
  410. */
  411. static struct list_head *
  412. qh_urb_transaction (
  413. struct ehci_hcd *ehci,
  414. struct urb *urb,
  415. struct list_head *head,
  416. gfp_t flags
  417. ) {
  418. struct ehci_qtd *qtd, *qtd_prev;
  419. dma_addr_t buf;
  420. int len, maxpacket;
  421. int is_input;
  422. u32 token;
  423. /*
  424. * URBs map to sequences of QTDs: one logical transaction
  425. */
  426. qtd = ehci_qtd_alloc (ehci, flags);
  427. if (unlikely (!qtd))
  428. return NULL;
  429. list_add_tail (&qtd->qtd_list, head);
  430. qtd->urb = urb;
  431. token = QTD_STS_ACTIVE;
  432. token |= (EHCI_TUNE_CERR << 10);
  433. /* for split transactions, SplitXState initialized to zero */
  434. len = urb->transfer_buffer_length;
  435. is_input = usb_pipein (urb->pipe);
  436. if (usb_pipecontrol (urb->pipe)) {
  437. /* SETUP pid */
  438. qtd_fill (qtd, urb->setup_dma, sizeof (struct usb_ctrlrequest),
  439. token | (2 /* "setup" */ << 8), 8);
  440. /* ... and always at least one more pid */
  441. token ^= QTD_TOGGLE;
  442. qtd_prev = qtd;
  443. qtd = ehci_qtd_alloc (ehci, flags);
  444. if (unlikely (!qtd))
  445. goto cleanup;
  446. qtd->urb = urb;
  447. qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
  448. list_add_tail (&qtd->qtd_list, head);
  449. /* for zero length DATA stages, STATUS is always IN */
  450. if (len == 0)
  451. token |= (1 /* "in" */ << 8);
  452. }
  453. /*
  454. * data transfer stage: buffer setup
  455. */
  456. buf = urb->transfer_dma;
  457. if (is_input)
  458. token |= (1 /* "in" */ << 8);
  459. /* else it's already initted to "out" pid (0 << 8) */
  460. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
  461. /*
  462. * buffer gets wrapped in one or more qtds;
  463. * last one may be "short" (including zero len)
  464. * and may serve as a control status ack
  465. */
  466. for (;;) {
  467. int this_qtd_len;
  468. this_qtd_len = qtd_fill (qtd, buf, len, token, maxpacket);
  469. len -= this_qtd_len;
  470. buf += this_qtd_len;
  471. if (is_input)
  472. qtd->hw_alt_next = ehci->async->hw_alt_next;
  473. /* qh makes control packets use qtd toggle; maybe switch it */
  474. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  475. token ^= QTD_TOGGLE;
  476. if (likely (len <= 0))
  477. break;
  478. qtd_prev = qtd;
  479. qtd = ehci_qtd_alloc (ehci, flags);
  480. if (unlikely (!qtd))
  481. goto cleanup;
  482. qtd->urb = urb;
  483. qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
  484. list_add_tail (&qtd->qtd_list, head);
  485. }
  486. /* unless the bulk/interrupt caller wants a chance to clean
  487. * up after short reads, hc should advance qh past this urb
  488. */
  489. if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
  490. || usb_pipecontrol (urb->pipe)))
  491. qtd->hw_alt_next = EHCI_LIST_END;
  492. /*
  493. * control requests may need a terminating data "status" ack;
  494. * bulk ones may need a terminating short packet (zero length).
  495. */
  496. if (likely (urb->transfer_buffer_length != 0)) {
  497. int one_more = 0;
  498. if (usb_pipecontrol (urb->pipe)) {
  499. one_more = 1;
  500. token ^= 0x0100; /* "in" <--> "out" */
  501. token |= QTD_TOGGLE; /* force DATA1 */
  502. } else if (usb_pipebulk (urb->pipe)
  503. && (urb->transfer_flags & URB_ZERO_PACKET)
  504. && !(urb->transfer_buffer_length % maxpacket)) {
  505. one_more = 1;
  506. }
  507. if (one_more) {
  508. qtd_prev = qtd;
  509. qtd = ehci_qtd_alloc (ehci, flags);
  510. if (unlikely (!qtd))
  511. goto cleanup;
  512. qtd->urb = urb;
  513. qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
  514. list_add_tail (&qtd->qtd_list, head);
  515. /* never any data in such packets */
  516. qtd_fill (qtd, 0, 0, token, 0);
  517. }
  518. }
  519. /* by default, enable interrupt on urb completion */
  520. if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
  521. qtd->hw_token |= __constant_cpu_to_le32 (QTD_IOC);
  522. return head;
  523. cleanup:
  524. qtd_list_free (ehci, urb, head);
  525. return NULL;
  526. }
  527. /*-------------------------------------------------------------------------*/
  528. // Would be best to create all qh's from config descriptors,
  529. // when each interface/altsetting is established. Unlink
  530. // any previous qh and cancel its urbs first; endpoints are
  531. // implicitly reset then (data toggle too).
  532. // That'd mean updating how usbcore talks to HCDs. (2.7?)
  533. /*
  534. * Each QH holds a qtd list; a QH is used for everything except iso.
  535. *
  536. * For interrupt urbs, the scheduler must set the microframe scheduling
  537. * mask(s) each time the QH gets scheduled. For highspeed, that's
  538. * just one microframe in the s-mask. For split interrupt transactions
  539. * there are additional complications: c-mask, maybe FSTNs.
  540. */
  541. static struct ehci_qh *
  542. qh_make (
  543. struct ehci_hcd *ehci,
  544. struct urb *urb,
  545. gfp_t flags
  546. ) {
  547. struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
  548. u32 info1 = 0, info2 = 0;
  549. int is_input, type;
  550. int maxp = 0;
  551. if (!qh)
  552. return qh;
  553. /*
  554. * init endpoint/device data for this QH
  555. */
  556. info1 |= usb_pipeendpoint (urb->pipe) << 8;
  557. info1 |= usb_pipedevice (urb->pipe) << 0;
  558. is_input = usb_pipein (urb->pipe);
  559. type = usb_pipetype (urb->pipe);
  560. maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
  561. /* Compute interrupt scheduling parameters just once, and save.
  562. * - allowing for high bandwidth, how many nsec/uframe are used?
  563. * - split transactions need a second CSPLIT uframe; same question
  564. * - splits also need a schedule gap (for full/low speed I/O)
  565. * - qh has a polling interval
  566. *
  567. * For control/bulk requests, the HC or TT handles these.
  568. */
  569. if (type == PIPE_INTERRUPT) {
  570. qh->usecs = NS_TO_US (usb_calc_bus_time (USB_SPEED_HIGH, is_input, 0,
  571. hb_mult (maxp) * max_packet (maxp)));
  572. qh->start = NO_FRAME;
  573. if (urb->dev->speed == USB_SPEED_HIGH) {
  574. qh->c_usecs = 0;
  575. qh->gap_uf = 0;
  576. qh->period = urb->interval >> 3;
  577. if (qh->period == 0 && urb->interval != 1) {
  578. /* NOTE interval 2 or 4 uframes could work.
  579. * But interval 1 scheduling is simpler, and
  580. * includes high bandwidth.
  581. */
  582. dbg ("intr period %d uframes, NYET!",
  583. urb->interval);
  584. goto done;
  585. }
  586. } else {
  587. struct usb_tt *tt = urb->dev->tt;
  588. int think_time;
  589. /* gap is f(FS/LS transfer times) */
  590. qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
  591. is_input, 0, maxp) / (125 * 1000);
  592. /* FIXME this just approximates SPLIT/CSPLIT times */
  593. if (is_input) { // SPLIT, gap, CSPLIT+DATA
  594. qh->c_usecs = qh->usecs + HS_USECS (0);
  595. qh->usecs = HS_USECS (1);
  596. } else { // SPLIT+DATA, gap, CSPLIT
  597. qh->usecs += HS_USECS (1);
  598. qh->c_usecs = HS_USECS (0);
  599. }
  600. think_time = tt ? tt->think_time : 0;
  601. qh->tt_usecs = NS_TO_US (think_time +
  602. usb_calc_bus_time (urb->dev->speed,
  603. is_input, 0, max_packet (maxp)));
  604. qh->period = urb->interval;
  605. }
  606. }
  607. /* support for tt scheduling, and access to toggles */
  608. qh->dev = urb->dev;
  609. /* using TT? */
  610. switch (urb->dev->speed) {
  611. case USB_SPEED_LOW:
  612. info1 |= (1 << 12); /* EPS "low" */
  613. /* FALL THROUGH */
  614. case USB_SPEED_FULL:
  615. /* EPS 0 means "full" */
  616. if (type != PIPE_INTERRUPT)
  617. info1 |= (EHCI_TUNE_RL_TT << 28);
  618. if (type == PIPE_CONTROL) {
  619. info1 |= (1 << 27); /* for TT */
  620. info1 |= 1 << 14; /* toggle from qtd */
  621. }
  622. info1 |= maxp << 16;
  623. info2 |= (EHCI_TUNE_MULT_TT << 30);
  624. /* Some Freescale processors have an erratum in which the
  625. * port number in the queue head was 0..N-1 instead of 1..N.
  626. */
  627. if (ehci_has_fsl_portno_bug(ehci))
  628. info2 |= (urb->dev->ttport-1) << 23;
  629. else
  630. info2 |= urb->dev->ttport << 23;
  631. /* set the address of the TT; for TDI's integrated
  632. * root hub tt, leave it zeroed.
  633. */
  634. if (!ehci_is_TDI(ehci)
  635. || urb->dev->tt->hub !=
  636. ehci_to_hcd(ehci)->self.root_hub)
  637. info2 |= urb->dev->tt->hub->devnum << 16;
  638. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
  639. break;
  640. case USB_SPEED_HIGH: /* no TT involved */
  641. info1 |= (2 << 12); /* EPS "high" */
  642. if (type == PIPE_CONTROL) {
  643. info1 |= (EHCI_TUNE_RL_HS << 28);
  644. info1 |= 64 << 16; /* usb2 fixed maxpacket */
  645. info1 |= 1 << 14; /* toggle from qtd */
  646. info2 |= (EHCI_TUNE_MULT_HS << 30);
  647. } else if (type == PIPE_BULK) {
  648. info1 |= (EHCI_TUNE_RL_HS << 28);
  649. info1 |= 512 << 16; /* usb2 fixed maxpacket */
  650. info2 |= (EHCI_TUNE_MULT_HS << 30);
  651. } else { /* PIPE_INTERRUPT */
  652. info1 |= max_packet (maxp) << 16;
  653. info2 |= hb_mult (maxp) << 30;
  654. }
  655. break;
  656. default:
  657. dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
  658. done:
  659. qh_put (qh);
  660. return NULL;
  661. }
  662. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
  663. /* init as live, toggle clear, advance to dummy */
  664. qh->qh_state = QH_STATE_IDLE;
  665. qh->hw_info1 = cpu_to_le32 (info1);
  666. qh->hw_info2 = cpu_to_le32 (info2);
  667. usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
  668. qh_refresh (ehci, qh);
  669. return qh;
  670. }
  671. /*-------------------------------------------------------------------------*/
  672. /* move qh (and its qtds) onto async queue; maybe enable queue. */
  673. static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  674. {
  675. __le32 dma = QH_NEXT (qh->qh_dma);
  676. struct ehci_qh *head;
  677. /* (re)start the async schedule? */
  678. head = ehci->async;
  679. timer_action_done (ehci, TIMER_ASYNC_OFF);
  680. if (!head->qh_next.qh) {
  681. u32 cmd = readl (&ehci->regs->command);
  682. if (!(cmd & CMD_ASE)) {
  683. /* in case a clear of CMD_ASE didn't take yet */
  684. (void) handshake (&ehci->regs->status, STS_ASS, 0, 150);
  685. cmd |= CMD_ASE | CMD_RUN;
  686. writel (cmd, &ehci->regs->command);
  687. ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
  688. /* posted write need not be known to HC yet ... */
  689. }
  690. }
  691. /* clear halt and/or toggle; and maybe recover from silicon quirk */
  692. if (qh->qh_state == QH_STATE_IDLE)
  693. qh_refresh (ehci, qh);
  694. /* splice right after start */
  695. qh->qh_next = head->qh_next;
  696. qh->hw_next = head->hw_next;
  697. wmb ();
  698. head->qh_next.qh = qh;
  699. head->hw_next = dma;
  700. qh->qh_state = QH_STATE_LINKED;
  701. /* qtd completions reported later by interrupt */
  702. }
  703. /*-------------------------------------------------------------------------*/
  704. #define QH_ADDR_MASK __constant_cpu_to_le32(0x7f)
  705. /*
  706. * For control/bulk/interrupt, return QH with these TDs appended.
  707. * Allocates and initializes the QH if necessary.
  708. * Returns null if it can't allocate a QH it needs to.
  709. * If the QH has TDs (urbs) already, that's great.
  710. */
  711. static struct ehci_qh *qh_append_tds (
  712. struct ehci_hcd *ehci,
  713. struct urb *urb,
  714. struct list_head *qtd_list,
  715. int epnum,
  716. void **ptr
  717. )
  718. {
  719. struct ehci_qh *qh = NULL;
  720. qh = (struct ehci_qh *) *ptr;
  721. if (unlikely (qh == NULL)) {
  722. /* can't sleep here, we have ehci->lock... */
  723. qh = qh_make (ehci, urb, GFP_ATOMIC);
  724. *ptr = qh;
  725. }
  726. if (likely (qh != NULL)) {
  727. struct ehci_qtd *qtd;
  728. if (unlikely (list_empty (qtd_list)))
  729. qtd = NULL;
  730. else
  731. qtd = list_entry (qtd_list->next, struct ehci_qtd,
  732. qtd_list);
  733. /* control qh may need patching ... */
  734. if (unlikely (epnum == 0)) {
  735. /* usb_reset_device() briefly reverts to address 0 */
  736. if (usb_pipedevice (urb->pipe) == 0)
  737. qh->hw_info1 &= ~QH_ADDR_MASK;
  738. }
  739. /* just one way to queue requests: swap with the dummy qtd.
  740. * only hc or qh_refresh() ever modify the overlay.
  741. */
  742. if (likely (qtd != NULL)) {
  743. struct ehci_qtd *dummy;
  744. dma_addr_t dma;
  745. __le32 token;
  746. /* to avoid racing the HC, use the dummy td instead of
  747. * the first td of our list (becomes new dummy). both
  748. * tds stay deactivated until we're done, when the
  749. * HC is allowed to fetch the old dummy (4.10.2).
  750. */
  751. token = qtd->hw_token;
  752. qtd->hw_token = HALT_BIT;
  753. wmb ();
  754. dummy = qh->dummy;
  755. dma = dummy->qtd_dma;
  756. *dummy = *qtd;
  757. dummy->qtd_dma = dma;
  758. list_del (&qtd->qtd_list);
  759. list_add (&dummy->qtd_list, qtd_list);
  760. __list_splice (qtd_list, qh->qtd_list.prev);
  761. ehci_qtd_init (qtd, qtd->qtd_dma);
  762. qh->dummy = qtd;
  763. /* hc must see the new dummy at list end */
  764. dma = qtd->qtd_dma;
  765. qtd = list_entry (qh->qtd_list.prev,
  766. struct ehci_qtd, qtd_list);
  767. qtd->hw_next = QTD_NEXT (dma);
  768. /* let the hc process these next qtds */
  769. wmb ();
  770. dummy->hw_token = token;
  771. urb->hcpriv = qh_get (qh);
  772. }
  773. }
  774. return qh;
  775. }
  776. /*-------------------------------------------------------------------------*/
  777. static int
  778. submit_async (
  779. struct ehci_hcd *ehci,
  780. struct usb_host_endpoint *ep,
  781. struct urb *urb,
  782. struct list_head *qtd_list,
  783. gfp_t mem_flags
  784. ) {
  785. struct ehci_qtd *qtd;
  786. int epnum;
  787. unsigned long flags;
  788. struct ehci_qh *qh = NULL;
  789. int rc = 0;
  790. qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
  791. epnum = ep->desc.bEndpointAddress;
  792. #ifdef EHCI_URB_TRACE
  793. ehci_dbg (ehci,
  794. "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  795. __FUNCTION__, urb->dev->devpath, urb,
  796. epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
  797. urb->transfer_buffer_length,
  798. qtd, ep->hcpriv);
  799. #endif
  800. spin_lock_irqsave (&ehci->lock, flags);
  801. if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
  802. &ehci_to_hcd(ehci)->flags))) {
  803. rc = -ESHUTDOWN;
  804. goto done;
  805. }
  806. qh = qh_append_tds (ehci, urb, qtd_list, epnum, &ep->hcpriv);
  807. if (unlikely(qh == NULL)) {
  808. rc = -ENOMEM;
  809. goto done;
  810. }
  811. /* Control/bulk operations through TTs don't need scheduling,
  812. * the HC and TT handle it when the TT has a buffer ready.
  813. */
  814. if (likely (qh->qh_state == QH_STATE_IDLE))
  815. qh_link_async (ehci, qh_get (qh));
  816. done:
  817. spin_unlock_irqrestore (&ehci->lock, flags);
  818. if (unlikely (qh == NULL))
  819. qtd_list_free (ehci, urb, qtd_list);
  820. return rc;
  821. }
  822. /*-------------------------------------------------------------------------*/
  823. /* the async qh for the qtds being reclaimed are now unlinked from the HC */
  824. static void end_unlink_async (struct ehci_hcd *ehci, struct pt_regs *regs)
  825. {
  826. struct ehci_qh *qh = ehci->reclaim;
  827. struct ehci_qh *next;
  828. timer_action_done (ehci, TIMER_IAA_WATCHDOG);
  829. // qh->hw_next = cpu_to_le32 (qh->qh_dma);
  830. qh->qh_state = QH_STATE_IDLE;
  831. qh->qh_next.qh = NULL;
  832. qh_put (qh); // refcount from reclaim
  833. /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
  834. next = qh->reclaim;
  835. ehci->reclaim = next;
  836. ehci->reclaim_ready = 0;
  837. qh->reclaim = NULL;
  838. qh_completions (ehci, qh, regs);
  839. if (!list_empty (&qh->qtd_list)
  840. && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
  841. qh_link_async (ehci, qh);
  842. else {
  843. qh_put (qh); // refcount from async list
  844. /* it's not free to turn the async schedule on/off; leave it
  845. * active but idle for a while once it empties.
  846. */
  847. if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
  848. && ehci->async->qh_next.qh == NULL)
  849. timer_action (ehci, TIMER_ASYNC_OFF);
  850. }
  851. if (next) {
  852. ehci->reclaim = NULL;
  853. start_unlink_async (ehci, next);
  854. }
  855. }
  856. /* makes sure the async qh will become idle */
  857. /* caller must own ehci->lock */
  858. static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  859. {
  860. int cmd = readl (&ehci->regs->command);
  861. struct ehci_qh *prev;
  862. #ifdef DEBUG
  863. assert_spin_locked(&ehci->lock);
  864. if (ehci->reclaim
  865. || (qh->qh_state != QH_STATE_LINKED
  866. && qh->qh_state != QH_STATE_UNLINK_WAIT)
  867. )
  868. BUG ();
  869. #endif
  870. /* stop async schedule right now? */
  871. if (unlikely (qh == ehci->async)) {
  872. /* can't get here without STS_ASS set */
  873. if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
  874. && !ehci->reclaim) {
  875. /* ... and CMD_IAAD clear */
  876. writel (cmd & ~CMD_ASE, &ehci->regs->command);
  877. wmb ();
  878. // handshake later, if we need to
  879. timer_action_done (ehci, TIMER_ASYNC_OFF);
  880. }
  881. return;
  882. }
  883. qh->qh_state = QH_STATE_UNLINK;
  884. ehci->reclaim = qh = qh_get (qh);
  885. prev = ehci->async;
  886. while (prev->qh_next.qh != qh)
  887. prev = prev->qh_next.qh;
  888. prev->hw_next = qh->hw_next;
  889. prev->qh_next = qh->qh_next;
  890. wmb ();
  891. if (unlikely (ehci_to_hcd(ehci)->state == HC_STATE_HALT)) {
  892. /* if (unlikely (qh->reclaim != 0))
  893. * this will recurse, probably not much
  894. */
  895. end_unlink_async (ehci, NULL);
  896. return;
  897. }
  898. ehci->reclaim_ready = 0;
  899. cmd |= CMD_IAAD;
  900. writel (cmd, &ehci->regs->command);
  901. (void) readl (&ehci->regs->command);
  902. timer_action (ehci, TIMER_IAA_WATCHDOG);
  903. }
  904. /*-------------------------------------------------------------------------*/
  905. static void
  906. scan_async (struct ehci_hcd *ehci, struct pt_regs *regs)
  907. {
  908. struct ehci_qh *qh;
  909. enum ehci_timer_action action = TIMER_IO_WATCHDOG;
  910. if (!++(ehci->stamp))
  911. ehci->stamp++;
  912. timer_action_done (ehci, TIMER_ASYNC_SHRINK);
  913. rescan:
  914. qh = ehci->async->qh_next.qh;
  915. if (likely (qh != NULL)) {
  916. do {
  917. /* clean any finished work for this qh */
  918. if (!list_empty (&qh->qtd_list)
  919. && qh->stamp != ehci->stamp) {
  920. int temp;
  921. /* unlinks could happen here; completion
  922. * reporting drops the lock. rescan using
  923. * the latest schedule, but don't rescan
  924. * qhs we already finished (no looping).
  925. */
  926. qh = qh_get (qh);
  927. qh->stamp = ehci->stamp;
  928. temp = qh_completions (ehci, qh, regs);
  929. qh_put (qh);
  930. if (temp != 0) {
  931. goto rescan;
  932. }
  933. }
  934. /* unlink idle entries, reducing HC PCI usage as well
  935. * as HCD schedule-scanning costs. delay for any qh
  936. * we just scanned, there's a not-unusual case that it
  937. * doesn't stay idle for long.
  938. * (plus, avoids some kind of re-activation race.)
  939. */
  940. if (list_empty (&qh->qtd_list)) {
  941. if (qh->stamp == ehci->stamp)
  942. action = TIMER_ASYNC_SHRINK;
  943. else if (!ehci->reclaim
  944. && qh->qh_state == QH_STATE_LINKED)
  945. start_unlink_async (ehci, qh);
  946. }
  947. qh = qh->qh_next.qh;
  948. } while (qh);
  949. }
  950. if (action == TIMER_ASYNC_SHRINK)
  951. timer_action (ehci, TIMER_ASYNC_SHRINK);
  952. }