sunsu.c 41 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732
  1. /* $Id: su.c,v 1.55 2002/01/08 16:00:16 davem Exp $
  2. * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
  3. *
  4. * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
  5. * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
  6. *
  7. * This is mainly a variation of 8250.c, credits go to authors mentioned
  8. * therein. In fact this driver should be merged into the generic 8250.c
  9. * infrastructure perhaps using a 8250_sparc.c module.
  10. *
  11. * Fixed to use tty_get_baud_rate().
  12. * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13. *
  14. * Converted to new 2.5.x UART layer.
  15. * David S. Miller (davem@redhat.com), 2002-Jul-29
  16. */
  17. #include <linux/config.h>
  18. #include <linux/module.h>
  19. #include <linux/kernel.h>
  20. #include <linux/sched.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/errno.h>
  23. #include <linux/tty.h>
  24. #include <linux/tty_flip.h>
  25. #include <linux/major.h>
  26. #include <linux/string.h>
  27. #include <linux/ptrace.h>
  28. #include <linux/ioport.h>
  29. #include <linux/circ_buf.h>
  30. #include <linux/serial.h>
  31. #include <linux/sysrq.h>
  32. #include <linux/console.h>
  33. #ifdef CONFIG_SERIO
  34. #include <linux/serio.h>
  35. #endif
  36. #include <linux/serial_reg.h>
  37. #include <linux/init.h>
  38. #include <linux/delay.h>
  39. #include <asm/io.h>
  40. #include <asm/irq.h>
  41. #include <asm/oplib.h>
  42. #include <asm/ebus.h>
  43. #ifdef CONFIG_SPARC64
  44. #include <asm/isa.h>
  45. #endif
  46. #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  47. #define SUPPORT_SYSRQ
  48. #endif
  49. #include <linux/serial_core.h>
  50. #include "suncore.h"
  51. /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  52. * in a UART clock of 1.8462 MHz.
  53. */
  54. #define SU_BASE_BAUD (1846200 / 16)
  55. enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  56. static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  57. /*
  58. * Here we define the default xmit fifo size used for each type of UART.
  59. */
  60. static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
  61. { "unknown", 1, 0 },
  62. { "8250", 1, 0 },
  63. { "16450", 1, 0 },
  64. { "16550", 1, 0 },
  65. { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
  66. { "Cirrus", 1, 0 },
  67. { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
  68. { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  69. { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
  70. { "Startech", 1, 0 },
  71. { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
  72. { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  73. { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  74. { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
  75. };
  76. struct uart_sunsu_port {
  77. struct uart_port port;
  78. unsigned char acr;
  79. unsigned char ier;
  80. unsigned short rev;
  81. unsigned char lcr;
  82. unsigned int lsr_break_flag;
  83. unsigned int cflag;
  84. /* Probing information. */
  85. enum su_type su_type;
  86. unsigned int type_probed; /* XXX Stupid */
  87. int port_node;
  88. #ifdef CONFIG_SERIO
  89. struct serio *serio;
  90. int serio_open;
  91. #endif
  92. };
  93. static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
  94. {
  95. offset <<= up->port.regshift;
  96. switch (up->port.iotype) {
  97. case UPIO_HUB6:
  98. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  99. return inb(up->port.iobase + 1);
  100. case UPIO_MEM:
  101. return readb(up->port.membase + offset);
  102. default:
  103. return inb(up->port.iobase + offset);
  104. }
  105. }
  106. static void serial_out(struct uart_sunsu_port *up, int offset, int value)
  107. {
  108. #ifndef CONFIG_SPARC64
  109. /*
  110. * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
  111. * connected with a gate then go to SlavIO. When IRQ4 goes tristated
  112. * gate outputs a logical one. Since we use level triggered interrupts
  113. * we have lockup and watchdog reset. We cannot mask IRQ because
  114. * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
  115. * This problem is similar to what Alpha people suffer, see serial.c.
  116. */
  117. if (offset == UART_MCR)
  118. value |= UART_MCR_OUT2;
  119. #endif
  120. offset <<= up->port.regshift;
  121. switch (up->port.iotype) {
  122. case UPIO_HUB6:
  123. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  124. outb(value, up->port.iobase + 1);
  125. break;
  126. case UPIO_MEM:
  127. writeb(value, up->port.membase + offset);
  128. break;
  129. default:
  130. outb(value, up->port.iobase + offset);
  131. }
  132. }
  133. /*
  134. * We used to support using pause I/O for certain machines. We
  135. * haven't supported this for a while, but just in case it's badly
  136. * needed for certain old 386 machines, I've left these #define's
  137. * in....
  138. */
  139. #define serial_inp(up, offset) serial_in(up, offset)
  140. #define serial_outp(up, offset, value) serial_out(up, offset, value)
  141. /*
  142. * For the 16C950
  143. */
  144. static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
  145. {
  146. serial_out(up, UART_SCR, offset);
  147. serial_out(up, UART_ICR, value);
  148. }
  149. #if 0 /* Unused currently */
  150. static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
  151. {
  152. unsigned int value;
  153. serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
  154. serial_out(up, UART_SCR, offset);
  155. value = serial_in(up, UART_ICR);
  156. serial_icr_write(up, UART_ACR, up->acr);
  157. return value;
  158. }
  159. #endif
  160. #ifdef CONFIG_SERIAL_8250_RSA
  161. /*
  162. * Attempts to turn on the RSA FIFO. Returns zero on failure.
  163. * We set the port uart clock rate if we succeed.
  164. */
  165. static int __enable_rsa(struct uart_sunsu_port *up)
  166. {
  167. unsigned char mode;
  168. int result;
  169. mode = serial_inp(up, UART_RSA_MSR);
  170. result = mode & UART_RSA_MSR_FIFO;
  171. if (!result) {
  172. serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
  173. mode = serial_inp(up, UART_RSA_MSR);
  174. result = mode & UART_RSA_MSR_FIFO;
  175. }
  176. if (result)
  177. up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
  178. return result;
  179. }
  180. static void enable_rsa(struct uart_sunsu_port *up)
  181. {
  182. if (up->port.type == PORT_RSA) {
  183. if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
  184. spin_lock_irq(&up->port.lock);
  185. __enable_rsa(up);
  186. spin_unlock_irq(&up->port.lock);
  187. }
  188. if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
  189. serial_outp(up, UART_RSA_FRR, 0);
  190. }
  191. }
  192. /*
  193. * Attempts to turn off the RSA FIFO. Returns zero on failure.
  194. * It is unknown why interrupts were disabled in here. However,
  195. * the caller is expected to preserve this behaviour by grabbing
  196. * the spinlock before calling this function.
  197. */
  198. static void disable_rsa(struct uart_sunsu_port *up)
  199. {
  200. unsigned char mode;
  201. int result;
  202. if (up->port.type == PORT_RSA &&
  203. up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
  204. spin_lock_irq(&up->port.lock);
  205. mode = serial_inp(up, UART_RSA_MSR);
  206. result = !(mode & UART_RSA_MSR_FIFO);
  207. if (!result) {
  208. serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
  209. mode = serial_inp(up, UART_RSA_MSR);
  210. result = !(mode & UART_RSA_MSR_FIFO);
  211. }
  212. if (result)
  213. up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
  214. spin_unlock_irq(&up->port.lock);
  215. }
  216. }
  217. #endif /* CONFIG_SERIAL_8250_RSA */
  218. static inline void __stop_tx(struct uart_sunsu_port *p)
  219. {
  220. if (p->ier & UART_IER_THRI) {
  221. p->ier &= ~UART_IER_THRI;
  222. serial_out(p, UART_IER, p->ier);
  223. }
  224. }
  225. static void sunsu_stop_tx(struct uart_port *port)
  226. {
  227. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  228. __stop_tx(up);
  229. /*
  230. * We really want to stop the transmitter from sending.
  231. */
  232. if (up->port.type == PORT_16C950) {
  233. up->acr |= UART_ACR_TXDIS;
  234. serial_icr_write(up, UART_ACR, up->acr);
  235. }
  236. }
  237. static void sunsu_start_tx(struct uart_port *port)
  238. {
  239. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  240. if (!(up->ier & UART_IER_THRI)) {
  241. up->ier |= UART_IER_THRI;
  242. serial_out(up, UART_IER, up->ier);
  243. }
  244. /*
  245. * Re-enable the transmitter if we disabled it.
  246. */
  247. if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
  248. up->acr &= ~UART_ACR_TXDIS;
  249. serial_icr_write(up, UART_ACR, up->acr);
  250. }
  251. }
  252. static void sunsu_stop_rx(struct uart_port *port)
  253. {
  254. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  255. up->ier &= ~UART_IER_RLSI;
  256. up->port.read_status_mask &= ~UART_LSR_DR;
  257. serial_out(up, UART_IER, up->ier);
  258. }
  259. static void sunsu_enable_ms(struct uart_port *port)
  260. {
  261. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  262. unsigned long flags;
  263. spin_lock_irqsave(&up->port.lock, flags);
  264. up->ier |= UART_IER_MSI;
  265. serial_out(up, UART_IER, up->ier);
  266. spin_unlock_irqrestore(&up->port.lock, flags);
  267. }
  268. static struct tty_struct *
  269. receive_chars(struct uart_sunsu_port *up, unsigned char *status, struct pt_regs *regs)
  270. {
  271. struct tty_struct *tty = up->port.info->tty;
  272. unsigned char ch, flag;
  273. int max_count = 256;
  274. int saw_console_brk = 0;
  275. do {
  276. ch = serial_inp(up, UART_RX);
  277. flag = TTY_NORMAL;
  278. up->port.icount.rx++;
  279. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  280. UART_LSR_FE | UART_LSR_OE))) {
  281. /*
  282. * For statistics only
  283. */
  284. if (*status & UART_LSR_BI) {
  285. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  286. up->port.icount.brk++;
  287. if (up->port.cons != NULL &&
  288. up->port.line == up->port.cons->index)
  289. saw_console_brk = 1;
  290. /*
  291. * We do the SysRQ and SAK checking
  292. * here because otherwise the break
  293. * may get masked by ignore_status_mask
  294. * or read_status_mask.
  295. */
  296. if (uart_handle_break(&up->port))
  297. goto ignore_char;
  298. } else if (*status & UART_LSR_PE)
  299. up->port.icount.parity++;
  300. else if (*status & UART_LSR_FE)
  301. up->port.icount.frame++;
  302. if (*status & UART_LSR_OE)
  303. up->port.icount.overrun++;
  304. /*
  305. * Mask off conditions which should be ingored.
  306. */
  307. *status &= up->port.read_status_mask;
  308. if (up->port.cons != NULL &&
  309. up->port.line == up->port.cons->index) {
  310. /* Recover the break flag from console xmit */
  311. *status |= up->lsr_break_flag;
  312. up->lsr_break_flag = 0;
  313. }
  314. if (*status & UART_LSR_BI) {
  315. flag = TTY_BREAK;
  316. } else if (*status & UART_LSR_PE)
  317. flag = TTY_PARITY;
  318. else if (*status & UART_LSR_FE)
  319. flag = TTY_FRAME;
  320. }
  321. if (uart_handle_sysrq_char(&up->port, ch, regs))
  322. goto ignore_char;
  323. if ((*status & up->port.ignore_status_mask) == 0)
  324. tty_insert_flip_char(tty, ch, flag);
  325. if (*status & UART_LSR_OE)
  326. /*
  327. * Overrun is special, since it's reported
  328. * immediately, and doesn't affect the current
  329. * character.
  330. */
  331. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  332. ignore_char:
  333. *status = serial_inp(up, UART_LSR);
  334. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  335. if (saw_console_brk)
  336. sun_do_break();
  337. return tty;
  338. }
  339. static void transmit_chars(struct uart_sunsu_port *up)
  340. {
  341. struct circ_buf *xmit = &up->port.info->xmit;
  342. int count;
  343. if (up->port.x_char) {
  344. serial_outp(up, UART_TX, up->port.x_char);
  345. up->port.icount.tx++;
  346. up->port.x_char = 0;
  347. return;
  348. }
  349. if (uart_tx_stopped(&up->port)) {
  350. sunsu_stop_tx(&up->port);
  351. return;
  352. }
  353. if (uart_circ_empty(xmit)) {
  354. __stop_tx(up);
  355. return;
  356. }
  357. count = up->port.fifosize;
  358. do {
  359. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  360. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  361. up->port.icount.tx++;
  362. if (uart_circ_empty(xmit))
  363. break;
  364. } while (--count > 0);
  365. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  366. uart_write_wakeup(&up->port);
  367. if (uart_circ_empty(xmit))
  368. __stop_tx(up);
  369. }
  370. static void check_modem_status(struct uart_sunsu_port *up)
  371. {
  372. int status;
  373. status = serial_in(up, UART_MSR);
  374. if ((status & UART_MSR_ANY_DELTA) == 0)
  375. return;
  376. if (status & UART_MSR_TERI)
  377. up->port.icount.rng++;
  378. if (status & UART_MSR_DDSR)
  379. up->port.icount.dsr++;
  380. if (status & UART_MSR_DDCD)
  381. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  382. if (status & UART_MSR_DCTS)
  383. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  384. wake_up_interruptible(&up->port.info->delta_msr_wait);
  385. }
  386. static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  387. {
  388. struct uart_sunsu_port *up = dev_id;
  389. unsigned long flags;
  390. unsigned char status;
  391. spin_lock_irqsave(&up->port.lock, flags);
  392. do {
  393. struct tty_struct *tty;
  394. status = serial_inp(up, UART_LSR);
  395. tty = NULL;
  396. if (status & UART_LSR_DR)
  397. tty = receive_chars(up, &status, regs);
  398. check_modem_status(up);
  399. if (status & UART_LSR_THRE)
  400. transmit_chars(up);
  401. spin_unlock_irqrestore(&up->port.lock, flags);
  402. if (tty)
  403. tty_flip_buffer_push(tty);
  404. spin_lock_irqsave(&up->port.lock, flags);
  405. } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
  406. spin_unlock_irqrestore(&up->port.lock, flags);
  407. return IRQ_HANDLED;
  408. }
  409. /* Separate interrupt handling path for keyboard/mouse ports. */
  410. static void
  411. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  412. unsigned int iflag, unsigned int quot);
  413. static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
  414. {
  415. unsigned int cur_cflag = up->cflag;
  416. int quot, new_baud;
  417. up->cflag &= ~CBAUD;
  418. up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
  419. quot = up->port.uartclk / (16 * new_baud);
  420. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  421. }
  422. static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *regs, int is_break)
  423. {
  424. do {
  425. unsigned char ch = serial_inp(up, UART_RX);
  426. /* Stop-A is handled by drivers/char/keyboard.c now. */
  427. if (up->su_type == SU_PORT_KBD) {
  428. #ifdef CONFIG_SERIO
  429. serio_interrupt(up->serio, ch, 0, regs);
  430. #endif
  431. } else if (up->su_type == SU_PORT_MS) {
  432. int ret = suncore_mouse_baud_detection(ch, is_break);
  433. switch (ret) {
  434. case 2:
  435. sunsu_change_mouse_baud(up);
  436. /* fallthru */
  437. case 1:
  438. break;
  439. case 0:
  440. #ifdef CONFIG_SERIO
  441. serio_interrupt(up->serio, ch, 0, regs);
  442. #endif
  443. break;
  444. };
  445. }
  446. } while (serial_in(up, UART_LSR) & UART_LSR_DR);
  447. }
  448. static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  449. {
  450. struct uart_sunsu_port *up = dev_id;
  451. if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
  452. unsigned char status = serial_inp(up, UART_LSR);
  453. if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
  454. receive_kbd_ms_chars(up, regs,
  455. (status & UART_LSR_BI) != 0);
  456. }
  457. return IRQ_HANDLED;
  458. }
  459. static unsigned int sunsu_tx_empty(struct uart_port *port)
  460. {
  461. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  462. unsigned long flags;
  463. unsigned int ret;
  464. spin_lock_irqsave(&up->port.lock, flags);
  465. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  466. spin_unlock_irqrestore(&up->port.lock, flags);
  467. return ret;
  468. }
  469. static unsigned int sunsu_get_mctrl(struct uart_port *port)
  470. {
  471. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  472. unsigned char status;
  473. unsigned int ret;
  474. status = serial_in(up, UART_MSR);
  475. ret = 0;
  476. if (status & UART_MSR_DCD)
  477. ret |= TIOCM_CAR;
  478. if (status & UART_MSR_RI)
  479. ret |= TIOCM_RNG;
  480. if (status & UART_MSR_DSR)
  481. ret |= TIOCM_DSR;
  482. if (status & UART_MSR_CTS)
  483. ret |= TIOCM_CTS;
  484. return ret;
  485. }
  486. static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
  487. {
  488. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  489. unsigned char mcr = 0;
  490. if (mctrl & TIOCM_RTS)
  491. mcr |= UART_MCR_RTS;
  492. if (mctrl & TIOCM_DTR)
  493. mcr |= UART_MCR_DTR;
  494. if (mctrl & TIOCM_OUT1)
  495. mcr |= UART_MCR_OUT1;
  496. if (mctrl & TIOCM_OUT2)
  497. mcr |= UART_MCR_OUT2;
  498. if (mctrl & TIOCM_LOOP)
  499. mcr |= UART_MCR_LOOP;
  500. serial_out(up, UART_MCR, mcr);
  501. }
  502. static void sunsu_break_ctl(struct uart_port *port, int break_state)
  503. {
  504. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  505. unsigned long flags;
  506. spin_lock_irqsave(&up->port.lock, flags);
  507. if (break_state == -1)
  508. up->lcr |= UART_LCR_SBC;
  509. else
  510. up->lcr &= ~UART_LCR_SBC;
  511. serial_out(up, UART_LCR, up->lcr);
  512. spin_unlock_irqrestore(&up->port.lock, flags);
  513. }
  514. static int sunsu_startup(struct uart_port *port)
  515. {
  516. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  517. unsigned long flags;
  518. int retval;
  519. if (up->port.type == PORT_16C950) {
  520. /* Wake up and initialize UART */
  521. up->acr = 0;
  522. serial_outp(up, UART_LCR, 0xBF);
  523. serial_outp(up, UART_EFR, UART_EFR_ECB);
  524. serial_outp(up, UART_IER, 0);
  525. serial_outp(up, UART_LCR, 0);
  526. serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
  527. serial_outp(up, UART_LCR, 0xBF);
  528. serial_outp(up, UART_EFR, UART_EFR_ECB);
  529. serial_outp(up, UART_LCR, 0);
  530. }
  531. #ifdef CONFIG_SERIAL_8250_RSA
  532. /*
  533. * If this is an RSA port, see if we can kick it up to the
  534. * higher speed clock.
  535. */
  536. enable_rsa(up);
  537. #endif
  538. /*
  539. * Clear the FIFO buffers and disable them.
  540. * (they will be reenabled in set_termios())
  541. */
  542. if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
  543. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  544. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  545. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  546. serial_outp(up, UART_FCR, 0);
  547. }
  548. /*
  549. * Clear the interrupt registers.
  550. */
  551. (void) serial_inp(up, UART_LSR);
  552. (void) serial_inp(up, UART_RX);
  553. (void) serial_inp(up, UART_IIR);
  554. (void) serial_inp(up, UART_MSR);
  555. /*
  556. * At this point, there's no way the LSR could still be 0xff;
  557. * if it is, then bail out, because there's likely no UART
  558. * here.
  559. */
  560. if (!(up->port.flags & UPF_BUGGY_UART) &&
  561. (serial_inp(up, UART_LSR) == 0xff)) {
  562. printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
  563. return -ENODEV;
  564. }
  565. if (up->su_type != SU_PORT_PORT) {
  566. retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
  567. SA_SHIRQ, su_typev[up->su_type], up);
  568. } else {
  569. retval = request_irq(up->port.irq, sunsu_serial_interrupt,
  570. SA_SHIRQ, su_typev[up->su_type], up);
  571. }
  572. if (retval) {
  573. printk("su: Cannot register IRQ %d\n", up->port.irq);
  574. return retval;
  575. }
  576. /*
  577. * Now, initialize the UART
  578. */
  579. serial_outp(up, UART_LCR, UART_LCR_WLEN8);
  580. spin_lock_irqsave(&up->port.lock, flags);
  581. up->port.mctrl |= TIOCM_OUT2;
  582. sunsu_set_mctrl(&up->port, up->port.mctrl);
  583. spin_unlock_irqrestore(&up->port.lock, flags);
  584. /*
  585. * Finally, enable interrupts. Note: Modem status interrupts
  586. * are set via set_termios(), which will be occurring imminently
  587. * anyway, so we don't enable them here.
  588. */
  589. up->ier = UART_IER_RLSI | UART_IER_RDI;
  590. serial_outp(up, UART_IER, up->ier);
  591. if (up->port.flags & UPF_FOURPORT) {
  592. unsigned int icp;
  593. /*
  594. * Enable interrupts on the AST Fourport board
  595. */
  596. icp = (up->port.iobase & 0xfe0) | 0x01f;
  597. outb_p(0x80, icp);
  598. (void) inb_p(icp);
  599. }
  600. /*
  601. * And clear the interrupt registers again for luck.
  602. */
  603. (void) serial_inp(up, UART_LSR);
  604. (void) serial_inp(up, UART_RX);
  605. (void) serial_inp(up, UART_IIR);
  606. (void) serial_inp(up, UART_MSR);
  607. return 0;
  608. }
  609. static void sunsu_shutdown(struct uart_port *port)
  610. {
  611. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  612. unsigned long flags;
  613. /*
  614. * Disable interrupts from this port
  615. */
  616. up->ier = 0;
  617. serial_outp(up, UART_IER, 0);
  618. spin_lock_irqsave(&up->port.lock, flags);
  619. if (up->port.flags & UPF_FOURPORT) {
  620. /* reset interrupts on the AST Fourport board */
  621. inb((up->port.iobase & 0xfe0) | 0x1f);
  622. up->port.mctrl |= TIOCM_OUT1;
  623. } else
  624. up->port.mctrl &= ~TIOCM_OUT2;
  625. sunsu_set_mctrl(&up->port, up->port.mctrl);
  626. spin_unlock_irqrestore(&up->port.lock, flags);
  627. /*
  628. * Disable break condition and FIFOs
  629. */
  630. serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
  631. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  632. UART_FCR_CLEAR_RCVR |
  633. UART_FCR_CLEAR_XMIT);
  634. serial_outp(up, UART_FCR, 0);
  635. #ifdef CONFIG_SERIAL_8250_RSA
  636. /*
  637. * Reset the RSA board back to 115kbps compat mode.
  638. */
  639. disable_rsa(up);
  640. #endif
  641. /*
  642. * Read data port to reset things.
  643. */
  644. (void) serial_in(up, UART_RX);
  645. free_irq(up->port.irq, up);
  646. }
  647. static void
  648. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  649. unsigned int iflag, unsigned int quot)
  650. {
  651. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  652. unsigned char cval, fcr = 0;
  653. unsigned long flags;
  654. switch (cflag & CSIZE) {
  655. case CS5:
  656. cval = 0x00;
  657. break;
  658. case CS6:
  659. cval = 0x01;
  660. break;
  661. case CS7:
  662. cval = 0x02;
  663. break;
  664. default:
  665. case CS8:
  666. cval = 0x03;
  667. break;
  668. }
  669. if (cflag & CSTOPB)
  670. cval |= 0x04;
  671. if (cflag & PARENB)
  672. cval |= UART_LCR_PARITY;
  673. if (!(cflag & PARODD))
  674. cval |= UART_LCR_EPAR;
  675. #ifdef CMSPAR
  676. if (cflag & CMSPAR)
  677. cval |= UART_LCR_SPAR;
  678. #endif
  679. /*
  680. * Work around a bug in the Oxford Semiconductor 952 rev B
  681. * chip which causes it to seriously miscalculate baud rates
  682. * when DLL is 0.
  683. */
  684. if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
  685. up->rev == 0x5201)
  686. quot ++;
  687. if (uart_config[up->port.type].flags & UART_USE_FIFO) {
  688. if ((up->port.uartclk / quot) < (2400 * 16))
  689. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
  690. #ifdef CONFIG_SERIAL_8250_RSA
  691. else if (up->port.type == PORT_RSA)
  692. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
  693. #endif
  694. else
  695. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
  696. }
  697. if (up->port.type == PORT_16750)
  698. fcr |= UART_FCR7_64BYTE;
  699. /*
  700. * Ok, we're now changing the port state. Do it with
  701. * interrupts disabled.
  702. */
  703. spin_lock_irqsave(&up->port.lock, flags);
  704. /*
  705. * Update the per-port timeout.
  706. */
  707. uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
  708. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  709. if (iflag & INPCK)
  710. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  711. if (iflag & (BRKINT | PARMRK))
  712. up->port.read_status_mask |= UART_LSR_BI;
  713. /*
  714. * Characteres to ignore
  715. */
  716. up->port.ignore_status_mask = 0;
  717. if (iflag & IGNPAR)
  718. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  719. if (iflag & IGNBRK) {
  720. up->port.ignore_status_mask |= UART_LSR_BI;
  721. /*
  722. * If we're ignoring parity and break indicators,
  723. * ignore overruns too (for real raw support).
  724. */
  725. if (iflag & IGNPAR)
  726. up->port.ignore_status_mask |= UART_LSR_OE;
  727. }
  728. /*
  729. * ignore all characters if CREAD is not set
  730. */
  731. if ((cflag & CREAD) == 0)
  732. up->port.ignore_status_mask |= UART_LSR_DR;
  733. /*
  734. * CTS flow control flag and modem status interrupts
  735. */
  736. up->ier &= ~UART_IER_MSI;
  737. if (UART_ENABLE_MS(&up->port, cflag))
  738. up->ier |= UART_IER_MSI;
  739. serial_out(up, UART_IER, up->ier);
  740. if (uart_config[up->port.type].flags & UART_STARTECH) {
  741. serial_outp(up, UART_LCR, 0xBF);
  742. serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
  743. }
  744. serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  745. serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
  746. serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
  747. if (up->port.type == PORT_16750)
  748. serial_outp(up, UART_FCR, fcr); /* set fcr */
  749. serial_outp(up, UART_LCR, cval); /* reset DLAB */
  750. up->lcr = cval; /* Save LCR */
  751. if (up->port.type != PORT_16750) {
  752. if (fcr & UART_FCR_ENABLE_FIFO) {
  753. /* emulated UARTs (Lucent Venus 167x) need two steps */
  754. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  755. }
  756. serial_outp(up, UART_FCR, fcr); /* set fcr */
  757. }
  758. up->cflag = cflag;
  759. spin_unlock_irqrestore(&up->port.lock, flags);
  760. }
  761. static void
  762. sunsu_set_termios(struct uart_port *port, struct termios *termios,
  763. struct termios *old)
  764. {
  765. unsigned int baud, quot;
  766. /*
  767. * Ask the core to calculate the divisor for us.
  768. */
  769. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  770. quot = uart_get_divisor(port, baud);
  771. sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
  772. }
  773. static void sunsu_release_port(struct uart_port *port)
  774. {
  775. }
  776. static int sunsu_request_port(struct uart_port *port)
  777. {
  778. return 0;
  779. }
  780. static void sunsu_config_port(struct uart_port *port, int flags)
  781. {
  782. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  783. if (flags & UART_CONFIG_TYPE) {
  784. /*
  785. * We are supposed to call autoconfig here, but this requires
  786. * splitting all the OBP probing crap from the UART probing.
  787. * We'll do it when we kill sunsu.c altogether.
  788. */
  789. port->type = up->type_probed; /* XXX */
  790. }
  791. }
  792. static int
  793. sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
  794. {
  795. return -EINVAL;
  796. }
  797. static const char *
  798. sunsu_type(struct uart_port *port)
  799. {
  800. int type = port->type;
  801. if (type >= ARRAY_SIZE(uart_config))
  802. type = 0;
  803. return uart_config[type].name;
  804. }
  805. static struct uart_ops sunsu_pops = {
  806. .tx_empty = sunsu_tx_empty,
  807. .set_mctrl = sunsu_set_mctrl,
  808. .get_mctrl = sunsu_get_mctrl,
  809. .stop_tx = sunsu_stop_tx,
  810. .start_tx = sunsu_start_tx,
  811. .stop_rx = sunsu_stop_rx,
  812. .enable_ms = sunsu_enable_ms,
  813. .break_ctl = sunsu_break_ctl,
  814. .startup = sunsu_startup,
  815. .shutdown = sunsu_shutdown,
  816. .set_termios = sunsu_set_termios,
  817. .type = sunsu_type,
  818. .release_port = sunsu_release_port,
  819. .request_port = sunsu_request_port,
  820. .config_port = sunsu_config_port,
  821. .verify_port = sunsu_verify_port,
  822. };
  823. #define UART_NR 4
  824. static struct uart_sunsu_port sunsu_ports[UART_NR];
  825. #ifdef CONFIG_SERIO
  826. static DEFINE_SPINLOCK(sunsu_serio_lock);
  827. static int sunsu_serio_write(struct serio *serio, unsigned char ch)
  828. {
  829. struct uart_sunsu_port *up = serio->port_data;
  830. unsigned long flags;
  831. int lsr;
  832. spin_lock_irqsave(&sunsu_serio_lock, flags);
  833. do {
  834. lsr = serial_in(up, UART_LSR);
  835. } while (!(lsr & UART_LSR_THRE));
  836. /* Send the character out. */
  837. serial_out(up, UART_TX, ch);
  838. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  839. return 0;
  840. }
  841. static int sunsu_serio_open(struct serio *serio)
  842. {
  843. struct uart_sunsu_port *up = serio->port_data;
  844. unsigned long flags;
  845. int ret;
  846. spin_lock_irqsave(&sunsu_serio_lock, flags);
  847. if (!up->serio_open) {
  848. up->serio_open = 1;
  849. ret = 0;
  850. } else
  851. ret = -EBUSY;
  852. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  853. return ret;
  854. }
  855. static void sunsu_serio_close(struct serio *serio)
  856. {
  857. struct uart_sunsu_port *up = serio->port_data;
  858. unsigned long flags;
  859. spin_lock_irqsave(&sunsu_serio_lock, flags);
  860. up->serio_open = 0;
  861. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  862. }
  863. #endif /* CONFIG_SERIO */
  864. static void sunsu_autoconfig(struct uart_sunsu_port *up)
  865. {
  866. unsigned char status1, status2, scratch, scratch2, scratch3;
  867. unsigned char save_lcr, save_mcr;
  868. struct linux_ebus_device *dev = NULL;
  869. struct linux_ebus *ebus;
  870. #ifdef CONFIG_SPARC64
  871. struct sparc_isa_bridge *isa_br;
  872. struct sparc_isa_device *isa_dev;
  873. #endif
  874. #ifndef CONFIG_SPARC64
  875. struct linux_prom_registers reg0;
  876. #endif
  877. unsigned long flags;
  878. if (!up->port_node || !up->su_type)
  879. return;
  880. up->type_probed = PORT_UNKNOWN;
  881. up->port.iotype = UPIO_MEM;
  882. /*
  883. * First we look for Ebus-bases su's
  884. */
  885. for_each_ebus(ebus) {
  886. for_each_ebusdev(dev, ebus) {
  887. if (dev->prom_node == up->port_node) {
  888. /*
  889. * The EBus is broken on sparc; it delivers
  890. * virtual addresses in resources. Oh well...
  891. * This is correct on sparc64, though.
  892. */
  893. up->port.membase = (char *) dev->resource[0].start;
  894. /*
  895. * This is correct on both architectures.
  896. */
  897. up->port.mapbase = dev->resource[0].start;
  898. up->port.irq = dev->irqs[0];
  899. goto ebus_done;
  900. }
  901. }
  902. }
  903. #ifdef CONFIG_SPARC64
  904. for_each_isa(isa_br) {
  905. for_each_isadev(isa_dev, isa_br) {
  906. if (isa_dev->prom_node == up->port_node) {
  907. /* Same on sparc64. Cool architecure... */
  908. up->port.membase = (char *) isa_dev->resource.start;
  909. up->port.mapbase = isa_dev->resource.start;
  910. up->port.irq = isa_dev->irq;
  911. goto ebus_done;
  912. }
  913. }
  914. }
  915. #endif
  916. #ifdef CONFIG_SPARC64
  917. /*
  918. * Not on Ebus, bailing.
  919. */
  920. return;
  921. #else
  922. /*
  923. * Not on Ebus, must be OBIO.
  924. */
  925. if (prom_getproperty(up->port_node, "reg",
  926. (char *)&reg0, sizeof(reg0)) == -1) {
  927. prom_printf("sunsu: no \"reg\" property\n");
  928. return;
  929. }
  930. prom_apply_obio_ranges(&reg0, 1);
  931. if (reg0.which_io != 0) { /* Just in case... */
  932. prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
  933. reg0.which_io, reg0.phys_addr);
  934. return;
  935. }
  936. up->port.mapbase = reg0.phys_addr;
  937. if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
  938. prom_printf("sunsu: Cannot map registers.\n");
  939. return;
  940. }
  941. /*
  942. * 0x20 is sun4m thing, Dave Redman heritage.
  943. * See arch/sparc/kernel/irq.c.
  944. */
  945. #define IRQ_4M(n) ((n)|0x20)
  946. /*
  947. * There is no intr property on MrCoffee, so hardwire it.
  948. */
  949. up->port.irq = IRQ_4M(13);
  950. #endif
  951. ebus_done:
  952. spin_lock_irqsave(&up->port.lock, flags);
  953. if (!(up->port.flags & UPF_BUGGY_UART)) {
  954. /*
  955. * Do a simple existence test first; if we fail this, there's
  956. * no point trying anything else.
  957. *
  958. * 0x80 is used as a nonsense port to prevent against false
  959. * positives due to ISA bus float. The assumption is that
  960. * 0x80 is a non-existent port; which should be safe since
  961. * include/asm/io.h also makes this assumption.
  962. */
  963. scratch = serial_inp(up, UART_IER);
  964. serial_outp(up, UART_IER, 0);
  965. #ifdef __i386__
  966. outb(0xff, 0x080);
  967. #endif
  968. scratch2 = serial_inp(up, UART_IER);
  969. serial_outp(up, UART_IER, 0x0f);
  970. #ifdef __i386__
  971. outb(0, 0x080);
  972. #endif
  973. scratch3 = serial_inp(up, UART_IER);
  974. serial_outp(up, UART_IER, scratch);
  975. if (scratch2 != 0 || scratch3 != 0x0F)
  976. goto out; /* We failed; there's nothing here */
  977. }
  978. save_mcr = serial_in(up, UART_MCR);
  979. save_lcr = serial_in(up, UART_LCR);
  980. /*
  981. * Check to see if a UART is really there. Certain broken
  982. * internal modems based on the Rockwell chipset fail this
  983. * test, because they apparently don't implement the loopback
  984. * test mode. So this test is skipped on the COM 1 through
  985. * COM 4 ports. This *should* be safe, since no board
  986. * manufacturer would be stupid enough to design a board
  987. * that conflicts with COM 1-4 --- we hope!
  988. */
  989. if (!(up->port.flags & UPF_SKIP_TEST)) {
  990. serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
  991. status1 = serial_inp(up, UART_MSR) & 0xF0;
  992. serial_outp(up, UART_MCR, save_mcr);
  993. if (status1 != 0x90)
  994. goto out; /* We failed loopback test */
  995. }
  996. serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
  997. serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
  998. serial_outp(up, UART_LCR, 0);
  999. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  1000. scratch = serial_in(up, UART_IIR) >> 6;
  1001. switch (scratch) {
  1002. case 0:
  1003. up->port.type = PORT_16450;
  1004. break;
  1005. case 1:
  1006. up->port.type = PORT_UNKNOWN;
  1007. break;
  1008. case 2:
  1009. up->port.type = PORT_16550;
  1010. break;
  1011. case 3:
  1012. up->port.type = PORT_16550A;
  1013. break;
  1014. }
  1015. if (up->port.type == PORT_16550A) {
  1016. /* Check for Startech UART's */
  1017. serial_outp(up, UART_LCR, UART_LCR_DLAB);
  1018. if (serial_in(up, UART_EFR) == 0) {
  1019. up->port.type = PORT_16650;
  1020. } else {
  1021. serial_outp(up, UART_LCR, 0xBF);
  1022. if (serial_in(up, UART_EFR) == 0)
  1023. up->port.type = PORT_16650V2;
  1024. }
  1025. }
  1026. if (up->port.type == PORT_16550A) {
  1027. /* Check for TI 16750 */
  1028. serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
  1029. serial_outp(up, UART_FCR,
  1030. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  1031. scratch = serial_in(up, UART_IIR) >> 5;
  1032. if (scratch == 7) {
  1033. /*
  1034. * If this is a 16750, and not a cheap UART
  1035. * clone, then it should only go into 64 byte
  1036. * mode if the UART_FCR7_64BYTE bit was set
  1037. * while UART_LCR_DLAB was latched.
  1038. */
  1039. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  1040. serial_outp(up, UART_LCR, 0);
  1041. serial_outp(up, UART_FCR,
  1042. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  1043. scratch = serial_in(up, UART_IIR) >> 5;
  1044. if (scratch == 6)
  1045. up->port.type = PORT_16750;
  1046. }
  1047. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  1048. }
  1049. serial_outp(up, UART_LCR, save_lcr);
  1050. if (up->port.type == PORT_16450) {
  1051. scratch = serial_in(up, UART_SCR);
  1052. serial_outp(up, UART_SCR, 0xa5);
  1053. status1 = serial_in(up, UART_SCR);
  1054. serial_outp(up, UART_SCR, 0x5a);
  1055. status2 = serial_in(up, UART_SCR);
  1056. serial_outp(up, UART_SCR, scratch);
  1057. if ((status1 != 0xa5) || (status2 != 0x5a))
  1058. up->port.type = PORT_8250;
  1059. }
  1060. up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
  1061. if (up->port.type == PORT_UNKNOWN)
  1062. goto out;
  1063. up->type_probed = up->port.type; /* XXX */
  1064. /*
  1065. * Reset the UART.
  1066. */
  1067. #ifdef CONFIG_SERIAL_8250_RSA
  1068. if (up->port.type == PORT_RSA)
  1069. serial_outp(up, UART_RSA_FRR, 0);
  1070. #endif
  1071. serial_outp(up, UART_MCR, save_mcr);
  1072. serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
  1073. UART_FCR_CLEAR_RCVR |
  1074. UART_FCR_CLEAR_XMIT));
  1075. serial_outp(up, UART_FCR, 0);
  1076. (void)serial_in(up, UART_RX);
  1077. serial_outp(up, UART_IER, 0);
  1078. out:
  1079. spin_unlock_irqrestore(&up->port.lock, flags);
  1080. }
  1081. static struct uart_driver sunsu_reg = {
  1082. .owner = THIS_MODULE,
  1083. .driver_name = "serial",
  1084. .devfs_name = "tts/",
  1085. .dev_name = "ttyS",
  1086. .major = TTY_MAJOR,
  1087. };
  1088. static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel)
  1089. {
  1090. int quot, baud;
  1091. #ifdef CONFIG_SERIO
  1092. struct serio *serio;
  1093. #endif
  1094. spin_lock_init(&up->port.lock);
  1095. up->port.line = channel;
  1096. up->port.type = PORT_UNKNOWN;
  1097. up->port.uartclk = (SU_BASE_BAUD * 16);
  1098. if (up->su_type == SU_PORT_KBD) {
  1099. up->cflag = B1200 | CS8 | CLOCAL | CREAD;
  1100. baud = 1200;
  1101. } else {
  1102. up->cflag = B4800 | CS8 | CLOCAL | CREAD;
  1103. baud = 4800;
  1104. }
  1105. quot = up->port.uartclk / (16 * baud);
  1106. sunsu_autoconfig(up);
  1107. if (up->port.type == PORT_UNKNOWN)
  1108. return -1;
  1109. printk(KERN_INFO "su%d at 0x%p (irq = %s) is a %s\n",
  1110. channel,
  1111. up->port.membase, __irq_itoa(up->port.irq),
  1112. sunsu_type(&up->port));
  1113. #ifdef CONFIG_SERIO
  1114. up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
  1115. if (serio) {
  1116. memset(serio, 0, sizeof(*serio));
  1117. serio->port_data = up;
  1118. serio->id.type = SERIO_RS232;
  1119. if (up->su_type == SU_PORT_KBD) {
  1120. serio->id.proto = SERIO_SUNKBD;
  1121. strlcpy(serio->name, "sukbd", sizeof(serio->name));
  1122. } else {
  1123. serio->id.proto = SERIO_SUN;
  1124. serio->id.extra = 1;
  1125. strlcpy(serio->name, "sums", sizeof(serio->name));
  1126. }
  1127. strlcpy(serio->phys, (channel == 0 ? "su/serio0" : "su/serio1"),
  1128. sizeof(serio->phys));
  1129. serio->write = sunsu_serio_write;
  1130. serio->open = sunsu_serio_open;
  1131. serio->close = sunsu_serio_close;
  1132. serio_register_port(serio);
  1133. } else {
  1134. printk(KERN_WARNING "su%d: not enough memory for serio port\n",
  1135. channel);
  1136. }
  1137. #endif
  1138. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  1139. sunsu_startup(&up->port);
  1140. return 0;
  1141. }
  1142. /*
  1143. * ------------------------------------------------------------
  1144. * Serial console driver
  1145. * ------------------------------------------------------------
  1146. */
  1147. #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
  1148. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  1149. /*
  1150. * Wait for transmitter & holding register to empty
  1151. */
  1152. static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
  1153. {
  1154. unsigned int status, tmout = 10000;
  1155. /* Wait up to 10ms for the character(s) to be sent. */
  1156. do {
  1157. status = serial_in(up, UART_LSR);
  1158. if (status & UART_LSR_BI)
  1159. up->lsr_break_flag = UART_LSR_BI;
  1160. if (--tmout == 0)
  1161. break;
  1162. udelay(1);
  1163. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  1164. /* Wait up to 1s for flow control if necessary */
  1165. if (up->port.flags & UPF_CONS_FLOW) {
  1166. tmout = 1000000;
  1167. while (--tmout &&
  1168. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  1169. udelay(1);
  1170. }
  1171. }
  1172. static void sunsu_console_putchar(struct uart_port *port, int ch)
  1173. {
  1174. struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
  1175. wait_for_xmitr(up);
  1176. serial_out(up, UART_TX, ch);
  1177. }
  1178. /*
  1179. * Print a string to the serial port trying not to disturb
  1180. * any possible real use of the port...
  1181. */
  1182. static void sunsu_console_write(struct console *co, const char *s,
  1183. unsigned int count)
  1184. {
  1185. struct uart_sunsu_port *up = &sunsu_ports[co->index];
  1186. unsigned int ier;
  1187. /*
  1188. * First save the UER then disable the interrupts
  1189. */
  1190. ier = serial_in(up, UART_IER);
  1191. serial_out(up, UART_IER, 0);
  1192. uart_console_write(&up->port, s, count, sunsu_console_putchar);
  1193. /*
  1194. * Finally, wait for transmitter to become empty
  1195. * and restore the IER
  1196. */
  1197. wait_for_xmitr(up);
  1198. serial_out(up, UART_IER, ier);
  1199. }
  1200. /*
  1201. * Setup initial baud/bits/parity. We do two things here:
  1202. * - construct a cflag setting for the first su_open()
  1203. * - initialize the serial port
  1204. * Return non-zero if we didn't find a serial port.
  1205. */
  1206. static int sunsu_console_setup(struct console *co, char *options)
  1207. {
  1208. struct uart_port *port;
  1209. int baud = 9600;
  1210. int bits = 8;
  1211. int parity = 'n';
  1212. int flow = 'n';
  1213. printk("Console: ttyS%d (SU)\n",
  1214. (sunsu_reg.minor - 64) + co->index);
  1215. /*
  1216. * Check whether an invalid uart number has been specified, and
  1217. * if so, search for the first available port that does have
  1218. * console support.
  1219. */
  1220. if (co->index >= UART_NR)
  1221. co->index = 0;
  1222. port = &sunsu_ports[co->index].port;
  1223. /*
  1224. * Temporary fix.
  1225. */
  1226. spin_lock_init(&port->lock);
  1227. if (options)
  1228. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1229. return uart_set_options(port, co, baud, parity, bits, flow);
  1230. }
  1231. static struct console sunsu_cons = {
  1232. .name = "ttyS",
  1233. .write = sunsu_console_write,
  1234. .device = uart_console_device,
  1235. .setup = sunsu_console_setup,
  1236. .flags = CON_PRINTBUFFER,
  1237. .index = -1,
  1238. .data = &sunsu_reg,
  1239. };
  1240. /*
  1241. * Register console.
  1242. */
  1243. static inline struct console *SUNSU_CONSOLE(void)
  1244. {
  1245. int i;
  1246. if (con_is_present())
  1247. return NULL;
  1248. for (i = 0; i < UART_NR; i++) {
  1249. int this_minor = sunsu_reg.minor + i;
  1250. if ((this_minor - 64) == (serial_console - 1))
  1251. break;
  1252. }
  1253. if (i == UART_NR)
  1254. return NULL;
  1255. if (sunsu_ports[i].port_node == 0)
  1256. return NULL;
  1257. sunsu_cons.index = i;
  1258. return &sunsu_cons;
  1259. }
  1260. #else
  1261. #define SUNSU_CONSOLE() (NULL)
  1262. #define sunsu_serial_console_init() do { } while (0)
  1263. #endif
  1264. static int __init sunsu_serial_init(void)
  1265. {
  1266. int instance, ret, i;
  1267. /* How many instances do we need? */
  1268. instance = 0;
  1269. for (i = 0; i < UART_NR; i++) {
  1270. struct uart_sunsu_port *up = &sunsu_ports[i];
  1271. if (up->su_type == SU_PORT_MS ||
  1272. up->su_type == SU_PORT_KBD)
  1273. continue;
  1274. spin_lock_init(&up->port.lock);
  1275. up->port.flags |= UPF_BOOT_AUTOCONF;
  1276. up->port.type = PORT_UNKNOWN;
  1277. up->port.uartclk = (SU_BASE_BAUD * 16);
  1278. sunsu_autoconfig(up);
  1279. if (up->port.type == PORT_UNKNOWN)
  1280. continue;
  1281. up->port.line = instance++;
  1282. up->port.ops = &sunsu_pops;
  1283. }
  1284. sunsu_reg.minor = sunserial_current_minor;
  1285. sunsu_reg.nr = instance;
  1286. ret = uart_register_driver(&sunsu_reg);
  1287. if (ret < 0)
  1288. return ret;
  1289. sunsu_reg.tty_driver->name_base = sunsu_reg.minor - 64;
  1290. sunserial_current_minor += instance;
  1291. sunsu_reg.cons = SUNSU_CONSOLE();
  1292. for (i = 0; i < UART_NR; i++) {
  1293. struct uart_sunsu_port *up = &sunsu_ports[i];
  1294. /* Do not register Keyboard/Mouse lines with UART
  1295. * layer.
  1296. */
  1297. if (up->su_type == SU_PORT_MS ||
  1298. up->su_type == SU_PORT_KBD)
  1299. continue;
  1300. if (up->port.type == PORT_UNKNOWN)
  1301. continue;
  1302. uart_add_one_port(&sunsu_reg, &up->port);
  1303. }
  1304. return 0;
  1305. }
  1306. static int su_node_ok(int node, char *name, int namelen)
  1307. {
  1308. if (strncmp(name, "su", namelen) == 0 ||
  1309. strncmp(name, "su_pnp", namelen) == 0)
  1310. return 1;
  1311. if (strncmp(name, "serial", namelen) == 0) {
  1312. char compat[32];
  1313. int clen;
  1314. /* Is it _really_ a 'su' device? */
  1315. clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
  1316. if (clen > 0) {
  1317. if (strncmp(compat, "sab82532", 8) == 0) {
  1318. /* Nope, Siemens serial, not for us. */
  1319. return 0;
  1320. }
  1321. }
  1322. return 1;
  1323. }
  1324. return 0;
  1325. }
  1326. #define SU_PROPSIZE 128
  1327. /*
  1328. * Scan status structure.
  1329. * "prop" is a local variable but it eats stack to keep it in each
  1330. * stack frame of a recursive procedure.
  1331. */
  1332. struct su_probe_scan {
  1333. int msnode, kbnode; /* PROM nodes for mouse and keyboard */
  1334. int msx, kbx; /* minors for mouse and keyboard */
  1335. int devices; /* scan index */
  1336. char prop[SU_PROPSIZE];
  1337. };
  1338. /*
  1339. * We have several platforms which present 'su' in different parts
  1340. * of the device tree. 'su' may be found under obio, ebus, isa and pci.
  1341. * We walk over the tree and find them wherever PROM hides them.
  1342. */
  1343. static void __init su_probe_any(struct su_probe_scan *t, int sunode)
  1344. {
  1345. struct uart_sunsu_port *up;
  1346. int len;
  1347. if (t->devices >= UART_NR)
  1348. return;
  1349. for (; sunode != 0; sunode = prom_getsibling(sunode)) {
  1350. len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE);
  1351. if (len <= 1)
  1352. continue; /* Broken PROM node */
  1353. if (su_node_ok(sunode, t->prop, len)) {
  1354. up = &sunsu_ports[t->devices];
  1355. if (t->kbnode != 0 && sunode == t->kbnode) {
  1356. t->kbx = t->devices;
  1357. up->su_type = SU_PORT_KBD;
  1358. } else if (t->msnode != 0 && sunode == t->msnode) {
  1359. t->msx = t->devices;
  1360. up->su_type = SU_PORT_MS;
  1361. } else {
  1362. #ifdef CONFIG_SPARC64
  1363. /*
  1364. * Do not attempt to use the truncated
  1365. * keyboard/mouse ports as serial ports
  1366. * on Ultras with PC keyboard attached.
  1367. */
  1368. if (prom_getbool(sunode, "mouse"))
  1369. continue;
  1370. if (prom_getbool(sunode, "keyboard"))
  1371. continue;
  1372. #endif
  1373. up->su_type = SU_PORT_PORT;
  1374. }
  1375. up->port_node = sunode;
  1376. ++t->devices;
  1377. } else {
  1378. su_probe_any(t, prom_getchild(sunode));
  1379. }
  1380. }
  1381. }
  1382. static int __init sunsu_probe(void)
  1383. {
  1384. int node;
  1385. int len;
  1386. struct su_probe_scan scan;
  1387. /*
  1388. * First, we scan the tree.
  1389. */
  1390. scan.devices = 0;
  1391. scan.msx = -1;
  1392. scan.kbx = -1;
  1393. scan.kbnode = 0;
  1394. scan.msnode = 0;
  1395. /*
  1396. * Get the nodes for keyboard and mouse from 'aliases'...
  1397. */
  1398. node = prom_getchild(prom_root_node);
  1399. node = prom_searchsiblings(node, "aliases");
  1400. if (node != 0) {
  1401. len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
  1402. if (len > 0) {
  1403. scan.prop[len] = 0;
  1404. scan.kbnode = prom_finddevice(scan.prop);
  1405. }
  1406. len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE);
  1407. if (len > 0) {
  1408. scan.prop[len] = 0;
  1409. scan.msnode = prom_finddevice(scan.prop);
  1410. }
  1411. }
  1412. su_probe_any(&scan, prom_getchild(prom_root_node));
  1413. /*
  1414. * Second, we process the special case of keyboard and mouse.
  1415. *
  1416. * Currently if we got keyboard and mouse hooked to "su" ports
  1417. * we do not use any possible remaining "su" as a serial port.
  1418. * Thus, we ignore values of .msx and .kbx, then compact ports.
  1419. */
  1420. if (scan.msx != -1 && scan.kbx != -1) {
  1421. sunsu_ports[0].su_type = SU_PORT_MS;
  1422. sunsu_ports[0].port_node = scan.msnode;
  1423. sunsu_kbd_ms_init(&sunsu_ports[0], 0);
  1424. sunsu_ports[1].su_type = SU_PORT_KBD;
  1425. sunsu_ports[1].port_node = scan.kbnode;
  1426. sunsu_kbd_ms_init(&sunsu_ports[1], 1);
  1427. return 0;
  1428. }
  1429. if (scan.msx != -1 || scan.kbx != -1) {
  1430. printk("sunsu_probe: cannot match keyboard and mouse, confused\n");
  1431. return -ENODEV;
  1432. }
  1433. if (scan.devices == 0)
  1434. return -ENODEV;
  1435. /*
  1436. * Console must be initiated after the generic initialization.
  1437. */
  1438. sunsu_serial_init();
  1439. return 0;
  1440. }
  1441. static void __exit sunsu_exit(void)
  1442. {
  1443. int i, saw_uart;
  1444. saw_uart = 0;
  1445. for (i = 0; i < UART_NR; i++) {
  1446. struct uart_sunsu_port *up = &sunsu_ports[i];
  1447. if (up->su_type == SU_PORT_MS ||
  1448. up->su_type == SU_PORT_KBD) {
  1449. #ifdef CONFIG_SERIO
  1450. if (up->serio) {
  1451. serio_unregister_port(up->serio);
  1452. up->serio = NULL;
  1453. }
  1454. #endif
  1455. } else if (up->port.type != PORT_UNKNOWN) {
  1456. uart_remove_one_port(&sunsu_reg, &up->port);
  1457. saw_uart++;
  1458. }
  1459. }
  1460. if (saw_uart)
  1461. uart_unregister_driver(&sunsu_reg);
  1462. }
  1463. module_init(sunsu_probe);
  1464. module_exit(sunsu_exit);