pxa.c 20 KB

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  1. /*
  2. * linux/drivers/serial/pxa.c
  3. *
  4. * Based on drivers/serial/8250.c by Russell King.
  5. *
  6. * Author: Nicolas Pitre
  7. * Created: Feb 20, 2003
  8. * Copyright: (C) 2003 Monta Vista Software, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * Note 1: This driver is made separate from the already too overloaded
  16. * 8250.c because it needs some kirks of its own and that'll make it
  17. * easier to add DMA support.
  18. *
  19. * Note 2: I'm too sick of device allocation policies for serial ports.
  20. * If someone else wants to request an "official" allocation of major/minor
  21. * for this driver please be my guest. And don't forget that new hardware
  22. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  23. * hope for a better port registration and dynamic device allocation scheme
  24. * with the serial core maintainer satisfaction to appear soon.
  25. */
  26. #include <linux/config.h>
  27. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  28. #define SUPPORT_SYSRQ
  29. #endif
  30. #include <linux/module.h>
  31. #include <linux/ioport.h>
  32. #include <linux/init.h>
  33. #include <linux/console.h>
  34. #include <linux/sysrq.h>
  35. #include <linux/serial_reg.h>
  36. #include <linux/circ_buf.h>
  37. #include <linux/delay.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/platform_device.h>
  40. #include <linux/tty.h>
  41. #include <linux/tty_flip.h>
  42. #include <linux/serial_core.h>
  43. #include <asm/io.h>
  44. #include <asm/hardware.h>
  45. #include <asm/irq.h>
  46. #include <asm/arch/pxa-regs.h>
  47. struct uart_pxa_port {
  48. struct uart_port port;
  49. unsigned char ier;
  50. unsigned char lcr;
  51. unsigned char mcr;
  52. unsigned int lsr_break_flag;
  53. unsigned int cken;
  54. char *name;
  55. };
  56. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  57. {
  58. offset <<= 2;
  59. return readl(up->port.membase + offset);
  60. }
  61. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  62. {
  63. offset <<= 2;
  64. writel(value, up->port.membase + offset);
  65. }
  66. static void serial_pxa_enable_ms(struct uart_port *port)
  67. {
  68. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  69. up->ier |= UART_IER_MSI;
  70. serial_out(up, UART_IER, up->ier);
  71. }
  72. static void serial_pxa_stop_tx(struct uart_port *port)
  73. {
  74. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  75. if (up->ier & UART_IER_THRI) {
  76. up->ier &= ~UART_IER_THRI;
  77. serial_out(up, UART_IER, up->ier);
  78. }
  79. }
  80. static void serial_pxa_stop_rx(struct uart_port *port)
  81. {
  82. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  83. up->ier &= ~UART_IER_RLSI;
  84. up->port.read_status_mask &= ~UART_LSR_DR;
  85. serial_out(up, UART_IER, up->ier);
  86. }
  87. static inline void
  88. receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
  89. {
  90. struct tty_struct *tty = up->port.info->tty;
  91. unsigned int ch, flag;
  92. int max_count = 256;
  93. do {
  94. ch = serial_in(up, UART_RX);
  95. flag = TTY_NORMAL;
  96. up->port.icount.rx++;
  97. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  98. UART_LSR_FE | UART_LSR_OE))) {
  99. /*
  100. * For statistics only
  101. */
  102. if (*status & UART_LSR_BI) {
  103. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  104. up->port.icount.brk++;
  105. /*
  106. * We do the SysRQ and SAK checking
  107. * here because otherwise the break
  108. * may get masked by ignore_status_mask
  109. * or read_status_mask.
  110. */
  111. if (uart_handle_break(&up->port))
  112. goto ignore_char;
  113. } else if (*status & UART_LSR_PE)
  114. up->port.icount.parity++;
  115. else if (*status & UART_LSR_FE)
  116. up->port.icount.frame++;
  117. if (*status & UART_LSR_OE)
  118. up->port.icount.overrun++;
  119. /*
  120. * Mask off conditions which should be ignored.
  121. */
  122. *status &= up->port.read_status_mask;
  123. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  124. if (up->port.line == up->port.cons->index) {
  125. /* Recover the break flag from console xmit */
  126. *status |= up->lsr_break_flag;
  127. up->lsr_break_flag = 0;
  128. }
  129. #endif
  130. if (*status & UART_LSR_BI) {
  131. flag = TTY_BREAK;
  132. } else if (*status & UART_LSR_PE)
  133. flag = TTY_PARITY;
  134. else if (*status & UART_LSR_FE)
  135. flag = TTY_FRAME;
  136. }
  137. if (uart_handle_sysrq_char(&up->port, ch, regs))
  138. goto ignore_char;
  139. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  140. ignore_char:
  141. *status = serial_in(up, UART_LSR);
  142. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  143. tty_flip_buffer_push(tty);
  144. }
  145. static void transmit_chars(struct uart_pxa_port *up)
  146. {
  147. struct circ_buf *xmit = &up->port.info->xmit;
  148. int count;
  149. if (up->port.x_char) {
  150. serial_out(up, UART_TX, up->port.x_char);
  151. up->port.icount.tx++;
  152. up->port.x_char = 0;
  153. return;
  154. }
  155. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  156. serial_pxa_stop_tx(&up->port);
  157. return;
  158. }
  159. count = up->port.fifosize / 2;
  160. do {
  161. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  162. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  163. up->port.icount.tx++;
  164. if (uart_circ_empty(xmit))
  165. break;
  166. } while (--count > 0);
  167. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  168. uart_write_wakeup(&up->port);
  169. if (uart_circ_empty(xmit))
  170. serial_pxa_stop_tx(&up->port);
  171. }
  172. static void serial_pxa_start_tx(struct uart_port *port)
  173. {
  174. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  175. if (!(up->ier & UART_IER_THRI)) {
  176. up->ier |= UART_IER_THRI;
  177. serial_out(up, UART_IER, up->ier);
  178. }
  179. }
  180. static inline void check_modem_status(struct uart_pxa_port *up)
  181. {
  182. int status;
  183. status = serial_in(up, UART_MSR);
  184. if ((status & UART_MSR_ANY_DELTA) == 0)
  185. return;
  186. if (status & UART_MSR_TERI)
  187. up->port.icount.rng++;
  188. if (status & UART_MSR_DDSR)
  189. up->port.icount.dsr++;
  190. if (status & UART_MSR_DDCD)
  191. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  192. if (status & UART_MSR_DCTS)
  193. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  194. wake_up_interruptible(&up->port.info->delta_msr_wait);
  195. }
  196. /*
  197. * This handles the interrupt from one port.
  198. */
  199. static inline irqreturn_t
  200. serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
  201. {
  202. struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
  203. unsigned int iir, lsr;
  204. iir = serial_in(up, UART_IIR);
  205. if (iir & UART_IIR_NO_INT)
  206. return IRQ_NONE;
  207. lsr = serial_in(up, UART_LSR);
  208. if (lsr & UART_LSR_DR)
  209. receive_chars(up, &lsr, regs);
  210. check_modem_status(up);
  211. if (lsr & UART_LSR_THRE)
  212. transmit_chars(up);
  213. return IRQ_HANDLED;
  214. }
  215. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  216. {
  217. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  218. unsigned long flags;
  219. unsigned int ret;
  220. spin_lock_irqsave(&up->port.lock, flags);
  221. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  222. spin_unlock_irqrestore(&up->port.lock, flags);
  223. return ret;
  224. }
  225. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  226. {
  227. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  228. unsigned char status;
  229. unsigned int ret;
  230. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  231. status = serial_in(up, UART_MSR);
  232. ret = 0;
  233. if (status & UART_MSR_DCD)
  234. ret |= TIOCM_CAR;
  235. if (status & UART_MSR_RI)
  236. ret |= TIOCM_RNG;
  237. if (status & UART_MSR_DSR)
  238. ret |= TIOCM_DSR;
  239. if (status & UART_MSR_CTS)
  240. ret |= TIOCM_CTS;
  241. return ret;
  242. }
  243. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  244. {
  245. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  246. unsigned char mcr = 0;
  247. if (mctrl & TIOCM_RTS)
  248. mcr |= UART_MCR_RTS;
  249. if (mctrl & TIOCM_DTR)
  250. mcr |= UART_MCR_DTR;
  251. if (mctrl & TIOCM_OUT1)
  252. mcr |= UART_MCR_OUT1;
  253. if (mctrl & TIOCM_OUT2)
  254. mcr |= UART_MCR_OUT2;
  255. if (mctrl & TIOCM_LOOP)
  256. mcr |= UART_MCR_LOOP;
  257. mcr |= up->mcr;
  258. serial_out(up, UART_MCR, mcr);
  259. }
  260. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  261. {
  262. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  263. unsigned long flags;
  264. spin_lock_irqsave(&up->port.lock, flags);
  265. if (break_state == -1)
  266. up->lcr |= UART_LCR_SBC;
  267. else
  268. up->lcr &= ~UART_LCR_SBC;
  269. serial_out(up, UART_LCR, up->lcr);
  270. spin_unlock_irqrestore(&up->port.lock, flags);
  271. }
  272. #if 0
  273. static void serial_pxa_dma_init(struct pxa_uart *up)
  274. {
  275. up->rxdma =
  276. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
  277. if (up->rxdma < 0)
  278. goto out;
  279. up->txdma =
  280. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
  281. if (up->txdma < 0)
  282. goto err_txdma;
  283. up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
  284. if (!up->dmadesc)
  285. goto err_alloc;
  286. /* ... */
  287. err_alloc:
  288. pxa_free_dma(up->txdma);
  289. err_rxdma:
  290. pxa_free_dma(up->rxdma);
  291. out:
  292. return;
  293. }
  294. #endif
  295. static int serial_pxa_startup(struct uart_port *port)
  296. {
  297. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  298. unsigned long flags;
  299. int retval;
  300. if (port->line == 3) /* HWUART */
  301. up->mcr |= UART_MCR_AFE;
  302. else
  303. up->mcr = 0;
  304. /*
  305. * Allocate the IRQ
  306. */
  307. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  308. if (retval)
  309. return retval;
  310. /*
  311. * Clear the FIFO buffers and disable them.
  312. * (they will be reenabled in set_termios())
  313. */
  314. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  315. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  316. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  317. serial_out(up, UART_FCR, 0);
  318. /*
  319. * Clear the interrupt registers.
  320. */
  321. (void) serial_in(up, UART_LSR);
  322. (void) serial_in(up, UART_RX);
  323. (void) serial_in(up, UART_IIR);
  324. (void) serial_in(up, UART_MSR);
  325. /*
  326. * Now, initialize the UART
  327. */
  328. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  329. spin_lock_irqsave(&up->port.lock, flags);
  330. up->port.mctrl |= TIOCM_OUT2;
  331. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  332. spin_unlock_irqrestore(&up->port.lock, flags);
  333. /*
  334. * Finally, enable interrupts. Note: Modem status interrupts
  335. * are set via set_termios(), which will be occuring imminently
  336. * anyway, so we don't enable them here.
  337. */
  338. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  339. serial_out(up, UART_IER, up->ier);
  340. /*
  341. * And clear the interrupt registers again for luck.
  342. */
  343. (void) serial_in(up, UART_LSR);
  344. (void) serial_in(up, UART_RX);
  345. (void) serial_in(up, UART_IIR);
  346. (void) serial_in(up, UART_MSR);
  347. return 0;
  348. }
  349. static void serial_pxa_shutdown(struct uart_port *port)
  350. {
  351. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  352. unsigned long flags;
  353. free_irq(up->port.irq, up);
  354. /*
  355. * Disable interrupts from this port
  356. */
  357. up->ier = 0;
  358. serial_out(up, UART_IER, 0);
  359. spin_lock_irqsave(&up->port.lock, flags);
  360. up->port.mctrl &= ~TIOCM_OUT2;
  361. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  362. spin_unlock_irqrestore(&up->port.lock, flags);
  363. /*
  364. * Disable break condition and FIFOs
  365. */
  366. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  367. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  368. UART_FCR_CLEAR_RCVR |
  369. UART_FCR_CLEAR_XMIT);
  370. serial_out(up, UART_FCR, 0);
  371. }
  372. static void
  373. serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
  374. struct termios *old)
  375. {
  376. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  377. unsigned char cval, fcr = 0;
  378. unsigned long flags;
  379. unsigned int baud, quot;
  380. switch (termios->c_cflag & CSIZE) {
  381. case CS5:
  382. cval = UART_LCR_WLEN5;
  383. break;
  384. case CS6:
  385. cval = UART_LCR_WLEN6;
  386. break;
  387. case CS7:
  388. cval = UART_LCR_WLEN7;
  389. break;
  390. default:
  391. case CS8:
  392. cval = UART_LCR_WLEN8;
  393. break;
  394. }
  395. if (termios->c_cflag & CSTOPB)
  396. cval |= UART_LCR_STOP;
  397. if (termios->c_cflag & PARENB)
  398. cval |= UART_LCR_PARITY;
  399. if (!(termios->c_cflag & PARODD))
  400. cval |= UART_LCR_EPAR;
  401. /*
  402. * Ask the core to calculate the divisor for us.
  403. */
  404. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  405. quot = uart_get_divisor(port, baud);
  406. if ((up->port.uartclk / quot) < (2400 * 16))
  407. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  408. else if ((up->port.uartclk / quot) < (230400 * 16))
  409. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  410. else
  411. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
  412. /*
  413. * Ok, we're now changing the port state. Do it with
  414. * interrupts disabled.
  415. */
  416. spin_lock_irqsave(&up->port.lock, flags);
  417. /*
  418. * Ensure the port will be enabled.
  419. * This is required especially for serial console.
  420. */
  421. up->ier |= IER_UUE;
  422. /*
  423. * Update the per-port timeout.
  424. */
  425. uart_update_timeout(port, termios->c_cflag, baud);
  426. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  427. if (termios->c_iflag & INPCK)
  428. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  429. if (termios->c_iflag & (BRKINT | PARMRK))
  430. up->port.read_status_mask |= UART_LSR_BI;
  431. /*
  432. * Characters to ignore
  433. */
  434. up->port.ignore_status_mask = 0;
  435. if (termios->c_iflag & IGNPAR)
  436. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  437. if (termios->c_iflag & IGNBRK) {
  438. up->port.ignore_status_mask |= UART_LSR_BI;
  439. /*
  440. * If we're ignoring parity and break indicators,
  441. * ignore overruns too (for real raw support).
  442. */
  443. if (termios->c_iflag & IGNPAR)
  444. up->port.ignore_status_mask |= UART_LSR_OE;
  445. }
  446. /*
  447. * ignore all characters if CREAD is not set
  448. */
  449. if ((termios->c_cflag & CREAD) == 0)
  450. up->port.ignore_status_mask |= UART_LSR_DR;
  451. /*
  452. * CTS flow control flag and modem status interrupts
  453. */
  454. up->ier &= ~UART_IER_MSI;
  455. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  456. up->ier |= UART_IER_MSI;
  457. serial_out(up, UART_IER, up->ier);
  458. serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  459. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  460. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  461. serial_out(up, UART_LCR, cval); /* reset DLAB */
  462. up->lcr = cval; /* Save LCR */
  463. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  464. serial_out(up, UART_FCR, fcr);
  465. spin_unlock_irqrestore(&up->port.lock, flags);
  466. }
  467. static void
  468. serial_pxa_pm(struct uart_port *port, unsigned int state,
  469. unsigned int oldstate)
  470. {
  471. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  472. pxa_set_cken(up->cken, !state);
  473. if (!state)
  474. udelay(1);
  475. }
  476. static void serial_pxa_release_port(struct uart_port *port)
  477. {
  478. }
  479. static int serial_pxa_request_port(struct uart_port *port)
  480. {
  481. return 0;
  482. }
  483. static void serial_pxa_config_port(struct uart_port *port, int flags)
  484. {
  485. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  486. up->port.type = PORT_PXA;
  487. }
  488. static int
  489. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  490. {
  491. /* we don't want the core code to modify any port params */
  492. return -EINVAL;
  493. }
  494. static const char *
  495. serial_pxa_type(struct uart_port *port)
  496. {
  497. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  498. return up->name;
  499. }
  500. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  501. static struct uart_pxa_port serial_pxa_ports[];
  502. static struct uart_driver serial_pxa_reg;
  503. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  504. /*
  505. * Wait for transmitter & holding register to empty
  506. */
  507. static inline void wait_for_xmitr(struct uart_pxa_port *up)
  508. {
  509. unsigned int status, tmout = 10000;
  510. /* Wait up to 10ms for the character(s) to be sent. */
  511. do {
  512. status = serial_in(up, UART_LSR);
  513. if (status & UART_LSR_BI)
  514. up->lsr_break_flag = UART_LSR_BI;
  515. if (--tmout == 0)
  516. break;
  517. udelay(1);
  518. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  519. /* Wait up to 1s for flow control if necessary */
  520. if (up->port.flags & UPF_CONS_FLOW) {
  521. tmout = 1000000;
  522. while (--tmout &&
  523. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  524. udelay(1);
  525. }
  526. }
  527. static void serial_pxa_console_putchar(struct uart_port *port, int ch)
  528. {
  529. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  530. wait_for_xmitr(up);
  531. serial_out(up, UART_TX, ch);
  532. }
  533. /*
  534. * Print a string to the serial port trying not to disturb
  535. * any possible real use of the port...
  536. *
  537. * The console_lock must be held when we get here.
  538. */
  539. static void
  540. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  541. {
  542. struct uart_pxa_port *up = &serial_pxa_ports[co->index];
  543. unsigned int ier;
  544. /*
  545. * First save the IER then disable the interrupts
  546. */
  547. ier = serial_in(up, UART_IER);
  548. serial_out(up, UART_IER, UART_IER_UUE);
  549. uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
  550. /*
  551. * Finally, wait for transmitter to become empty
  552. * and restore the IER
  553. */
  554. wait_for_xmitr(up);
  555. serial_out(up, UART_IER, ier);
  556. }
  557. static int __init
  558. serial_pxa_console_setup(struct console *co, char *options)
  559. {
  560. struct uart_pxa_port *up;
  561. int baud = 9600;
  562. int bits = 8;
  563. int parity = 'n';
  564. int flow = 'n';
  565. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  566. co->index = 0;
  567. up = &serial_pxa_ports[co->index];
  568. if (options)
  569. uart_parse_options(options, &baud, &parity, &bits, &flow);
  570. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  571. }
  572. static struct console serial_pxa_console = {
  573. .name = "ttyS",
  574. .write = serial_pxa_console_write,
  575. .device = uart_console_device,
  576. .setup = serial_pxa_console_setup,
  577. .flags = CON_PRINTBUFFER,
  578. .index = -1,
  579. .data = &serial_pxa_reg,
  580. };
  581. static int __init
  582. serial_pxa_console_init(void)
  583. {
  584. register_console(&serial_pxa_console);
  585. return 0;
  586. }
  587. console_initcall(serial_pxa_console_init);
  588. #define PXA_CONSOLE &serial_pxa_console
  589. #else
  590. #define PXA_CONSOLE NULL
  591. #endif
  592. struct uart_ops serial_pxa_pops = {
  593. .tx_empty = serial_pxa_tx_empty,
  594. .set_mctrl = serial_pxa_set_mctrl,
  595. .get_mctrl = serial_pxa_get_mctrl,
  596. .stop_tx = serial_pxa_stop_tx,
  597. .start_tx = serial_pxa_start_tx,
  598. .stop_rx = serial_pxa_stop_rx,
  599. .enable_ms = serial_pxa_enable_ms,
  600. .break_ctl = serial_pxa_break_ctl,
  601. .startup = serial_pxa_startup,
  602. .shutdown = serial_pxa_shutdown,
  603. .set_termios = serial_pxa_set_termios,
  604. .pm = serial_pxa_pm,
  605. .type = serial_pxa_type,
  606. .release_port = serial_pxa_release_port,
  607. .request_port = serial_pxa_request_port,
  608. .config_port = serial_pxa_config_port,
  609. .verify_port = serial_pxa_verify_port,
  610. };
  611. static struct uart_pxa_port serial_pxa_ports[] = {
  612. { /* FFUART */
  613. .name = "FFUART",
  614. .cken = CKEN6_FFUART,
  615. .port = {
  616. .type = PORT_PXA,
  617. .iotype = UPIO_MEM,
  618. .membase = (void *)&FFUART,
  619. .mapbase = __PREG(FFUART),
  620. .irq = IRQ_FFUART,
  621. .uartclk = 921600 * 16,
  622. .fifosize = 64,
  623. .ops = &serial_pxa_pops,
  624. .line = 0,
  625. },
  626. }, { /* BTUART */
  627. .name = "BTUART",
  628. .cken = CKEN7_BTUART,
  629. .port = {
  630. .type = PORT_PXA,
  631. .iotype = UPIO_MEM,
  632. .membase = (void *)&BTUART,
  633. .mapbase = __PREG(BTUART),
  634. .irq = IRQ_BTUART,
  635. .uartclk = 921600 * 16,
  636. .fifosize = 64,
  637. .ops = &serial_pxa_pops,
  638. .line = 1,
  639. },
  640. }, { /* STUART */
  641. .name = "STUART",
  642. .cken = CKEN5_STUART,
  643. .port = {
  644. .type = PORT_PXA,
  645. .iotype = UPIO_MEM,
  646. .membase = (void *)&STUART,
  647. .mapbase = __PREG(STUART),
  648. .irq = IRQ_STUART,
  649. .uartclk = 921600 * 16,
  650. .fifosize = 64,
  651. .ops = &serial_pxa_pops,
  652. .line = 2,
  653. },
  654. }, { /* HWUART */
  655. .name = "HWUART",
  656. .cken = CKEN4_HWUART,
  657. .port = {
  658. .type = PORT_PXA,
  659. .iotype = UPIO_MEM,
  660. .membase = (void *)&HWUART,
  661. .mapbase = __PREG(HWUART),
  662. .irq = IRQ_HWUART,
  663. .uartclk = 921600 * 16,
  664. .fifosize = 64,
  665. .ops = &serial_pxa_pops,
  666. .line = 3,
  667. },
  668. }
  669. };
  670. static struct uart_driver serial_pxa_reg = {
  671. .owner = THIS_MODULE,
  672. .driver_name = "PXA serial",
  673. .devfs_name = "tts/",
  674. .dev_name = "ttyS",
  675. .major = TTY_MAJOR,
  676. .minor = 64,
  677. .nr = ARRAY_SIZE(serial_pxa_ports),
  678. .cons = PXA_CONSOLE,
  679. };
  680. static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state)
  681. {
  682. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  683. if (sport)
  684. uart_suspend_port(&serial_pxa_reg, &sport->port);
  685. return 0;
  686. }
  687. static int serial_pxa_resume(struct platform_device *dev)
  688. {
  689. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  690. if (sport)
  691. uart_resume_port(&serial_pxa_reg, &sport->port);
  692. return 0;
  693. }
  694. static int serial_pxa_probe(struct platform_device *dev)
  695. {
  696. serial_pxa_ports[dev->id].port.dev = &dev->dev;
  697. uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
  698. platform_set_drvdata(dev, &serial_pxa_ports[dev->id]);
  699. return 0;
  700. }
  701. static int serial_pxa_remove(struct platform_device *dev)
  702. {
  703. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  704. platform_set_drvdata(dev, NULL);
  705. if (sport)
  706. uart_remove_one_port(&serial_pxa_reg, &sport->port);
  707. return 0;
  708. }
  709. static struct platform_driver serial_pxa_driver = {
  710. .probe = serial_pxa_probe,
  711. .remove = serial_pxa_remove,
  712. .suspend = serial_pxa_suspend,
  713. .resume = serial_pxa_resume,
  714. .driver = {
  715. .name = "pxa2xx-uart",
  716. },
  717. };
  718. int __init serial_pxa_init(void)
  719. {
  720. int ret;
  721. ret = uart_register_driver(&serial_pxa_reg);
  722. if (ret != 0)
  723. return ret;
  724. ret = platform_driver_register(&serial_pxa_driver);
  725. if (ret != 0)
  726. uart_unregister_driver(&serial_pxa_reg);
  727. return ret;
  728. }
  729. void __exit serial_pxa_exit(void)
  730. {
  731. platform_driver_unregister(&serial_pxa_driver);
  732. uart_unregister_driver(&serial_pxa_reg);
  733. }
  734. module_init(serial_pxa_init);
  735. module_exit(serial_pxa_exit);
  736. MODULE_LICENSE("GPL");