amba-pl010.c 18 KB

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  1. /*
  2. * linux/drivers/char/amba.c
  3. *
  4. * Driver for AMBA serial ports
  5. *
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * Copyright 1999 ARM Limited
  9. * Copyright (C) 2000 Deep Blue Solutions Ltd.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $
  26. *
  27. * This is a generic driver for ARM AMBA-type serial ports. They
  28. * have a lot of 16550-like features, but are not register compatible.
  29. * Note that although they do have CTS, DCD and DSR inputs, they do
  30. * not have an RI input, nor do they have DTR or RTS outputs. If
  31. * required, these have to be supplied via some other means (eg, GPIO)
  32. * and hooked into this driver.
  33. */
  34. #include <linux/config.h>
  35. #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  36. #define SUPPORT_SYSRQ
  37. #endif
  38. #include <linux/module.h>
  39. #include <linux/ioport.h>
  40. #include <linux/init.h>
  41. #include <linux/console.h>
  42. #include <linux/sysrq.h>
  43. #include <linux/device.h>
  44. #include <linux/tty.h>
  45. #include <linux/tty_flip.h>
  46. #include <linux/serial_core.h>
  47. #include <linux/serial.h>
  48. #include <linux/amba/bus.h>
  49. #include <linux/amba/serial.h>
  50. #include <asm/io.h>
  51. #define UART_NR 2
  52. #define SERIAL_AMBA_MAJOR 204
  53. #define SERIAL_AMBA_MINOR 16
  54. #define SERIAL_AMBA_NR UART_NR
  55. #define AMBA_ISR_PASS_LIMIT 256
  56. #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
  57. #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
  58. #define UART_DUMMY_RSR_RX 256
  59. #define UART_PORT_SIZE 64
  60. /*
  61. * We wrap our port structure around the generic uart_port.
  62. */
  63. struct uart_amba_port {
  64. struct uart_port port;
  65. struct amba_device *dev;
  66. struct amba_pl010_data *data;
  67. unsigned int old_status;
  68. };
  69. static void pl010_stop_tx(struct uart_port *port)
  70. {
  71. unsigned int cr;
  72. cr = readb(port->membase + UART010_CR);
  73. cr &= ~UART010_CR_TIE;
  74. writel(cr, port->membase + UART010_CR);
  75. }
  76. static void pl010_start_tx(struct uart_port *port)
  77. {
  78. unsigned int cr;
  79. cr = readb(port->membase + UART010_CR);
  80. cr |= UART010_CR_TIE;
  81. writel(cr, port->membase + UART010_CR);
  82. }
  83. static void pl010_stop_rx(struct uart_port *port)
  84. {
  85. unsigned int cr;
  86. cr = readb(port->membase + UART010_CR);
  87. cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
  88. writel(cr, port->membase + UART010_CR);
  89. }
  90. static void pl010_enable_ms(struct uart_port *port)
  91. {
  92. unsigned int cr;
  93. cr = readb(port->membase + UART010_CR);
  94. cr |= UART010_CR_MSIE;
  95. writel(cr, port->membase + UART010_CR);
  96. }
  97. static void
  98. #ifdef SUPPORT_SYSRQ
  99. pl010_rx_chars(struct uart_port *port, struct pt_regs *regs)
  100. #else
  101. pl010_rx_chars(struct uart_port *port)
  102. #endif
  103. {
  104. struct tty_struct *tty = port->info->tty;
  105. unsigned int status, ch, flag, rsr, max_count = 256;
  106. status = readb(port->membase + UART01x_FR);
  107. while (UART_RX_DATA(status) && max_count--) {
  108. ch = readb(port->membase + UART01x_DR);
  109. flag = TTY_NORMAL;
  110. port->icount.rx++;
  111. /*
  112. * Note that the error handling code is
  113. * out of the main execution path
  114. */
  115. rsr = readb(port->membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
  116. if (unlikely(rsr & UART01x_RSR_ANY)) {
  117. if (rsr & UART01x_RSR_BE) {
  118. rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
  119. port->icount.brk++;
  120. if (uart_handle_break(port))
  121. goto ignore_char;
  122. } else if (rsr & UART01x_RSR_PE)
  123. port->icount.parity++;
  124. else if (rsr & UART01x_RSR_FE)
  125. port->icount.frame++;
  126. if (rsr & UART01x_RSR_OE)
  127. port->icount.overrun++;
  128. rsr &= port->read_status_mask;
  129. if (rsr & UART01x_RSR_BE)
  130. flag = TTY_BREAK;
  131. else if (rsr & UART01x_RSR_PE)
  132. flag = TTY_PARITY;
  133. else if (rsr & UART01x_RSR_FE)
  134. flag = TTY_FRAME;
  135. }
  136. if (uart_handle_sysrq_char(port, ch, regs))
  137. goto ignore_char;
  138. uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag);
  139. ignore_char:
  140. status = readb(port->membase + UART01x_FR);
  141. }
  142. tty_flip_buffer_push(tty);
  143. return;
  144. }
  145. static void pl010_tx_chars(struct uart_port *port)
  146. {
  147. struct circ_buf *xmit = &port->info->xmit;
  148. int count;
  149. if (port->x_char) {
  150. writel(port->x_char, port->membase + UART01x_DR);
  151. port->icount.tx++;
  152. port->x_char = 0;
  153. return;
  154. }
  155. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  156. pl010_stop_tx(port);
  157. return;
  158. }
  159. count = port->fifosize >> 1;
  160. do {
  161. writel(xmit->buf[xmit->tail], port->membase + UART01x_DR);
  162. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  163. port->icount.tx++;
  164. if (uart_circ_empty(xmit))
  165. break;
  166. } while (--count > 0);
  167. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  168. uart_write_wakeup(port);
  169. if (uart_circ_empty(xmit))
  170. pl010_stop_tx(port);
  171. }
  172. static void pl010_modem_status(struct uart_port *port)
  173. {
  174. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  175. unsigned int status, delta;
  176. writel(0, uap->port.membase + UART010_ICR);
  177. status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
  178. delta = status ^ uap->old_status;
  179. uap->old_status = status;
  180. if (!delta)
  181. return;
  182. if (delta & UART01x_FR_DCD)
  183. uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
  184. if (delta & UART01x_FR_DSR)
  185. uap->port.icount.dsr++;
  186. if (delta & UART01x_FR_CTS)
  187. uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
  188. wake_up_interruptible(&uap->port.info->delta_msr_wait);
  189. }
  190. static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs)
  191. {
  192. struct uart_port *port = dev_id;
  193. unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
  194. int handled = 0;
  195. spin_lock(&port->lock);
  196. status = readb(port->membase + UART010_IIR);
  197. if (status) {
  198. do {
  199. if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
  200. #ifdef SUPPORT_SYSRQ
  201. pl010_rx_chars(port, regs);
  202. #else
  203. pl010_rx_chars(port);
  204. #endif
  205. if (status & UART010_IIR_MIS)
  206. pl010_modem_status(port);
  207. if (status & UART010_IIR_TIS)
  208. pl010_tx_chars(port);
  209. if (pass_counter-- == 0)
  210. break;
  211. status = readb(port->membase + UART010_IIR);
  212. } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
  213. UART010_IIR_TIS));
  214. handled = 1;
  215. }
  216. spin_unlock(&port->lock);
  217. return IRQ_RETVAL(handled);
  218. }
  219. static unsigned int pl010_tx_empty(struct uart_port *port)
  220. {
  221. return readb(port->membase + UART01x_FR) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
  222. }
  223. static unsigned int pl010_get_mctrl(struct uart_port *port)
  224. {
  225. unsigned int result = 0;
  226. unsigned int status;
  227. status = readb(port->membase + UART01x_FR);
  228. if (status & UART01x_FR_DCD)
  229. result |= TIOCM_CAR;
  230. if (status & UART01x_FR_DSR)
  231. result |= TIOCM_DSR;
  232. if (status & UART01x_FR_CTS)
  233. result |= TIOCM_CTS;
  234. return result;
  235. }
  236. static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
  237. {
  238. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  239. if (uap->data)
  240. uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
  241. }
  242. static void pl010_break_ctl(struct uart_port *port, int break_state)
  243. {
  244. unsigned long flags;
  245. unsigned int lcr_h;
  246. spin_lock_irqsave(&port->lock, flags);
  247. lcr_h = readb(port->membase + UART010_LCRH);
  248. if (break_state == -1)
  249. lcr_h |= UART01x_LCRH_BRK;
  250. else
  251. lcr_h &= ~UART01x_LCRH_BRK;
  252. writel(lcr_h, port->membase + UART010_LCRH);
  253. spin_unlock_irqrestore(&port->lock, flags);
  254. }
  255. static int pl010_startup(struct uart_port *port)
  256. {
  257. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  258. int retval;
  259. /*
  260. * Allocate the IRQ
  261. */
  262. retval = request_irq(port->irq, pl010_int, 0, "uart-pl010", port);
  263. if (retval)
  264. return retval;
  265. /*
  266. * initialise the old status of the modem signals
  267. */
  268. uap->old_status = readb(port->membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
  269. /*
  270. * Finally, enable interrupts
  271. */
  272. writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
  273. port->membase + UART010_CR);
  274. return 0;
  275. }
  276. static void pl010_shutdown(struct uart_port *port)
  277. {
  278. /*
  279. * Free the interrupt
  280. */
  281. free_irq(port->irq, port);
  282. /*
  283. * disable all interrupts, disable the port
  284. */
  285. writel(0, port->membase + UART010_CR);
  286. /* disable break condition and fifos */
  287. writel(readb(port->membase + UART010_LCRH) &
  288. ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
  289. port->membase + UART010_LCRH);
  290. }
  291. static void
  292. pl010_set_termios(struct uart_port *port, struct termios *termios,
  293. struct termios *old)
  294. {
  295. unsigned int lcr_h, old_cr;
  296. unsigned long flags;
  297. unsigned int baud, quot;
  298. /*
  299. * Ask the core to calculate the divisor for us.
  300. */
  301. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  302. quot = uart_get_divisor(port, baud);
  303. switch (termios->c_cflag & CSIZE) {
  304. case CS5:
  305. lcr_h = UART01x_LCRH_WLEN_5;
  306. break;
  307. case CS6:
  308. lcr_h = UART01x_LCRH_WLEN_6;
  309. break;
  310. case CS7:
  311. lcr_h = UART01x_LCRH_WLEN_7;
  312. break;
  313. default: // CS8
  314. lcr_h = UART01x_LCRH_WLEN_8;
  315. break;
  316. }
  317. if (termios->c_cflag & CSTOPB)
  318. lcr_h |= UART01x_LCRH_STP2;
  319. if (termios->c_cflag & PARENB) {
  320. lcr_h |= UART01x_LCRH_PEN;
  321. if (!(termios->c_cflag & PARODD))
  322. lcr_h |= UART01x_LCRH_EPS;
  323. }
  324. if (port->fifosize > 1)
  325. lcr_h |= UART01x_LCRH_FEN;
  326. spin_lock_irqsave(&port->lock, flags);
  327. /*
  328. * Update the per-port timeout.
  329. */
  330. uart_update_timeout(port, termios->c_cflag, baud);
  331. port->read_status_mask = UART01x_RSR_OE;
  332. if (termios->c_iflag & INPCK)
  333. port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
  334. if (termios->c_iflag & (BRKINT | PARMRK))
  335. port->read_status_mask |= UART01x_RSR_BE;
  336. /*
  337. * Characters to ignore
  338. */
  339. port->ignore_status_mask = 0;
  340. if (termios->c_iflag & IGNPAR)
  341. port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
  342. if (termios->c_iflag & IGNBRK) {
  343. port->ignore_status_mask |= UART01x_RSR_BE;
  344. /*
  345. * If we're ignoring parity and break indicators,
  346. * ignore overruns too (for real raw support).
  347. */
  348. if (termios->c_iflag & IGNPAR)
  349. port->ignore_status_mask |= UART01x_RSR_OE;
  350. }
  351. /*
  352. * Ignore all characters if CREAD is not set.
  353. */
  354. if ((termios->c_cflag & CREAD) == 0)
  355. port->ignore_status_mask |= UART_DUMMY_RSR_RX;
  356. /* first, disable everything */
  357. old_cr = readb(port->membase + UART010_CR) & ~UART010_CR_MSIE;
  358. if (UART_ENABLE_MS(port, termios->c_cflag))
  359. old_cr |= UART010_CR_MSIE;
  360. writel(0, port->membase + UART010_CR);
  361. /* Set baud rate */
  362. quot -= 1;
  363. writel((quot & 0xf00) >> 8, port->membase + UART010_LCRM);
  364. writel(quot & 0xff, port->membase + UART010_LCRL);
  365. /*
  366. * ----------v----------v----------v----------v-----
  367. * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
  368. * ----------^----------^----------^----------^-----
  369. */
  370. writel(lcr_h, port->membase + UART010_LCRH);
  371. writel(old_cr, port->membase + UART010_CR);
  372. spin_unlock_irqrestore(&port->lock, flags);
  373. }
  374. static const char *pl010_type(struct uart_port *port)
  375. {
  376. return port->type == PORT_AMBA ? "AMBA" : NULL;
  377. }
  378. /*
  379. * Release the memory region(s) being used by 'port'
  380. */
  381. static void pl010_release_port(struct uart_port *port)
  382. {
  383. release_mem_region(port->mapbase, UART_PORT_SIZE);
  384. }
  385. /*
  386. * Request the memory region(s) being used by 'port'
  387. */
  388. static int pl010_request_port(struct uart_port *port)
  389. {
  390. return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
  391. != NULL ? 0 : -EBUSY;
  392. }
  393. /*
  394. * Configure/autoconfigure the port.
  395. */
  396. static void pl010_config_port(struct uart_port *port, int flags)
  397. {
  398. if (flags & UART_CONFIG_TYPE) {
  399. port->type = PORT_AMBA;
  400. pl010_request_port(port);
  401. }
  402. }
  403. /*
  404. * verify the new serial_struct (for TIOCSSERIAL).
  405. */
  406. static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
  407. {
  408. int ret = 0;
  409. if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
  410. ret = -EINVAL;
  411. if (ser->irq < 0 || ser->irq >= NR_IRQS)
  412. ret = -EINVAL;
  413. if (ser->baud_base < 9600)
  414. ret = -EINVAL;
  415. return ret;
  416. }
  417. static struct uart_ops amba_pl010_pops = {
  418. .tx_empty = pl010_tx_empty,
  419. .set_mctrl = pl010_set_mctrl,
  420. .get_mctrl = pl010_get_mctrl,
  421. .stop_tx = pl010_stop_tx,
  422. .start_tx = pl010_start_tx,
  423. .stop_rx = pl010_stop_rx,
  424. .enable_ms = pl010_enable_ms,
  425. .break_ctl = pl010_break_ctl,
  426. .startup = pl010_startup,
  427. .shutdown = pl010_shutdown,
  428. .set_termios = pl010_set_termios,
  429. .type = pl010_type,
  430. .release_port = pl010_release_port,
  431. .request_port = pl010_request_port,
  432. .config_port = pl010_config_port,
  433. .verify_port = pl010_verify_port,
  434. };
  435. static struct uart_amba_port *amba_ports[UART_NR];
  436. #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
  437. static void pl010_console_putchar(struct uart_port *port, int ch)
  438. {
  439. unsigned int status;
  440. do {
  441. status = readb(port->membase + UART01x_FR);
  442. barrier();
  443. } while (!UART_TX_READY(status));
  444. writel(ch, port->membase + UART01x_DR);
  445. }
  446. static void
  447. pl010_console_write(struct console *co, const char *s, unsigned int count)
  448. {
  449. struct uart_port *port = &amba_ports[co->index]->port;
  450. unsigned int status, old_cr;
  451. /*
  452. * First save the CR then disable the interrupts
  453. */
  454. old_cr = readb(port->membase + UART010_CR);
  455. writel(UART01x_CR_UARTEN, port->membase + UART010_CR);
  456. uart_console_write(port, s, count, pl010_console_putchar);
  457. /*
  458. * Finally, wait for transmitter to become empty
  459. * and restore the TCR
  460. */
  461. do {
  462. status = readb(port->membase + UART01x_FR);
  463. barrier();
  464. } while (status & UART01x_FR_BUSY);
  465. writel(old_cr, port->membase + UART010_CR);
  466. }
  467. static void __init
  468. pl010_console_get_options(struct uart_port *port, int *baud,
  469. int *parity, int *bits)
  470. {
  471. if (readb(port->membase + UART010_CR) & UART01x_CR_UARTEN) {
  472. unsigned int lcr_h, quot;
  473. lcr_h = readb(port->membase + UART010_LCRH);
  474. *parity = 'n';
  475. if (lcr_h & UART01x_LCRH_PEN) {
  476. if (lcr_h & UART01x_LCRH_EPS)
  477. *parity = 'e';
  478. else
  479. *parity = 'o';
  480. }
  481. if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
  482. *bits = 7;
  483. else
  484. *bits = 8;
  485. quot = readb(port->membase + UART010_LCRL) | readb(port->membase + UART010_LCRM) << 8;
  486. *baud = port->uartclk / (16 * (quot + 1));
  487. }
  488. }
  489. static int __init pl010_console_setup(struct console *co, char *options)
  490. {
  491. struct uart_port *port;
  492. int baud = 38400;
  493. int bits = 8;
  494. int parity = 'n';
  495. int flow = 'n';
  496. /*
  497. * Check whether an invalid uart number has been specified, and
  498. * if so, search for the first available port that does have
  499. * console support.
  500. */
  501. if (co->index >= UART_NR)
  502. co->index = 0;
  503. port = &amba_ports[co->index]->port;
  504. if (options)
  505. uart_parse_options(options, &baud, &parity, &bits, &flow);
  506. else
  507. pl010_console_get_options(port, &baud, &parity, &bits);
  508. return uart_set_options(port, co, baud, parity, bits, flow);
  509. }
  510. static struct uart_driver amba_reg;
  511. static struct console amba_console = {
  512. .name = "ttyAM",
  513. .write = pl010_console_write,
  514. .device = uart_console_device,
  515. .setup = pl010_console_setup,
  516. .flags = CON_PRINTBUFFER,
  517. .index = -1,
  518. .data = &amba_reg,
  519. };
  520. #define AMBA_CONSOLE &amba_console
  521. #else
  522. #define AMBA_CONSOLE NULL
  523. #endif
  524. static struct uart_driver amba_reg = {
  525. .owner = THIS_MODULE,
  526. .driver_name = "ttyAM",
  527. .dev_name = "ttyAM",
  528. .major = SERIAL_AMBA_MAJOR,
  529. .minor = SERIAL_AMBA_MINOR,
  530. .nr = UART_NR,
  531. .cons = AMBA_CONSOLE,
  532. };
  533. static int pl010_probe(struct amba_device *dev, void *id)
  534. {
  535. struct uart_amba_port *port;
  536. void __iomem *base;
  537. int i, ret;
  538. for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
  539. if (amba_ports[i] == NULL)
  540. break;
  541. if (i == ARRAY_SIZE(amba_ports)) {
  542. ret = -EBUSY;
  543. goto out;
  544. }
  545. port = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
  546. if (!port) {
  547. ret = -ENOMEM;
  548. goto out;
  549. }
  550. base = ioremap(dev->res.start, PAGE_SIZE);
  551. if (!base) {
  552. ret = -ENOMEM;
  553. goto free;
  554. }
  555. port->port.dev = &dev->dev;
  556. port->port.mapbase = dev->res.start;
  557. port->port.membase = base;
  558. port->port.iotype = UPIO_MEM;
  559. port->port.irq = dev->irq[0];
  560. port->port.uartclk = 14745600;
  561. port->port.fifosize = 16;
  562. port->port.ops = &amba_pl010_pops;
  563. port->port.flags = UPF_BOOT_AUTOCONF;
  564. port->port.line = i;
  565. port->dev = dev;
  566. port->data = dev->dev.platform_data;
  567. amba_ports[i] = port;
  568. amba_set_drvdata(dev, port);
  569. ret = uart_add_one_port(&amba_reg, &port->port);
  570. if (ret) {
  571. amba_set_drvdata(dev, NULL);
  572. amba_ports[i] = NULL;
  573. iounmap(base);
  574. free:
  575. kfree(port);
  576. }
  577. out:
  578. return ret;
  579. }
  580. static int pl010_remove(struct amba_device *dev)
  581. {
  582. struct uart_amba_port *port = amba_get_drvdata(dev);
  583. int i;
  584. amba_set_drvdata(dev, NULL);
  585. uart_remove_one_port(&amba_reg, &port->port);
  586. for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
  587. if (amba_ports[i] == port)
  588. amba_ports[i] = NULL;
  589. iounmap(port->port.membase);
  590. kfree(port);
  591. return 0;
  592. }
  593. static int pl010_suspend(struct amba_device *dev, pm_message_t state)
  594. {
  595. struct uart_amba_port *uap = amba_get_drvdata(dev);
  596. if (uap)
  597. uart_suspend_port(&amba_reg, &uap->port);
  598. return 0;
  599. }
  600. static int pl010_resume(struct amba_device *dev)
  601. {
  602. struct uart_amba_port *uap = amba_get_drvdata(dev);
  603. if (uap)
  604. uart_resume_port(&amba_reg, &uap->port);
  605. return 0;
  606. }
  607. static struct amba_id pl010_ids[] __initdata = {
  608. {
  609. .id = 0x00041010,
  610. .mask = 0x000fffff,
  611. },
  612. { 0, 0 },
  613. };
  614. static struct amba_driver pl010_driver = {
  615. .drv = {
  616. .name = "uart-pl010",
  617. },
  618. .id_table = pl010_ids,
  619. .probe = pl010_probe,
  620. .remove = pl010_remove,
  621. .suspend = pl010_suspend,
  622. .resume = pl010_resume,
  623. };
  624. static int __init pl010_init(void)
  625. {
  626. int ret;
  627. printk(KERN_INFO "Serial: AMBA driver $Revision: 1.41 $\n");
  628. ret = uart_register_driver(&amba_reg);
  629. if (ret == 0) {
  630. ret = amba_driver_register(&pl010_driver);
  631. if (ret)
  632. uart_unregister_driver(&amba_reg);
  633. }
  634. return ret;
  635. }
  636. static void __exit pl010_exit(void)
  637. {
  638. amba_driver_unregister(&pl010_driver);
  639. uart_unregister_driver(&amba_reg);
  640. }
  641. module_init(pl010_init);
  642. module_exit(pl010_exit);
  643. MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
  644. MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $");
  645. MODULE_LICENSE("GPL");