sym53c416.c 27 KB

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  1. /*
  2. * sym53c416.c
  3. * Low-level SCSI driver for sym53c416 chip.
  4. * Copyright (C) 1998 Lieven Willems (lw_linux@hotmail.com)
  5. *
  6. * Changes :
  7. *
  8. * Marcelo Tosatti <marcelo@conectiva.com.br> : Added io_request_lock locking
  9. * Alan Cox <alan@redhat.com> : Cleaned up code formatting
  10. * Fixed an irq locking bug
  11. * Added ISAPnP support
  12. * Bjoern A. Zeeb <bzeeb@zabbadoz.net> : Initial irq locking updates
  13. * Added another card with ISAPnP support
  14. *
  15. * LILO command line usage: sym53c416=<PORTBASE>[,<IRQ>]
  16. *
  17. * This program is free software; you can redistribute it and/or modify it
  18. * under the terms of the GNU General Public License as published by the
  19. * Free Software Foundation; either version 2, or (at your option) any
  20. * later version.
  21. *
  22. * This program is distributed in the hope that it will be useful, but
  23. * WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  25. * General Public License for more details.
  26. *
  27. */
  28. #include <linux/module.h>
  29. #include <linux/kernel.h>
  30. #include <linux/types.h>
  31. #include <linux/init.h>
  32. #include <linux/string.h>
  33. #include <linux/ioport.h>
  34. #include <linux/sched.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/delay.h>
  37. #include <linux/proc_fs.h>
  38. #include <linux/spinlock.h>
  39. #include <asm/dma.h>
  40. #include <asm/system.h>
  41. #include <asm/io.h>
  42. #include <linux/blkdev.h>
  43. #include <linux/isapnp.h>
  44. #include "scsi.h"
  45. #include <scsi/scsi_host.h>
  46. #include "sym53c416.h"
  47. #define VERSION_STRING "Version 1.0.0-ac"
  48. #define TC_LOW 0x00 /* Transfer counter low */
  49. #define TC_MID 0x01 /* Transfer counter mid */
  50. #define SCSI_FIFO 0x02 /* SCSI FIFO register */
  51. #define COMMAND_REG 0x03 /* Command Register */
  52. #define STATUS_REG 0x04 /* Status Register (READ) */
  53. #define DEST_BUS_ID 0x04 /* Destination Bus ID (WRITE) */
  54. #define INT_REG 0x05 /* Interrupt Register (READ) */
  55. #define TOM 0x05 /* Time out multiplier (WRITE) */
  56. #define STP 0x06 /* Synchronous Transfer period */
  57. #define SYNC_OFFSET 0x07 /* Synchronous Offset */
  58. #define CONF_REG_1 0x08 /* Configuration register 1 */
  59. #define CONF_REG_2 0x0B /* Configuration register 2 */
  60. #define CONF_REG_3 0x0C /* Configuration register 3 */
  61. #define CONF_REG_4 0x0D /* Configuration register 4 */
  62. #define TC_HIGH 0x0E /* Transfer counter high */
  63. #define PIO_FIFO_1 0x10 /* PIO FIFO register 1 */
  64. #define PIO_FIFO_2 0x11 /* PIO FIFO register 2 */
  65. #define PIO_FIFO_3 0x12 /* PIO FIFO register 3 */
  66. #define PIO_FIFO_4 0x13 /* PIO FIFO register 4 */
  67. #define PIO_FIFO_CNT 0x14 /* PIO FIFO count */
  68. #define PIO_INT_REG 0x15 /* PIO interrupt register */
  69. #define CONF_REG_5 0x16 /* Configuration register 5 */
  70. #define FEATURE_EN 0x1D /* Feature Enable register */
  71. /* Configuration register 1 entries: */
  72. /* Bits 2-0: SCSI ID of host adapter */
  73. #define SCM 0x80 /* Slow Cable Mode */
  74. #define SRID 0x40 /* SCSI Reset Interrupt Disable */
  75. #define PTM 0x20 /* Parity Test Mode */
  76. #define EPC 0x10 /* Enable Parity Checking */
  77. #define CTME 0x08 /* Special Test Mode */
  78. /* Configuration register 2 entries: */
  79. #define FE 0x40 /* Features Enable */
  80. #define SCSI2 0x08 /* SCSI 2 Enable */
  81. #define TBPA 0x04 /* Target Bad Parity Abort */
  82. /* Configuration register 3 entries: */
  83. #define IDMRC 0x80 /* ID Message Reserved Check */
  84. #define QTE 0x40 /* Queue Tag Enable */
  85. #define CDB10 0x20 /* Command Descriptor Block 10 */
  86. #define FSCSI 0x10 /* FastSCSI */
  87. #define FCLK 0x08 /* FastClock */
  88. /* Configuration register 4 entries: */
  89. #define RBS 0x08 /* Register bank select */
  90. #define EAN 0x04 /* Enable Active Negotiation */
  91. /* Configuration register 5 entries: */
  92. #define LPSR 0x80 /* Lower Power SCSI Reset */
  93. #define IE 0x20 /* Interrupt Enable */
  94. #define LPM 0x02 /* Low Power Mode */
  95. #define WSE0 0x01 /* 0WS Enable */
  96. /* Interrupt register entries: */
  97. #define SRST 0x80 /* SCSI Reset */
  98. #define ILCMD 0x40 /* Illegal Command */
  99. #define DIS 0x20 /* Disconnect */
  100. #define BS 0x10 /* Bus Service */
  101. #define FC 0x08 /* Function Complete */
  102. #define RESEL 0x04 /* Reselected */
  103. #define SI 0x03 /* Selection Interrupt */
  104. /* Status Register Entries: */
  105. #define SCI 0x80 /* SCSI Core Int */
  106. #define GE 0x40 /* Gross Error */
  107. #define PE 0x20 /* Parity Error */
  108. #define TC 0x10 /* Terminal Count */
  109. #define VGC 0x08 /* Valid Group Code */
  110. #define PHBITS 0x07 /* Phase bits */
  111. /* PIO Interrupt Register Entries: */
  112. #define SCI 0x80 /* SCSI Core Int */
  113. #define PFI 0x40 /* PIO FIFO Interrupt */
  114. #define FULL 0x20 /* PIO FIFO Full */
  115. #define EMPTY 0x10 /* PIO FIFO Empty */
  116. #define CE 0x08 /* Collision Error */
  117. #define OUE 0x04 /* Overflow / Underflow error */
  118. #define FIE 0x02 /* Full Interrupt Enable */
  119. #define EIE 0x01 /* Empty Interrupt Enable */
  120. /* SYM53C416 SCSI phases (lower 3 bits of SYM53C416_STATUS_REG) */
  121. #define PHASE_DATA_OUT 0x00
  122. #define PHASE_DATA_IN 0x01
  123. #define PHASE_COMMAND 0x02
  124. #define PHASE_STATUS 0x03
  125. #define PHASE_RESERVED_1 0x04
  126. #define PHASE_RESERVED_2 0x05
  127. #define PHASE_MESSAGE_OUT 0x06
  128. #define PHASE_MESSAGE_IN 0x07
  129. /* SYM53C416 core commands */
  130. #define NOOP 0x00
  131. #define FLUSH_FIFO 0x01
  132. #define RESET_CHIP 0x02
  133. #define RESET_SCSI_BUS 0x03
  134. #define DISABLE_SEL_RESEL 0x45
  135. #define RESEL_SEQ 0x40
  136. #define SEL_WITHOUT_ATN_SEQ 0x41
  137. #define SEL_WITH_ATN_SEQ 0x42
  138. #define SEL_WITH_ATN_AND_STOP_SEQ 0x43
  139. #define ENABLE_SEL_RESEL 0x44
  140. #define SEL_WITH_ATN3_SEQ 0x46
  141. #define RESEL3_SEQ 0x47
  142. #define SND_MSG 0x20
  143. #define SND_STAT 0x21
  144. #define SND_DATA 0x22
  145. #define DISCONNECT_SEQ 0x23
  146. #define TERMINATE_SEQ 0x24
  147. #define TARGET_COMM_COMPLETE_SEQ 0x25
  148. #define DISCONN 0x27
  149. #define RECV_MSG_SEQ 0x28
  150. #define RECV_CMD 0x29
  151. #define RECV_DATA 0x2A
  152. #define RECV_CMD_SEQ 0x2B
  153. #define TARGET_ABORT_PIO 0x04
  154. #define TRANSFER_INFORMATION 0x10
  155. #define INIT_COMM_COMPLETE_SEQ 0x11
  156. #define MSG_ACCEPTED 0x12
  157. #define TRANSFER_PAD 0x18
  158. #define SET_ATN 0x1A
  159. #define RESET_ATN 0x1B
  160. #define ILLEGAL 0xFF
  161. #define PIO_MODE 0x80
  162. #define IO_RANGE 0x20 /* 0x00 - 0x1F */
  163. #define ID "sym53c416" /* Attention: copied to the sym53c416.h */
  164. #define PIO_SIZE 128 /* Size of PIO fifo is 128 bytes */
  165. #define READ_TIMEOUT 150
  166. #define WRITE_TIMEOUT 150
  167. #ifdef MODULE
  168. #define sym53c416_base sym53c416
  169. #define sym53c416_base_1 sym53c416_1
  170. #define sym53c416_base_2 sym53c416_2
  171. #define sym53c416_base_3 sym53c416_3
  172. static unsigned int sym53c416_base[2] = {0,0};
  173. static unsigned int sym53c416_base_1[2] = {0,0};
  174. static unsigned int sym53c416_base_2[2] = {0,0};
  175. static unsigned int sym53c416_base_3[2] = {0,0};
  176. #endif
  177. #define MAXHOSTS 4
  178. #define SG_ADDRESS(buffer) ((char *) (page_address((buffer)->page)+(buffer)->offset))
  179. enum phases
  180. {
  181. idle,
  182. data_out,
  183. data_in,
  184. command_ph,
  185. status_ph,
  186. message_out,
  187. message_in
  188. };
  189. typedef struct
  190. {
  191. int base;
  192. int irq;
  193. int scsi_id;
  194. } host;
  195. static host hosts[MAXHOSTS] = {
  196. {0, 0, SYM53C416_SCSI_ID},
  197. {0, 0, SYM53C416_SCSI_ID},
  198. {0, 0, SYM53C416_SCSI_ID},
  199. {0, 0, SYM53C416_SCSI_ID}
  200. };
  201. static int host_index = 0;
  202. static char info[120];
  203. static Scsi_Cmnd *current_command = NULL;
  204. static int fastpio = 1;
  205. static int probeaddrs[] = {0x200, 0x220, 0x240, 0};
  206. static void sym53c416_set_transfer_counter(int base, unsigned int len)
  207. {
  208. /* Program Transfer Counter */
  209. outb(len & 0x0000FF, base + TC_LOW);
  210. outb((len & 0x00FF00) >> 8, base + TC_MID);
  211. outb((len & 0xFF0000) >> 16, base + TC_HIGH);
  212. }
  213. static DEFINE_SPINLOCK(sym53c416_lock);
  214. /* Returns the number of bytes read */
  215. static __inline__ unsigned int sym53c416_read(int base, unsigned char *buffer, unsigned int len)
  216. {
  217. unsigned int orig_len = len;
  218. unsigned long flags = 0;
  219. unsigned int bytes_left;
  220. unsigned long i;
  221. int timeout = READ_TIMEOUT;
  222. /* Do transfer */
  223. spin_lock_irqsave(&sym53c416_lock, flags);
  224. while(len && timeout)
  225. {
  226. bytes_left = inb(base + PIO_FIFO_CNT); /* Number of bytes in the PIO FIFO */
  227. if(fastpio && bytes_left > 3)
  228. {
  229. insl(base + PIO_FIFO_1, buffer, bytes_left >> 2);
  230. buffer += bytes_left & 0xFC;
  231. len -= bytes_left & 0xFC;
  232. }
  233. else if(bytes_left > 0)
  234. {
  235. len -= bytes_left;
  236. for(; bytes_left > 0; bytes_left--)
  237. *(buffer++) = inb(base + PIO_FIFO_1);
  238. }
  239. else
  240. {
  241. i = jiffies + timeout;
  242. spin_unlock_irqrestore(&sym53c416_lock, flags);
  243. while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & EMPTY) && timeout)
  244. if(inb(base + PIO_INT_REG) & SCI)
  245. timeout = 0;
  246. spin_lock_irqsave(&sym53c416_lock, flags);
  247. if(inb(base + PIO_INT_REG) & EMPTY)
  248. timeout = 0;
  249. }
  250. }
  251. spin_unlock_irqrestore(&sym53c416_lock, flags);
  252. return orig_len - len;
  253. }
  254. /* Returns the number of bytes written */
  255. static __inline__ unsigned int sym53c416_write(int base, unsigned char *buffer, unsigned int len)
  256. {
  257. unsigned int orig_len = len;
  258. unsigned long flags = 0;
  259. unsigned int bufferfree;
  260. unsigned long i;
  261. unsigned int timeout = WRITE_TIMEOUT;
  262. /* Do transfer */
  263. spin_lock_irqsave(&sym53c416_lock, flags);
  264. while(len && timeout)
  265. {
  266. bufferfree = PIO_SIZE - inb(base + PIO_FIFO_CNT);
  267. if(bufferfree > len)
  268. bufferfree = len;
  269. if(fastpio && bufferfree > 3)
  270. {
  271. outsl(base + PIO_FIFO_1, buffer, bufferfree >> 2);
  272. buffer += bufferfree & 0xFC;
  273. len -= bufferfree & 0xFC;
  274. }
  275. else if(bufferfree > 0)
  276. {
  277. len -= bufferfree;
  278. for(; bufferfree > 0; bufferfree--)
  279. outb(*(buffer++), base + PIO_FIFO_1);
  280. }
  281. else
  282. {
  283. i = jiffies + timeout;
  284. spin_unlock_irqrestore(&sym53c416_lock, flags);
  285. while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & FULL) && timeout)
  286. ;
  287. spin_lock_irqsave(&sym53c416_lock, flags);
  288. if(inb(base + PIO_INT_REG) & FULL)
  289. timeout = 0;
  290. }
  291. }
  292. spin_unlock_irqrestore(&sym53c416_lock, flags);
  293. return orig_len - len;
  294. }
  295. static irqreturn_t sym53c416_intr_handle(int irq, void *dev_id,
  296. struct pt_regs *regs)
  297. {
  298. struct Scsi_Host *dev = dev_id;
  299. int base = 0;
  300. int i;
  301. unsigned long flags = 0;
  302. unsigned char status_reg, pio_int_reg, int_reg;
  303. struct scatterlist *sglist;
  304. unsigned int sgcount;
  305. unsigned int tot_trans = 0;
  306. /* We search the base address of the host adapter which caused the interrupt */
  307. /* FIXME: should pass dev_id sensibly as hosts[i] */
  308. for(i = 0; i < host_index && !base; i++)
  309. if(irq == hosts[i].irq)
  310. base = hosts[i].base;
  311. /* If no adapter found, we cannot handle the interrupt. Leave a message */
  312. /* and continue. This should never happen... */
  313. if(!base)
  314. {
  315. printk(KERN_ERR "sym53c416: No host adapter defined for interrupt %d\n", irq);
  316. return IRQ_NONE;
  317. }
  318. /* Now we have the base address and we can start handling the interrupt */
  319. spin_lock_irqsave(dev->host_lock,flags);
  320. status_reg = inb(base + STATUS_REG);
  321. pio_int_reg = inb(base + PIO_INT_REG);
  322. int_reg = inb(base + INT_REG);
  323. spin_unlock_irqrestore(dev->host_lock, flags);
  324. /* First, we handle error conditions */
  325. if(int_reg & SCI) /* SCSI Reset */
  326. {
  327. printk(KERN_DEBUG "sym53c416: Reset received\n");
  328. current_command->SCp.phase = idle;
  329. current_command->result = DID_RESET << 16;
  330. spin_lock_irqsave(dev->host_lock, flags);
  331. current_command->scsi_done(current_command);
  332. spin_unlock_irqrestore(dev->host_lock, flags);
  333. goto out;
  334. }
  335. if(int_reg & ILCMD) /* Illegal Command */
  336. {
  337. printk(KERN_WARNING "sym53c416: Illegal Command: 0x%02x.\n", inb(base + COMMAND_REG));
  338. current_command->SCp.phase = idle;
  339. current_command->result = DID_ERROR << 16;
  340. spin_lock_irqsave(dev->host_lock, flags);
  341. current_command->scsi_done(current_command);
  342. spin_unlock_irqrestore(dev->host_lock, flags);
  343. goto out;
  344. }
  345. if(status_reg & GE) /* Gross Error */
  346. {
  347. printk(KERN_WARNING "sym53c416: Controller reports gross error.\n");
  348. current_command->SCp.phase = idle;
  349. current_command->result = DID_ERROR << 16;
  350. spin_lock_irqsave(dev->host_lock, flags);
  351. current_command->scsi_done(current_command);
  352. spin_unlock_irqrestore(dev->host_lock, flags);
  353. goto out;
  354. }
  355. if(status_reg & PE) /* Parity Error */
  356. {
  357. printk(KERN_WARNING "sym53c416:SCSI parity error.\n");
  358. current_command->SCp.phase = idle;
  359. current_command->result = DID_PARITY << 16;
  360. spin_lock_irqsave(dev->host_lock, flags);
  361. current_command->scsi_done(current_command);
  362. spin_unlock_irqrestore(dev->host_lock, flags);
  363. goto out;
  364. }
  365. if(pio_int_reg & (CE | OUE))
  366. {
  367. printk(KERN_WARNING "sym53c416: PIO interrupt error.\n");
  368. current_command->SCp.phase = idle;
  369. current_command->result = DID_ERROR << 16;
  370. spin_lock_irqsave(dev->host_lock, flags);
  371. current_command->scsi_done(current_command);
  372. spin_unlock_irqrestore(dev->host_lock, flags);
  373. goto out;
  374. }
  375. if(int_reg & DIS) /* Disconnect */
  376. {
  377. if(current_command->SCp.phase != message_in)
  378. current_command->result = DID_NO_CONNECT << 16;
  379. else
  380. current_command->result = (current_command->SCp.Status & 0xFF) | ((current_command->SCp.Message & 0xFF) << 8) | (DID_OK << 16);
  381. current_command->SCp.phase = idle;
  382. spin_lock_irqsave(dev->host_lock, flags);
  383. current_command->scsi_done(current_command);
  384. spin_unlock_irqrestore(dev->host_lock, flags);
  385. goto out;
  386. }
  387. /* Now we handle SCSI phases */
  388. switch(status_reg & PHBITS) /* Filter SCSI phase out of status reg */
  389. {
  390. case PHASE_DATA_OUT:
  391. {
  392. if(int_reg & BS)
  393. {
  394. current_command->SCp.phase = data_out;
  395. outb(FLUSH_FIFO, base + COMMAND_REG);
  396. sym53c416_set_transfer_counter(base, current_command->request_bufflen);
  397. outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG);
  398. if(!current_command->use_sg)
  399. tot_trans = sym53c416_write(base, current_command->request_buffer, current_command->request_bufflen);
  400. else
  401. {
  402. sgcount = current_command->use_sg;
  403. sglist = current_command->request_buffer;
  404. while(sgcount--)
  405. {
  406. tot_trans += sym53c416_write(base, SG_ADDRESS(sglist), sglist->length);
  407. sglist++;
  408. }
  409. }
  410. if(tot_trans < current_command->underflow)
  411. printk(KERN_WARNING "sym53c416: Underflow, wrote %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow);
  412. }
  413. break;
  414. }
  415. case PHASE_DATA_IN:
  416. {
  417. if(int_reg & BS)
  418. {
  419. current_command->SCp.phase = data_in;
  420. outb(FLUSH_FIFO, base + COMMAND_REG);
  421. sym53c416_set_transfer_counter(base, current_command->request_bufflen);
  422. outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG);
  423. if(!current_command->use_sg)
  424. tot_trans = sym53c416_read(base, current_command->request_buffer, current_command->request_bufflen);
  425. else
  426. {
  427. sgcount = current_command->use_sg;
  428. sglist = current_command->request_buffer;
  429. while(sgcount--)
  430. {
  431. tot_trans += sym53c416_read(base, SG_ADDRESS(sglist), sglist->length);
  432. sglist++;
  433. }
  434. }
  435. if(tot_trans < current_command->underflow)
  436. printk(KERN_WARNING "sym53c416: Underflow, read %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow);
  437. }
  438. break;
  439. }
  440. case PHASE_COMMAND:
  441. {
  442. current_command->SCp.phase = command_ph;
  443. printk(KERN_ERR "sym53c416: Unknown interrupt in command phase.\n");
  444. break;
  445. }
  446. case PHASE_STATUS:
  447. {
  448. current_command->SCp.phase = status_ph;
  449. outb(FLUSH_FIFO, base + COMMAND_REG);
  450. outb(INIT_COMM_COMPLETE_SEQ, base + COMMAND_REG);
  451. break;
  452. }
  453. case PHASE_RESERVED_1:
  454. case PHASE_RESERVED_2:
  455. {
  456. printk(KERN_ERR "sym53c416: Reserved phase occurred.\n");
  457. break;
  458. }
  459. case PHASE_MESSAGE_OUT:
  460. {
  461. current_command->SCp.phase = message_out;
  462. outb(SET_ATN, base + COMMAND_REG);
  463. outb(MSG_ACCEPTED, base + COMMAND_REG);
  464. break;
  465. }
  466. case PHASE_MESSAGE_IN:
  467. {
  468. current_command->SCp.phase = message_in;
  469. current_command->SCp.Status = inb(base + SCSI_FIFO);
  470. current_command->SCp.Message = inb(base + SCSI_FIFO);
  471. if(current_command->SCp.Message == SAVE_POINTERS || current_command->SCp.Message == DISCONNECT)
  472. outb(SET_ATN, base + COMMAND_REG);
  473. outb(MSG_ACCEPTED, base + COMMAND_REG);
  474. break;
  475. }
  476. }
  477. out:
  478. return IRQ_HANDLED;
  479. }
  480. static void sym53c416_init(int base, int scsi_id)
  481. {
  482. outb(RESET_CHIP, base + COMMAND_REG);
  483. outb(NOOP, base + COMMAND_REG);
  484. outb(0x99, base + TOM); /* Time out of 250 ms */
  485. outb(0x05, base + STP);
  486. outb(0x00, base + SYNC_OFFSET);
  487. outb(EPC | scsi_id, base + CONF_REG_1);
  488. outb(FE | SCSI2 | TBPA, base + CONF_REG_2);
  489. outb(IDMRC | QTE | CDB10 | FSCSI | FCLK, base + CONF_REG_3);
  490. outb(0x83 | EAN, base + CONF_REG_4);
  491. outb(IE | WSE0, base + CONF_REG_5);
  492. outb(0, base + FEATURE_EN);
  493. }
  494. static int sym53c416_probeirq(int base, int scsi_id)
  495. {
  496. int irq, irqs;
  497. unsigned long i;
  498. /* Clear interrupt register */
  499. inb(base + INT_REG);
  500. /* Start probing for irq's */
  501. irqs = probe_irq_on();
  502. /* Reinit chip */
  503. sym53c416_init(base, scsi_id);
  504. /* Cause interrupt */
  505. outb(NOOP, base + COMMAND_REG);
  506. outb(ILLEGAL, base + COMMAND_REG);
  507. outb(0x07, base + DEST_BUS_ID);
  508. outb(0x00, base + DEST_BUS_ID);
  509. /* Wait for interrupt to occur */
  510. i = jiffies + 20;
  511. while(time_before(jiffies, i) && !(inb(base + STATUS_REG) & SCI))
  512. barrier();
  513. if(time_before_eq(i, jiffies)) /* timed out */
  514. return 0;
  515. /* Get occurred irq */
  516. irq = probe_irq_off(irqs);
  517. sym53c416_init(base, scsi_id);
  518. return irq;
  519. }
  520. /* Setup: sym53c416=base,irq */
  521. void sym53c416_setup(char *str, int *ints)
  522. {
  523. int i;
  524. if(host_index >= MAXHOSTS)
  525. {
  526. printk(KERN_WARNING "sym53c416: Too many hosts defined\n");
  527. return;
  528. }
  529. if(ints[0] < 1 || ints[0] > 2)
  530. {
  531. printk(KERN_ERR "sym53c416: Wrong number of parameters:\n");
  532. printk(KERN_ERR "sym53c416: usage: sym53c416=<base>[,<irq>]\n");
  533. return;
  534. }
  535. for(i = 0; i < host_index && i >= 0; i++)
  536. if(hosts[i].base == ints[1])
  537. i = -2;
  538. if(i >= 0)
  539. {
  540. hosts[host_index].base = ints[1];
  541. hosts[host_index].irq = (ints[0] == 2)? ints[2] : 0;
  542. host_index++;
  543. }
  544. }
  545. static int sym53c416_test(int base)
  546. {
  547. outb(RESET_CHIP, base + COMMAND_REG);
  548. outb(NOOP, base + COMMAND_REG);
  549. if(inb(base + COMMAND_REG) != NOOP)
  550. return 0;
  551. if(!inb(base + TC_HIGH) || inb(base + TC_HIGH) == 0xFF)
  552. return 0;
  553. if((inb(base + PIO_INT_REG) & (FULL | EMPTY | CE | OUE | FIE | EIE)) != EMPTY)
  554. return 0;
  555. return 1;
  556. }
  557. static struct isapnp_device_id id_table[] __devinitdata = {
  558. { ISAPNP_ANY_ID, ISAPNP_ANY_ID,
  559. ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4161), 0 },
  560. { ISAPNP_ANY_ID, ISAPNP_ANY_ID,
  561. ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4163), 0 },
  562. { ISAPNP_DEVICE_SINGLE_END }
  563. };
  564. MODULE_DEVICE_TABLE(isapnp, id_table);
  565. static void sym53c416_probe(void)
  566. {
  567. int *base = probeaddrs;
  568. int ints[2];
  569. ints[0] = 1;
  570. for(; *base; base++) {
  571. if (request_region(*base, IO_RANGE, ID)) {
  572. if (sym53c416_test(*base)) {
  573. ints[1] = *base;
  574. sym53c416_setup(NULL, ints);
  575. }
  576. release_region(*base, IO_RANGE);
  577. }
  578. }
  579. }
  580. int __init sym53c416_detect(struct scsi_host_template *tpnt)
  581. {
  582. unsigned long flags;
  583. struct Scsi_Host * shpnt = NULL;
  584. int i;
  585. int count;
  586. struct pnp_dev *idev = NULL;
  587. #ifdef MODULE
  588. int ints[3];
  589. ints[0] = 2;
  590. if(sym53c416_base)
  591. {
  592. ints[1] = sym53c416_base[0];
  593. ints[2] = sym53c416_base[1];
  594. sym53c416_setup(NULL, ints);
  595. }
  596. if(sym53c416_base_1)
  597. {
  598. ints[1] = sym53c416_base_1[0];
  599. ints[2] = sym53c416_base_1[1];
  600. sym53c416_setup(NULL, ints);
  601. }
  602. if(sym53c416_base_2)
  603. {
  604. ints[1] = sym53c416_base_2[0];
  605. ints[2] = sym53c416_base_2[1];
  606. sym53c416_setup(NULL, ints);
  607. }
  608. if(sym53c416_base_3)
  609. {
  610. ints[1] = sym53c416_base_3[0];
  611. ints[2] = sym53c416_base_3[1];
  612. sym53c416_setup(NULL, ints);
  613. }
  614. #endif
  615. printk(KERN_INFO "sym53c416.c: %s\n", VERSION_STRING);
  616. for (i=0; id_table[i].vendor != 0; i++) {
  617. while((idev=pnp_find_dev(NULL, id_table[i].vendor,
  618. id_table[i].function, idev))!=NULL)
  619. {
  620. int i[3];
  621. if(pnp_device_attach(idev)<0)
  622. {
  623. printk(KERN_WARNING "sym53c416: unable to attach PnP device.\n");
  624. continue;
  625. }
  626. if(pnp_activate_dev(idev) < 0)
  627. {
  628. printk(KERN_WARNING "sym53c416: unable to activate PnP device.\n");
  629. pnp_device_detach(idev);
  630. continue;
  631. }
  632. i[0] = 2;
  633. i[1] = pnp_port_start(idev, 0);
  634. i[2] = pnp_irq(idev, 0);
  635. printk(KERN_INFO "sym53c416: ISAPnP card found and configured at 0x%X, IRQ %d.\n",
  636. i[1], i[2]);
  637. sym53c416_setup(NULL, i);
  638. }
  639. }
  640. sym53c416_probe();
  641. /* Now we register and set up each host adapter found... */
  642. for(count = 0, i = 0; i < host_index; i++) {
  643. if (!request_region(hosts[i].base, IO_RANGE, ID))
  644. continue;
  645. if (!sym53c416_test(hosts[i].base)) {
  646. printk(KERN_WARNING "No sym53c416 found at address 0x%03x\n", hosts[i].base);
  647. goto fail_release_region;
  648. }
  649. /* We don't have an irq yet, so we should probe for one */
  650. if (!hosts[i].irq)
  651. hosts[i].irq = sym53c416_probeirq(hosts[i].base, hosts[i].scsi_id);
  652. if (!hosts[i].irq)
  653. goto fail_release_region;
  654. shpnt = scsi_register(tpnt, 0);
  655. if (!shpnt)
  656. goto fail_release_region;
  657. /* Request for specified IRQ */
  658. if (request_irq(hosts[i].irq, sym53c416_intr_handle, 0, ID, shpnt))
  659. goto fail_free_host;
  660. spin_lock_irqsave(&sym53c416_lock, flags);
  661. shpnt->unique_id = hosts[i].base;
  662. shpnt->io_port = hosts[i].base;
  663. shpnt->n_io_port = IO_RANGE;
  664. shpnt->irq = hosts[i].irq;
  665. shpnt->this_id = hosts[i].scsi_id;
  666. sym53c416_init(hosts[i].base, hosts[i].scsi_id);
  667. count++;
  668. spin_unlock_irqrestore(&sym53c416_lock, flags);
  669. continue;
  670. fail_free_host:
  671. scsi_unregister(shpnt);
  672. fail_release_region:
  673. release_region(hosts[i].base, IO_RANGE);
  674. }
  675. return count;
  676. }
  677. const char *sym53c416_info(struct Scsi_Host *SChost)
  678. {
  679. int i;
  680. int base = SChost->io_port;
  681. int irq = SChost->irq;
  682. int scsi_id = 0;
  683. int rev = inb(base + TC_HIGH);
  684. for(i = 0; i < host_index; i++)
  685. if(hosts[i].base == base)
  686. scsi_id = hosts[i].scsi_id;
  687. sprintf(info, "Symbios Logic 53c416 (rev. %d) at 0x%03x, irq %d, SCSI-ID %d, %s pio", rev, base, irq, scsi_id, (fastpio)? "fast" : "slow");
  688. return info;
  689. }
  690. int sym53c416_queuecommand(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
  691. {
  692. int base;
  693. unsigned long flags = 0;
  694. int i;
  695. /* Store base register as we can have more than one controller in the system */
  696. base = SCpnt->device->host->io_port;
  697. current_command = SCpnt; /* set current command */
  698. current_command->scsi_done = done; /* set ptr to done function */
  699. current_command->SCp.phase = command_ph; /* currect phase is the command phase */
  700. current_command->SCp.Status = 0;
  701. current_command->SCp.Message = 0;
  702. spin_lock_irqsave(&sym53c416_lock, flags);
  703. outb(scmd_id(SCpnt), base + DEST_BUS_ID); /* Set scsi id target */
  704. outb(FLUSH_FIFO, base + COMMAND_REG); /* Flush SCSI and PIO FIFO's */
  705. /* Write SCSI command into the SCSI fifo */
  706. for(i = 0; i < SCpnt->cmd_len; i++)
  707. outb(SCpnt->cmnd[i], base + SCSI_FIFO);
  708. /* Start selection sequence */
  709. outb(SEL_WITHOUT_ATN_SEQ, base + COMMAND_REG);
  710. /* Now an interrupt will be generated which we will catch in out interrupt routine */
  711. spin_unlock_irqrestore(&sym53c416_lock, flags);
  712. return 0;
  713. }
  714. static int sym53c416_host_reset(Scsi_Cmnd *SCpnt)
  715. {
  716. int base;
  717. int scsi_id = -1;
  718. int i;
  719. unsigned long flags;
  720. spin_lock_irqsave(&sym53c416_lock, flags);
  721. /* printk("sym53c416_reset\n"); */
  722. base = SCpnt->device->host->io_port;
  723. /* search scsi_id - fixme, we shouldnt need to iterate for this! */
  724. for(i = 0; i < host_index && scsi_id == -1; i++)
  725. if(hosts[i].base == base)
  726. scsi_id = hosts[i].scsi_id;
  727. outb(RESET_CHIP, base + COMMAND_REG);
  728. outb(NOOP | PIO_MODE, base + COMMAND_REG);
  729. outb(RESET_SCSI_BUS, base + COMMAND_REG);
  730. sym53c416_init(base, scsi_id);
  731. spin_unlock_irqrestore(&sym53c416_lock, flags);
  732. return SUCCESS;
  733. }
  734. static int sym53c416_release(struct Scsi_Host *shost)
  735. {
  736. if (shost->irq)
  737. free_irq(shost->irq, shost);
  738. if (shost->io_port && shost->n_io_port)
  739. release_region(shost->io_port, shost->n_io_port);
  740. return 0;
  741. }
  742. static int sym53c416_bios_param(struct scsi_device *sdev,
  743. struct block_device *dev,
  744. sector_t capacity, int *ip)
  745. {
  746. int size;
  747. size = capacity;
  748. ip[0] = 64; /* heads */
  749. ip[1] = 32; /* sectors */
  750. if((ip[2] = size >> 11) > 1024) /* cylinders, test for big disk */
  751. {
  752. ip[0] = 255; /* heads */
  753. ip[1] = 63; /* sectors */
  754. ip[2] = size / (255 * 63); /* cylinders */
  755. }
  756. return 0;
  757. }
  758. /* Loadable module support */
  759. #ifdef MODULE
  760. MODULE_AUTHOR("Lieven Willems");
  761. MODULE_LICENSE("GPL");
  762. module_param_array(sym53c416, uint, NULL, 0);
  763. module_param_array(sym53c416_1, uint, NULL, 0);
  764. module_param_array(sym53c416_2, uint, NULL, 0);
  765. module_param_array(sym53c416_3, uint, NULL, 0);
  766. #endif
  767. static struct scsi_host_template driver_template = {
  768. .proc_name = "sym53c416",
  769. .name = "Symbios Logic 53c416",
  770. .detect = sym53c416_detect,
  771. .info = sym53c416_info,
  772. .queuecommand = sym53c416_queuecommand,
  773. .eh_host_reset_handler =sym53c416_host_reset,
  774. .release = sym53c416_release,
  775. .bios_param = sym53c416_bios_param,
  776. .can_queue = 1,
  777. .this_id = SYM53C416_SCSI_ID,
  778. .sg_tablesize = 32,
  779. .cmd_per_lun = 1,
  780. .unchecked_isa_dma = 1,
  781. .use_clustering = ENABLE_CLUSTERING,
  782. };
  783. #include "scsi_module.c"