sun3x_esp.c 10 KB

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  1. /* sun3x_esp.c: EnhancedScsiProcessor Sun3x SCSI driver code.
  2. *
  3. * (C) 1999 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
  4. *
  5. * Based on David S. Miller's esp driver
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/types.h>
  9. #include <linux/string.h>
  10. #include <linux/slab.h>
  11. #include <linux/blkdev.h>
  12. #include <linux/proc_fs.h>
  13. #include <linux/stat.h>
  14. #include <linux/delay.h>
  15. #include <linux/interrupt.h>
  16. #include "scsi.h"
  17. #include <scsi/scsi_host.h>
  18. #include "NCR53C9x.h"
  19. #include <asm/sun3x.h>
  20. #include <asm/dvma.h>
  21. #include <asm/irq.h>
  22. static void dma_barrier(struct NCR_ESP *esp);
  23. static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
  24. static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp);
  25. static void dma_drain(struct NCR_ESP *esp);
  26. static void dma_invalidate(struct NCR_ESP *esp);
  27. static void dma_dump_state(struct NCR_ESP *esp);
  28. static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length);
  29. static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length);
  30. static void dma_ints_off(struct NCR_ESP *esp);
  31. static void dma_ints_on(struct NCR_ESP *esp);
  32. static int dma_irq_p(struct NCR_ESP *esp);
  33. static void dma_poll(struct NCR_ESP *esp, unsigned char *vaddr);
  34. static int dma_ports_p(struct NCR_ESP *esp);
  35. static void dma_reset(struct NCR_ESP *esp);
  36. static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
  37. static void dma_mmu_get_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp);
  38. static void dma_mmu_get_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp);
  39. static void dma_mmu_release_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp);
  40. static void dma_mmu_release_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp);
  41. static void dma_advance_sg (Scsi_Cmnd *sp);
  42. /* Detecting ESP chips on the machine. This is the simple and easy
  43. * version.
  44. */
  45. int sun3x_esp_detect(struct scsi_host_template *tpnt)
  46. {
  47. struct NCR_ESP *esp;
  48. struct ConfigDev *esp_dev;
  49. esp_dev = 0;
  50. esp = esp_allocate(tpnt, (void *) esp_dev);
  51. /* Do command transfer with DMA */
  52. esp->do_pio_cmds = 0;
  53. /* Required functions */
  54. esp->dma_bytes_sent = &dma_bytes_sent;
  55. esp->dma_can_transfer = &dma_can_transfer;
  56. esp->dma_dump_state = &dma_dump_state;
  57. esp->dma_init_read = &dma_init_read;
  58. esp->dma_init_write = &dma_init_write;
  59. esp->dma_ints_off = &dma_ints_off;
  60. esp->dma_ints_on = &dma_ints_on;
  61. esp->dma_irq_p = &dma_irq_p;
  62. esp->dma_ports_p = &dma_ports_p;
  63. esp->dma_setup = &dma_setup;
  64. /* Optional functions */
  65. esp->dma_barrier = &dma_barrier;
  66. esp->dma_invalidate = &dma_invalidate;
  67. esp->dma_drain = &dma_drain;
  68. esp->dma_irq_entry = 0;
  69. esp->dma_irq_exit = 0;
  70. esp->dma_led_on = 0;
  71. esp->dma_led_off = 0;
  72. esp->dma_poll = &dma_poll;
  73. esp->dma_reset = &dma_reset;
  74. /* virtual DMA functions */
  75. esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
  76. esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
  77. esp->dma_mmu_release_scsi_one = &dma_mmu_release_scsi_one;
  78. esp->dma_mmu_release_scsi_sgl = &dma_mmu_release_scsi_sgl;
  79. esp->dma_advance_sg = &dma_advance_sg;
  80. /* SCSI chip speed */
  81. esp->cfreq = 20000000;
  82. esp->eregs = (struct ESP_regs *)(SUN3X_ESP_BASE);
  83. esp->dregs = (void *)SUN3X_ESP_DMA;
  84. esp->esp_command = (volatile unsigned char *)dvma_malloc(DVMA_PAGE_SIZE);
  85. esp->esp_command_dvma = dvma_vtob((unsigned long)esp->esp_command);
  86. esp->irq = 2;
  87. if (request_irq(esp->irq, esp_intr, SA_INTERRUPT,
  88. "SUN3X SCSI", esp->ehost)) {
  89. esp_deallocate(esp);
  90. return 0;
  91. }
  92. esp->scsi_id = 7;
  93. esp->diff = 0;
  94. esp_initialize(esp);
  95. /* for reasons beyond my knowledge (and which should likely be fixed)
  96. sync mode doesn't work on a 3/80 at 5mhz. but it does at 4. */
  97. esp->sync_defp = 0x3f;
  98. printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps,
  99. esps_in_use);
  100. esps_running = esps_in_use;
  101. return esps_in_use;
  102. }
  103. static void dma_do_drain(struct NCR_ESP *esp)
  104. {
  105. struct sparc_dma_registers *dregs =
  106. (struct sparc_dma_registers *) esp->dregs;
  107. int count = 500000;
  108. while((dregs->cond_reg & DMA_PEND_READ) && (--count > 0))
  109. udelay(1);
  110. if(!count) {
  111. printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
  112. }
  113. dregs->cond_reg |= DMA_FIFO_STDRAIN;
  114. count = 500000;
  115. while((dregs->cond_reg & DMA_FIFO_ISDRAIN) && (--count > 0))
  116. udelay(1);
  117. if(!count) {
  118. printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
  119. }
  120. }
  121. static void dma_barrier(struct NCR_ESP *esp)
  122. {
  123. struct sparc_dma_registers *dregs =
  124. (struct sparc_dma_registers *) esp->dregs;
  125. int count = 500000;
  126. while((dregs->cond_reg & DMA_PEND_READ) && (--count > 0))
  127. udelay(1);
  128. if(!count) {
  129. printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
  130. }
  131. dregs->cond_reg &= ~(DMA_ENABLE);
  132. }
  133. /* This uses various DMA csr fields and the fifo flags count value to
  134. * determine how many bytes were successfully sent/received by the ESP.
  135. */
  136. static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
  137. {
  138. struct sparc_dma_registers *dregs =
  139. (struct sparc_dma_registers *) esp->dregs;
  140. int rval = dregs->st_addr - esp->esp_command_dvma;
  141. return rval - fifo_count;
  142. }
  143. static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp)
  144. {
  145. return sp->SCp.this_residual;
  146. }
  147. static void dma_drain(struct NCR_ESP *esp)
  148. {
  149. struct sparc_dma_registers *dregs =
  150. (struct sparc_dma_registers *) esp->dregs;
  151. int count = 500000;
  152. if(dregs->cond_reg & DMA_FIFO_ISDRAIN) {
  153. dregs->cond_reg |= DMA_FIFO_STDRAIN;
  154. while((dregs->cond_reg & DMA_FIFO_ISDRAIN) && (--count > 0))
  155. udelay(1);
  156. if(!count) {
  157. printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
  158. }
  159. }
  160. }
  161. static void dma_invalidate(struct NCR_ESP *esp)
  162. {
  163. struct sparc_dma_registers *dregs =
  164. (struct sparc_dma_registers *) esp->dregs;
  165. __u32 tmp;
  166. int count = 500000;
  167. while(((tmp = dregs->cond_reg) & DMA_PEND_READ) && (--count > 0))
  168. udelay(1);
  169. if(!count) {
  170. printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
  171. }
  172. dregs->cond_reg = tmp | DMA_FIFO_INV;
  173. dregs->cond_reg &= ~DMA_FIFO_INV;
  174. }
  175. static void dma_dump_state(struct NCR_ESP *esp)
  176. {
  177. struct sparc_dma_registers *dregs =
  178. (struct sparc_dma_registers *) esp->dregs;
  179. ESPLOG(("esp%d: dma -- cond_reg<%08lx> addr<%08lx>\n",
  180. esp->esp_id, dregs->cond_reg, dregs->st_addr));
  181. }
  182. static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
  183. {
  184. struct sparc_dma_registers *dregs =
  185. (struct sparc_dma_registers *) esp->dregs;
  186. dregs->st_addr = vaddress;
  187. dregs->cond_reg |= (DMA_ST_WRITE | DMA_ENABLE);
  188. }
  189. static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
  190. {
  191. struct sparc_dma_registers *dregs =
  192. (struct sparc_dma_registers *) esp->dregs;
  193. /* Set up the DMA counters */
  194. dregs->st_addr = vaddress;
  195. dregs->cond_reg = ((dregs->cond_reg & ~(DMA_ST_WRITE)) | DMA_ENABLE);
  196. }
  197. static void dma_ints_off(struct NCR_ESP *esp)
  198. {
  199. DMA_INTSOFF((struct sparc_dma_registers *) esp->dregs);
  200. }
  201. static void dma_ints_on(struct NCR_ESP *esp)
  202. {
  203. DMA_INTSON((struct sparc_dma_registers *) esp->dregs);
  204. }
  205. static int dma_irq_p(struct NCR_ESP *esp)
  206. {
  207. return DMA_IRQ_P((struct sparc_dma_registers *) esp->dregs);
  208. }
  209. static void dma_poll(struct NCR_ESP *esp, unsigned char *vaddr)
  210. {
  211. int count = 50;
  212. dma_do_drain(esp);
  213. /* Wait till the first bits settle. */
  214. while((*(volatile unsigned char *)vaddr == 0xff) && (--count > 0))
  215. udelay(1);
  216. if(!count) {
  217. // printk("%s:%d timeout expire (data %02x)\n", __FILE__, __LINE__,
  218. // esp_read(esp->eregs->esp_fdata));
  219. //mach_halt();
  220. vaddr[0] = esp_read(esp->eregs->esp_fdata);
  221. vaddr[1] = esp_read(esp->eregs->esp_fdata);
  222. }
  223. }
  224. static int dma_ports_p(struct NCR_ESP *esp)
  225. {
  226. return (((struct sparc_dma_registers *) esp->dregs)->cond_reg
  227. & DMA_INT_ENAB);
  228. }
  229. /* Resetting various pieces of the ESP scsi driver chipset/buses. */
  230. static void dma_reset(struct NCR_ESP *esp)
  231. {
  232. struct sparc_dma_registers *dregs =
  233. (struct sparc_dma_registers *)esp->dregs;
  234. /* Punt the DVMA into a known state. */
  235. dregs->cond_reg |= DMA_RST_SCSI;
  236. dregs->cond_reg &= ~(DMA_RST_SCSI);
  237. DMA_INTSON(dregs);
  238. }
  239. static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
  240. {
  241. struct sparc_dma_registers *dregs =
  242. (struct sparc_dma_registers *) esp->dregs;
  243. unsigned long nreg = dregs->cond_reg;
  244. // printk("dma_setup %c addr %08x cnt %08x\n",
  245. // write ? 'W' : 'R', addr, count);
  246. dma_do_drain(esp);
  247. if(write)
  248. nreg |= DMA_ST_WRITE;
  249. else {
  250. nreg &= ~(DMA_ST_WRITE);
  251. }
  252. nreg |= DMA_ENABLE;
  253. dregs->cond_reg = nreg;
  254. dregs->st_addr = addr;
  255. }
  256. static void dma_mmu_get_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp)
  257. {
  258. sp->SCp.have_data_in = dvma_map((unsigned long)sp->SCp.buffer,
  259. sp->SCp.this_residual);
  260. sp->SCp.ptr = (char *)((unsigned long)sp->SCp.have_data_in);
  261. }
  262. static void dma_mmu_get_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp)
  263. {
  264. int sz = sp->SCp.buffers_residual;
  265. struct scatterlist *sg = sp->SCp.buffer;
  266. while (sz >= 0) {
  267. sg[sz].dvma_address = dvma_map((unsigned long)page_address(sg[sz].page) +
  268. sg[sz].offset, sg[sz].length);
  269. sz--;
  270. }
  271. sp->SCp.ptr=(char *)((unsigned long)sp->SCp.buffer->dvma_address);
  272. }
  273. static void dma_mmu_release_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp)
  274. {
  275. dvma_unmap((char *)sp->SCp.have_data_in);
  276. }
  277. static void dma_mmu_release_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp)
  278. {
  279. int sz = sp->use_sg - 1;
  280. struct scatterlist *sg = (struct scatterlist *)sp->buffer;
  281. while(sz >= 0) {
  282. dvma_unmap((char *)sg[sz].dvma_address);
  283. sz--;
  284. }
  285. }
  286. static void dma_advance_sg (Scsi_Cmnd *sp)
  287. {
  288. sp->SCp.ptr = (char *)((unsigned long)sp->SCp.buffer->dvma_address);
  289. }
  290. static int sun3x_esp_release(struct Scsi_Host *instance)
  291. {
  292. /* this code does not support being compiled as a module */
  293. return 1;
  294. }
  295. static struct scsi_host_template driver_template = {
  296. .proc_name = "sun3x_esp",
  297. .proc_info = &esp_proc_info,
  298. .name = "Sun ESP 100/100a/200",
  299. .detect = sun3x_esp_detect,
  300. .release = sun3x_esp_release,
  301. .slave_alloc = esp_slave_alloc,
  302. .slave_destroy = esp_slave_destroy,
  303. .info = esp_info,
  304. .queuecommand = esp_queue,
  305. .eh_abort_handler = esp_abort,
  306. .eh_bus_reset_handler = esp_reset,
  307. .can_queue = 7,
  308. .this_id = 7,
  309. .sg_tablesize = SG_ALL,
  310. .cmd_per_lun = 1,
  311. .use_clustering = DISABLE_CLUSTERING,
  312. };
  313. #include "scsi_module.c"
  314. MODULE_LICENSE("GPL");