nsp32.c 92 KB

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  1. /*
  2. * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver
  3. * Copyright (C) 2001, 2002, 2003
  4. * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
  5. * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. *
  18. * Revision History:
  19. * 1.0: Initial Release.
  20. * 1.1: Add /proc SDTR status.
  21. * Remove obsolete error handler nsp32_reset.
  22. * Some clean up.
  23. * 1.2: PowerPC (big endian) support.
  24. */
  25. #include <linux/version.h>
  26. #include <linux/module.h>
  27. #include <linux/init.h>
  28. #include <linux/kernel.h>
  29. #include <linux/sched.h>
  30. #include <linux/slab.h>
  31. #include <linux/string.h>
  32. #include <linux/timer.h>
  33. #include <linux/ioport.h>
  34. #include <linux/major.h>
  35. #include <linux/blkdev.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/pci.h>
  38. #include <linux/delay.h>
  39. #include <linux/ctype.h>
  40. #include <linux/dma-mapping.h>
  41. #include <asm/dma.h>
  42. #include <asm/system.h>
  43. #include <asm/io.h>
  44. #include <scsi/scsi.h>
  45. #include <scsi/scsi_cmnd.h>
  46. #include <scsi/scsi_device.h>
  47. #include <scsi/scsi_host.h>
  48. #include <scsi/scsi_ioctl.h>
  49. #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
  50. # include <linux/blk.h>
  51. #endif
  52. #include "nsp32.h"
  53. /***********************************************************************
  54. * Module parameters
  55. */
  56. static int trans_mode = 0; /* default: BIOS */
  57. module_param (trans_mode, int, 0);
  58. MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
  59. #define ASYNC_MODE 1
  60. #define ULTRA20M_MODE 2
  61. static int auto_param = 0; /* default: ON */
  62. module_param (auto_param, bool, 0);
  63. MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
  64. static int disc_priv = 1; /* default: OFF */
  65. module_param (disc_priv, bool, 0);
  66. MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
  67. MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
  68. MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
  69. MODULE_LICENSE("GPL");
  70. static const char *nsp32_release_version = "1.2";
  71. /****************************************************************************
  72. * Supported hardware
  73. */
  74. static struct pci_device_id nsp32_pci_table[] __devinitdata = {
  75. {
  76. .vendor = PCI_VENDOR_ID_IODATA,
  77. .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
  78. .subvendor = PCI_ANY_ID,
  79. .subdevice = PCI_ANY_ID,
  80. .driver_data = MODEL_IODATA,
  81. },
  82. {
  83. .vendor = PCI_VENDOR_ID_WORKBIT,
  84. .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
  85. .subvendor = PCI_ANY_ID,
  86. .subdevice = PCI_ANY_ID,
  87. .driver_data = MODEL_KME,
  88. },
  89. {
  90. .vendor = PCI_VENDOR_ID_WORKBIT,
  91. .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
  92. .subvendor = PCI_ANY_ID,
  93. .subdevice = PCI_ANY_ID,
  94. .driver_data = MODEL_WORKBIT,
  95. },
  96. {
  97. .vendor = PCI_VENDOR_ID_WORKBIT,
  98. .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
  99. .subvendor = PCI_ANY_ID,
  100. .subdevice = PCI_ANY_ID,
  101. .driver_data = MODEL_PCI_WORKBIT,
  102. },
  103. {
  104. .vendor = PCI_VENDOR_ID_WORKBIT,
  105. .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
  106. .subvendor = PCI_ANY_ID,
  107. .subdevice = PCI_ANY_ID,
  108. .driver_data = MODEL_LOGITEC,
  109. },
  110. {
  111. .vendor = PCI_VENDOR_ID_WORKBIT,
  112. .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
  113. .subvendor = PCI_ANY_ID,
  114. .subdevice = PCI_ANY_ID,
  115. .driver_data = MODEL_PCI_LOGITEC,
  116. },
  117. {
  118. .vendor = PCI_VENDOR_ID_WORKBIT,
  119. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
  120. .subvendor = PCI_ANY_ID,
  121. .subdevice = PCI_ANY_ID,
  122. .driver_data = MODEL_PCI_MELCO,
  123. },
  124. {
  125. .vendor = PCI_VENDOR_ID_WORKBIT,
  126. .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
  127. .subvendor = PCI_ANY_ID,
  128. .subdevice = PCI_ANY_ID,
  129. .driver_data = MODEL_PCI_MELCO,
  130. },
  131. {0,0,},
  132. };
  133. MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
  134. static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */
  135. /*
  136. * Period/AckWidth speed conversion table
  137. *
  138. * Note: This period/ackwidth speed table must be in descending order.
  139. */
  140. static nsp32_sync_table nsp32_sync_table_40M[] = {
  141. /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */
  142. {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */
  143. {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */
  144. {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  145. {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */
  146. {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */
  147. {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */
  148. {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  149. {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */
  150. {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  151. };
  152. static nsp32_sync_table nsp32_sync_table_20M[] = {
  153. {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */
  154. {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */
  155. {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */
  156. {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */
  157. {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */
  158. {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */
  159. {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */
  160. {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */
  161. {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */
  162. };
  163. static nsp32_sync_table nsp32_sync_table_pci[] = {
  164. {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */
  165. {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */
  166. {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */
  167. {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */
  168. {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */
  169. {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */
  170. {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */
  171. {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */
  172. {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */
  173. };
  174. /*
  175. * function declaration
  176. */
  177. /* module entry point */
  178. static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *);
  179. static void __devexit nsp32_remove(struct pci_dev *);
  180. static int __init init_nsp32 (void);
  181. static void __exit exit_nsp32 (void);
  182. /* struct struct scsi_host_template */
  183. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  184. static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int);
  185. #else
  186. static int nsp32_proc_info (char *, char **, off_t, int, int, int);
  187. #endif
  188. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  189. static int nsp32_detect (struct pci_dev *pdev);
  190. #else
  191. static int nsp32_detect (struct scsi_host_template *);
  192. #endif
  193. static int nsp32_queuecommand(struct scsi_cmnd *,
  194. void (*done)(struct scsi_cmnd *));
  195. static const char *nsp32_info (struct Scsi_Host *);
  196. static int nsp32_release (struct Scsi_Host *);
  197. /* SCSI error handler */
  198. static int nsp32_eh_abort (struct scsi_cmnd *);
  199. static int nsp32_eh_bus_reset (struct scsi_cmnd *);
  200. static int nsp32_eh_host_reset(struct scsi_cmnd *);
  201. /* generate SCSI message */
  202. static void nsp32_build_identify(struct scsi_cmnd *);
  203. static void nsp32_build_nop (struct scsi_cmnd *);
  204. static void nsp32_build_reject (struct scsi_cmnd *);
  205. static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
  206. /* SCSI message handler */
  207. static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
  208. static void nsp32_msgout_occur (struct scsi_cmnd *);
  209. static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
  210. static int nsp32_setup_sg_table (struct scsi_cmnd *);
  211. static int nsp32_selection_autopara(struct scsi_cmnd *);
  212. static int nsp32_selection_autoscsi(struct scsi_cmnd *);
  213. static void nsp32_scsi_done (struct scsi_cmnd *);
  214. static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
  215. static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
  216. static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
  217. static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
  218. /* SCSI SDTR */
  219. static void nsp32_analyze_sdtr (struct scsi_cmnd *);
  220. static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
  221. static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
  222. static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
  223. static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
  224. /* SCSI bus status handler */
  225. static void nsp32_wait_req (nsp32_hw_data *, int);
  226. static void nsp32_wait_sack (nsp32_hw_data *, int);
  227. static void nsp32_sack_assert (nsp32_hw_data *);
  228. static void nsp32_sack_negate (nsp32_hw_data *);
  229. static void nsp32_do_bus_reset(nsp32_hw_data *);
  230. /* hardware interrupt handler */
  231. static irqreturn_t do_nsp32_isr(int, void *, struct pt_regs *);
  232. /* initialize hardware */
  233. static int nsp32hw_init(nsp32_hw_data *);
  234. /* EEPROM handler */
  235. static int nsp32_getprom_param (nsp32_hw_data *);
  236. static int nsp32_getprom_at24 (nsp32_hw_data *);
  237. static int nsp32_getprom_c16 (nsp32_hw_data *);
  238. static void nsp32_prom_start (nsp32_hw_data *);
  239. static void nsp32_prom_stop (nsp32_hw_data *);
  240. static int nsp32_prom_read (nsp32_hw_data *, int);
  241. static int nsp32_prom_read_bit (nsp32_hw_data *);
  242. static void nsp32_prom_write_bit(nsp32_hw_data *, int);
  243. static void nsp32_prom_set (nsp32_hw_data *, int, int);
  244. static int nsp32_prom_get (nsp32_hw_data *, int);
  245. /* debug/warning/info message */
  246. static void nsp32_message (const char *, int, char *, char *, ...);
  247. #ifdef NSP32_DEBUG
  248. static void nsp32_dmessage(const char *, int, int, char *, ...);
  249. #endif
  250. /*
  251. * max_sectors is currently limited up to 128.
  252. */
  253. static struct scsi_host_template nsp32_template = {
  254. .proc_name = "nsp32",
  255. .name = "Workbit NinjaSCSI-32Bi/UDE",
  256. .proc_info = nsp32_proc_info,
  257. .info = nsp32_info,
  258. .queuecommand = nsp32_queuecommand,
  259. .can_queue = 1,
  260. .sg_tablesize = NSP32_SG_SIZE,
  261. .max_sectors = 128,
  262. .cmd_per_lun = 1,
  263. .this_id = NSP32_HOST_SCSIID,
  264. .use_clustering = DISABLE_CLUSTERING,
  265. .eh_abort_handler = nsp32_eh_abort,
  266. .eh_bus_reset_handler = nsp32_eh_bus_reset,
  267. .eh_host_reset_handler = nsp32_eh_host_reset,
  268. #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,74))
  269. .detect = nsp32_detect,
  270. .release = nsp32_release,
  271. #endif
  272. #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,2))
  273. .use_new_eh_code = 1,
  274. #else
  275. /* .highmem_io = 1, */
  276. #endif
  277. };
  278. #include "nsp32_io.h"
  279. /***********************************************************************
  280. * debug, error print
  281. */
  282. #ifndef NSP32_DEBUG
  283. # define NSP32_DEBUG_MASK 0x000000
  284. # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
  285. # define nsp32_dbg(mask, args...) /* */
  286. #else
  287. # define NSP32_DEBUG_MASK 0xffffff
  288. # define nsp32_msg(type, args...) \
  289. nsp32_message (__FUNCTION__, __LINE__, (type), args)
  290. # define nsp32_dbg(mask, args...) \
  291. nsp32_dmessage(__FUNCTION__, __LINE__, (mask), args)
  292. #endif
  293. #define NSP32_DEBUG_QUEUECOMMAND BIT(0)
  294. #define NSP32_DEBUG_REGISTER BIT(1)
  295. #define NSP32_DEBUG_AUTOSCSI BIT(2)
  296. #define NSP32_DEBUG_INTR BIT(3)
  297. #define NSP32_DEBUG_SGLIST BIT(4)
  298. #define NSP32_DEBUG_BUSFREE BIT(5)
  299. #define NSP32_DEBUG_CDB_CONTENTS BIT(6)
  300. #define NSP32_DEBUG_RESELECTION BIT(7)
  301. #define NSP32_DEBUG_MSGINOCCUR BIT(8)
  302. #define NSP32_DEBUG_EEPROM BIT(9)
  303. #define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
  304. #define NSP32_DEBUG_BUSRESET BIT(11)
  305. #define NSP32_DEBUG_RESTART BIT(12)
  306. #define NSP32_DEBUG_SYNC BIT(13)
  307. #define NSP32_DEBUG_WAIT BIT(14)
  308. #define NSP32_DEBUG_TARGETFLAG BIT(15)
  309. #define NSP32_DEBUG_PROC BIT(16)
  310. #define NSP32_DEBUG_INIT BIT(17)
  311. #define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
  312. #define NSP32_DEBUG_BUF_LEN 100
  313. static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
  314. {
  315. va_list args;
  316. char buf[NSP32_DEBUG_BUF_LEN];
  317. va_start(args, fmt);
  318. vsnprintf(buf, sizeof(buf), fmt, args);
  319. va_end(args);
  320. #ifndef NSP32_DEBUG
  321. printk("%snsp32: %s\n", type, buf);
  322. #else
  323. printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
  324. #endif
  325. }
  326. #ifdef NSP32_DEBUG
  327. static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
  328. {
  329. va_list args;
  330. char buf[NSP32_DEBUG_BUF_LEN];
  331. va_start(args, fmt);
  332. vsnprintf(buf, sizeof(buf), fmt, args);
  333. va_end(args);
  334. if (mask & NSP32_DEBUG_MASK) {
  335. printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
  336. }
  337. }
  338. #endif
  339. #ifdef NSP32_DEBUG
  340. # include "nsp32_debug.c"
  341. #else
  342. # define show_command(arg) /* */
  343. # define show_busphase(arg) /* */
  344. # define show_autophase(arg) /* */
  345. #endif
  346. /*
  347. * IDENTIFY Message
  348. */
  349. static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
  350. {
  351. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  352. int pos = data->msgout_len;
  353. int mode = FALSE;
  354. /* XXX: Auto DiscPriv detection is progressing... */
  355. if (disc_priv == 0) {
  356. /* mode = TRUE; */
  357. }
  358. data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
  359. data->msgout_len = pos;
  360. }
  361. /*
  362. * SDTR Message Routine
  363. */
  364. static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
  365. unsigned char period,
  366. unsigned char offset)
  367. {
  368. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  369. int pos = data->msgout_len;
  370. data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
  371. data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
  372. data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
  373. data->msgoutbuf[pos] = period; pos++;
  374. data->msgoutbuf[pos] = offset; pos++;
  375. data->msgout_len = pos;
  376. }
  377. /*
  378. * No Operation Message
  379. */
  380. static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
  381. {
  382. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  383. int pos = data->msgout_len;
  384. if (pos != 0) {
  385. nsp32_msg(KERN_WARNING,
  386. "Some messages are already contained!");
  387. return;
  388. }
  389. data->msgoutbuf[pos] = NOP; pos++;
  390. data->msgout_len = pos;
  391. }
  392. /*
  393. * Reject Message
  394. */
  395. static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
  396. {
  397. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  398. int pos = data->msgout_len;
  399. data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
  400. data->msgout_len = pos;
  401. }
  402. /*
  403. * timer
  404. */
  405. #if 0
  406. static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
  407. {
  408. unsigned int base = SCpnt->host->io_port;
  409. nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
  410. if (time & (~TIMER_CNT_MASK)) {
  411. nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
  412. }
  413. nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
  414. }
  415. #endif
  416. /*
  417. * set SCSI command and other parameter to asic, and start selection phase
  418. */
  419. static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
  420. {
  421. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  422. unsigned int base = SCpnt->device->host->io_port;
  423. unsigned int host_id = SCpnt->device->host->this_id;
  424. unsigned char target = scmd_id(SCpnt);
  425. nsp32_autoparam *param = data->autoparam;
  426. unsigned char phase;
  427. int i, ret;
  428. unsigned int msgout;
  429. u16_le s;
  430. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  431. /*
  432. * check bus free
  433. */
  434. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  435. if (phase != BUSMON_BUS_FREE) {
  436. nsp32_msg(KERN_WARNING, "bus busy");
  437. show_busphase(phase & BUSMON_PHASE_MASK);
  438. SCpnt->result = DID_BUS_BUSY << 16;
  439. return FALSE;
  440. }
  441. /*
  442. * message out
  443. *
  444. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  445. * over 3 messages needs another routine.
  446. */
  447. if (data->msgout_len == 0) {
  448. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  449. SCpnt->result = DID_ERROR << 16;
  450. return FALSE;
  451. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  452. msgout = 0;
  453. for (i = 0; i < data->msgout_len; i++) {
  454. /*
  455. * the sending order of the message is:
  456. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  457. * MCNT 2: MSG#1 -> MSG#2
  458. * MCNT 1: MSG#2
  459. */
  460. msgout >>= 8;
  461. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  462. }
  463. msgout |= MV_VALID; /* MV valid */
  464. msgout |= (unsigned int)data->msgout_len; /* len */
  465. } else {
  466. /* data->msgout_len > 3 */
  467. msgout = 0;
  468. }
  469. // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT));
  470. // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  471. /*
  472. * setup asic parameter
  473. */
  474. memset(param, 0, sizeof(nsp32_autoparam));
  475. /* cdb */
  476. for (i = 0; i < SCpnt->cmd_len; i++) {
  477. param->cdb[4 * i] = SCpnt->cmnd[i];
  478. }
  479. /* outgoing messages */
  480. param->msgout = cpu_to_le32(msgout);
  481. /* syncreg, ackwidth, target id, SREQ sampling rate */
  482. param->syncreg = data->cur_target->syncreg;
  483. param->ackwidth = data->cur_target->ackwidth;
  484. param->target_id = BIT(host_id) | BIT(target);
  485. param->sample_reg = data->cur_target->sample_reg;
  486. // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
  487. /* command control */
  488. param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
  489. AUTOSCSI_START |
  490. AUTO_MSGIN_00_OR_04 |
  491. AUTO_MSGIN_02 |
  492. AUTO_ATN );
  493. /* transfer control */
  494. s = 0;
  495. switch (data->trans_method) {
  496. case NSP32_TRANSFER_BUSMASTER:
  497. s |= BM_START;
  498. break;
  499. case NSP32_TRANSFER_MMIO:
  500. s |= CB_MMIO_MODE;
  501. break;
  502. case NSP32_TRANSFER_PIO:
  503. s |= CB_IO_MODE;
  504. break;
  505. default:
  506. nsp32_msg(KERN_ERR, "unknown trans_method");
  507. break;
  508. }
  509. /*
  510. * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits.
  511. * For bus master transfer, it's taken off.
  512. */
  513. s |= (TRANSFER_GO | ALL_COUNTER_CLR);
  514. param->transfer_control = cpu_to_le16(s);
  515. /* sg table addr */
  516. param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
  517. /*
  518. * transfer parameter to ASIC
  519. */
  520. nsp32_write4(base, SGT_ADR, data->auto_paddr);
  521. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
  522. AUTO_PARAMETER );
  523. /*
  524. * Check arbitration
  525. */
  526. ret = nsp32_arbitration(SCpnt, base);
  527. return ret;
  528. }
  529. /*
  530. * Selection with AUTO SCSI (without AUTO PARAMETER)
  531. */
  532. static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
  533. {
  534. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  535. unsigned int base = SCpnt->device->host->io_port;
  536. unsigned int host_id = SCpnt->device->host->this_id;
  537. unsigned char target = scmd_id(SCpnt);
  538. unsigned char phase;
  539. int status;
  540. unsigned short command = 0;
  541. unsigned int msgout = 0;
  542. unsigned short execph;
  543. int i;
  544. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
  545. /*
  546. * IRQ disable
  547. */
  548. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  549. /*
  550. * check bus line
  551. */
  552. phase = nsp32_read1(base, SCSI_BUS_MONITOR);
  553. if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
  554. nsp32_msg(KERN_WARNING, "bus busy");
  555. SCpnt->result = DID_BUS_BUSY << 16;
  556. status = 1;
  557. goto out;
  558. }
  559. /*
  560. * clear execph
  561. */
  562. execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  563. /*
  564. * clear FIFO counter to set CDBs
  565. */
  566. nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
  567. /*
  568. * set CDB0 - CDB15
  569. */
  570. for (i = 0; i < SCpnt->cmd_len; i++) {
  571. nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
  572. }
  573. nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
  574. /*
  575. * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID
  576. */
  577. nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
  578. /*
  579. * set SCSI MSGOUT REG
  580. *
  581. * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout.
  582. * over 3 messages needs another routine.
  583. */
  584. if (data->msgout_len == 0) {
  585. nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
  586. SCpnt->result = DID_ERROR << 16;
  587. status = 1;
  588. goto out;
  589. } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
  590. msgout = 0;
  591. for (i = 0; i < data->msgout_len; i++) {
  592. /*
  593. * the sending order of the message is:
  594. * MCNT 3: MSG#0 -> MSG#1 -> MSG#2
  595. * MCNT 2: MSG#1 -> MSG#2
  596. * MCNT 1: MSG#2
  597. */
  598. msgout >>= 8;
  599. msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
  600. }
  601. msgout |= MV_VALID; /* MV valid */
  602. msgout |= (unsigned int)data->msgout_len; /* len */
  603. nsp32_write4(base, SCSI_MSG_OUT, msgout);
  604. } else {
  605. /* data->msgout_len > 3 */
  606. nsp32_write4(base, SCSI_MSG_OUT, 0);
  607. }
  608. /*
  609. * set selection timeout(= 250ms)
  610. */
  611. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  612. /*
  613. * set SREQ hazard killer sampling rate
  614. *
  615. * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz.
  616. * check other internal clock!
  617. */
  618. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  619. /*
  620. * clear Arbit
  621. */
  622. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  623. /*
  624. * set SYNCREG
  625. * Don't set BM_START_ADR before setting this register.
  626. */
  627. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  628. /*
  629. * set ACKWIDTH
  630. */
  631. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  632. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  633. "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
  634. nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
  635. nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
  636. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
  637. data->msgout_len, msgout);
  638. /*
  639. * set SGT ADDR (physical address)
  640. */
  641. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  642. /*
  643. * set TRANSFER CONTROL REG
  644. */
  645. command = 0;
  646. command |= (TRANSFER_GO | ALL_COUNTER_CLR);
  647. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  648. if (SCpnt->request_bufflen > 0) {
  649. command |= BM_START;
  650. }
  651. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  652. command |= CB_MMIO_MODE;
  653. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  654. command |= CB_IO_MODE;
  655. }
  656. nsp32_write2(base, TRANSFER_CONTROL, command);
  657. /*
  658. * start AUTO SCSI, kick off arbitration
  659. */
  660. command = (CLEAR_CDB_FIFO_POINTER |
  661. AUTOSCSI_START |
  662. AUTO_MSGIN_00_OR_04 |
  663. AUTO_MSGIN_02 |
  664. AUTO_ATN );
  665. nsp32_write2(base, COMMAND_CONTROL, command);
  666. /*
  667. * Check arbitration
  668. */
  669. status = nsp32_arbitration(SCpnt, base);
  670. out:
  671. /*
  672. * IRQ enable
  673. */
  674. nsp32_write2(base, IRQ_CONTROL, 0);
  675. return status;
  676. }
  677. /*
  678. * Arbitration Status Check
  679. *
  680. * Note: Arbitration counter is waited during ARBIT_GO is not lifting.
  681. * Using udelay(1) consumes CPU time and system time, but
  682. * arbitration delay time is defined minimal 2.4us in SCSI
  683. * specification, thus udelay works as coarse grained wait timer.
  684. */
  685. static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
  686. {
  687. unsigned char arbit;
  688. int status = TRUE;
  689. int time = 0;
  690. do {
  691. arbit = nsp32_read1(base, ARBIT_STATUS);
  692. time++;
  693. } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
  694. (time <= ARBIT_TIMEOUT_TIME));
  695. nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
  696. "arbit: 0x%x, delay time: %d", arbit, time);
  697. if (arbit & ARBIT_WIN) {
  698. /* Arbitration succeeded */
  699. SCpnt->result = DID_OK << 16;
  700. nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */
  701. } else if (arbit & ARBIT_FAIL) {
  702. /* Arbitration failed */
  703. SCpnt->result = DID_BUS_BUSY << 16;
  704. status = FALSE;
  705. } else {
  706. /*
  707. * unknown error or ARBIT_GO timeout,
  708. * something lock up! guess no connection.
  709. */
  710. nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
  711. SCpnt->result = DID_NO_CONNECT << 16;
  712. status = FALSE;
  713. }
  714. /*
  715. * clear Arbit
  716. */
  717. nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
  718. return status;
  719. }
  720. /*
  721. * reselection
  722. *
  723. * Note: This reselection routine is called from msgin_occur,
  724. * reselection target id&lun must be already set.
  725. * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation.
  726. */
  727. static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
  728. {
  729. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  730. unsigned int host_id = SCpnt->device->host->this_id;
  731. unsigned int base = SCpnt->device->host->io_port;
  732. unsigned char tmpid, newid;
  733. nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
  734. /*
  735. * calculate reselected SCSI ID
  736. */
  737. tmpid = nsp32_read1(base, RESELECT_ID);
  738. tmpid &= (~BIT(host_id));
  739. newid = 0;
  740. while (tmpid) {
  741. if (tmpid & 1) {
  742. break;
  743. }
  744. tmpid >>= 1;
  745. newid++;
  746. }
  747. /*
  748. * If reselected New ID:LUN is not existed
  749. * or current nexus is not existed, unexpected
  750. * reselection is occurred. Send reject message.
  751. */
  752. if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
  753. nsp32_msg(KERN_WARNING, "unknown id/lun");
  754. return FALSE;
  755. } else if(data->lunt[newid][newlun].SCpnt == NULL) {
  756. nsp32_msg(KERN_WARNING, "no SCSI command is processing");
  757. return FALSE;
  758. }
  759. data->cur_id = newid;
  760. data->cur_lun = newlun;
  761. data->cur_target = &(data->target[newid]);
  762. data->cur_lunt = &(data->lunt[newid][newlun]);
  763. /* reset SACK/SavedACK counter (or ALL clear?) */
  764. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  765. return TRUE;
  766. }
  767. /*
  768. * nsp32_setup_sg_table - build scatter gather list for transfer data
  769. * with bus master.
  770. *
  771. * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time.
  772. */
  773. static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
  774. {
  775. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  776. struct scatterlist *sgl;
  777. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  778. int num, i;
  779. u32_le l;
  780. if (SCpnt->request_bufflen == 0) {
  781. return TRUE;
  782. }
  783. if (sgt == NULL) {
  784. nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
  785. return FALSE;
  786. }
  787. if (SCpnt->use_sg) {
  788. sgl = (struct scatterlist *)SCpnt->request_buffer;
  789. num = pci_map_sg(data->Pci, sgl, SCpnt->use_sg,
  790. SCpnt->sc_data_direction);
  791. for (i = 0; i < num; i++) {
  792. /*
  793. * Build nsp32_sglist, substitute sg dma addresses.
  794. */
  795. sgt[i].addr = cpu_to_le32(sg_dma_address(sgl));
  796. sgt[i].len = cpu_to_le32(sg_dma_len(sgl));
  797. sgl++;
  798. if (le32_to_cpu(sgt[i].len) > 0x10000) {
  799. nsp32_msg(KERN_ERR,
  800. "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
  801. return FALSE;
  802. }
  803. nsp32_dbg(NSP32_DEBUG_SGLIST,
  804. "num 0x%x : addr 0x%lx len 0x%lx",
  805. i,
  806. le32_to_cpu(sgt[i].addr),
  807. le32_to_cpu(sgt[i].len ));
  808. }
  809. /* set end mark */
  810. l = le32_to_cpu(sgt[num-1].len);
  811. sgt[num-1].len = cpu_to_le32(l | SGTEND);
  812. } else {
  813. SCpnt->SCp.have_data_in = pci_map_single(data->Pci,
  814. SCpnt->request_buffer, SCpnt->request_bufflen,
  815. SCpnt->sc_data_direction);
  816. sgt[0].addr = cpu_to_le32(SCpnt->SCp.have_data_in);
  817. sgt[0].len = cpu_to_le32(SCpnt->request_bufflen | SGTEND); /* set end mark */
  818. if (SCpnt->request_bufflen > 0x10000) {
  819. nsp32_msg(KERN_ERR,
  820. "can't transfer over 64KB at a time, size=0x%lx", SCpnt->request_bufflen);
  821. return FALSE;
  822. }
  823. nsp32_dbg(NSP32_DEBUG_SGLIST, "single : addr 0x%lx len=0x%lx",
  824. le32_to_cpu(sgt[0].addr),
  825. le32_to_cpu(sgt[0].len ));
  826. }
  827. return TRUE;
  828. }
  829. static int nsp32_queuecommand(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
  830. {
  831. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  832. nsp32_target *target;
  833. nsp32_lunt *cur_lunt;
  834. int ret;
  835. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  836. "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x "
  837. "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
  838. SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
  839. SCpnt->use_sg, SCpnt->request_buffer, SCpnt->request_bufflen);
  840. if (data->CurrentSC != NULL) {
  841. nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
  842. data->CurrentSC = NULL;
  843. SCpnt->result = DID_NO_CONNECT << 16;
  844. done(SCpnt);
  845. return 0;
  846. }
  847. /* check target ID is not same as this initiator ID */
  848. if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
  849. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???");
  850. SCpnt->result = DID_BAD_TARGET << 16;
  851. done(SCpnt);
  852. return 0;
  853. }
  854. /* check target LUN is allowable value */
  855. if (SCpnt->device->lun >= MAX_LUN) {
  856. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
  857. SCpnt->result = DID_BAD_TARGET << 16;
  858. done(SCpnt);
  859. return 0;
  860. }
  861. show_command(SCpnt);
  862. SCpnt->scsi_done = done;
  863. data->CurrentSC = SCpnt;
  864. SCpnt->SCp.Status = CHECK_CONDITION;
  865. SCpnt->SCp.Message = 0;
  866. SCpnt->resid = SCpnt->request_bufflen;
  867. SCpnt->SCp.ptr = (char *) SCpnt->request_buffer;
  868. SCpnt->SCp.this_residual = SCpnt->request_bufflen;
  869. SCpnt->SCp.buffer = NULL;
  870. SCpnt->SCp.buffers_residual = 0;
  871. /* initialize data */
  872. data->msgout_len = 0;
  873. data->msgin_len = 0;
  874. cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
  875. cur_lunt->SCpnt = SCpnt;
  876. cur_lunt->save_datp = 0;
  877. cur_lunt->msgin03 = FALSE;
  878. data->cur_lunt = cur_lunt;
  879. data->cur_id = SCpnt->device->id;
  880. data->cur_lun = SCpnt->device->lun;
  881. ret = nsp32_setup_sg_table(SCpnt);
  882. if (ret == FALSE) {
  883. nsp32_msg(KERN_ERR, "SGT fail");
  884. SCpnt->result = DID_ERROR << 16;
  885. nsp32_scsi_done(SCpnt);
  886. return 0;
  887. }
  888. /* Build IDENTIFY */
  889. nsp32_build_identify(SCpnt);
  890. /*
  891. * If target is the first time to transfer after the reset
  892. * (target don't have SDTR_DONE and SDTR_INITIATOR), sync
  893. * message SDTR is needed to do synchronous transfer.
  894. */
  895. target = &data->target[scmd_id(SCpnt)];
  896. data->cur_target = target;
  897. if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
  898. unsigned char period, offset;
  899. if (trans_mode != ASYNC_MODE) {
  900. nsp32_set_max_sync(data, target, &period, &offset);
  901. nsp32_build_sdtr(SCpnt, period, offset);
  902. target->sync_flag |= SDTR_INITIATOR;
  903. } else {
  904. nsp32_set_async(data, target);
  905. target->sync_flag |= SDTR_DONE;
  906. }
  907. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  908. "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
  909. target->limit_entry, period, offset);
  910. } else if (target->sync_flag & SDTR_INITIATOR) {
  911. /*
  912. * It was negotiating SDTR with target, sending from the
  913. * initiator, but there are no chance to remove this flag.
  914. * Set async because we don't get proper negotiation.
  915. */
  916. nsp32_set_async(data, target);
  917. target->sync_flag &= ~SDTR_INITIATOR;
  918. target->sync_flag |= SDTR_DONE;
  919. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  920. "SDTR_INITIATOR: fall back to async");
  921. } else if (target->sync_flag & SDTR_TARGET) {
  922. /*
  923. * It was negotiating SDTR with target, sending from target,
  924. * but there are no chance to remove this flag. Set async
  925. * because we don't get proper negotiation.
  926. */
  927. nsp32_set_async(data, target);
  928. target->sync_flag &= ~SDTR_TARGET;
  929. target->sync_flag |= SDTR_DONE;
  930. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
  931. "Unknown SDTR from target is reached, fall back to async.");
  932. }
  933. nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
  934. "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
  935. SCpnt->device->id, target->sync_flag, target->syncreg,
  936. target->ackwidth);
  937. /* Selection */
  938. if (auto_param == 0) {
  939. ret = nsp32_selection_autopara(SCpnt);
  940. } else {
  941. ret = nsp32_selection_autoscsi(SCpnt);
  942. }
  943. if (ret != TRUE) {
  944. nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
  945. nsp32_scsi_done(SCpnt);
  946. }
  947. return 0;
  948. }
  949. /* initialize asic */
  950. static int nsp32hw_init(nsp32_hw_data *data)
  951. {
  952. unsigned int base = data->BaseAddress;
  953. unsigned short irq_stat;
  954. unsigned long lc_reg;
  955. unsigned char power;
  956. lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
  957. if ((lc_reg & 0xff00) == 0) {
  958. lc_reg |= (0x20 << 8);
  959. nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
  960. }
  961. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  962. nsp32_write2(base, TRANSFER_CONTROL, 0);
  963. nsp32_write4(base, BM_CNT, 0);
  964. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  965. do {
  966. irq_stat = nsp32_read2(base, IRQ_STATUS);
  967. nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
  968. } while (irq_stat & IRQSTATUS_ANY_IRQ);
  969. /*
  970. * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is
  971. * designated by specification.
  972. */
  973. if ((data->trans_method & NSP32_TRANSFER_PIO) ||
  974. (data->trans_method & NSP32_TRANSFER_MMIO)) {
  975. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
  976. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
  977. } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  978. nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
  979. nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
  980. } else {
  981. nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
  982. }
  983. nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
  984. nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
  985. nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
  986. nsp32_index_write1(base, CLOCK_DIV, data->clock);
  987. nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
  988. nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */
  989. /*
  990. * initialize MISC_WRRD register
  991. *
  992. * Note: Designated parameters is obeyed as following:
  993. * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set.
  994. * MISC_MASTER_TERMINATION_SELECT: It must be set.
  995. * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set.
  996. * MISC_AUTOSEL_TIMING_SEL: It should be set.
  997. * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set.
  998. * MISC_DELAYED_BMSTART: It's selected for safety.
  999. *
  1000. * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then
  1001. * we have to set TRANSFERCONTROL_BM_START as 0 and set
  1002. * appropriate value before restarting bus master transfer.
  1003. */
  1004. nsp32_index_write2(base, MISC_WR,
  1005. (SCSI_DIRECTION_DETECTOR_SELECT |
  1006. DELAYED_BMSTART |
  1007. MASTER_TERMINATION_SELECT |
  1008. BMREQ_NEGATE_TIMING_SEL |
  1009. AUTOSEL_TIMING_SEL |
  1010. BMSTOP_CHANGE2_NONDATA_PHASE));
  1011. nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
  1012. power = nsp32_index_read1(base, TERM_PWR_CONTROL);
  1013. if (!(power & SENSE)) {
  1014. nsp32_msg(KERN_INFO, "term power on");
  1015. nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
  1016. }
  1017. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1018. nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */
  1019. nsp32_write1(base, SYNC_REG, 0);
  1020. nsp32_write1(base, ACK_WIDTH, 0);
  1021. nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
  1022. /*
  1023. * enable to select designated IRQ (except for
  1024. * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR)
  1025. */
  1026. nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
  1027. IRQSELECT_SCSIRESET_IRQ |
  1028. IRQSELECT_FIFO_SHLD_IRQ |
  1029. IRQSELECT_RESELECT_IRQ |
  1030. IRQSELECT_PHASE_CHANGE_IRQ |
  1031. IRQSELECT_AUTO_SCSI_SEQ_IRQ |
  1032. // IRQSELECT_BMCNTERR_IRQ |
  1033. IRQSELECT_TARGET_ABORT_IRQ |
  1034. IRQSELECT_MASTER_ABORT_IRQ );
  1035. nsp32_write2(base, IRQ_CONTROL, 0);
  1036. /* PCI LED off */
  1037. nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
  1038. nsp32_index_write1(base, EXT_PORT, LED_OFF);
  1039. return TRUE;
  1040. }
  1041. /* interrupt routine */
  1042. static irqreturn_t do_nsp32_isr(int irq, void *dev_id, struct pt_regs *regs)
  1043. {
  1044. nsp32_hw_data *data = dev_id;
  1045. unsigned int base = data->BaseAddress;
  1046. struct scsi_cmnd *SCpnt = data->CurrentSC;
  1047. unsigned short auto_stat, irq_stat, trans_stat;
  1048. unsigned char busmon, busphase;
  1049. unsigned long flags;
  1050. int ret;
  1051. int handled = 0;
  1052. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  1053. struct Scsi_Host *host = data->Host;
  1054. spin_lock_irqsave(host->host_lock, flags);
  1055. #else
  1056. spin_lock_irqsave(&io_request_lock, flags);
  1057. #endif
  1058. /*
  1059. * IRQ check, then enable IRQ mask
  1060. */
  1061. irq_stat = nsp32_read2(base, IRQ_STATUS);
  1062. nsp32_dbg(NSP32_DEBUG_INTR,
  1063. "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
  1064. /* is this interrupt comes from Ninja asic? */
  1065. if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
  1066. nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
  1067. goto out2;
  1068. }
  1069. handled = 1;
  1070. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  1071. busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
  1072. busphase = busmon & BUSMON_PHASE_MASK;
  1073. trans_stat = nsp32_read2(base, TRANSFER_STATUS);
  1074. if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
  1075. nsp32_msg(KERN_INFO, "card disconnect");
  1076. if (data->CurrentSC != NULL) {
  1077. nsp32_msg(KERN_INFO, "clean up current SCSI command");
  1078. SCpnt->result = DID_BAD_TARGET << 16;
  1079. nsp32_scsi_done(SCpnt);
  1080. }
  1081. goto out;
  1082. }
  1083. /* Timer IRQ */
  1084. if (irq_stat & IRQSTATUS_TIMER_IRQ) {
  1085. nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
  1086. nsp32_write2(base, TIMER_SET, TIMER_STOP);
  1087. goto out;
  1088. }
  1089. /* SCSI reset */
  1090. if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
  1091. nsp32_msg(KERN_INFO, "detected someone do bus reset");
  1092. nsp32_do_bus_reset(data);
  1093. if (SCpnt != NULL) {
  1094. SCpnt->result = DID_RESET << 16;
  1095. nsp32_scsi_done(SCpnt);
  1096. }
  1097. goto out;
  1098. }
  1099. if (SCpnt == NULL) {
  1100. nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
  1101. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1102. goto out;
  1103. }
  1104. /*
  1105. * AutoSCSI Interrupt.
  1106. * Note: This interrupt is occurred when AutoSCSI is finished. Then
  1107. * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are
  1108. * recorded when AutoSCSI sequencer has been processed.
  1109. */
  1110. if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
  1111. /* getting SCSI executed phase */
  1112. auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
  1113. nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
  1114. /* Selection Timeout, go busfree phase. */
  1115. if (auto_stat & SELECTION_TIMEOUT) {
  1116. nsp32_dbg(NSP32_DEBUG_INTR,
  1117. "selection timeout occurred");
  1118. SCpnt->result = DID_TIME_OUT << 16;
  1119. nsp32_scsi_done(SCpnt);
  1120. goto out;
  1121. }
  1122. if (auto_stat & MSGOUT_PHASE) {
  1123. /*
  1124. * MsgOut phase was processed.
  1125. * If MSG_IN_OCCUER is not set, then MsgOut phase is
  1126. * completed. Thus, msgout_len must reset. Otherwise,
  1127. * nothing to do here. If MSG_OUT_OCCUER is occurred,
  1128. * then we will encounter the condition and check.
  1129. */
  1130. if (!(auto_stat & MSG_IN_OCCUER) &&
  1131. (data->msgout_len <= 3)) {
  1132. /*
  1133. * !MSG_IN_OCCUER && msgout_len <=3
  1134. * ---> AutoSCSI with MSGOUTreg is processed.
  1135. */
  1136. data->msgout_len = 0;
  1137. };
  1138. nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
  1139. }
  1140. if ((auto_stat & DATA_IN_PHASE) &&
  1141. (SCpnt->resid > 0) &&
  1142. ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
  1143. printk( "auto+fifo\n");
  1144. //nsp32_pio_read(SCpnt);
  1145. }
  1146. if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
  1147. /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */
  1148. nsp32_dbg(NSP32_DEBUG_INTR,
  1149. "Data in/out phase processed");
  1150. /* read BMCNT, SGT pointer addr */
  1151. nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
  1152. nsp32_read4(base, BM_CNT));
  1153. nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
  1154. nsp32_read4(base, SGT_ADR));
  1155. nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
  1156. nsp32_read4(base, SACK_CNT));
  1157. nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
  1158. nsp32_read4(base, SAVED_SACK_CNT));
  1159. SCpnt->resid = 0; /* all data transfered! */
  1160. }
  1161. /*
  1162. * MsgIn Occur
  1163. */
  1164. if (auto_stat & MSG_IN_OCCUER) {
  1165. nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
  1166. }
  1167. /*
  1168. * MsgOut Occur
  1169. */
  1170. if (auto_stat & MSG_OUT_OCCUER) {
  1171. nsp32_msgout_occur(SCpnt);
  1172. }
  1173. /*
  1174. * Bus Free Occur
  1175. */
  1176. if (auto_stat & BUS_FREE_OCCUER) {
  1177. ret = nsp32_busfree_occur(SCpnt, auto_stat);
  1178. if (ret == TRUE) {
  1179. goto out;
  1180. }
  1181. }
  1182. if (auto_stat & STATUS_PHASE) {
  1183. /*
  1184. * Read CSB and substitute CSB for SCpnt->result
  1185. * to save status phase stutas byte.
  1186. * scsi error handler checks host_byte (DID_*:
  1187. * low level driver to indicate status), then checks
  1188. * status_byte (SCSI status byte).
  1189. */
  1190. SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
  1191. }
  1192. if (auto_stat & ILLEGAL_PHASE) {
  1193. /* Illegal phase is detected. SACK is not back. */
  1194. nsp32_msg(KERN_WARNING,
  1195. "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
  1196. /* TODO: currently we don't have any action... bus reset? */
  1197. /*
  1198. * To send back SACK, assert, wait, and negate.
  1199. */
  1200. nsp32_sack_assert(data);
  1201. nsp32_wait_req(data, NEGATE);
  1202. nsp32_sack_negate(data);
  1203. }
  1204. if (auto_stat & COMMAND_PHASE) {
  1205. /* nothing to do */
  1206. nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
  1207. }
  1208. if (auto_stat & AUTOSCSI_BUSY) {
  1209. /* AutoSCSI is running */
  1210. }
  1211. show_autophase(auto_stat);
  1212. }
  1213. /* FIFO_SHLD_IRQ */
  1214. if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
  1215. nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
  1216. switch(busphase) {
  1217. case BUSPHASE_DATA_OUT:
  1218. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
  1219. //nsp32_pio_write(SCpnt);
  1220. break;
  1221. case BUSPHASE_DATA_IN:
  1222. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
  1223. //nsp32_pio_read(SCpnt);
  1224. break;
  1225. case BUSPHASE_STATUS:
  1226. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
  1227. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1228. break;
  1229. default:
  1230. nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
  1231. nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1232. show_busphase(busphase);
  1233. break;
  1234. }
  1235. goto out;
  1236. }
  1237. /* Phase Change IRQ */
  1238. if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
  1239. nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
  1240. switch(busphase) {
  1241. case BUSPHASE_MESSAGE_IN:
  1242. nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
  1243. nsp32_msgin_occur(SCpnt, irq_stat, 0);
  1244. break;
  1245. default:
  1246. nsp32_msg(KERN_WARNING, "phase chg/other phase?");
  1247. nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
  1248. irq_stat, trans_stat);
  1249. show_busphase(busphase);
  1250. break;
  1251. }
  1252. goto out;
  1253. }
  1254. /* PCI_IRQ */
  1255. if (irq_stat & IRQSTATUS_PCI_IRQ) {
  1256. nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
  1257. /* Do nothing */
  1258. }
  1259. /* BMCNTERR_IRQ */
  1260. if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
  1261. nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
  1262. /*
  1263. * TODO: To be implemented improving bus master
  1264. * transfer reliablity when BMCNTERR is occurred in
  1265. * AutoSCSI phase described in specification.
  1266. */
  1267. }
  1268. #if 0
  1269. nsp32_dbg(NSP32_DEBUG_INTR,
  1270. "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
  1271. show_busphase(busphase);
  1272. #endif
  1273. out:
  1274. /* disable IRQ mask */
  1275. nsp32_write2(base, IRQ_CONTROL, 0);
  1276. out2:
  1277. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0))
  1278. spin_unlock_irqrestore(host->host_lock, flags);
  1279. #else
  1280. spin_unlock_irqrestore(&io_request_lock, flags);
  1281. #endif
  1282. nsp32_dbg(NSP32_DEBUG_INTR, "exit");
  1283. return IRQ_RETVAL(handled);
  1284. }
  1285. #undef SPRINTF
  1286. #define SPRINTF(args...) \
  1287. do { \
  1288. if(length > (pos - buffer)) { \
  1289. pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
  1290. nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
  1291. } \
  1292. } while(0)
  1293. static int nsp32_proc_info(
  1294. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  1295. struct Scsi_Host *host,
  1296. #endif
  1297. char *buffer,
  1298. char **start,
  1299. off_t offset,
  1300. int length,
  1301. #if !(LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  1302. int hostno,
  1303. #endif
  1304. int inout)
  1305. {
  1306. char *pos = buffer;
  1307. int thislength;
  1308. unsigned long flags;
  1309. nsp32_hw_data *data;
  1310. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  1311. int hostno;
  1312. #else
  1313. struct Scsi_Host *host;
  1314. #endif
  1315. unsigned int base;
  1316. unsigned char mode_reg;
  1317. int id, speed;
  1318. long model;
  1319. /* Write is not supported, just return. */
  1320. if (inout == TRUE) {
  1321. return -EINVAL;
  1322. }
  1323. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  1324. hostno = host->host_no;
  1325. #else
  1326. /* search this HBA host */
  1327. host = scsi_host_hn_get(hostno);
  1328. if (host == NULL) {
  1329. return -ESRCH;
  1330. }
  1331. #endif
  1332. data = (nsp32_hw_data *)host->hostdata;
  1333. base = host->io_port;
  1334. SPRINTF("NinjaSCSI-32 status\n\n");
  1335. SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
  1336. SPRINTF("SCSI host No.: %d\n", hostno);
  1337. SPRINTF("IRQ: %d\n", host->irq);
  1338. SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
  1339. SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
  1340. SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
  1341. SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
  1342. mode_reg = nsp32_index_read1(base, CHIP_MODE);
  1343. model = data->pci_devid->driver_data;
  1344. #ifdef CONFIG_PM
  1345. SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
  1346. #endif
  1347. SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
  1348. spin_lock_irqsave(&(data->Lock), flags);
  1349. SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
  1350. spin_unlock_irqrestore(&(data->Lock), flags);
  1351. SPRINTF("SDTR status\n");
  1352. for (id = 0; id < ARRAY_SIZE(data->target); id++) {
  1353. SPRINTF("id %d: ", id);
  1354. if (id == host->this_id) {
  1355. SPRINTF("----- NinjaSCSI-32 host adapter\n");
  1356. continue;
  1357. }
  1358. if (data->target[id].sync_flag == SDTR_DONE) {
  1359. if (data->target[id].period == 0 &&
  1360. data->target[id].offset == ASYNC_OFFSET ) {
  1361. SPRINTF("async");
  1362. } else {
  1363. SPRINTF(" sync");
  1364. }
  1365. } else {
  1366. SPRINTF(" none");
  1367. }
  1368. if (data->target[id].period != 0) {
  1369. speed = 1000000 / (data->target[id].period * 4);
  1370. SPRINTF(" transfer %d.%dMB/s, offset %d",
  1371. speed / 1000,
  1372. speed % 1000,
  1373. data->target[id].offset
  1374. );
  1375. }
  1376. SPRINTF("\n");
  1377. }
  1378. thislength = pos - (buffer + offset);
  1379. if(thislength < 0) {
  1380. *start = NULL;
  1381. return 0;
  1382. }
  1383. thislength = min(thislength, length);
  1384. *start = buffer + offset;
  1385. return thislength;
  1386. }
  1387. #undef SPRINTF
  1388. /*
  1389. * Reset parameters and call scsi_done for data->cur_lunt.
  1390. * Be careful setting SCpnt->result = DID_* before calling this function.
  1391. */
  1392. static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
  1393. {
  1394. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1395. unsigned int base = SCpnt->device->host->io_port;
  1396. /*
  1397. * unmap pci
  1398. */
  1399. if (SCpnt->request_bufflen == 0) {
  1400. goto skip;
  1401. }
  1402. if (SCpnt->use_sg) {
  1403. pci_unmap_sg(data->Pci,
  1404. (struct scatterlist *)SCpnt->buffer,
  1405. SCpnt->use_sg, SCpnt->sc_data_direction);
  1406. } else {
  1407. pci_unmap_single(data->Pci,
  1408. (u32)SCpnt->SCp.have_data_in,
  1409. SCpnt->request_bufflen,
  1410. SCpnt->sc_data_direction);
  1411. }
  1412. skip:
  1413. /*
  1414. * clear TRANSFERCONTROL_BM_START
  1415. */
  1416. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1417. nsp32_write4(base, BM_CNT, 0);
  1418. /*
  1419. * call scsi_done
  1420. */
  1421. (*SCpnt->scsi_done)(SCpnt);
  1422. /*
  1423. * reset parameters
  1424. */
  1425. data->cur_lunt->SCpnt = NULL;
  1426. data->cur_lunt = NULL;
  1427. data->cur_target = NULL;
  1428. data->CurrentSC = NULL;
  1429. }
  1430. /*
  1431. * Bus Free Occur
  1432. *
  1433. * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase
  1434. * with ACK reply when below condition is matched:
  1435. * MsgIn 00: Command Complete.
  1436. * MsgIn 02: Save Data Pointer.
  1437. * MsgIn 04: Diconnect.
  1438. * In other case, unexpected BUSFREE is detected.
  1439. */
  1440. static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
  1441. {
  1442. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1443. unsigned int base = SCpnt->device->host->io_port;
  1444. nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
  1445. show_autophase(execph);
  1446. nsp32_write4(base, BM_CNT, 0);
  1447. nsp32_write2(base, TRANSFER_CONTROL, 0);
  1448. /*
  1449. * MsgIn 02: Save Data Pointer
  1450. *
  1451. * VALID:
  1452. * Save Data Pointer is received. Adjust pointer.
  1453. *
  1454. * NO-VALID:
  1455. * SCSI-3 says if Save Data Pointer is not received, then we restart
  1456. * processing and we can't adjust any SCSI data pointer in next data
  1457. * phase.
  1458. */
  1459. if (execph & MSGIN_02_VALID) {
  1460. nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
  1461. /*
  1462. * Check sack_cnt/saved_sack_cnt, then adjust sg table if
  1463. * needed.
  1464. */
  1465. if (!(execph & MSGIN_00_VALID) &&
  1466. ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
  1467. unsigned int sacklen, s_sacklen;
  1468. /*
  1469. * Read SACK count and SAVEDSACK count, then compare.
  1470. */
  1471. sacklen = nsp32_read4(base, SACK_CNT );
  1472. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1473. /*
  1474. * If SAVEDSACKCNT == 0, it means SavedDataPointer is
  1475. * come after data transfering.
  1476. */
  1477. if (s_sacklen > 0) {
  1478. /*
  1479. * Comparing between sack and savedsack to
  1480. * check the condition of AutoMsgIn03.
  1481. *
  1482. * If they are same, set msgin03 == TRUE,
  1483. * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at
  1484. * reselection. On the other hand, if they
  1485. * aren't same, set msgin03 == FALSE, and
  1486. * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at
  1487. * reselection.
  1488. */
  1489. if (sacklen != s_sacklen) {
  1490. data->cur_lunt->msgin03 = FALSE;
  1491. } else {
  1492. data->cur_lunt->msgin03 = TRUE;
  1493. }
  1494. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1495. }
  1496. }
  1497. /* This value has not substitude with valid value yet... */
  1498. //data->cur_lunt->save_datp = data->cur_datp;
  1499. } else {
  1500. /*
  1501. * no processing.
  1502. */
  1503. }
  1504. if (execph & MSGIN_03_VALID) {
  1505. /* MsgIn03 was valid to be processed. No need processing. */
  1506. }
  1507. /*
  1508. * target SDTR check
  1509. */
  1510. if (data->cur_target->sync_flag & SDTR_INITIATOR) {
  1511. /*
  1512. * SDTR negotiation pulled by the initiator has not
  1513. * finished yet. Fall back to ASYNC mode.
  1514. */
  1515. nsp32_set_async(data, data->cur_target);
  1516. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1517. data->cur_target->sync_flag |= SDTR_DONE;
  1518. } else if (data->cur_target->sync_flag & SDTR_TARGET) {
  1519. /*
  1520. * SDTR negotiation pulled by the target has been
  1521. * negotiating.
  1522. */
  1523. if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
  1524. /*
  1525. * If valid message is received, then
  1526. * negotiation is succeeded.
  1527. */
  1528. } else {
  1529. /*
  1530. * On the contrary, if unexpected bus free is
  1531. * occurred, then negotiation is failed. Fall
  1532. * back to ASYNC mode.
  1533. */
  1534. nsp32_set_async(data, data->cur_target);
  1535. }
  1536. data->cur_target->sync_flag &= ~SDTR_TARGET;
  1537. data->cur_target->sync_flag |= SDTR_DONE;
  1538. }
  1539. /*
  1540. * It is always ensured by SCSI standard that initiator
  1541. * switches into Bus Free Phase after
  1542. * receiving message 00 (Command Complete), 04 (Disconnect).
  1543. * It's the reason that processing here is valid.
  1544. */
  1545. if (execph & MSGIN_00_VALID) {
  1546. /* MsgIn 00: Command Complete */
  1547. nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
  1548. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1549. SCpnt->SCp.Message = 0;
  1550. nsp32_dbg(NSP32_DEBUG_BUSFREE,
  1551. "normal end stat=0x%x resid=0x%x\n",
  1552. SCpnt->SCp.Status, SCpnt->resid);
  1553. SCpnt->result = (DID_OK << 16) |
  1554. (SCpnt->SCp.Message << 8) |
  1555. (SCpnt->SCp.Status << 0);
  1556. nsp32_scsi_done(SCpnt);
  1557. /* All operation is done */
  1558. return TRUE;
  1559. } else if (execph & MSGIN_04_VALID) {
  1560. /* MsgIn 04: Disconnect */
  1561. SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
  1562. SCpnt->SCp.Message = 4;
  1563. nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
  1564. return TRUE;
  1565. } else {
  1566. /* Unexpected bus free */
  1567. nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
  1568. /* DID_ERROR? */
  1569. //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0);
  1570. SCpnt->result = DID_ERROR << 16;
  1571. nsp32_scsi_done(SCpnt);
  1572. return TRUE;
  1573. }
  1574. return FALSE;
  1575. }
  1576. /*
  1577. * nsp32_adjust_busfree - adjusting SG table
  1578. *
  1579. * Note: This driver adjust the SG table using SCSI ACK
  1580. * counter instead of BMCNT counter!
  1581. */
  1582. static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
  1583. {
  1584. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1585. int old_entry = data->cur_entry;
  1586. int new_entry;
  1587. int sg_num = data->cur_lunt->sg_num;
  1588. nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
  1589. unsigned int restlen, sentlen;
  1590. u32_le len, addr;
  1591. nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", SCpnt->resid);
  1592. /* adjust saved SACK count with 4 byte start address boundary */
  1593. s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
  1594. /*
  1595. * calculate new_entry from sack count and each sgt[].len
  1596. * calculate the byte which is intent to send
  1597. */
  1598. sentlen = 0;
  1599. for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
  1600. sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
  1601. if (sentlen > s_sacklen) {
  1602. break;
  1603. }
  1604. }
  1605. /* all sgt is processed */
  1606. if (new_entry == sg_num) {
  1607. goto last;
  1608. }
  1609. if (sentlen == s_sacklen) {
  1610. /* XXX: confirm it's ok or not */
  1611. /* In this case, it's ok because we are at
  1612. the head element of the sg. restlen is correctly calculated. */
  1613. }
  1614. /* calculate the rest length for transfering */
  1615. restlen = sentlen - s_sacklen;
  1616. /* update adjusting current SG table entry */
  1617. len = le32_to_cpu(sgt[new_entry].len);
  1618. addr = le32_to_cpu(sgt[new_entry].addr);
  1619. addr += (len - restlen);
  1620. sgt[new_entry].addr = cpu_to_le32(addr);
  1621. sgt[new_entry].len = cpu_to_le32(restlen);
  1622. /* set cur_entry with new_entry */
  1623. data->cur_entry = new_entry;
  1624. return;
  1625. last:
  1626. if (SCpnt->resid < sentlen) {
  1627. nsp32_msg(KERN_ERR, "resid underflow");
  1628. }
  1629. SCpnt->resid -= sentlen;
  1630. nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", SCpnt->resid);
  1631. /* update hostdata and lun */
  1632. return;
  1633. }
  1634. /*
  1635. * It's called MsgOut phase occur.
  1636. * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in
  1637. * message out phase. It, however, has more than 3 messages,
  1638. * HBA creates the interrupt and we have to process by hand.
  1639. */
  1640. static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
  1641. {
  1642. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1643. unsigned int base = SCpnt->device->host->io_port;
  1644. //unsigned short command;
  1645. long new_sgtp;
  1646. int i;
  1647. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1648. "enter: msgout_len: 0x%x", data->msgout_len);
  1649. /*
  1650. * If MsgOut phase is occurred without having any
  1651. * message, then No_Operation is sent (SCSI-2).
  1652. */
  1653. if (data->msgout_len == 0) {
  1654. nsp32_build_nop(SCpnt);
  1655. }
  1656. /*
  1657. * Set SGTP ADDR current entry for restarting AUTOSCSI,
  1658. * because SGTP is incremented next point.
  1659. * There is few statement in the specification...
  1660. */
  1661. new_sgtp = data->cur_lunt->sglun_paddr +
  1662. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1663. /*
  1664. * send messages
  1665. */
  1666. for (i = 0; i < data->msgout_len; i++) {
  1667. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
  1668. "%d : 0x%x", i, data->msgoutbuf[i]);
  1669. /*
  1670. * Check REQ is asserted.
  1671. */
  1672. nsp32_wait_req(data, ASSERT);
  1673. if (i == (data->msgout_len - 1)) {
  1674. /*
  1675. * If the last message, set the AutoSCSI restart
  1676. * before send back the ack message. AutoSCSI
  1677. * restart automatically negate ATN signal.
  1678. */
  1679. //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1680. //nsp32_restart_autoscsi(SCpnt, command);
  1681. nsp32_write2(base, COMMAND_CONTROL,
  1682. (CLEAR_CDB_FIFO_POINTER |
  1683. AUTO_COMMAND_PHASE |
  1684. AUTOSCSI_RESTART |
  1685. AUTO_MSGIN_00_OR_04 |
  1686. AUTO_MSGIN_02 ));
  1687. }
  1688. /*
  1689. * Write data with SACK, then wait sack is
  1690. * automatically negated.
  1691. */
  1692. nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
  1693. nsp32_wait_sack(data, NEGATE);
  1694. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
  1695. nsp32_read1(base, SCSI_BUS_MONITOR));
  1696. };
  1697. data->msgout_len = 0;
  1698. nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
  1699. }
  1700. /*
  1701. * Restart AutoSCSI
  1702. *
  1703. * Note: Restarting AutoSCSI needs set:
  1704. * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL
  1705. */
  1706. static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
  1707. {
  1708. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1709. unsigned int base = data->BaseAddress;
  1710. unsigned short transfer = 0;
  1711. nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
  1712. if (data->cur_target == NULL || data->cur_lunt == NULL) {
  1713. nsp32_msg(KERN_ERR, "Target or Lun is invalid");
  1714. }
  1715. /*
  1716. * set SYNC_REG
  1717. * Don't set BM_START_ADR before setting this register.
  1718. */
  1719. nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
  1720. /*
  1721. * set ACKWIDTH
  1722. */
  1723. nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
  1724. /*
  1725. * set SREQ hazard killer sampling rate
  1726. */
  1727. nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
  1728. /*
  1729. * set SGT ADDR (physical address)
  1730. */
  1731. nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
  1732. /*
  1733. * set TRANSFER CONTROL REG
  1734. */
  1735. transfer = 0;
  1736. transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
  1737. if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
  1738. if (SCpnt->request_bufflen > 0) {
  1739. transfer |= BM_START;
  1740. }
  1741. } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
  1742. transfer |= CB_MMIO_MODE;
  1743. } else if (data->trans_method & NSP32_TRANSFER_PIO) {
  1744. transfer |= CB_IO_MODE;
  1745. }
  1746. nsp32_write2(base, TRANSFER_CONTROL, transfer);
  1747. /*
  1748. * restart AutoSCSI
  1749. *
  1750. * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ?
  1751. */
  1752. command |= (CLEAR_CDB_FIFO_POINTER |
  1753. AUTO_COMMAND_PHASE |
  1754. AUTOSCSI_RESTART );
  1755. nsp32_write2(base, COMMAND_CONTROL, command);
  1756. nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
  1757. }
  1758. /*
  1759. * cannot run automatically message in occur
  1760. */
  1761. static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
  1762. unsigned long irq_status,
  1763. unsigned short execph)
  1764. {
  1765. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  1766. unsigned int base = SCpnt->device->host->io_port;
  1767. unsigned char msg;
  1768. unsigned char msgtype;
  1769. unsigned char newlun;
  1770. unsigned short command = 0;
  1771. int msgclear = TRUE;
  1772. long new_sgtp;
  1773. int ret;
  1774. /*
  1775. * read first message
  1776. * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure
  1777. * of Message-In have to be processed before sending back SCSI ACK.
  1778. */
  1779. msg = nsp32_read1(base, SCSI_DATA_IN);
  1780. data->msginbuf[(unsigned char)data->msgin_len] = msg;
  1781. msgtype = data->msginbuf[0];
  1782. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
  1783. "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
  1784. data->msgin_len, msg, msgtype);
  1785. /*
  1786. * TODO: We need checking whether bus phase is message in?
  1787. */
  1788. /*
  1789. * assert SCSI ACK
  1790. */
  1791. nsp32_sack_assert(data);
  1792. /*
  1793. * processing IDENTIFY
  1794. */
  1795. if (msgtype & 0x80) {
  1796. if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
  1797. /* Invalid (non reselect) phase */
  1798. goto reject;
  1799. }
  1800. newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */
  1801. ret = nsp32_reselection(SCpnt, newlun);
  1802. if (ret == TRUE) {
  1803. goto restart;
  1804. } else {
  1805. goto reject;
  1806. }
  1807. }
  1808. /*
  1809. * processing messages except for IDENTIFY
  1810. *
  1811. * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO.
  1812. */
  1813. switch (msgtype) {
  1814. /*
  1815. * 1-byte message
  1816. */
  1817. case COMMAND_COMPLETE:
  1818. case DISCONNECT:
  1819. /*
  1820. * These messages should not be occurred.
  1821. * They should be processed on AutoSCSI sequencer.
  1822. */
  1823. nsp32_msg(KERN_WARNING,
  1824. "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
  1825. break;
  1826. case RESTORE_POINTERS:
  1827. /*
  1828. * AutoMsgIn03 is disabled, and HBA gets this message.
  1829. */
  1830. if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
  1831. unsigned int s_sacklen;
  1832. s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
  1833. if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
  1834. nsp32_adjust_busfree(SCpnt, s_sacklen);
  1835. } else {
  1836. /* No need to rewrite SGT */
  1837. }
  1838. }
  1839. data->cur_lunt->msgin03 = FALSE;
  1840. /* Update with the new value */
  1841. /* reset SACK/SavedACK counter (or ALL clear?) */
  1842. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  1843. /*
  1844. * set new sg pointer
  1845. */
  1846. new_sgtp = data->cur_lunt->sglun_paddr +
  1847. (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
  1848. nsp32_write4(base, SGT_ADR, new_sgtp);
  1849. break;
  1850. case SAVE_POINTERS:
  1851. /*
  1852. * These messages should not be occurred.
  1853. * They should be processed on AutoSCSI sequencer.
  1854. */
  1855. nsp32_msg (KERN_WARNING,
  1856. "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
  1857. break;
  1858. case MESSAGE_REJECT:
  1859. /* If previous message_out is sending SDTR, and get
  1860. message_reject from target, SDTR negotiation is failed */
  1861. if (data->cur_target->sync_flag &
  1862. (SDTR_INITIATOR | SDTR_TARGET)) {
  1863. /*
  1864. * Current target is negotiating SDTR, but it's
  1865. * failed. Fall back to async transfer mode, and set
  1866. * SDTR_DONE.
  1867. */
  1868. nsp32_set_async(data, data->cur_target);
  1869. data->cur_target->sync_flag &= ~SDTR_INITIATOR;
  1870. data->cur_target->sync_flag |= SDTR_DONE;
  1871. }
  1872. break;
  1873. case LINKED_CMD_COMPLETE:
  1874. case LINKED_FLG_CMD_COMPLETE:
  1875. /* queue tag is not supported currently */
  1876. nsp32_msg (KERN_WARNING,
  1877. "unsupported message: 0x%x", msgtype);
  1878. break;
  1879. case INITIATE_RECOVERY:
  1880. /* staring ECA (Extended Contingent Allegiance) state. */
  1881. /* This message is declined in SPI2 or later. */
  1882. goto reject;
  1883. /*
  1884. * 2-byte message
  1885. */
  1886. case SIMPLE_QUEUE_TAG:
  1887. case 0x23:
  1888. /*
  1889. * 0x23: Ignore_Wide_Residue is not declared in scsi.h.
  1890. * No support is needed.
  1891. */
  1892. if (data->msgin_len >= 1) {
  1893. goto reject;
  1894. }
  1895. /* current position is 1-byte of 2 byte */
  1896. msgclear = FALSE;
  1897. break;
  1898. /*
  1899. * extended message
  1900. */
  1901. case EXTENDED_MESSAGE:
  1902. if (data->msgin_len < 1) {
  1903. /*
  1904. * Current position does not reach 2-byte
  1905. * (2-byte is extended message length).
  1906. */
  1907. msgclear = FALSE;
  1908. break;
  1909. }
  1910. if ((data->msginbuf[1] + 1) > data->msgin_len) {
  1911. /*
  1912. * Current extended message has msginbuf[1] + 2
  1913. * (msgin_len starts counting from 0, so buf[1] + 1).
  1914. * If current message position is not finished,
  1915. * continue receiving message.
  1916. */
  1917. msgclear = FALSE;
  1918. break;
  1919. }
  1920. /*
  1921. * Reach here means regular length of each type of
  1922. * extended messages.
  1923. */
  1924. switch (data->msginbuf[2]) {
  1925. case EXTENDED_MODIFY_DATA_POINTER:
  1926. /* TODO */
  1927. goto reject; /* not implemented yet */
  1928. break;
  1929. case EXTENDED_SDTR:
  1930. /*
  1931. * Exchange this message between initiator and target.
  1932. */
  1933. if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
  1934. /*
  1935. * received inappropriate message.
  1936. */
  1937. goto reject;
  1938. break;
  1939. }
  1940. nsp32_analyze_sdtr(SCpnt);
  1941. break;
  1942. case EXTENDED_EXTENDED_IDENTIFY:
  1943. /* SCSI-I only, not supported. */
  1944. goto reject; /* not implemented yet */
  1945. break;
  1946. case EXTENDED_WDTR:
  1947. goto reject; /* not implemented yet */
  1948. break;
  1949. default:
  1950. goto reject;
  1951. }
  1952. break;
  1953. default:
  1954. goto reject;
  1955. }
  1956. restart:
  1957. if (msgclear == TRUE) {
  1958. data->msgin_len = 0;
  1959. /*
  1960. * If restarting AutoSCSI, but there are some message to out
  1961. * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0
  1962. * (MV_VALID = 0). When commandcontrol is written with
  1963. * AutoSCSI restart, at the same time MsgOutOccur should be
  1964. * happened (however, such situation is really possible...?).
  1965. */
  1966. if (data->msgout_len > 0) {
  1967. nsp32_write4(base, SCSI_MSG_OUT, 0);
  1968. command |= AUTO_ATN;
  1969. }
  1970. /*
  1971. * restart AutoSCSI
  1972. * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed.
  1973. */
  1974. command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
  1975. /*
  1976. * If current msgin03 is TRUE, then flag on.
  1977. */
  1978. if (data->cur_lunt->msgin03 == TRUE) {
  1979. command |= AUTO_MSGIN_03;
  1980. }
  1981. data->cur_lunt->msgin03 = FALSE;
  1982. } else {
  1983. data->msgin_len++;
  1984. }
  1985. /*
  1986. * restart AutoSCSI
  1987. */
  1988. nsp32_restart_autoscsi(SCpnt, command);
  1989. /*
  1990. * wait SCSI REQ negate for REQ-ACK handshake
  1991. */
  1992. nsp32_wait_req(data, NEGATE);
  1993. /*
  1994. * negate SCSI ACK
  1995. */
  1996. nsp32_sack_negate(data);
  1997. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  1998. return;
  1999. reject:
  2000. nsp32_msg(KERN_WARNING,
  2001. "invalid or unsupported MessageIn, rejected. "
  2002. "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
  2003. msg, data->msgin_len, msgtype);
  2004. nsp32_build_reject(SCpnt);
  2005. data->msgin_len = 0;
  2006. goto restart;
  2007. }
  2008. /*
  2009. *
  2010. */
  2011. static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
  2012. {
  2013. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2014. nsp32_target *target = data->cur_target;
  2015. nsp32_sync_table *synct;
  2016. unsigned char get_period = data->msginbuf[3];
  2017. unsigned char get_offset = data->msginbuf[4];
  2018. int entry;
  2019. int syncnum;
  2020. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
  2021. synct = data->synct;
  2022. syncnum = data->syncnum;
  2023. /*
  2024. * If this inititor sent the SDTR message, then target responds SDTR,
  2025. * initiator SYNCREG, ACKWIDTH from SDTR parameter.
  2026. * Messages are not appropriate, then send back reject message.
  2027. * If initiator did not send the SDTR, but target sends SDTR,
  2028. * initiator calculator the appropriate parameter and send back SDTR.
  2029. */
  2030. if (target->sync_flag & SDTR_INITIATOR) {
  2031. /*
  2032. * Initiator sent SDTR, the target responds and
  2033. * send back negotiation SDTR.
  2034. */
  2035. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
  2036. target->sync_flag &= ~SDTR_INITIATOR;
  2037. target->sync_flag |= SDTR_DONE;
  2038. /*
  2039. * offset:
  2040. */
  2041. if (get_offset > SYNC_OFFSET) {
  2042. /*
  2043. * Negotiation is failed, the target send back
  2044. * unexpected offset value.
  2045. */
  2046. goto reject;
  2047. }
  2048. if (get_offset == ASYNC_OFFSET) {
  2049. /*
  2050. * Negotiation is succeeded, the target want
  2051. * to fall back into asynchronous transfer mode.
  2052. */
  2053. goto async;
  2054. }
  2055. /*
  2056. * period:
  2057. * Check whether sync period is too short. If too short,
  2058. * fall back to async mode. If it's ok, then investigate
  2059. * the received sync period. If sync period is acceptable
  2060. * between sync table start_period and end_period, then
  2061. * set this I_T nexus as sent offset and period.
  2062. * If it's not acceptable, send back reject and fall back
  2063. * to async mode.
  2064. */
  2065. if (get_period < data->synct[0].period_num) {
  2066. /*
  2067. * Negotiation is failed, the target send back
  2068. * unexpected period value.
  2069. */
  2070. goto reject;
  2071. }
  2072. entry = nsp32_search_period_entry(data, target, get_period);
  2073. if (entry < 0) {
  2074. /*
  2075. * Target want to use long period which is not
  2076. * acceptable NinjaSCSI-32Bi/UDE.
  2077. */
  2078. goto reject;
  2079. }
  2080. /*
  2081. * Set new sync table and offset in this I_T nexus.
  2082. */
  2083. nsp32_set_sync_entry(data, target, entry, get_offset);
  2084. } else {
  2085. /* Target send SDTR to initiator. */
  2086. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
  2087. target->sync_flag |= SDTR_INITIATOR;
  2088. /* offset: */
  2089. if (get_offset > SYNC_OFFSET) {
  2090. /* send back as SYNC_OFFSET */
  2091. get_offset = SYNC_OFFSET;
  2092. }
  2093. /* period: */
  2094. if (get_period < data->synct[0].period_num) {
  2095. get_period = data->synct[0].period_num;
  2096. }
  2097. entry = nsp32_search_period_entry(data, target, get_period);
  2098. if (get_offset == ASYNC_OFFSET || entry < 0) {
  2099. nsp32_set_async(data, target);
  2100. nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
  2101. } else {
  2102. nsp32_set_sync_entry(data, target, entry, get_offset);
  2103. nsp32_build_sdtr(SCpnt, get_period, get_offset);
  2104. }
  2105. }
  2106. target->period = get_period;
  2107. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
  2108. return;
  2109. reject:
  2110. /*
  2111. * If the current message is unacceptable, send back to the target
  2112. * with reject message.
  2113. */
  2114. nsp32_build_reject(SCpnt);
  2115. async:
  2116. nsp32_set_async(data, target); /* set as ASYNC transfer mode */
  2117. target->period = 0;
  2118. nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
  2119. return;
  2120. }
  2121. /*
  2122. * Search config entry number matched in sync_table from given
  2123. * target and speed period value. If failed to search, return negative value.
  2124. */
  2125. static int nsp32_search_period_entry(nsp32_hw_data *data,
  2126. nsp32_target *target,
  2127. unsigned char period)
  2128. {
  2129. int i;
  2130. if (target->limit_entry >= data->syncnum) {
  2131. nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
  2132. target->limit_entry = 0;
  2133. }
  2134. for (i = target->limit_entry; i < data->syncnum; i++) {
  2135. if (period >= data->synct[i].start_period &&
  2136. period <= data->synct[i].end_period) {
  2137. break;
  2138. }
  2139. }
  2140. /*
  2141. * Check given period value is over the sync_table value.
  2142. * If so, return max value.
  2143. */
  2144. if (i == data->syncnum) {
  2145. i = -1;
  2146. }
  2147. return i;
  2148. }
  2149. /*
  2150. * target <-> initiator use ASYNC transfer
  2151. */
  2152. static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
  2153. {
  2154. unsigned char period = data->synct[target->limit_entry].period_num;
  2155. target->offset = ASYNC_OFFSET;
  2156. target->period = 0;
  2157. target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
  2158. target->ackwidth = 0;
  2159. target->sample_reg = 0;
  2160. nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
  2161. }
  2162. /*
  2163. * target <-> initiator use maximum SYNC transfer
  2164. */
  2165. static void nsp32_set_max_sync(nsp32_hw_data *data,
  2166. nsp32_target *target,
  2167. unsigned char *period,
  2168. unsigned char *offset)
  2169. {
  2170. unsigned char period_num, ackwidth;
  2171. period_num = data->synct[target->limit_entry].period_num;
  2172. *period = data->synct[target->limit_entry].start_period;
  2173. ackwidth = data->synct[target->limit_entry].ackwidth;
  2174. *offset = SYNC_OFFSET;
  2175. target->syncreg = TO_SYNCREG(period_num, *offset);
  2176. target->ackwidth = ackwidth;
  2177. target->offset = *offset;
  2178. target->sample_reg = 0; /* disable SREQ sampling */
  2179. }
  2180. /*
  2181. * target <-> initiator use entry number speed
  2182. */
  2183. static void nsp32_set_sync_entry(nsp32_hw_data *data,
  2184. nsp32_target *target,
  2185. int entry,
  2186. unsigned char offset)
  2187. {
  2188. unsigned char period, ackwidth, sample_rate;
  2189. period = data->synct[entry].period_num;
  2190. ackwidth = data->synct[entry].ackwidth;
  2191. offset = offset;
  2192. sample_rate = data->synct[entry].sample_rate;
  2193. target->syncreg = TO_SYNCREG(period, offset);
  2194. target->ackwidth = ackwidth;
  2195. target->offset = offset;
  2196. target->sample_reg = sample_rate | SAMPLING_ENABLE;
  2197. nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
  2198. }
  2199. /*
  2200. * It waits until SCSI REQ becomes assertion or negation state.
  2201. *
  2202. * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then
  2203. * connected target responds SCSI REQ negation. We have to wait
  2204. * SCSI REQ becomes negation in order to negate SCSI ACK signal for
  2205. * REQ-ACK handshake.
  2206. */
  2207. static void nsp32_wait_req(nsp32_hw_data *data, int state)
  2208. {
  2209. unsigned int base = data->BaseAddress;
  2210. int wait_time = 0;
  2211. unsigned char bus, req_bit;
  2212. if (!((state == ASSERT) || (state == NEGATE))) {
  2213. nsp32_msg(KERN_ERR, "unknown state designation");
  2214. }
  2215. /* REQ is BIT(5) */
  2216. req_bit = (state == ASSERT ? BUSMON_REQ : 0);
  2217. do {
  2218. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2219. if ((bus & BUSMON_REQ) == req_bit) {
  2220. nsp32_dbg(NSP32_DEBUG_WAIT,
  2221. "wait_time: %d", wait_time);
  2222. return;
  2223. }
  2224. udelay(1);
  2225. wait_time++;
  2226. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2227. nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
  2228. }
  2229. /*
  2230. * It waits until SCSI SACK becomes assertion or negation state.
  2231. */
  2232. static void nsp32_wait_sack(nsp32_hw_data *data, int state)
  2233. {
  2234. unsigned int base = data->BaseAddress;
  2235. int wait_time = 0;
  2236. unsigned char bus, ack_bit;
  2237. if (!((state == ASSERT) || (state == NEGATE))) {
  2238. nsp32_msg(KERN_ERR, "unknown state designation");
  2239. }
  2240. /* ACK is BIT(4) */
  2241. ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
  2242. do {
  2243. bus = nsp32_read1(base, SCSI_BUS_MONITOR);
  2244. if ((bus & BUSMON_ACK) == ack_bit) {
  2245. nsp32_dbg(NSP32_DEBUG_WAIT,
  2246. "wait_time: %d", wait_time);
  2247. return;
  2248. }
  2249. udelay(1);
  2250. wait_time++;
  2251. } while (wait_time < REQSACK_TIMEOUT_TIME);
  2252. nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
  2253. }
  2254. /*
  2255. * assert SCSI ACK
  2256. *
  2257. * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1.
  2258. */
  2259. static void nsp32_sack_assert(nsp32_hw_data *data)
  2260. {
  2261. unsigned int base = data->BaseAddress;
  2262. unsigned char busctrl;
  2263. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2264. busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
  2265. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2266. }
  2267. /*
  2268. * negate SCSI ACK
  2269. */
  2270. static void nsp32_sack_negate(nsp32_hw_data *data)
  2271. {
  2272. unsigned int base = data->BaseAddress;
  2273. unsigned char busctrl;
  2274. busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
  2275. busctrl &= ~BUSCTL_ACK;
  2276. nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
  2277. }
  2278. /*
  2279. * Note: n_io_port is defined as 0x7f because I/O register port is
  2280. * assigned as:
  2281. * 0x800-0x8ff: memory mapped I/O port
  2282. * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly)
  2283. * 0xc00-0xfff: CardBus status registers
  2284. */
  2285. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  2286. #define DETECT_OK 0
  2287. #define DETECT_NG 1
  2288. #define PCIDEV pdev
  2289. static int nsp32_detect(struct pci_dev *pdev)
  2290. #else
  2291. #define DETECT_OK 1
  2292. #define DETECT_NG 0
  2293. #define PCIDEV (data->Pci)
  2294. static int nsp32_detect(struct scsi_host_template *sht)
  2295. #endif
  2296. {
  2297. struct Scsi_Host *host; /* registered host structure */
  2298. struct resource *res;
  2299. nsp32_hw_data *data;
  2300. int ret;
  2301. int i, j;
  2302. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2303. /*
  2304. * register this HBA as SCSI device
  2305. */
  2306. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  2307. host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
  2308. #else
  2309. host = scsi_register(sht, sizeof(nsp32_hw_data));
  2310. #endif
  2311. if (host == NULL) {
  2312. nsp32_msg (KERN_ERR, "failed to scsi register");
  2313. goto err;
  2314. }
  2315. /*
  2316. * set nsp32_hw_data
  2317. */
  2318. data = (nsp32_hw_data *)host->hostdata;
  2319. memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
  2320. host->irq = data->IrqNumber;
  2321. host->io_port = data->BaseAddress;
  2322. host->unique_id = data->BaseAddress;
  2323. host->n_io_port = data->NumAddress;
  2324. host->base = (unsigned long)data->MmioAddress;
  2325. #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,63))
  2326. scsi_set_pci_device(host, PCIDEV);
  2327. #endif
  2328. data->Host = host;
  2329. spin_lock_init(&(data->Lock));
  2330. data->cur_lunt = NULL;
  2331. data->cur_target = NULL;
  2332. /*
  2333. * Bus master transfer mode is supported currently.
  2334. */
  2335. data->trans_method = NSP32_TRANSFER_BUSMASTER;
  2336. /*
  2337. * Set clock div, CLOCK_4 (HBA has own external clock, and
  2338. * dividing * 100ns/4).
  2339. * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet.
  2340. */
  2341. data->clock = CLOCK_4;
  2342. /*
  2343. * Select appropriate nsp32_sync_table and set I_CLOCKDIV.
  2344. */
  2345. switch (data->clock) {
  2346. case CLOCK_4:
  2347. /* If data->clock is CLOCK_4, then select 40M sync table. */
  2348. data->synct = nsp32_sync_table_40M;
  2349. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2350. break;
  2351. case CLOCK_2:
  2352. /* If data->clock is CLOCK_2, then select 20M sync table. */
  2353. data->synct = nsp32_sync_table_20M;
  2354. data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
  2355. break;
  2356. case PCICLK:
  2357. /* If data->clock is PCICLK, then select pci sync table. */
  2358. data->synct = nsp32_sync_table_pci;
  2359. data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
  2360. break;
  2361. default:
  2362. nsp32_msg(KERN_WARNING,
  2363. "Invalid clock div is selected, set CLOCK_4.");
  2364. /* Use default value CLOCK_4 */
  2365. data->clock = CLOCK_4;
  2366. data->synct = nsp32_sync_table_40M;
  2367. data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
  2368. }
  2369. /*
  2370. * setup nsp32_lunt
  2371. */
  2372. /*
  2373. * setup DMA
  2374. */
  2375. if (pci_set_dma_mask(PCIDEV, DMA_32BIT_MASK) != 0) {
  2376. nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
  2377. goto scsi_unregister;
  2378. }
  2379. /*
  2380. * allocate autoparam DMA resource.
  2381. */
  2382. data->autoparam = pci_alloc_consistent(PCIDEV, sizeof(nsp32_autoparam), &(data->auto_paddr));
  2383. if (data->autoparam == NULL) {
  2384. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2385. goto scsi_unregister;
  2386. }
  2387. /*
  2388. * allocate scatter-gather DMA resource.
  2389. */
  2390. data->sg_list = pci_alloc_consistent(PCIDEV, NSP32_SG_TABLE_SIZE,
  2391. &(data->sg_paddr));
  2392. if (data->sg_list == NULL) {
  2393. nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
  2394. goto free_autoparam;
  2395. }
  2396. for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
  2397. for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
  2398. int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
  2399. nsp32_lunt tmp = {
  2400. .SCpnt = NULL,
  2401. .save_datp = 0,
  2402. .msgin03 = FALSE,
  2403. .sg_num = 0,
  2404. .cur_entry = 0,
  2405. .sglun = &(data->sg_list[offset]),
  2406. .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
  2407. };
  2408. data->lunt[i][j] = tmp;
  2409. }
  2410. }
  2411. /*
  2412. * setup target
  2413. */
  2414. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2415. nsp32_target *target = &(data->target[i]);
  2416. target->limit_entry = 0;
  2417. target->sync_flag = 0;
  2418. nsp32_set_async(data, target);
  2419. }
  2420. /*
  2421. * EEPROM check
  2422. */
  2423. ret = nsp32_getprom_param(data);
  2424. if (ret == FALSE) {
  2425. data->resettime = 3; /* default 3 */
  2426. }
  2427. /*
  2428. * setup HBA
  2429. */
  2430. nsp32hw_init(data);
  2431. snprintf(data->info_str, sizeof(data->info_str),
  2432. "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
  2433. host->irq, host->io_port, host->n_io_port);
  2434. /*
  2435. * SCSI bus reset
  2436. *
  2437. * Note: It's important to reset SCSI bus in initialization phase.
  2438. * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when
  2439. * system is coming up, so SCSI devices connected to HBA is set as
  2440. * un-asynchronous mode. It brings the merit that this HBA is
  2441. * ready to start synchronous transfer without any preparation,
  2442. * but we are difficult to control transfer speed. In addition,
  2443. * it prevents device transfer speed from effecting EEPROM start-up
  2444. * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as
  2445. * Auto Mode, then FAST-10M is selected when SCSI devices are
  2446. * connected same or more than 4 devices. It should be avoided
  2447. * depending on this specification. Thus, resetting the SCSI bus
  2448. * restores all connected SCSI devices to asynchronous mode, then
  2449. * this driver set SDTR safely later, and we can control all SCSI
  2450. * device transfer mode.
  2451. */
  2452. nsp32_do_bus_reset(data);
  2453. ret = request_irq(host->irq, do_nsp32_isr,
  2454. SA_SHIRQ | SA_SAMPLE_RANDOM, "nsp32", data);
  2455. if (ret < 0) {
  2456. nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
  2457. "SCSI PCI controller. Interrupt: %d", host->irq);
  2458. goto free_sg_list;
  2459. }
  2460. /*
  2461. * PCI IO register
  2462. */
  2463. res = request_region(host->io_port, host->n_io_port, "nsp32");
  2464. if (res == NULL) {
  2465. nsp32_msg(KERN_ERR,
  2466. "I/O region 0x%lx+0x%lx is already used",
  2467. data->BaseAddress, data->NumAddress);
  2468. goto free_irq;
  2469. }
  2470. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  2471. scsi_add_host (host, &PCIDEV->dev);
  2472. scsi_scan_host(host);
  2473. #endif
  2474. pci_set_drvdata(PCIDEV, host);
  2475. return DETECT_OK;
  2476. free_irq:
  2477. free_irq(host->irq, data);
  2478. free_sg_list:
  2479. pci_free_consistent(PCIDEV, NSP32_SG_TABLE_SIZE,
  2480. data->sg_list, data->sg_paddr);
  2481. free_autoparam:
  2482. pci_free_consistent(PCIDEV, sizeof(nsp32_autoparam),
  2483. data->autoparam, data->auto_paddr);
  2484. scsi_unregister:
  2485. scsi_host_put(host);
  2486. err:
  2487. return DETECT_NG;
  2488. }
  2489. #undef DETECT_OK
  2490. #undef DETECT_NG
  2491. #undef PCIDEV
  2492. static int nsp32_release(struct Scsi_Host *host)
  2493. {
  2494. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2495. if (data->autoparam) {
  2496. pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
  2497. data->autoparam, data->auto_paddr);
  2498. }
  2499. if (data->sg_list) {
  2500. pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
  2501. data->sg_list, data->sg_paddr);
  2502. }
  2503. if (host->irq) {
  2504. free_irq(host->irq, data);
  2505. }
  2506. if (host->io_port && host->n_io_port) {
  2507. release_region(host->io_port, host->n_io_port);
  2508. }
  2509. if (data->MmioAddress) {
  2510. iounmap(data->MmioAddress);
  2511. }
  2512. return 0;
  2513. }
  2514. static const char *nsp32_info(struct Scsi_Host *shpnt)
  2515. {
  2516. nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
  2517. return data->info_str;
  2518. }
  2519. /****************************************************************************
  2520. * error handler
  2521. */
  2522. static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
  2523. {
  2524. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2525. unsigned int base = SCpnt->device->host->io_port;
  2526. nsp32_msg(KERN_WARNING, "abort");
  2527. if (data->cur_lunt->SCpnt == NULL) {
  2528. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
  2529. return FAILED;
  2530. }
  2531. if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
  2532. /* reset SDTR negotiation */
  2533. data->cur_target->sync_flag = 0;
  2534. nsp32_set_async(data, data->cur_target);
  2535. }
  2536. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2537. nsp32_write2(base, BM_CNT, 0);
  2538. SCpnt->result = DID_ABORT << 16;
  2539. nsp32_scsi_done(SCpnt);
  2540. nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
  2541. return SUCCESS;
  2542. }
  2543. static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt)
  2544. {
  2545. nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
  2546. unsigned int base = SCpnt->device->host->io_port;
  2547. spin_lock_irq(SCpnt->device->host->host_lock);
  2548. nsp32_msg(KERN_INFO, "Bus Reset");
  2549. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2550. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2551. nsp32_do_bus_reset(data);
  2552. nsp32_write2(base, IRQ_CONTROL, 0);
  2553. spin_unlock_irq(SCpnt->device->host->host_lock);
  2554. return SUCCESS; /* SCSI bus reset is succeeded at any time. */
  2555. }
  2556. static void nsp32_do_bus_reset(nsp32_hw_data *data)
  2557. {
  2558. unsigned int base = data->BaseAddress;
  2559. unsigned short intrdat;
  2560. int i;
  2561. nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
  2562. /*
  2563. * stop all transfer
  2564. * clear TRANSFERCONTROL_BM_START
  2565. * clear counter
  2566. */
  2567. nsp32_write2(base, TRANSFER_CONTROL, 0);
  2568. nsp32_write4(base, BM_CNT, 0);
  2569. nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
  2570. /*
  2571. * fall back to asynchronous transfer mode
  2572. * initialize SDTR negotiation flag
  2573. */
  2574. for (i = 0; i < ARRAY_SIZE(data->target); i++) {
  2575. nsp32_target *target = &data->target[i];
  2576. target->sync_flag = 0;
  2577. nsp32_set_async(data, target);
  2578. }
  2579. /*
  2580. * reset SCSI bus
  2581. */
  2582. nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
  2583. udelay(RESET_HOLD_TIME);
  2584. nsp32_write1(base, SCSI_BUS_CONTROL, 0);
  2585. for(i = 0; i < 5; i++) {
  2586. intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */
  2587. nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
  2588. }
  2589. data->CurrentSC = NULL;
  2590. }
  2591. static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
  2592. {
  2593. struct Scsi_Host *host = SCpnt->device->host;
  2594. unsigned int base = SCpnt->device->host->io_port;
  2595. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2596. nsp32_msg(KERN_INFO, "Host Reset");
  2597. nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
  2598. spin_lock_irq(SCpnt->device->host->host_lock);
  2599. nsp32hw_init(data);
  2600. nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
  2601. nsp32_do_bus_reset(data);
  2602. nsp32_write2(base, IRQ_CONTROL, 0);
  2603. spin_unlock_irq(SCpnt->device->host->host_lock);
  2604. return SUCCESS; /* Host reset is succeeded at any time. */
  2605. }
  2606. /**************************************************************************
  2607. * EEPROM handler
  2608. */
  2609. /*
  2610. * getting EEPROM parameter
  2611. */
  2612. static int nsp32_getprom_param(nsp32_hw_data *data)
  2613. {
  2614. int vendor = data->pci_devid->vendor;
  2615. int device = data->pci_devid->device;
  2616. int ret, val, i;
  2617. /*
  2618. * EEPROM checking.
  2619. */
  2620. ret = nsp32_prom_read(data, 0x7e);
  2621. if (ret != 0x55) {
  2622. nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
  2623. return FALSE;
  2624. }
  2625. ret = nsp32_prom_read(data, 0x7f);
  2626. if (ret != 0xaa) {
  2627. nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
  2628. return FALSE;
  2629. }
  2630. /*
  2631. * check EEPROM type
  2632. */
  2633. if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2634. device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
  2635. ret = nsp32_getprom_c16(data);
  2636. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2637. device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
  2638. ret = nsp32_getprom_at24(data);
  2639. } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
  2640. device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
  2641. ret = nsp32_getprom_at24(data);
  2642. } else {
  2643. nsp32_msg(KERN_WARNING, "Unknown EEPROM");
  2644. ret = FALSE;
  2645. }
  2646. /* for debug : SPROM data full checking */
  2647. for (i = 0; i <= 0x1f; i++) {
  2648. val = nsp32_prom_read(data, i);
  2649. nsp32_dbg(NSP32_DEBUG_EEPROM,
  2650. "rom address 0x%x : 0x%x", i, val);
  2651. }
  2652. return ret;
  2653. }
  2654. /*
  2655. * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
  2656. *
  2657. * ROMADDR
  2658. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2659. * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M
  2660. * 0x07 : HBA Synchronous Transfer Period
  2661. * Value 0: AutoSync, 1: Manual Setting
  2662. * 0x08 - 0x0f : Not Used? (0x0)
  2663. * 0x10 : Bus Termination
  2664. * Value 0: Auto[ON], 1: ON, 2: OFF
  2665. * 0x11 : Not Used? (0)
  2666. * 0x12 : Bus Reset Delay Time (0x03)
  2667. * 0x13 : Bootable CD Support
  2668. * Value 0: Disable, 1: Enable
  2669. * 0x14 : Device Scan
  2670. * Bit 7 6 5 4 3 2 1 0
  2671. * | <----------------->
  2672. * | SCSI ID: Value 0: Skip, 1: YES
  2673. * |-> Value 0: ALL scan, Value 1: Manual
  2674. * 0x15 - 0x1b : Not Used? (0)
  2675. * 0x1c : Constant? (0x01) (clock div?)
  2676. * 0x1d - 0x7c : Not Used (0xff)
  2677. * 0x7d : Not Used? (0xff)
  2678. * 0x7e : Constant (0x55), Validity signature
  2679. * 0x7f : Constant (0xaa), Validity signature
  2680. */
  2681. static int nsp32_getprom_at24(nsp32_hw_data *data)
  2682. {
  2683. int ret, i;
  2684. int auto_sync;
  2685. nsp32_target *target;
  2686. int entry;
  2687. /*
  2688. * Reset time which is designated by EEPROM.
  2689. *
  2690. * TODO: Not used yet.
  2691. */
  2692. data->resettime = nsp32_prom_read(data, 0x12);
  2693. /*
  2694. * HBA Synchronous Transfer Period
  2695. *
  2696. * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says
  2697. * that if auto_sync is 0 (auto), and connected SCSI devices are
  2698. * same or lower than 3, then transfer speed is set as ULTRA-20M.
  2699. * On the contrary if connected SCSI devices are same or higher
  2700. * than 4, then transfer speed is set as FAST-10M.
  2701. *
  2702. * I break this rule. The number of connected SCSI devices are
  2703. * only ignored. If auto_sync is 0 (auto), then transfer speed is
  2704. * forced as ULTRA-20M.
  2705. */
  2706. ret = nsp32_prom_read(data, 0x07);
  2707. switch (ret) {
  2708. case 0:
  2709. auto_sync = TRUE;
  2710. break;
  2711. case 1:
  2712. auto_sync = FALSE;
  2713. break;
  2714. default:
  2715. nsp32_msg(KERN_WARNING,
  2716. "Unsupported Auto Sync mode. Fall back to manual mode.");
  2717. auto_sync = TRUE;
  2718. }
  2719. if (trans_mode == ULTRA20M_MODE) {
  2720. auto_sync = TRUE;
  2721. }
  2722. /*
  2723. * each device Synchronous Transfer Period
  2724. */
  2725. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2726. target = &data->target[i];
  2727. if (auto_sync == TRUE) {
  2728. target->limit_entry = 0; /* set as ULTRA20M */
  2729. } else {
  2730. ret = nsp32_prom_read(data, i);
  2731. entry = nsp32_search_period_entry(data, target, ret);
  2732. if (entry < 0) {
  2733. /* search failed... set maximum speed */
  2734. entry = 0;
  2735. }
  2736. target->limit_entry = entry;
  2737. }
  2738. }
  2739. return TRUE;
  2740. }
  2741. /*
  2742. * C16 110 (I-O Data: SC-NBD) data map:
  2743. *
  2744. * ROMADDR
  2745. * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6)
  2746. * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC
  2747. * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync)
  2748. * 0x08 - 0x0f : Not Used? (0x0)
  2749. * 0x10 : Transfer Mode
  2750. * Value 0: PIO, 1: Busmater
  2751. * 0x11 : Bus Reset Delay Time (0x00-0x20)
  2752. * 0x12 : Bus Termination
  2753. * Value 0: Disable, 1: Enable
  2754. * 0x13 - 0x19 : Disconnection
  2755. * Value 0: Disable, 1: Enable
  2756. * 0x1a - 0x7c : Not Used? (0)
  2757. * 0x7d : Not Used? (0xf8)
  2758. * 0x7e : Constant (0x55), Validity signature
  2759. * 0x7f : Constant (0xaa), Validity signature
  2760. */
  2761. static int nsp32_getprom_c16(nsp32_hw_data *data)
  2762. {
  2763. int ret, i;
  2764. nsp32_target *target;
  2765. int entry, val;
  2766. /*
  2767. * Reset time which is designated by EEPROM.
  2768. *
  2769. * TODO: Not used yet.
  2770. */
  2771. data->resettime = nsp32_prom_read(data, 0x11);
  2772. /*
  2773. * each device Synchronous Transfer Period
  2774. */
  2775. for (i = 0; i < NSP32_HOST_SCSIID; i++) {
  2776. target = &data->target[i];
  2777. ret = nsp32_prom_read(data, i);
  2778. switch (ret) {
  2779. case 0: /* 20MB/s */
  2780. val = 0x0c;
  2781. break;
  2782. case 1: /* 10MB/s */
  2783. val = 0x19;
  2784. break;
  2785. case 2: /* 5MB/s */
  2786. val = 0x32;
  2787. break;
  2788. case 3: /* ASYNC */
  2789. val = 0x00;
  2790. break;
  2791. default: /* default 20MB/s */
  2792. val = 0x0c;
  2793. break;
  2794. }
  2795. entry = nsp32_search_period_entry(data, target, val);
  2796. if (entry < 0 || trans_mode == ULTRA20M_MODE) {
  2797. /* search failed... set maximum speed */
  2798. entry = 0;
  2799. }
  2800. target->limit_entry = entry;
  2801. }
  2802. return TRUE;
  2803. }
  2804. /*
  2805. * Atmel AT24C01A (drived in 5V) serial EEPROM routines
  2806. */
  2807. static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
  2808. {
  2809. int i, val;
  2810. /* start condition */
  2811. nsp32_prom_start(data);
  2812. /* device address */
  2813. nsp32_prom_write_bit(data, 1); /* 1 */
  2814. nsp32_prom_write_bit(data, 0); /* 0 */
  2815. nsp32_prom_write_bit(data, 1); /* 1 */
  2816. nsp32_prom_write_bit(data, 0); /* 0 */
  2817. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2818. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2819. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2820. /* R/W: W for dummy write */
  2821. nsp32_prom_write_bit(data, 0);
  2822. /* ack */
  2823. nsp32_prom_write_bit(data, 0);
  2824. /* word address */
  2825. for (i = 7; i >= 0; i--) {
  2826. nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
  2827. }
  2828. /* ack */
  2829. nsp32_prom_write_bit(data, 0);
  2830. /* start condition */
  2831. nsp32_prom_start(data);
  2832. /* device address */
  2833. nsp32_prom_write_bit(data, 1); /* 1 */
  2834. nsp32_prom_write_bit(data, 0); /* 0 */
  2835. nsp32_prom_write_bit(data, 1); /* 1 */
  2836. nsp32_prom_write_bit(data, 0); /* 0 */
  2837. nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
  2838. nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
  2839. nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
  2840. /* R/W: R */
  2841. nsp32_prom_write_bit(data, 1);
  2842. /* ack */
  2843. nsp32_prom_write_bit(data, 0);
  2844. /* data... */
  2845. val = 0;
  2846. for (i = 7; i >= 0; i--) {
  2847. val += (nsp32_prom_read_bit(data) << i);
  2848. }
  2849. /* no ack */
  2850. nsp32_prom_write_bit(data, 1);
  2851. /* stop condition */
  2852. nsp32_prom_stop(data);
  2853. return val;
  2854. }
  2855. static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
  2856. {
  2857. int base = data->BaseAddress;
  2858. int tmp;
  2859. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
  2860. if (val == 0) {
  2861. tmp &= ~bit;
  2862. } else {
  2863. tmp |= bit;
  2864. }
  2865. nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
  2866. udelay(10);
  2867. }
  2868. static int nsp32_prom_get(nsp32_hw_data *data, int bit)
  2869. {
  2870. int base = data->BaseAddress;
  2871. int tmp, ret;
  2872. if (bit != SDA) {
  2873. nsp32_msg(KERN_ERR, "return value is not appropriate");
  2874. return 0;
  2875. }
  2876. tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
  2877. if (tmp == 0) {
  2878. ret = 0;
  2879. } else {
  2880. ret = 1;
  2881. }
  2882. udelay(10);
  2883. return ret;
  2884. }
  2885. static void nsp32_prom_start (nsp32_hw_data *data)
  2886. {
  2887. /* start condition */
  2888. nsp32_prom_set(data, SCL, 1);
  2889. nsp32_prom_set(data, SDA, 1);
  2890. nsp32_prom_set(data, ENA, 1); /* output mode */
  2891. nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
  2892. * SDA 1->0 is start condition */
  2893. nsp32_prom_set(data, SCL, 0);
  2894. }
  2895. static void nsp32_prom_stop (nsp32_hw_data *data)
  2896. {
  2897. /* stop condition */
  2898. nsp32_prom_set(data, SCL, 1);
  2899. nsp32_prom_set(data, SDA, 0);
  2900. nsp32_prom_set(data, ENA, 1); /* output mode */
  2901. nsp32_prom_set(data, SDA, 1);
  2902. nsp32_prom_set(data, SCL, 0);
  2903. }
  2904. static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
  2905. {
  2906. /* write */
  2907. nsp32_prom_set(data, SDA, val);
  2908. nsp32_prom_set(data, SCL, 1 );
  2909. nsp32_prom_set(data, SCL, 0 );
  2910. }
  2911. static int nsp32_prom_read_bit(nsp32_hw_data *data)
  2912. {
  2913. int val;
  2914. /* read */
  2915. nsp32_prom_set(data, ENA, 0); /* input mode */
  2916. nsp32_prom_set(data, SCL, 1);
  2917. val = nsp32_prom_get(data, SDA);
  2918. nsp32_prom_set(data, SCL, 0);
  2919. nsp32_prom_set(data, ENA, 1); /* output mode */
  2920. return val;
  2921. }
  2922. /**************************************************************************
  2923. * Power Management
  2924. */
  2925. #ifdef CONFIG_PM
  2926. /* Device suspended */
  2927. static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
  2928. {
  2929. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2930. nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
  2931. pci_save_state (pdev);
  2932. pci_disable_device (pdev);
  2933. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2934. return 0;
  2935. }
  2936. /* Device woken up */
  2937. static int nsp32_resume(struct pci_dev *pdev)
  2938. {
  2939. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2940. nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
  2941. unsigned short reg;
  2942. nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
  2943. pci_set_power_state(pdev, PCI_D0);
  2944. pci_enable_wake (pdev, PCI_D0, 0);
  2945. pci_restore_state (pdev);
  2946. reg = nsp32_read2(data->BaseAddress, INDEX_REG);
  2947. nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
  2948. if (reg == 0xffff) {
  2949. nsp32_msg(KERN_INFO, "missing device. abort resume.");
  2950. return 0;
  2951. }
  2952. nsp32hw_init (data);
  2953. nsp32_do_bus_reset(data);
  2954. nsp32_msg(KERN_INFO, "resume success");
  2955. return 0;
  2956. }
  2957. /* Enable wake event */
  2958. static int nsp32_enable_wake(struct pci_dev *pdev, pci_power_t state, int enable)
  2959. {
  2960. struct Scsi_Host *host = pci_get_drvdata(pdev);
  2961. nsp32_msg(KERN_INFO, "pci-enable_wake: stub, pdev=0x%p, enable=%d, slot=%s, host=0x%p", pdev, enable, pci_name(pdev), host);
  2962. return 0;
  2963. }
  2964. #endif
  2965. /************************************************************************
  2966. * PCI/Cardbus probe/remove routine
  2967. */
  2968. static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  2969. {
  2970. int ret;
  2971. nsp32_hw_data *data = &nsp32_data_base;
  2972. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  2973. ret = pci_enable_device(pdev);
  2974. if (ret) {
  2975. nsp32_msg(KERN_ERR, "failed to enable pci device");
  2976. return ret;
  2977. }
  2978. data->Pci = pdev;
  2979. data->pci_devid = id;
  2980. data->IrqNumber = pdev->irq;
  2981. data->BaseAddress = pci_resource_start(pdev, 0);
  2982. data->NumAddress = pci_resource_len (pdev, 0);
  2983. data->MmioAddress = ioremap_nocache(pci_resource_start(pdev, 1),
  2984. pci_resource_len (pdev, 1));
  2985. data->MmioLength = pci_resource_len (pdev, 1);
  2986. pci_set_master(pdev);
  2987. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  2988. ret = nsp32_detect(pdev);
  2989. #else
  2990. ret = scsi_register_host(&nsp32_template);
  2991. #endif
  2992. nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
  2993. pdev->irq,
  2994. data->MmioAddress, data->MmioLength,
  2995. pci_name(pdev),
  2996. nsp32_model[id->driver_data]);
  2997. nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
  2998. return ret;
  2999. }
  3000. static void __devexit nsp32_remove(struct pci_dev *pdev)
  3001. {
  3002. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  3003. struct Scsi_Host *host = pci_get_drvdata(pdev);
  3004. #endif
  3005. nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
  3006. #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,5,73))
  3007. scsi_remove_host(host);
  3008. nsp32_release(host);
  3009. scsi_host_put(host);
  3010. #else
  3011. scsi_unregister_host(&nsp32_template);
  3012. #endif
  3013. }
  3014. static struct pci_driver nsp32_driver = {
  3015. .name = "nsp32",
  3016. .id_table = nsp32_pci_table,
  3017. .probe = nsp32_probe,
  3018. .remove = __devexit_p(nsp32_remove),
  3019. #ifdef CONFIG_PM
  3020. .suspend = nsp32_suspend,
  3021. .resume = nsp32_resume,
  3022. .enable_wake = nsp32_enable_wake,
  3023. #endif
  3024. };
  3025. /*********************************************************************
  3026. * Moule entry point
  3027. */
  3028. static int __init init_nsp32(void) {
  3029. nsp32_msg(KERN_INFO, "loading...");
  3030. return pci_module_init(&nsp32_driver);
  3031. }
  3032. static void __exit exit_nsp32(void) {
  3033. nsp32_msg(KERN_INFO, "unloading...");
  3034. pci_unregister_driver(&nsp32_driver);
  3035. }
  3036. module_init(init_nsp32);
  3037. module_exit(exit_nsp32);
  3038. /* end */