mac53c94.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586
  1. /*
  2. * SCSI low-level driver for the 53c94 SCSI bus adaptor found
  3. * on Power Macintosh computers, controlling the external SCSI chain.
  4. * We assume the 53c94 is connected to a DBDMA (descriptor-based DMA)
  5. * controller.
  6. *
  7. * Paul Mackerras, August 1996.
  8. * Copyright (C) 1996 Paul Mackerras.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/delay.h>
  12. #include <linux/types.h>
  13. #include <linux/string.h>
  14. #include <linux/slab.h>
  15. #include <linux/blkdev.h>
  16. #include <linux/proc_fs.h>
  17. #include <linux/stat.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/interrupt.h>
  20. #include <asm/dbdma.h>
  21. #include <asm/io.h>
  22. #include <asm/pgtable.h>
  23. #include <asm/prom.h>
  24. #include <asm/system.h>
  25. #include <asm/pci-bridge.h>
  26. #include <asm/macio.h>
  27. #include <scsi/scsi.h>
  28. #include <scsi/scsi_cmnd.h>
  29. #include <scsi/scsi_device.h>
  30. #include <scsi/scsi_host.h>
  31. #include "mac53c94.h"
  32. enum fsc_phase {
  33. idle,
  34. selecting,
  35. dataing,
  36. completing,
  37. busfreeing,
  38. };
  39. struct fsc_state {
  40. struct mac53c94_regs __iomem *regs;
  41. int intr;
  42. struct dbdma_regs __iomem *dma;
  43. int dmaintr;
  44. int clk_freq;
  45. struct Scsi_Host *host;
  46. struct scsi_cmnd *request_q;
  47. struct scsi_cmnd *request_qtail;
  48. struct scsi_cmnd *current_req; /* req we're currently working on */
  49. enum fsc_phase phase; /* what we're currently trying to do */
  50. struct dbdma_cmd *dma_cmds; /* space for dbdma commands, aligned */
  51. void *dma_cmd_space;
  52. struct pci_dev *pdev;
  53. dma_addr_t dma_addr;
  54. struct macio_dev *mdev;
  55. };
  56. static void mac53c94_init(struct fsc_state *);
  57. static void mac53c94_start(struct fsc_state *);
  58. static void mac53c94_interrupt(int, void *, struct pt_regs *);
  59. static irqreturn_t do_mac53c94_interrupt(int, void *, struct pt_regs *);
  60. static void cmd_done(struct fsc_state *, int result);
  61. static void set_dma_cmds(struct fsc_state *, struct scsi_cmnd *);
  62. static int mac53c94_queue(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  63. {
  64. struct fsc_state *state;
  65. #if 0
  66. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  67. int i;
  68. printk(KERN_DEBUG "mac53c94_queue %p: command is", cmd);
  69. for (i = 0; i < cmd->cmd_len; ++i)
  70. printk(" %.2x", cmd->cmnd[i]);
  71. printk("\n" KERN_DEBUG "use_sg=%d request_bufflen=%d request_buffer=%p\n",
  72. cmd->use_sg, cmd->request_bufflen, cmd->request_buffer);
  73. }
  74. #endif
  75. cmd->scsi_done = done;
  76. cmd->host_scribble = NULL;
  77. state = (struct fsc_state *) cmd->device->host->hostdata;
  78. if (state->request_q == NULL)
  79. state->request_q = cmd;
  80. else
  81. state->request_qtail->host_scribble = (void *) cmd;
  82. state->request_qtail = cmd;
  83. if (state->phase == idle)
  84. mac53c94_start(state);
  85. return 0;
  86. }
  87. static int mac53c94_host_reset(struct scsi_cmnd *cmd)
  88. {
  89. struct fsc_state *state = (struct fsc_state *) cmd->device->host->hostdata;
  90. struct mac53c94_regs __iomem *regs = state->regs;
  91. struct dbdma_regs __iomem *dma = state->dma;
  92. unsigned long flags;
  93. spin_lock_irqsave(cmd->device->host->host_lock, flags);
  94. writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
  95. writeb(CMD_SCSI_RESET, &regs->command); /* assert RST */
  96. udelay(100); /* leave it on for a while (>= 25us) */
  97. writeb(CMD_RESET, &regs->command);
  98. udelay(20);
  99. mac53c94_init(state);
  100. writeb(CMD_NOP, &regs->command);
  101. spin_unlock_irqrestore(cmd->device->host->host_lock, flags);
  102. return SUCCESS;
  103. }
  104. static void mac53c94_init(struct fsc_state *state)
  105. {
  106. struct mac53c94_regs __iomem *regs = state->regs;
  107. struct dbdma_regs __iomem *dma = state->dma;
  108. int x;
  109. writeb(state->host->this_id | CF1_PAR_ENABLE, &regs->config1);
  110. writeb(TIMO_VAL(250), &regs->sel_timeout); /* 250ms */
  111. writeb(CLKF_VAL(state->clk_freq), &regs->clk_factor);
  112. writeb(CF2_FEATURE_EN, &regs->config2);
  113. writeb(0, &regs->config3);
  114. writeb(0, &regs->sync_period);
  115. writeb(0, &regs->sync_offset);
  116. x = readb(&regs->interrupt);
  117. writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
  118. }
  119. /*
  120. * Start the next command for a 53C94.
  121. * Should be called with interrupts disabled.
  122. */
  123. static void mac53c94_start(struct fsc_state *state)
  124. {
  125. struct scsi_cmnd *cmd;
  126. struct mac53c94_regs __iomem *regs = state->regs;
  127. int i;
  128. if (state->phase != idle || state->current_req != NULL)
  129. panic("inappropriate mac53c94_start (state=%p)", state);
  130. if (state->request_q == NULL)
  131. return;
  132. state->current_req = cmd = state->request_q;
  133. state->request_q = (struct scsi_cmnd *) cmd->host_scribble;
  134. /* Off we go */
  135. writeb(0, &regs->count_lo);
  136. writeb(0, &regs->count_mid);
  137. writeb(0, &regs->count_hi);
  138. writeb(CMD_NOP + CMD_DMA_MODE, &regs->command);
  139. udelay(1);
  140. writeb(CMD_FLUSH, &regs->command);
  141. udelay(1);
  142. writeb(cmd->device->id, &regs->dest_id);
  143. writeb(0, &regs->sync_period);
  144. writeb(0, &regs->sync_offset);
  145. /* load the command into the FIFO */
  146. for (i = 0; i < cmd->cmd_len; ++i)
  147. writeb(cmd->cmnd[i], &regs->fifo);
  148. /* do select without ATN XXX */
  149. writeb(CMD_SELECT, &regs->command);
  150. state->phase = selecting;
  151. if (cmd->use_sg > 0 || cmd->request_bufflen != 0)
  152. set_dma_cmds(state, cmd);
  153. }
  154. static irqreturn_t do_mac53c94_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
  155. {
  156. unsigned long flags;
  157. struct Scsi_Host *dev = ((struct fsc_state *) dev_id)->current_req->device->host;
  158. spin_lock_irqsave(dev->host_lock, flags);
  159. mac53c94_interrupt(irq, dev_id, ptregs);
  160. spin_unlock_irqrestore(dev->host_lock, flags);
  161. return IRQ_HANDLED;
  162. }
  163. static void mac53c94_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
  164. {
  165. struct fsc_state *state = (struct fsc_state *) dev_id;
  166. struct mac53c94_regs __iomem *regs = state->regs;
  167. struct dbdma_regs __iomem *dma = state->dma;
  168. struct scsi_cmnd *cmd = state->current_req;
  169. int nb, stat, seq, intr;
  170. static int mac53c94_errors;
  171. /*
  172. * Apparently, reading the interrupt register unlatches
  173. * the status and sequence step registers.
  174. */
  175. seq = readb(&regs->seqstep);
  176. stat = readb(&regs->status);
  177. intr = readb(&regs->interrupt);
  178. #if 0
  179. printk(KERN_DEBUG "mac53c94_intr, intr=%x stat=%x seq=%x phase=%d\n",
  180. intr, stat, seq, state->phase);
  181. #endif
  182. if (intr & INTR_RESET) {
  183. /* SCSI bus was reset */
  184. printk(KERN_INFO "external SCSI bus reset detected\n");
  185. writeb(CMD_NOP, &regs->command);
  186. writel(RUN << 16, &dma->control); /* stop dma */
  187. cmd_done(state, DID_RESET << 16);
  188. return;
  189. }
  190. if (intr & INTR_ILL_CMD) {
  191. printk(KERN_ERR "53c94: invalid cmd, intr=%x stat=%x seq=%x phase=%d\n",
  192. intr, stat, seq, state->phase);
  193. cmd_done(state, DID_ERROR << 16);
  194. return;
  195. }
  196. if (stat & STAT_ERROR) {
  197. #if 0
  198. /* XXX these seem to be harmless? */
  199. printk("53c94: bad error, intr=%x stat=%x seq=%x phase=%d\n",
  200. intr, stat, seq, state->phase);
  201. #endif
  202. ++mac53c94_errors;
  203. writeb(CMD_NOP + CMD_DMA_MODE, &regs->command);
  204. }
  205. if (cmd == 0) {
  206. printk(KERN_DEBUG "53c94: interrupt with no command active?\n");
  207. return;
  208. }
  209. if (stat & STAT_PARITY) {
  210. printk(KERN_ERR "mac53c94: parity error\n");
  211. cmd_done(state, DID_PARITY << 16);
  212. return;
  213. }
  214. switch (state->phase) {
  215. case selecting:
  216. if (intr & INTR_DISCONNECT) {
  217. /* selection timed out */
  218. cmd_done(state, DID_BAD_TARGET << 16);
  219. return;
  220. }
  221. if (intr != INTR_BUS_SERV + INTR_DONE) {
  222. printk(KERN_DEBUG "got intr %x during selection\n", intr);
  223. cmd_done(state, DID_ERROR << 16);
  224. return;
  225. }
  226. if ((seq & SS_MASK) != SS_DONE) {
  227. printk(KERN_DEBUG "seq step %x after command\n", seq);
  228. cmd_done(state, DID_ERROR << 16);
  229. return;
  230. }
  231. writeb(CMD_NOP, &regs->command);
  232. /* set DMA controller going if any data to transfer */
  233. if ((stat & (STAT_MSG|STAT_CD)) == 0
  234. && (cmd->use_sg > 0 || cmd->request_bufflen != 0)) {
  235. nb = cmd->SCp.this_residual;
  236. if (nb > 0xfff0)
  237. nb = 0xfff0;
  238. cmd->SCp.this_residual -= nb;
  239. writeb(nb, &regs->count_lo);
  240. writeb(nb >> 8, &regs->count_mid);
  241. writeb(CMD_DMA_MODE + CMD_NOP, &regs->command);
  242. writel(virt_to_phys(state->dma_cmds), &dma->cmdptr);
  243. writel((RUN << 16) | RUN, &dma->control);
  244. writeb(CMD_DMA_MODE + CMD_XFER_DATA, &regs->command);
  245. state->phase = dataing;
  246. break;
  247. } else if ((stat & STAT_PHASE) == STAT_CD + STAT_IO) {
  248. /* up to status phase already */
  249. writeb(CMD_I_COMPLETE, &regs->command);
  250. state->phase = completing;
  251. } else {
  252. printk(KERN_DEBUG "in unexpected phase %x after cmd\n",
  253. stat & STAT_PHASE);
  254. cmd_done(state, DID_ERROR << 16);
  255. return;
  256. }
  257. break;
  258. case dataing:
  259. if (intr != INTR_BUS_SERV) {
  260. printk(KERN_DEBUG "got intr %x before status\n", intr);
  261. cmd_done(state, DID_ERROR << 16);
  262. return;
  263. }
  264. if (cmd->SCp.this_residual != 0
  265. && (stat & (STAT_MSG|STAT_CD)) == 0) {
  266. /* Set up the count regs to transfer more */
  267. nb = cmd->SCp.this_residual;
  268. if (nb > 0xfff0)
  269. nb = 0xfff0;
  270. cmd->SCp.this_residual -= nb;
  271. writeb(nb, &regs->count_lo);
  272. writeb(nb >> 8, &regs->count_mid);
  273. writeb(CMD_DMA_MODE + CMD_NOP, &regs->command);
  274. writeb(CMD_DMA_MODE + CMD_XFER_DATA, &regs->command);
  275. break;
  276. }
  277. if ((stat & STAT_PHASE) != STAT_CD + STAT_IO) {
  278. printk(KERN_DEBUG "intr %x before data xfer complete\n", intr);
  279. }
  280. writel(RUN << 16, &dma->control); /* stop dma */
  281. if (cmd->use_sg != 0) {
  282. pci_unmap_sg(state->pdev,
  283. (struct scatterlist *)cmd->request_buffer,
  284. cmd->use_sg, cmd->sc_data_direction);
  285. } else {
  286. pci_unmap_single(state->pdev, state->dma_addr,
  287. cmd->request_bufflen, cmd->sc_data_direction);
  288. }
  289. /* should check dma status */
  290. writeb(CMD_I_COMPLETE, &regs->command);
  291. state->phase = completing;
  292. break;
  293. case completing:
  294. if (intr != INTR_DONE) {
  295. printk(KERN_DEBUG "got intr %x on completion\n", intr);
  296. cmd_done(state, DID_ERROR << 16);
  297. return;
  298. }
  299. cmd->SCp.Status = readb(&regs->fifo);
  300. cmd->SCp.Message = readb(&regs->fifo);
  301. cmd->result = CMD_ACCEPT_MSG;
  302. writeb(CMD_ACCEPT_MSG, &regs->command);
  303. state->phase = busfreeing;
  304. break;
  305. case busfreeing:
  306. if (intr != INTR_DISCONNECT) {
  307. printk(KERN_DEBUG "got intr %x when expected disconnect\n", intr);
  308. }
  309. cmd_done(state, (DID_OK << 16) + (cmd->SCp.Message << 8)
  310. + cmd->SCp.Status);
  311. break;
  312. default:
  313. printk(KERN_DEBUG "don't know about phase %d\n", state->phase);
  314. }
  315. }
  316. static void cmd_done(struct fsc_state *state, int result)
  317. {
  318. struct scsi_cmnd *cmd;
  319. cmd = state->current_req;
  320. if (cmd != 0) {
  321. cmd->result = result;
  322. (*cmd->scsi_done)(cmd);
  323. state->current_req = NULL;
  324. }
  325. state->phase = idle;
  326. mac53c94_start(state);
  327. }
  328. /*
  329. * Set up DMA commands for transferring data.
  330. */
  331. static void set_dma_cmds(struct fsc_state *state, struct scsi_cmnd *cmd)
  332. {
  333. int i, dma_cmd, total;
  334. struct scatterlist *scl;
  335. struct dbdma_cmd *dcmds;
  336. dma_addr_t dma_addr;
  337. u32 dma_len;
  338. dma_cmd = cmd->sc_data_direction == DMA_TO_DEVICE ?
  339. OUTPUT_MORE : INPUT_MORE;
  340. dcmds = state->dma_cmds;
  341. if (cmd->use_sg > 0) {
  342. int nseg;
  343. total = 0;
  344. scl = (struct scatterlist *) cmd->buffer;
  345. nseg = pci_map_sg(state->pdev, scl, cmd->use_sg,
  346. cmd->sc_data_direction);
  347. for (i = 0; i < nseg; ++i) {
  348. dma_addr = sg_dma_address(scl);
  349. dma_len = sg_dma_len(scl);
  350. if (dma_len > 0xffff)
  351. panic("mac53c94: scatterlist element >= 64k");
  352. total += dma_len;
  353. st_le16(&dcmds->req_count, dma_len);
  354. st_le16(&dcmds->command, dma_cmd);
  355. st_le32(&dcmds->phy_addr, dma_addr);
  356. dcmds->xfer_status = 0;
  357. ++scl;
  358. ++dcmds;
  359. }
  360. } else {
  361. total = cmd->request_bufflen;
  362. if (total > 0xffff)
  363. panic("mac53c94: transfer size >= 64k");
  364. dma_addr = pci_map_single(state->pdev, cmd->request_buffer,
  365. total, cmd->sc_data_direction);
  366. state->dma_addr = dma_addr;
  367. st_le16(&dcmds->req_count, total);
  368. st_le32(&dcmds->phy_addr, dma_addr);
  369. dcmds->xfer_status = 0;
  370. ++dcmds;
  371. }
  372. dma_cmd += OUTPUT_LAST - OUTPUT_MORE;
  373. st_le16(&dcmds[-1].command, dma_cmd);
  374. st_le16(&dcmds->command, DBDMA_STOP);
  375. cmd->SCp.this_residual = total;
  376. }
  377. static struct scsi_host_template mac53c94_template = {
  378. .proc_name = "53c94",
  379. .name = "53C94",
  380. .queuecommand = mac53c94_queue,
  381. .eh_host_reset_handler = mac53c94_host_reset,
  382. .can_queue = 1,
  383. .this_id = 7,
  384. .sg_tablesize = SG_ALL,
  385. .cmd_per_lun = 1,
  386. .use_clustering = DISABLE_CLUSTERING,
  387. };
  388. static int mac53c94_probe(struct macio_dev *mdev, const struct of_device_id *match)
  389. {
  390. struct device_node *node = macio_get_of_node(mdev);
  391. struct pci_dev *pdev = macio_get_pci_dev(mdev);
  392. struct fsc_state *state;
  393. struct Scsi_Host *host;
  394. void *dma_cmd_space;
  395. unsigned char *clkprop;
  396. int proplen, rc = -ENODEV;
  397. if (macio_resource_count(mdev) != 2 || macio_irq_count(mdev) != 2) {
  398. printk(KERN_ERR "mac53c94: expected 2 addrs and intrs"
  399. " (got %d/%d)\n",
  400. macio_resource_count(mdev), macio_irq_count(mdev));
  401. return -ENODEV;
  402. }
  403. if (macio_request_resources(mdev, "mac53c94") != 0) {
  404. printk(KERN_ERR "mac53c94: unable to request memory resources");
  405. return -EBUSY;
  406. }
  407. host = scsi_host_alloc(&mac53c94_template, sizeof(struct fsc_state));
  408. if (host == NULL) {
  409. printk(KERN_ERR "mac53c94: couldn't register host");
  410. rc = -ENOMEM;
  411. goto out_release;
  412. }
  413. state = (struct fsc_state *) host->hostdata;
  414. macio_set_drvdata(mdev, state);
  415. state->host = host;
  416. state->pdev = pdev;
  417. state->mdev = mdev;
  418. state->regs = (struct mac53c94_regs __iomem *)
  419. ioremap(macio_resource_start(mdev, 0), 0x1000);
  420. state->intr = macio_irq(mdev, 0);
  421. state->dma = (struct dbdma_regs __iomem *)
  422. ioremap(macio_resource_start(mdev, 1), 0x1000);
  423. state->dmaintr = macio_irq(mdev, 1);
  424. if (state->regs == NULL || state->dma == NULL) {
  425. printk(KERN_ERR "mac53c94: ioremap failed for %s\n",
  426. node->full_name);
  427. goto out_free;
  428. }
  429. clkprop = get_property(node, "clock-frequency", &proplen);
  430. if (clkprop == NULL || proplen != sizeof(int)) {
  431. printk(KERN_ERR "%s: can't get clock frequency, "
  432. "assuming 25MHz\n", node->full_name);
  433. state->clk_freq = 25000000;
  434. } else
  435. state->clk_freq = *(int *)clkprop;
  436. /* Space for dma command list: +1 for stop command,
  437. * +1 to allow for aligning.
  438. * XXX FIXME: Use DMA consistent routines
  439. */
  440. dma_cmd_space = kmalloc((host->sg_tablesize + 2) *
  441. sizeof(struct dbdma_cmd), GFP_KERNEL);
  442. if (dma_cmd_space == 0) {
  443. printk(KERN_ERR "mac53c94: couldn't allocate dma "
  444. "command space for %s\n", node->full_name);
  445. rc = -ENOMEM;
  446. goto out_free;
  447. }
  448. state->dma_cmds = (struct dbdma_cmd *)DBDMA_ALIGN(dma_cmd_space);
  449. memset(state->dma_cmds, 0, (host->sg_tablesize + 1)
  450. * sizeof(struct dbdma_cmd));
  451. state->dma_cmd_space = dma_cmd_space;
  452. mac53c94_init(state);
  453. if (request_irq(state->intr, do_mac53c94_interrupt, 0, "53C94",state)) {
  454. printk(KERN_ERR "mac53C94: can't get irq %d for %s\n",
  455. state->intr, node->full_name);
  456. goto out_free_dma;
  457. }
  458. rc = scsi_add_host(host, &mdev->ofdev.dev);
  459. if (rc != 0)
  460. goto out_release_irq;
  461. scsi_scan_host(host);
  462. return 0;
  463. out_release_irq:
  464. free_irq(state->intr, state);
  465. out_free_dma:
  466. kfree(state->dma_cmd_space);
  467. out_free:
  468. if (state->dma != NULL)
  469. iounmap(state->dma);
  470. if (state->regs != NULL)
  471. iounmap(state->regs);
  472. scsi_host_put(host);
  473. out_release:
  474. macio_release_resources(mdev);
  475. return rc;
  476. }
  477. static int mac53c94_remove(struct macio_dev *mdev)
  478. {
  479. struct fsc_state *fp = (struct fsc_state *)macio_get_drvdata(mdev);
  480. struct Scsi_Host *host = fp->host;
  481. scsi_remove_host(host);
  482. free_irq(fp->intr, fp);
  483. if (fp->regs)
  484. iounmap(fp->regs);
  485. if (fp->dma)
  486. iounmap(fp->dma);
  487. kfree(fp->dma_cmd_space);
  488. scsi_host_put(host);
  489. macio_release_resources(mdev);
  490. return 0;
  491. }
  492. static struct of_device_id mac53c94_match[] =
  493. {
  494. {
  495. .name = "53c94",
  496. },
  497. {},
  498. };
  499. MODULE_DEVICE_TABLE (of, mac53c94_match);
  500. static struct macio_driver mac53c94_driver =
  501. {
  502. .name = "mac53c94",
  503. .match_table = mac53c94_match,
  504. .probe = mac53c94_probe,
  505. .remove = mac53c94_remove,
  506. };
  507. static int __init init_mac53c94(void)
  508. {
  509. return macio_register_driver(&mac53c94_driver);
  510. }
  511. static void __exit exit_mac53c94(void)
  512. {
  513. return macio_unregister_driver(&mac53c94_driver);
  514. }
  515. module_init(init_mac53c94);
  516. module_exit(exit_mac53c94);
  517. MODULE_DESCRIPTION("PowerMac 53c94 SCSI driver");
  518. MODULE_AUTHOR("Paul Mackerras <paulus@samba.org>");
  519. MODULE_LICENSE("GPL");