lpfc_sli.c 82 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2006 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. /*
  39. * Define macro to log: Mailbox command x%x cannot issue Data
  40. * This allows multiple uses of lpfc_msgBlk0311
  41. * w/o perturbing log msg utility.
  42. */
  43. #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
  44. lpfc_printf_log(phba, \
  45. KERN_INFO, \
  46. LOG_MBOX | LOG_SLI, \
  47. "%d:0311 Mailbox command x%x cannot issue " \
  48. "Data: x%x x%x x%x\n", \
  49. phba->brd_no, \
  50. mb->mbxCommand, \
  51. phba->hba_state, \
  52. psli->sli_flag, \
  53. flag);
  54. /* There are only four IOCB completion types. */
  55. typedef enum _lpfc_iocb_type {
  56. LPFC_UNKNOWN_IOCB,
  57. LPFC_UNSOL_IOCB,
  58. LPFC_SOL_IOCB,
  59. LPFC_ABORT_IOCB
  60. } lpfc_iocb_type;
  61. struct lpfc_iocbq *
  62. lpfc_sli_get_iocbq(struct lpfc_hba * phba)
  63. {
  64. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  65. struct lpfc_iocbq * iocbq = NULL;
  66. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  67. return iocbq;
  68. }
  69. void
  70. lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  71. {
  72. size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
  73. /*
  74. * Clean all volatile data fields, preserve iotag and node struct.
  75. */
  76. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  77. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  78. }
  79. /*
  80. * Translate the iocb command to an iocb command type used to decide the final
  81. * disposition of each completed IOCB.
  82. */
  83. static lpfc_iocb_type
  84. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  85. {
  86. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  87. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  88. return 0;
  89. switch (iocb_cmnd) {
  90. case CMD_XMIT_SEQUENCE_CR:
  91. case CMD_XMIT_SEQUENCE_CX:
  92. case CMD_XMIT_BCAST_CN:
  93. case CMD_XMIT_BCAST_CX:
  94. case CMD_ELS_REQUEST_CR:
  95. case CMD_ELS_REQUEST_CX:
  96. case CMD_CREATE_XRI_CR:
  97. case CMD_CREATE_XRI_CX:
  98. case CMD_GET_RPI_CN:
  99. case CMD_XMIT_ELS_RSP_CX:
  100. case CMD_GET_RPI_CR:
  101. case CMD_FCP_IWRITE_CR:
  102. case CMD_FCP_IWRITE_CX:
  103. case CMD_FCP_IREAD_CR:
  104. case CMD_FCP_IREAD_CX:
  105. case CMD_FCP_ICMND_CR:
  106. case CMD_FCP_ICMND_CX:
  107. case CMD_ADAPTER_MSG:
  108. case CMD_ADAPTER_DUMP:
  109. case CMD_XMIT_SEQUENCE64_CR:
  110. case CMD_XMIT_SEQUENCE64_CX:
  111. case CMD_XMIT_BCAST64_CN:
  112. case CMD_XMIT_BCAST64_CX:
  113. case CMD_ELS_REQUEST64_CR:
  114. case CMD_ELS_REQUEST64_CX:
  115. case CMD_FCP_IWRITE64_CR:
  116. case CMD_FCP_IWRITE64_CX:
  117. case CMD_FCP_IREAD64_CR:
  118. case CMD_FCP_IREAD64_CX:
  119. case CMD_FCP_ICMND64_CR:
  120. case CMD_FCP_ICMND64_CX:
  121. case CMD_GEN_REQUEST64_CR:
  122. case CMD_GEN_REQUEST64_CX:
  123. case CMD_XMIT_ELS_RSP64_CX:
  124. type = LPFC_SOL_IOCB;
  125. break;
  126. case CMD_ABORT_XRI_CN:
  127. case CMD_ABORT_XRI_CX:
  128. case CMD_CLOSE_XRI_CN:
  129. case CMD_CLOSE_XRI_CX:
  130. case CMD_XRI_ABORTED_CX:
  131. case CMD_ABORT_MXRI64_CN:
  132. type = LPFC_ABORT_IOCB;
  133. break;
  134. case CMD_RCV_SEQUENCE_CX:
  135. case CMD_RCV_ELS_REQ_CX:
  136. case CMD_RCV_SEQUENCE64_CX:
  137. case CMD_RCV_ELS_REQ64_CX:
  138. type = LPFC_UNSOL_IOCB;
  139. break;
  140. default:
  141. type = LPFC_UNKNOWN_IOCB;
  142. break;
  143. }
  144. return type;
  145. }
  146. static int
  147. lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
  148. {
  149. struct lpfc_sli *psli = &phba->sli;
  150. MAILBOX_t *pmbox = &pmb->mb;
  151. int i, rc;
  152. for (i = 0; i < psli->num_rings; i++) {
  153. phba->hba_state = LPFC_INIT_MBX_CMDS;
  154. lpfc_config_ring(phba, i, pmb);
  155. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  156. if (rc != MBX_SUCCESS) {
  157. lpfc_printf_log(phba,
  158. KERN_ERR,
  159. LOG_INIT,
  160. "%d:0446 Adapter failed to init, "
  161. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  162. "ring %d\n",
  163. phba->brd_no,
  164. pmbox->mbxCommand,
  165. pmbox->mbxStatus,
  166. i);
  167. phba->hba_state = LPFC_HBA_ERROR;
  168. return -ENXIO;
  169. }
  170. }
  171. return 0;
  172. }
  173. static int
  174. lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
  175. struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
  176. {
  177. uint16_t iotag;
  178. list_add_tail(&piocb->list, &pring->txcmplq);
  179. pring->txcmplq_cnt++;
  180. if (unlikely(pring->ringno == LPFC_ELS_RING))
  181. mod_timer(&phba->els_tmofunc,
  182. jiffies + HZ * (phba->fc_ratov << 1));
  183. if (pring->fast_lookup) {
  184. /* Setup fast lookup based on iotag for completion */
  185. iotag = piocb->iocb.ulpIoTag;
  186. if (iotag && (iotag < pring->fast_iotag))
  187. *(pring->fast_lookup + iotag) = piocb;
  188. else {
  189. /* Cmd ring <ringno> put: iotag <iotag> greater then
  190. configured max <fast_iotag> wd0 <icmd> */
  191. lpfc_printf_log(phba,
  192. KERN_ERR,
  193. LOG_SLI,
  194. "%d:0316 Cmd ring %d put: iotag x%x "
  195. "greater then configured max x%x "
  196. "wd0 x%x\n",
  197. phba->brd_no,
  198. pring->ringno, iotag,
  199. pring->fast_iotag,
  200. *(((uint32_t *)(&piocb->iocb)) + 7));
  201. }
  202. }
  203. return (0);
  204. }
  205. static struct lpfc_iocbq *
  206. lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  207. {
  208. struct list_head *dlp;
  209. struct lpfc_iocbq *cmd_iocb;
  210. dlp = &pring->txq;
  211. cmd_iocb = NULL;
  212. list_remove_head((&pring->txq), cmd_iocb,
  213. struct lpfc_iocbq,
  214. list);
  215. if (cmd_iocb) {
  216. /* If the first ptr is not equal to the list header,
  217. * deque the IOCBQ_t and return it.
  218. */
  219. pring->txq_cnt--;
  220. }
  221. return (cmd_iocb);
  222. }
  223. static IOCB_t *
  224. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  225. {
  226. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  227. uint32_t max_cmd_idx = pring->numCiocb;
  228. IOCB_t *iocb = NULL;
  229. if ((pring->next_cmdidx == pring->cmdidx) &&
  230. (++pring->next_cmdidx >= max_cmd_idx))
  231. pring->next_cmdidx = 0;
  232. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  233. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  234. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  235. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  236. "%d:0315 Ring %d issue: portCmdGet %d "
  237. "is bigger then cmd ring %d\n",
  238. phba->brd_no, pring->ringno,
  239. pring->local_getidx, max_cmd_idx);
  240. phba->hba_state = LPFC_HBA_ERROR;
  241. /*
  242. * All error attention handlers are posted to
  243. * worker thread
  244. */
  245. phba->work_ha |= HA_ERATT;
  246. phba->work_hs = HS_FFER3;
  247. if (phba->work_wait)
  248. wake_up(phba->work_wait);
  249. return NULL;
  250. }
  251. if (pring->local_getidx == pring->next_cmdidx)
  252. return NULL;
  253. }
  254. iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
  255. return iocb;
  256. }
  257. uint16_t
  258. lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  259. {
  260. struct lpfc_iocbq ** new_arr;
  261. struct lpfc_iocbq ** old_arr;
  262. size_t new_len;
  263. struct lpfc_sli *psli = &phba->sli;
  264. uint16_t iotag;
  265. spin_lock_irq(phba->host->host_lock);
  266. iotag = psli->last_iotag;
  267. if(++iotag < psli->iocbq_lookup_len) {
  268. psli->last_iotag = iotag;
  269. psli->iocbq_lookup[iotag] = iocbq;
  270. spin_unlock_irq(phba->host->host_lock);
  271. iocbq->iotag = iotag;
  272. return iotag;
  273. }
  274. else if (psli->iocbq_lookup_len < (0xffff
  275. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  276. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  277. spin_unlock_irq(phba->host->host_lock);
  278. new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
  279. GFP_KERNEL);
  280. if (new_arr) {
  281. memset((char *)new_arr, 0,
  282. new_len * sizeof (struct lpfc_iocbq *));
  283. spin_lock_irq(phba->host->host_lock);
  284. old_arr = psli->iocbq_lookup;
  285. if (new_len <= psli->iocbq_lookup_len) {
  286. /* highly unprobable case */
  287. kfree(new_arr);
  288. iotag = psli->last_iotag;
  289. if(++iotag < psli->iocbq_lookup_len) {
  290. psli->last_iotag = iotag;
  291. psli->iocbq_lookup[iotag] = iocbq;
  292. spin_unlock_irq(phba->host->host_lock);
  293. iocbq->iotag = iotag;
  294. return iotag;
  295. }
  296. spin_unlock_irq(phba->host->host_lock);
  297. return 0;
  298. }
  299. if (psli->iocbq_lookup)
  300. memcpy(new_arr, old_arr,
  301. ((psli->last_iotag + 1) *
  302. sizeof (struct lpfc_iocbq *)));
  303. psli->iocbq_lookup = new_arr;
  304. psli->iocbq_lookup_len = new_len;
  305. psli->last_iotag = iotag;
  306. psli->iocbq_lookup[iotag] = iocbq;
  307. spin_unlock_irq(phba->host->host_lock);
  308. iocbq->iotag = iotag;
  309. kfree(old_arr);
  310. return iotag;
  311. }
  312. }
  313. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  314. "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  315. phba->brd_no, psli->last_iotag);
  316. return 0;
  317. }
  318. static void
  319. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  320. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  321. {
  322. /*
  323. * Set up an iotag
  324. */
  325. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  326. /*
  327. * Issue iocb command to adapter
  328. */
  329. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
  330. wmb();
  331. pring->stats.iocb_cmd++;
  332. /*
  333. * If there is no completion routine to call, we can release the
  334. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  335. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  336. */
  337. if (nextiocb->iocb_cmpl)
  338. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  339. else
  340. lpfc_sli_release_iocbq(phba, nextiocb);
  341. /*
  342. * Let the HBA know what IOCB slot will be the next one the
  343. * driver will put a command into.
  344. */
  345. pring->cmdidx = pring->next_cmdidx;
  346. writel(pring->cmdidx, phba->MBslimaddr
  347. + (SLIMOFF + (pring->ringno * 2)) * 4);
  348. }
  349. static void
  350. lpfc_sli_update_full_ring(struct lpfc_hba * phba,
  351. struct lpfc_sli_ring *pring)
  352. {
  353. int ringno = pring->ringno;
  354. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  355. wmb();
  356. /*
  357. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  358. * The HBA will tell us when an IOCB entry is available.
  359. */
  360. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  361. readl(phba->CAregaddr); /* flush */
  362. pring->stats.iocb_cmd_full++;
  363. }
  364. static void
  365. lpfc_sli_update_ring(struct lpfc_hba * phba,
  366. struct lpfc_sli_ring *pring)
  367. {
  368. int ringno = pring->ringno;
  369. /*
  370. * Tell the HBA that there is work to do in this ring.
  371. */
  372. wmb();
  373. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  374. readl(phba->CAregaddr); /* flush */
  375. }
  376. static void
  377. lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  378. {
  379. IOCB_t *iocb;
  380. struct lpfc_iocbq *nextiocb;
  381. /*
  382. * Check to see if:
  383. * (a) there is anything on the txq to send
  384. * (b) link is up
  385. * (c) link attention events can be processed (fcp ring only)
  386. * (d) IOCB processing is not blocked by the outstanding mbox command.
  387. */
  388. if (pring->txq_cnt &&
  389. (phba->hba_state > LPFC_LINK_DOWN) &&
  390. (pring->ringno != phba->sli.fcp_ring ||
  391. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  392. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  393. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  394. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  395. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  396. if (iocb)
  397. lpfc_sli_update_ring(phba, pring);
  398. else
  399. lpfc_sli_update_full_ring(phba, pring);
  400. }
  401. return;
  402. }
  403. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  404. static void
  405. lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
  406. {
  407. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
  408. /* If the ring is active, flag it */
  409. if (phba->sli.ring[ringno].cmdringaddr) {
  410. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  411. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  412. /*
  413. * Force update of the local copy of cmdGetInx
  414. */
  415. phba->sli.ring[ringno].local_getidx
  416. = le32_to_cpu(pgp->cmdGetInx);
  417. spin_lock_irq(phba->host->host_lock);
  418. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  419. spin_unlock_irq(phba->host->host_lock);
  420. }
  421. }
  422. }
  423. static int
  424. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  425. {
  426. uint8_t ret;
  427. switch (mbxCommand) {
  428. case MBX_LOAD_SM:
  429. case MBX_READ_NV:
  430. case MBX_WRITE_NV:
  431. case MBX_RUN_BIU_DIAG:
  432. case MBX_INIT_LINK:
  433. case MBX_DOWN_LINK:
  434. case MBX_CONFIG_LINK:
  435. case MBX_CONFIG_RING:
  436. case MBX_RESET_RING:
  437. case MBX_READ_CONFIG:
  438. case MBX_READ_RCONFIG:
  439. case MBX_READ_SPARM:
  440. case MBX_READ_STATUS:
  441. case MBX_READ_RPI:
  442. case MBX_READ_XRI:
  443. case MBX_READ_REV:
  444. case MBX_READ_LNK_STAT:
  445. case MBX_REG_LOGIN:
  446. case MBX_UNREG_LOGIN:
  447. case MBX_READ_LA:
  448. case MBX_CLEAR_LA:
  449. case MBX_DUMP_MEMORY:
  450. case MBX_DUMP_CONTEXT:
  451. case MBX_RUN_DIAGS:
  452. case MBX_RESTART:
  453. case MBX_UPDATE_CFG:
  454. case MBX_DOWN_LOAD:
  455. case MBX_DEL_LD_ENTRY:
  456. case MBX_RUN_PROGRAM:
  457. case MBX_SET_MASK:
  458. case MBX_SET_SLIM:
  459. case MBX_UNREG_D_ID:
  460. case MBX_KILL_BOARD:
  461. case MBX_CONFIG_FARP:
  462. case MBX_BEACON:
  463. case MBX_LOAD_AREA:
  464. case MBX_RUN_BIU_DIAG64:
  465. case MBX_CONFIG_PORT:
  466. case MBX_READ_SPARM64:
  467. case MBX_READ_RPI64:
  468. case MBX_REG_LOGIN64:
  469. case MBX_READ_LA64:
  470. case MBX_FLASH_WR_ULA:
  471. case MBX_SET_DEBUG:
  472. case MBX_LOAD_EXP_ROM:
  473. ret = mbxCommand;
  474. break;
  475. default:
  476. ret = MBX_SHUTDOWN;
  477. break;
  478. }
  479. return (ret);
  480. }
  481. static void
  482. lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
  483. {
  484. wait_queue_head_t *pdone_q;
  485. /*
  486. * If pdone_q is empty, the driver thread gave up waiting and
  487. * continued running.
  488. */
  489. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  490. if (pdone_q)
  491. wake_up_interruptible(pdone_q);
  492. return;
  493. }
  494. void
  495. lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  496. {
  497. struct lpfc_dmabuf *mp;
  498. mp = (struct lpfc_dmabuf *) (pmb->context1);
  499. if (mp) {
  500. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  501. kfree(mp);
  502. }
  503. mempool_free( pmb, phba->mbox_mem_pool);
  504. return;
  505. }
  506. int
  507. lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
  508. {
  509. MAILBOX_t *mbox;
  510. MAILBOX_t *pmbox;
  511. LPFC_MBOXQ_t *pmb;
  512. struct lpfc_sli *psli;
  513. int i, rc;
  514. uint32_t process_next;
  515. psli = &phba->sli;
  516. /* We should only get here if we are in SLI2 mode */
  517. if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
  518. return (1);
  519. }
  520. phba->sli.slistat.mbox_event++;
  521. /* Get a Mailbox buffer to setup mailbox commands for callback */
  522. if ((pmb = phba->sli.mbox_active)) {
  523. pmbox = &pmb->mb;
  524. mbox = &phba->slim2p->mbx;
  525. /* First check out the status word */
  526. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
  527. /* Sanity check to ensure the host owns the mailbox */
  528. if (pmbox->mbxOwner != OWN_HOST) {
  529. /* Lets try for a while */
  530. for (i = 0; i < 10240; i++) {
  531. /* First copy command data */
  532. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  533. sizeof (uint32_t));
  534. if (pmbox->mbxOwner == OWN_HOST)
  535. goto mbout;
  536. }
  537. /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
  538. <status> */
  539. lpfc_printf_log(phba,
  540. KERN_ERR,
  541. LOG_MBOX | LOG_SLI,
  542. "%d:0304 Stray Mailbox Interrupt "
  543. "mbxCommand x%x mbxStatus x%x\n",
  544. phba->brd_no,
  545. pmbox->mbxCommand,
  546. pmbox->mbxStatus);
  547. spin_lock_irq(phba->host->host_lock);
  548. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  549. spin_unlock_irq(phba->host->host_lock);
  550. return (1);
  551. }
  552. mbout:
  553. del_timer_sync(&phba->sli.mbox_tmo);
  554. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  555. /*
  556. * It is a fatal error if unknown mbox command completion.
  557. */
  558. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  559. MBX_SHUTDOWN) {
  560. /* Unknow mailbox command compl */
  561. lpfc_printf_log(phba,
  562. KERN_ERR,
  563. LOG_MBOX | LOG_SLI,
  564. "%d:0323 Unknown Mailbox command %x Cmpl\n",
  565. phba->brd_no,
  566. pmbox->mbxCommand);
  567. phba->hba_state = LPFC_HBA_ERROR;
  568. phba->work_hs = HS_FFER3;
  569. lpfc_handle_eratt(phba);
  570. return (0);
  571. }
  572. phba->sli.mbox_active = NULL;
  573. if (pmbox->mbxStatus) {
  574. phba->sli.slistat.mbox_stat_err++;
  575. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  576. /* Mbox cmd cmpl error - RETRYing */
  577. lpfc_printf_log(phba,
  578. KERN_INFO,
  579. LOG_MBOX | LOG_SLI,
  580. "%d:0305 Mbox cmd cmpl error - "
  581. "RETRYing Data: x%x x%x x%x x%x\n",
  582. phba->brd_no,
  583. pmbox->mbxCommand,
  584. pmbox->mbxStatus,
  585. pmbox->un.varWords[0],
  586. phba->hba_state);
  587. pmbox->mbxStatus = 0;
  588. pmbox->mbxOwner = OWN_HOST;
  589. spin_lock_irq(phba->host->host_lock);
  590. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  591. spin_unlock_irq(phba->host->host_lock);
  592. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  593. if (rc == MBX_SUCCESS)
  594. return (0);
  595. }
  596. }
  597. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  598. lpfc_printf_log(phba,
  599. KERN_INFO,
  600. LOG_MBOX | LOG_SLI,
  601. "%d:0307 Mailbox cmd x%x Cmpl x%p "
  602. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  603. phba->brd_no,
  604. pmbox->mbxCommand,
  605. pmb->mbox_cmpl,
  606. *((uint32_t *) pmbox),
  607. pmbox->un.varWords[0],
  608. pmbox->un.varWords[1],
  609. pmbox->un.varWords[2],
  610. pmbox->un.varWords[3],
  611. pmbox->un.varWords[4],
  612. pmbox->un.varWords[5],
  613. pmbox->un.varWords[6],
  614. pmbox->un.varWords[7]);
  615. if (pmb->mbox_cmpl) {
  616. lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
  617. pmb->mbox_cmpl(phba,pmb);
  618. }
  619. }
  620. do {
  621. process_next = 0; /* by default don't loop */
  622. spin_lock_irq(phba->host->host_lock);
  623. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  624. /* Process next mailbox command if there is one */
  625. if ((pmb = lpfc_mbox_get(phba))) {
  626. spin_unlock_irq(phba->host->host_lock);
  627. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  628. if (rc == MBX_NOT_FINISHED) {
  629. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  630. pmb->mbox_cmpl(phba,pmb);
  631. process_next = 1;
  632. continue; /* loop back */
  633. }
  634. } else {
  635. spin_unlock_irq(phba->host->host_lock);
  636. /* Turn on IOCB processing */
  637. for (i = 0; i < phba->sli.num_rings; i++) {
  638. lpfc_sli_turn_on_ring(phba, i);
  639. }
  640. /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
  641. while (!list_empty(&phba->freebufList)) {
  642. struct lpfc_dmabuf *mp;
  643. mp = NULL;
  644. list_remove_head((&phba->freebufList),
  645. mp,
  646. struct lpfc_dmabuf,
  647. list);
  648. if (mp) {
  649. lpfc_mbuf_free(phba, mp->virt,
  650. mp->phys);
  651. kfree(mp);
  652. }
  653. }
  654. }
  655. } while (process_next);
  656. return (0);
  657. }
  658. static int
  659. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  660. struct lpfc_iocbq *saveq)
  661. {
  662. IOCB_t * irsp;
  663. WORD5 * w5p;
  664. uint32_t Rctl, Type;
  665. uint32_t match, i;
  666. match = 0;
  667. irsp = &(saveq->iocb);
  668. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  669. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
  670. Rctl = FC_ELS_REQ;
  671. Type = FC_ELS_DATA;
  672. } else {
  673. w5p =
  674. (WORD5 *) & (saveq->iocb.un.
  675. ulpWord[5]);
  676. Rctl = w5p->hcsw.Rctl;
  677. Type = w5p->hcsw.Type;
  678. /* Firmware Workaround */
  679. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  680. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
  681. Rctl = FC_ELS_REQ;
  682. Type = FC_ELS_DATA;
  683. w5p->hcsw.Rctl = Rctl;
  684. w5p->hcsw.Type = Type;
  685. }
  686. }
  687. /* unSolicited Responses */
  688. if (pring->prt[0].profile) {
  689. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  690. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  691. saveq);
  692. match = 1;
  693. } else {
  694. /* We must search, based on rctl / type
  695. for the right routine */
  696. for (i = 0; i < pring->num_mask;
  697. i++) {
  698. if ((pring->prt[i].rctl ==
  699. Rctl)
  700. && (pring->prt[i].
  701. type == Type)) {
  702. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  703. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  704. (phba, pring, saveq);
  705. match = 1;
  706. break;
  707. }
  708. }
  709. }
  710. if (match == 0) {
  711. /* Unexpected Rctl / Type received */
  712. /* Ring <ringno> handler: unexpected
  713. Rctl <Rctl> Type <Type> received */
  714. lpfc_printf_log(phba,
  715. KERN_WARNING,
  716. LOG_SLI,
  717. "%d:0313 Ring %d handler: unexpected Rctl x%x "
  718. "Type x%x received \n",
  719. phba->brd_no,
  720. pring->ringno,
  721. Rctl,
  722. Type);
  723. }
  724. return(1);
  725. }
  726. static struct lpfc_iocbq *
  727. lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
  728. struct lpfc_sli_ring * pring,
  729. struct lpfc_iocbq * prspiocb)
  730. {
  731. struct lpfc_iocbq *cmd_iocb = NULL;
  732. uint16_t iotag;
  733. iotag = prspiocb->iocb.ulpIoTag;
  734. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  735. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  736. list_del(&cmd_iocb->list);
  737. pring->txcmplq_cnt--;
  738. return cmd_iocb;
  739. }
  740. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  741. "%d:0317 iotag x%x is out off "
  742. "range: max iotag x%x wd0 x%x\n",
  743. phba->brd_no, iotag,
  744. phba->sli.last_iotag,
  745. *(((uint32_t *) &prspiocb->iocb) + 7));
  746. return NULL;
  747. }
  748. static int
  749. lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  750. struct lpfc_iocbq *saveq)
  751. {
  752. struct lpfc_iocbq * cmdiocbp;
  753. int rc = 1;
  754. unsigned long iflag;
  755. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  756. spin_lock_irqsave(phba->host->host_lock, iflag);
  757. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  758. if (cmdiocbp) {
  759. if (cmdiocbp->iocb_cmpl) {
  760. /*
  761. * Post all ELS completions to the worker thread.
  762. * All other are passed to the completion callback.
  763. */
  764. if (pring->ringno == LPFC_ELS_RING) {
  765. spin_unlock_irqrestore(phba->host->host_lock,
  766. iflag);
  767. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  768. spin_lock_irqsave(phba->host->host_lock, iflag);
  769. }
  770. else {
  771. spin_unlock_irqrestore(phba->host->host_lock,
  772. iflag);
  773. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  774. spin_lock_irqsave(phba->host->host_lock, iflag);
  775. }
  776. } else
  777. lpfc_sli_release_iocbq(phba, cmdiocbp);
  778. } else {
  779. /*
  780. * Unknown initiating command based on the response iotag.
  781. * This could be the case on the ELS ring because of
  782. * lpfc_els_abort().
  783. */
  784. if (pring->ringno != LPFC_ELS_RING) {
  785. /*
  786. * Ring <ringno> handler: unexpected completion IoTag
  787. * <IoTag>
  788. */
  789. lpfc_printf_log(phba,
  790. KERN_WARNING,
  791. LOG_SLI,
  792. "%d:0322 Ring %d handler: unexpected "
  793. "completion IoTag x%x Data: x%x x%x x%x x%x\n",
  794. phba->brd_no,
  795. pring->ringno,
  796. saveq->iocb.ulpIoTag,
  797. saveq->iocb.ulpStatus,
  798. saveq->iocb.un.ulpWord[4],
  799. saveq->iocb.ulpCommand,
  800. saveq->iocb.ulpContext);
  801. }
  802. }
  803. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  804. return rc;
  805. }
  806. static void lpfc_sli_rsp_pointers_error(struct lpfc_hba * phba,
  807. struct lpfc_sli_ring * pring)
  808. {
  809. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  810. /*
  811. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  812. * rsp ring <portRspMax>
  813. */
  814. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  815. "%d:0312 Ring %d handler: portRspPut %d "
  816. "is bigger then rsp ring %d\n",
  817. phba->brd_no, pring->ringno,
  818. le32_to_cpu(pgp->rspPutInx),
  819. pring->numRiocb);
  820. phba->hba_state = LPFC_HBA_ERROR;
  821. /*
  822. * All error attention handlers are posted to
  823. * worker thread
  824. */
  825. phba->work_ha |= HA_ERATT;
  826. phba->work_hs = HS_FFER3;
  827. if (phba->work_wait)
  828. wake_up(phba->work_wait);
  829. return;
  830. }
  831. void lpfc_sli_poll_fcp_ring(struct lpfc_hba * phba)
  832. {
  833. struct lpfc_sli * psli = &phba->sli;
  834. struct lpfc_sli_ring * pring = &psli->ring[LPFC_FCP_RING];
  835. IOCB_t *irsp = NULL;
  836. IOCB_t *entry = NULL;
  837. struct lpfc_iocbq *cmdiocbq = NULL;
  838. struct lpfc_iocbq rspiocbq;
  839. struct lpfc_pgp *pgp;
  840. uint32_t status;
  841. uint32_t portRspPut, portRspMax;
  842. int type;
  843. uint32_t rsp_cmpl = 0;
  844. void __iomem *to_slim;
  845. uint32_t ha_copy;
  846. pring->stats.iocb_event++;
  847. /* The driver assumes SLI-2 mode */
  848. pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  849. /*
  850. * The next available response entry should never exceed the maximum
  851. * entries. If it does, treat it as an adapter hardware error.
  852. */
  853. portRspMax = pring->numRiocb;
  854. portRspPut = le32_to_cpu(pgp->rspPutInx);
  855. if (unlikely(portRspPut >= portRspMax)) {
  856. lpfc_sli_rsp_pointers_error(phba, pring);
  857. return;
  858. }
  859. rmb();
  860. while (pring->rspidx != portRspPut) {
  861. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  862. if (++pring->rspidx >= portRspMax)
  863. pring->rspidx = 0;
  864. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  865. (uint32_t *) &rspiocbq.iocb,
  866. sizeof (IOCB_t));
  867. irsp = &rspiocbq.iocb;
  868. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  869. pring->stats.iocb_rsp++;
  870. rsp_cmpl++;
  871. if (unlikely(irsp->ulpStatus)) {
  872. /* Rsp ring <ringno> error: IOCB */
  873. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  874. "%d:0326 Rsp Ring %d error: IOCB Data: "
  875. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  876. phba->brd_no, pring->ringno,
  877. irsp->un.ulpWord[0],
  878. irsp->un.ulpWord[1],
  879. irsp->un.ulpWord[2],
  880. irsp->un.ulpWord[3],
  881. irsp->un.ulpWord[4],
  882. irsp->un.ulpWord[5],
  883. *(((uint32_t *) irsp) + 6),
  884. *(((uint32_t *) irsp) + 7));
  885. }
  886. switch (type) {
  887. case LPFC_ABORT_IOCB:
  888. case LPFC_SOL_IOCB:
  889. /*
  890. * Idle exchange closed via ABTS from port. No iocb
  891. * resources need to be recovered.
  892. */
  893. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  894. printk(KERN_INFO "%s: IOCB cmd 0x%x processed."
  895. " Skipping completion\n", __FUNCTION__,
  896. irsp->ulpCommand);
  897. break;
  898. }
  899. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  900. &rspiocbq);
  901. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  902. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  903. &rspiocbq);
  904. }
  905. break;
  906. default:
  907. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  908. char adaptermsg[LPFC_MAX_ADPTMSG];
  909. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  910. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  911. MAX_MSG_DATA);
  912. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  913. phba->brd_no, adaptermsg);
  914. } else {
  915. /* Unknown IOCB command */
  916. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  917. "%d:0321 Unknown IOCB command "
  918. "Data: x%x, x%x x%x x%x x%x\n",
  919. phba->brd_no, type,
  920. irsp->ulpCommand,
  921. irsp->ulpStatus,
  922. irsp->ulpIoTag,
  923. irsp->ulpContext);
  924. }
  925. break;
  926. }
  927. /*
  928. * The response IOCB has been processed. Update the ring
  929. * pointer in SLIM. If the port response put pointer has not
  930. * been updated, sync the pgp->rspPutInx and fetch the new port
  931. * response put pointer.
  932. */
  933. to_slim = phba->MBslimaddr +
  934. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  935. writeb(pring->rspidx, to_slim);
  936. if (pring->rspidx == portRspPut)
  937. portRspPut = le32_to_cpu(pgp->rspPutInx);
  938. }
  939. ha_copy = readl(phba->HAregaddr);
  940. ha_copy >>= (LPFC_FCP_RING * 4);
  941. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  942. pring->stats.iocb_rsp_full++;
  943. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  944. writel(status, phba->CAregaddr);
  945. readl(phba->CAregaddr);
  946. }
  947. if ((ha_copy & HA_R0CE_RSP) &&
  948. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  949. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  950. pring->stats.iocb_cmd_empty++;
  951. /* Force update of the local copy of cmdGetInx */
  952. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  953. lpfc_sli_resume_iocb(phba, pring);
  954. if ((pring->lpfc_sli_cmd_available))
  955. (pring->lpfc_sli_cmd_available) (phba, pring);
  956. }
  957. return;
  958. }
  959. /*
  960. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  961. * to check it explicitly.
  962. */
  963. static int
  964. lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
  965. struct lpfc_sli_ring * pring, uint32_t mask)
  966. {
  967. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  968. IOCB_t *irsp = NULL;
  969. IOCB_t *entry = NULL;
  970. struct lpfc_iocbq *cmdiocbq = NULL;
  971. struct lpfc_iocbq rspiocbq;
  972. uint32_t status;
  973. uint32_t portRspPut, portRspMax;
  974. int rc = 1;
  975. lpfc_iocb_type type;
  976. unsigned long iflag;
  977. uint32_t rsp_cmpl = 0;
  978. void __iomem *to_slim;
  979. spin_lock_irqsave(phba->host->host_lock, iflag);
  980. pring->stats.iocb_event++;
  981. /*
  982. * The next available response entry should never exceed the maximum
  983. * entries. If it does, treat it as an adapter hardware error.
  984. */
  985. portRspMax = pring->numRiocb;
  986. portRspPut = le32_to_cpu(pgp->rspPutInx);
  987. if (unlikely(portRspPut >= portRspMax)) {
  988. lpfc_sli_rsp_pointers_error(phba, pring);
  989. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  990. return 1;
  991. }
  992. rmb();
  993. while (pring->rspidx != portRspPut) {
  994. /*
  995. * Fetch an entry off the ring and copy it into a local data
  996. * structure. The copy involves a byte-swap since the
  997. * network byte order and pci byte orders are different.
  998. */
  999. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  1000. if (++pring->rspidx >= portRspMax)
  1001. pring->rspidx = 0;
  1002. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1003. (uint32_t *) &rspiocbq.iocb,
  1004. sizeof (IOCB_t));
  1005. irsp = &rspiocbq.iocb;
  1006. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1007. pring->stats.iocb_rsp++;
  1008. rsp_cmpl++;
  1009. if (unlikely(irsp->ulpStatus)) {
  1010. /* Rsp ring <ringno> error: IOCB */
  1011. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1012. "%d:0326 Rsp Ring %d error: IOCB Data: "
  1013. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1014. phba->brd_no, pring->ringno,
  1015. irsp->un.ulpWord[0], irsp->un.ulpWord[1],
  1016. irsp->un.ulpWord[2], irsp->un.ulpWord[3],
  1017. irsp->un.ulpWord[4], irsp->un.ulpWord[5],
  1018. *(((uint32_t *) irsp) + 6),
  1019. *(((uint32_t *) irsp) + 7));
  1020. }
  1021. switch (type) {
  1022. case LPFC_ABORT_IOCB:
  1023. case LPFC_SOL_IOCB:
  1024. /*
  1025. * Idle exchange closed via ABTS from port. No iocb
  1026. * resources need to be recovered.
  1027. */
  1028. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1029. printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
  1030. "Skipping completion\n", __FUNCTION__,
  1031. irsp->ulpCommand);
  1032. break;
  1033. }
  1034. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1035. &rspiocbq);
  1036. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1037. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1038. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1039. &rspiocbq);
  1040. } else {
  1041. spin_unlock_irqrestore(
  1042. phba->host->host_lock, iflag);
  1043. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1044. &rspiocbq);
  1045. spin_lock_irqsave(phba->host->host_lock,
  1046. iflag);
  1047. }
  1048. }
  1049. break;
  1050. default:
  1051. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1052. char adaptermsg[LPFC_MAX_ADPTMSG];
  1053. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1054. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1055. MAX_MSG_DATA);
  1056. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  1057. phba->brd_no, adaptermsg);
  1058. } else {
  1059. /* Unknown IOCB command */
  1060. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1061. "%d:0321 Unknown IOCB command "
  1062. "Data: x%x, x%x x%x x%x x%x\n",
  1063. phba->brd_no, type, irsp->ulpCommand,
  1064. irsp->ulpStatus, irsp->ulpIoTag,
  1065. irsp->ulpContext);
  1066. }
  1067. break;
  1068. }
  1069. /*
  1070. * The response IOCB has been processed. Update the ring
  1071. * pointer in SLIM. If the port response put pointer has not
  1072. * been updated, sync the pgp->rspPutInx and fetch the new port
  1073. * response put pointer.
  1074. */
  1075. to_slim = phba->MBslimaddr +
  1076. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  1077. writel(pring->rspidx, to_slim);
  1078. if (pring->rspidx == portRspPut)
  1079. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1080. }
  1081. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1082. pring->stats.iocb_rsp_full++;
  1083. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1084. writel(status, phba->CAregaddr);
  1085. readl(phba->CAregaddr);
  1086. }
  1087. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1088. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1089. pring->stats.iocb_cmd_empty++;
  1090. /* Force update of the local copy of cmdGetInx */
  1091. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1092. lpfc_sli_resume_iocb(phba, pring);
  1093. if ((pring->lpfc_sli_cmd_available))
  1094. (pring->lpfc_sli_cmd_available) (phba, pring);
  1095. }
  1096. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1097. return rc;
  1098. }
  1099. int
  1100. lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
  1101. struct lpfc_sli_ring * pring, uint32_t mask)
  1102. {
  1103. IOCB_t *entry;
  1104. IOCB_t *irsp = NULL;
  1105. struct lpfc_iocbq *rspiocbp = NULL;
  1106. struct lpfc_iocbq *next_iocb;
  1107. struct lpfc_iocbq *cmdiocbp;
  1108. struct lpfc_iocbq *saveq;
  1109. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1110. uint8_t iocb_cmd_type;
  1111. lpfc_iocb_type type;
  1112. uint32_t status, free_saveq;
  1113. uint32_t portRspPut, portRspMax;
  1114. int rc = 1;
  1115. unsigned long iflag;
  1116. void __iomem *to_slim;
  1117. spin_lock_irqsave(phba->host->host_lock, iflag);
  1118. pring->stats.iocb_event++;
  1119. /*
  1120. * The next available response entry should never exceed the maximum
  1121. * entries. If it does, treat it as an adapter hardware error.
  1122. */
  1123. portRspMax = pring->numRiocb;
  1124. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1125. if (portRspPut >= portRspMax) {
  1126. /*
  1127. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1128. * rsp ring <portRspMax>
  1129. */
  1130. lpfc_printf_log(phba,
  1131. KERN_ERR,
  1132. LOG_SLI,
  1133. "%d:0312 Ring %d handler: portRspPut %d "
  1134. "is bigger then rsp ring %d\n",
  1135. phba->brd_no,
  1136. pring->ringno, portRspPut, portRspMax);
  1137. phba->hba_state = LPFC_HBA_ERROR;
  1138. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1139. phba->work_hs = HS_FFER3;
  1140. lpfc_handle_eratt(phba);
  1141. return 1;
  1142. }
  1143. rmb();
  1144. while (pring->rspidx != portRspPut) {
  1145. /*
  1146. * Build a completion list and call the appropriate handler.
  1147. * The process is to get the next available response iocb, get
  1148. * a free iocb from the list, copy the response data into the
  1149. * free iocb, insert to the continuation list, and update the
  1150. * next response index to slim. This process makes response
  1151. * iocb's in the ring available to DMA as fast as possible but
  1152. * pays a penalty for a copy operation. Since the iocb is
  1153. * only 32 bytes, this penalty is considered small relative to
  1154. * the PCI reads for register values and a slim write. When
  1155. * the ulpLe field is set, the entire Command has been
  1156. * received.
  1157. */
  1158. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  1159. rspiocbp = lpfc_sli_get_iocbq(phba);
  1160. if (rspiocbp == NULL) {
  1161. printk(KERN_ERR "%s: out of buffers! Failing "
  1162. "completion.\n", __FUNCTION__);
  1163. break;
  1164. }
  1165. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
  1166. irsp = &rspiocbp->iocb;
  1167. if (++pring->rspidx >= portRspMax)
  1168. pring->rspidx = 0;
  1169. to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
  1170. + 1) * 4;
  1171. writel(pring->rspidx, to_slim);
  1172. if (list_empty(&(pring->iocb_continueq))) {
  1173. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1174. } else {
  1175. list_add_tail(&rspiocbp->list,
  1176. &(pring->iocb_continueq));
  1177. }
  1178. pring->iocb_continueq_cnt++;
  1179. if (irsp->ulpLe) {
  1180. /*
  1181. * By default, the driver expects to free all resources
  1182. * associated with this iocb completion.
  1183. */
  1184. free_saveq = 1;
  1185. saveq = list_get_first(&pring->iocb_continueq,
  1186. struct lpfc_iocbq, list);
  1187. irsp = &(saveq->iocb);
  1188. list_del_init(&pring->iocb_continueq);
  1189. pring->iocb_continueq_cnt = 0;
  1190. pring->stats.iocb_rsp++;
  1191. if (irsp->ulpStatus) {
  1192. /* Rsp ring <ringno> error: IOCB */
  1193. lpfc_printf_log(phba,
  1194. KERN_WARNING,
  1195. LOG_SLI,
  1196. "%d:0328 Rsp Ring %d error: IOCB Data: "
  1197. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1198. phba->brd_no,
  1199. pring->ringno,
  1200. irsp->un.ulpWord[0],
  1201. irsp->un.ulpWord[1],
  1202. irsp->un.ulpWord[2],
  1203. irsp->un.ulpWord[3],
  1204. irsp->un.ulpWord[4],
  1205. irsp->un.ulpWord[5],
  1206. *(((uint32_t *) irsp) + 6),
  1207. *(((uint32_t *) irsp) + 7));
  1208. }
  1209. /*
  1210. * Fetch the IOCB command type and call the correct
  1211. * completion routine. Solicited and Unsolicited
  1212. * IOCBs on the ELS ring get freed back to the
  1213. * lpfc_iocb_list by the discovery kernel thread.
  1214. */
  1215. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1216. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1217. if (type == LPFC_SOL_IOCB) {
  1218. spin_unlock_irqrestore(phba->host->host_lock,
  1219. iflag);
  1220. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1221. saveq);
  1222. spin_lock_irqsave(phba->host->host_lock, iflag);
  1223. } else if (type == LPFC_UNSOL_IOCB) {
  1224. spin_unlock_irqrestore(phba->host->host_lock,
  1225. iflag);
  1226. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1227. saveq);
  1228. spin_lock_irqsave(phba->host->host_lock, iflag);
  1229. } else if (type == LPFC_ABORT_IOCB) {
  1230. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1231. ((cmdiocbp =
  1232. lpfc_sli_iocbq_lookup(phba, pring,
  1233. saveq)))) {
  1234. /* Call the specified completion
  1235. routine */
  1236. if (cmdiocbp->iocb_cmpl) {
  1237. spin_unlock_irqrestore(
  1238. phba->host->host_lock,
  1239. iflag);
  1240. (cmdiocbp->iocb_cmpl) (phba,
  1241. cmdiocbp, saveq);
  1242. spin_lock_irqsave(
  1243. phba->host->host_lock,
  1244. iflag);
  1245. } else
  1246. lpfc_sli_release_iocbq(phba,
  1247. cmdiocbp);
  1248. }
  1249. } else if (type == LPFC_UNKNOWN_IOCB) {
  1250. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1251. char adaptermsg[LPFC_MAX_ADPTMSG];
  1252. memset(adaptermsg, 0,
  1253. LPFC_MAX_ADPTMSG);
  1254. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1255. MAX_MSG_DATA);
  1256. dev_warn(&((phba->pcidev)->dev),
  1257. "lpfc%d: %s",
  1258. phba->brd_no, adaptermsg);
  1259. } else {
  1260. /* Unknown IOCB command */
  1261. lpfc_printf_log(phba,
  1262. KERN_ERR,
  1263. LOG_SLI,
  1264. "%d:0321 Unknown IOCB command "
  1265. "Data: x%x x%x x%x x%x\n",
  1266. phba->brd_no,
  1267. irsp->ulpCommand,
  1268. irsp->ulpStatus,
  1269. irsp->ulpIoTag,
  1270. irsp->ulpContext);
  1271. }
  1272. }
  1273. if (free_saveq) {
  1274. if (!list_empty(&saveq->list)) {
  1275. list_for_each_entry_safe(rspiocbp,
  1276. next_iocb,
  1277. &saveq->list,
  1278. list) {
  1279. lpfc_sli_release_iocbq(phba,
  1280. rspiocbp);
  1281. }
  1282. }
  1283. lpfc_sli_release_iocbq(phba, saveq);
  1284. }
  1285. }
  1286. /*
  1287. * If the port response put pointer has not been updated, sync
  1288. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1289. * response put pointer.
  1290. */
  1291. if (pring->rspidx == portRspPut) {
  1292. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1293. }
  1294. } /* while (pring->rspidx != portRspPut) */
  1295. if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
  1296. /* At least one response entry has been freed */
  1297. pring->stats.iocb_rsp_full++;
  1298. /* SET RxRE_RSP in Chip Att register */
  1299. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1300. writel(status, phba->CAregaddr);
  1301. readl(phba->CAregaddr); /* flush */
  1302. }
  1303. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1304. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1305. pring->stats.iocb_cmd_empty++;
  1306. /* Force update of the local copy of cmdGetInx */
  1307. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1308. lpfc_sli_resume_iocb(phba, pring);
  1309. if ((pring->lpfc_sli_cmd_available))
  1310. (pring->lpfc_sli_cmd_available) (phba, pring);
  1311. }
  1312. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1313. return rc;
  1314. }
  1315. int
  1316. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1317. {
  1318. struct lpfc_iocbq *iocb, *next_iocb;
  1319. IOCB_t *icmd = NULL, *cmd = NULL;
  1320. int errcnt;
  1321. errcnt = 0;
  1322. /* Error everything on txq and txcmplq
  1323. * First do the txq.
  1324. */
  1325. spin_lock_irq(phba->host->host_lock);
  1326. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  1327. list_del_init(&iocb->list);
  1328. if (iocb->iocb_cmpl) {
  1329. icmd = &iocb->iocb;
  1330. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1331. icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1332. spin_unlock_irq(phba->host->host_lock);
  1333. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1334. spin_lock_irq(phba->host->host_lock);
  1335. } else
  1336. lpfc_sli_release_iocbq(phba, iocb);
  1337. }
  1338. pring->txq_cnt = 0;
  1339. INIT_LIST_HEAD(&(pring->txq));
  1340. /* Next issue ABTS for everything on the txcmplq */
  1341. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  1342. cmd = &iocb->iocb;
  1343. /*
  1344. * Imediate abort of IOCB, deque and call compl
  1345. */
  1346. list_del_init(&iocb->list);
  1347. pring->txcmplq_cnt--;
  1348. if (iocb->iocb_cmpl) {
  1349. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1350. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1351. spin_unlock_irq(phba->host->host_lock);
  1352. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1353. spin_lock_irq(phba->host->host_lock);
  1354. } else
  1355. lpfc_sli_release_iocbq(phba, iocb);
  1356. }
  1357. INIT_LIST_HEAD(&pring->txcmplq);
  1358. pring->txcmplq_cnt = 0;
  1359. spin_unlock_irq(phba->host->host_lock);
  1360. return errcnt;
  1361. }
  1362. int
  1363. lpfc_sli_brdready(struct lpfc_hba * phba, uint32_t mask)
  1364. {
  1365. uint32_t status;
  1366. int i = 0;
  1367. int retval = 0;
  1368. /* Read the HBA Host Status Register */
  1369. status = readl(phba->HSregaddr);
  1370. /*
  1371. * Check status register every 100ms for 5 retries, then every
  1372. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1373. * every 2.5 sec for 4.
  1374. * Break our of the loop if errors occurred during init.
  1375. */
  1376. while (((status & mask) != mask) &&
  1377. !(status & HS_FFERM) &&
  1378. i++ < 20) {
  1379. if (i <= 5)
  1380. msleep(10);
  1381. else if (i <= 10)
  1382. msleep(500);
  1383. else
  1384. msleep(2500);
  1385. if (i == 15) {
  1386. phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
  1387. lpfc_sli_brdrestart(phba);
  1388. }
  1389. /* Read the HBA Host Status Register */
  1390. status = readl(phba->HSregaddr);
  1391. }
  1392. /* Check to see if any errors occurred during init */
  1393. if ((status & HS_FFERM) || (i >= 20)) {
  1394. phba->hba_state = LPFC_HBA_ERROR;
  1395. retval = 1;
  1396. }
  1397. return retval;
  1398. }
  1399. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1400. void lpfc_reset_barrier(struct lpfc_hba * phba)
  1401. {
  1402. uint32_t * resp_buf;
  1403. uint32_t * mbox_buf;
  1404. volatile uint32_t mbox;
  1405. uint32_t hc_copy;
  1406. int i;
  1407. uint8_t hdrtype;
  1408. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1409. if (hdrtype != 0x80 ||
  1410. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1411. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1412. return;
  1413. /*
  1414. * Tell the other part of the chip to suspend temporarily all
  1415. * its DMA activity.
  1416. */
  1417. resp_buf = (uint32_t *)phba->MBslimaddr;
  1418. /* Disable the error attention */
  1419. hc_copy = readl(phba->HCregaddr);
  1420. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1421. readl(phba->HCregaddr); /* flush */
  1422. if (readl(phba->HAregaddr) & HA_ERATT) {
  1423. /* Clear Chip error bit */
  1424. writel(HA_ERATT, phba->HAregaddr);
  1425. phba->stopped = 1;
  1426. }
  1427. mbox = 0;
  1428. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1429. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1430. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1431. mbox_buf = (uint32_t *)phba->MBslimaddr;
  1432. writel(mbox, mbox_buf);
  1433. for (i = 0;
  1434. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1435. mdelay(1);
  1436. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1437. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1438. phba->stopped)
  1439. goto restore_hc;
  1440. else
  1441. goto clear_errat;
  1442. }
  1443. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1444. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1445. mdelay(1);
  1446. clear_errat:
  1447. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1448. mdelay(1);
  1449. if (readl(phba->HAregaddr) & HA_ERATT) {
  1450. writel(HA_ERATT, phba->HAregaddr);
  1451. phba->stopped = 1;
  1452. }
  1453. restore_hc:
  1454. writel(hc_copy, phba->HCregaddr);
  1455. readl(phba->HCregaddr); /* flush */
  1456. }
  1457. int
  1458. lpfc_sli_brdkill(struct lpfc_hba * phba)
  1459. {
  1460. struct lpfc_sli *psli;
  1461. LPFC_MBOXQ_t *pmb;
  1462. uint32_t status;
  1463. uint32_t ha_copy;
  1464. int retval;
  1465. int i = 0;
  1466. psli = &phba->sli;
  1467. /* Kill HBA */
  1468. lpfc_printf_log(phba,
  1469. KERN_INFO,
  1470. LOG_SLI,
  1471. "%d:0329 Kill HBA Data: x%x x%x\n",
  1472. phba->brd_no,
  1473. phba->hba_state,
  1474. psli->sli_flag);
  1475. if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
  1476. GFP_KERNEL)) == 0)
  1477. return 1;
  1478. /* Disable the error attention */
  1479. spin_lock_irq(phba->host->host_lock);
  1480. status = readl(phba->HCregaddr);
  1481. status &= ~HC_ERINT_ENA;
  1482. writel(status, phba->HCregaddr);
  1483. readl(phba->HCregaddr); /* flush */
  1484. spin_unlock_irq(phba->host->host_lock);
  1485. lpfc_kill_board(phba, pmb);
  1486. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1487. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1488. if (retval != MBX_SUCCESS) {
  1489. if (retval != MBX_BUSY)
  1490. mempool_free(pmb, phba->mbox_mem_pool);
  1491. return 1;
  1492. }
  1493. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1494. mempool_free(pmb, phba->mbox_mem_pool);
  1495. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1496. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1497. * 3 seconds we still set HBA_ERROR state because the status of the
  1498. * board is now undefined.
  1499. */
  1500. ha_copy = readl(phba->HAregaddr);
  1501. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1502. mdelay(100);
  1503. ha_copy = readl(phba->HAregaddr);
  1504. }
  1505. del_timer_sync(&psli->mbox_tmo);
  1506. if (ha_copy & HA_ERATT) {
  1507. writel(HA_ERATT, phba->HAregaddr);
  1508. phba->stopped = 1;
  1509. }
  1510. spin_lock_irq(phba->host->host_lock);
  1511. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1512. spin_unlock_irq(phba->host->host_lock);
  1513. psli->mbox_active = NULL;
  1514. lpfc_hba_down_post(phba);
  1515. phba->hba_state = LPFC_HBA_ERROR;
  1516. return (ha_copy & HA_ERATT ? 0 : 1);
  1517. }
  1518. int
  1519. lpfc_sli_brdreset(struct lpfc_hba * phba)
  1520. {
  1521. struct lpfc_sli *psli;
  1522. struct lpfc_sli_ring *pring;
  1523. uint16_t cfg_value;
  1524. int i;
  1525. psli = &phba->sli;
  1526. /* Reset HBA */
  1527. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1528. "%d:0325 Reset HBA Data: x%x x%x\n", phba->brd_no,
  1529. phba->hba_state, psli->sli_flag);
  1530. /* perform board reset */
  1531. phba->fc_eventTag = 0;
  1532. phba->fc_myDID = 0;
  1533. phba->fc_prevDID = 0;
  1534. psli->sli_flag = 0;
  1535. /* Turn off parity checking and serr during the physical reset */
  1536. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1537. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1538. (cfg_value &
  1539. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1540. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1541. /* Now toggle INITFF bit in the Host Control Register */
  1542. writel(HC_INITFF, phba->HCregaddr);
  1543. mdelay(1);
  1544. readl(phba->HCregaddr); /* flush */
  1545. writel(0, phba->HCregaddr);
  1546. readl(phba->HCregaddr); /* flush */
  1547. /* Restore PCI cmd register */
  1548. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1549. /* Initialize relevant SLI info */
  1550. for (i = 0; i < psli->num_rings; i++) {
  1551. pring = &psli->ring[i];
  1552. pring->flag = 0;
  1553. pring->rspidx = 0;
  1554. pring->next_cmdidx = 0;
  1555. pring->local_getidx = 0;
  1556. pring->cmdidx = 0;
  1557. pring->missbufcnt = 0;
  1558. }
  1559. phba->hba_state = LPFC_WARM_START;
  1560. return 0;
  1561. }
  1562. int
  1563. lpfc_sli_brdrestart(struct lpfc_hba * phba)
  1564. {
  1565. MAILBOX_t *mb;
  1566. struct lpfc_sli *psli;
  1567. uint16_t skip_post;
  1568. volatile uint32_t word0;
  1569. void __iomem *to_slim;
  1570. spin_lock_irq(phba->host->host_lock);
  1571. psli = &phba->sli;
  1572. /* Restart HBA */
  1573. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1574. "%d:0328 Restart HBA Data: x%x x%x\n", phba->brd_no,
  1575. phba->hba_state, psli->sli_flag);
  1576. word0 = 0;
  1577. mb = (MAILBOX_t *) &word0;
  1578. mb->mbxCommand = MBX_RESTART;
  1579. mb->mbxHc = 1;
  1580. lpfc_reset_barrier(phba);
  1581. to_slim = phba->MBslimaddr;
  1582. writel(*(uint32_t *) mb, to_slim);
  1583. readl(to_slim); /* flush */
  1584. /* Only skip post after fc_ffinit is completed */
  1585. if (phba->hba_state) {
  1586. skip_post = 1;
  1587. word0 = 1; /* This is really setting up word1 */
  1588. } else {
  1589. skip_post = 0;
  1590. word0 = 0; /* This is really setting up word1 */
  1591. }
  1592. to_slim = (uint8_t *) phba->MBslimaddr + sizeof (uint32_t);
  1593. writel(*(uint32_t *) mb, to_slim);
  1594. readl(to_slim); /* flush */
  1595. lpfc_sli_brdreset(phba);
  1596. phba->stopped = 0;
  1597. phba->hba_state = LPFC_INIT_START;
  1598. spin_unlock_irq(phba->host->host_lock);
  1599. if (skip_post)
  1600. mdelay(100);
  1601. else
  1602. mdelay(2000);
  1603. lpfc_hba_down_post(phba);
  1604. return 0;
  1605. }
  1606. static int
  1607. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1608. {
  1609. uint32_t status, i = 0;
  1610. /* Read the HBA Host Status Register */
  1611. status = readl(phba->HSregaddr);
  1612. /* Check status register to see what current state is */
  1613. i = 0;
  1614. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1615. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1616. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1617. * 4.
  1618. */
  1619. if (i++ >= 20) {
  1620. /* Adapter failed to init, timeout, status reg
  1621. <status> */
  1622. lpfc_printf_log(phba,
  1623. KERN_ERR,
  1624. LOG_INIT,
  1625. "%d:0436 Adapter failed to init, "
  1626. "timeout, status reg x%x\n",
  1627. phba->brd_no,
  1628. status);
  1629. phba->hba_state = LPFC_HBA_ERROR;
  1630. return -ETIMEDOUT;
  1631. }
  1632. /* Check to see if any errors occurred during init */
  1633. if (status & HS_FFERM) {
  1634. /* ERROR: During chipset initialization */
  1635. /* Adapter failed to init, chipset, status reg
  1636. <status> */
  1637. lpfc_printf_log(phba,
  1638. KERN_ERR,
  1639. LOG_INIT,
  1640. "%d:0437 Adapter failed to init, "
  1641. "chipset, status reg x%x\n",
  1642. phba->brd_no,
  1643. status);
  1644. phba->hba_state = LPFC_HBA_ERROR;
  1645. return -EIO;
  1646. }
  1647. if (i <= 5) {
  1648. msleep(10);
  1649. } else if (i <= 10) {
  1650. msleep(500);
  1651. } else {
  1652. msleep(2500);
  1653. }
  1654. if (i == 15) {
  1655. phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
  1656. lpfc_sli_brdrestart(phba);
  1657. }
  1658. /* Read the HBA Host Status Register */
  1659. status = readl(phba->HSregaddr);
  1660. }
  1661. /* Check to see if any errors occurred during init */
  1662. if (status & HS_FFERM) {
  1663. /* ERROR: During chipset initialization */
  1664. /* Adapter failed to init, chipset, status reg <status> */
  1665. lpfc_printf_log(phba,
  1666. KERN_ERR,
  1667. LOG_INIT,
  1668. "%d:0438 Adapter failed to init, chipset, "
  1669. "status reg x%x\n",
  1670. phba->brd_no,
  1671. status);
  1672. phba->hba_state = LPFC_HBA_ERROR;
  1673. return -EIO;
  1674. }
  1675. /* Clear all interrupt enable conditions */
  1676. writel(0, phba->HCregaddr);
  1677. readl(phba->HCregaddr); /* flush */
  1678. /* setup host attn register */
  1679. writel(0xffffffff, phba->HAregaddr);
  1680. readl(phba->HAregaddr); /* flush */
  1681. return 0;
  1682. }
  1683. int
  1684. lpfc_sli_hba_setup(struct lpfc_hba * phba)
  1685. {
  1686. LPFC_MBOXQ_t *pmb;
  1687. uint32_t resetcount = 0, rc = 0, done = 0;
  1688. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1689. if (!pmb) {
  1690. phba->hba_state = LPFC_HBA_ERROR;
  1691. return -ENOMEM;
  1692. }
  1693. while (resetcount < 2 && !done) {
  1694. phba->hba_state = LPFC_STATE_UNKNOWN;
  1695. lpfc_sli_brdrestart(phba);
  1696. msleep(2500);
  1697. rc = lpfc_sli_chipset_init(phba);
  1698. if (rc)
  1699. break;
  1700. resetcount++;
  1701. /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
  1702. * means the call was successful. Any other nonzero value is a failure,
  1703. * but if ERESTART is returned, the driver may reset the HBA and try
  1704. * again.
  1705. */
  1706. rc = lpfc_config_port_prep(phba);
  1707. if (rc == -ERESTART) {
  1708. phba->hba_state = 0;
  1709. continue;
  1710. } else if (rc) {
  1711. break;
  1712. }
  1713. phba->hba_state = LPFC_INIT_MBX_CMDS;
  1714. lpfc_config_port(phba, pmb);
  1715. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  1716. if (rc == MBX_SUCCESS)
  1717. done = 1;
  1718. else {
  1719. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1720. "%d:0442 Adapter failed to init, mbxCmd x%x "
  1721. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  1722. phba->brd_no, pmb->mb.mbxCommand,
  1723. pmb->mb.mbxStatus, 0);
  1724. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1725. }
  1726. }
  1727. if (!done)
  1728. goto lpfc_sli_hba_setup_error;
  1729. rc = lpfc_sli_ring_map(phba, pmb);
  1730. if (rc)
  1731. goto lpfc_sli_hba_setup_error;
  1732. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  1733. rc = lpfc_config_port_post(phba);
  1734. if (rc)
  1735. goto lpfc_sli_hba_setup_error;
  1736. goto lpfc_sli_hba_setup_exit;
  1737. lpfc_sli_hba_setup_error:
  1738. phba->hba_state = LPFC_HBA_ERROR;
  1739. lpfc_sli_hba_setup_exit:
  1740. mempool_free(pmb, phba->mbox_mem_pool);
  1741. return rc;
  1742. }
  1743. static void
  1744. lpfc_mbox_abort(struct lpfc_hba * phba)
  1745. {
  1746. LPFC_MBOXQ_t *pmbox;
  1747. MAILBOX_t *mb;
  1748. if (phba->sli.mbox_active) {
  1749. del_timer_sync(&phba->sli.mbox_tmo);
  1750. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1751. pmbox = phba->sli.mbox_active;
  1752. mb = &pmbox->mb;
  1753. phba->sli.mbox_active = NULL;
  1754. if (pmbox->mbox_cmpl) {
  1755. mb->mbxStatus = MBX_NOT_FINISHED;
  1756. (pmbox->mbox_cmpl) (phba, pmbox);
  1757. }
  1758. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1759. }
  1760. /* Abort all the non active mailbox commands. */
  1761. spin_lock_irq(phba->host->host_lock);
  1762. pmbox = lpfc_mbox_get(phba);
  1763. while (pmbox) {
  1764. mb = &pmbox->mb;
  1765. if (pmbox->mbox_cmpl) {
  1766. mb->mbxStatus = MBX_NOT_FINISHED;
  1767. spin_unlock_irq(phba->host->host_lock);
  1768. (pmbox->mbox_cmpl) (phba, pmbox);
  1769. spin_lock_irq(phba->host->host_lock);
  1770. }
  1771. pmbox = lpfc_mbox_get(phba);
  1772. }
  1773. spin_unlock_irq(phba->host->host_lock);
  1774. return;
  1775. }
  1776. /*! lpfc_mbox_timeout
  1777. *
  1778. * \pre
  1779. * \post
  1780. * \param hba Pointer to per struct lpfc_hba structure
  1781. * \param l1 Pointer to the driver's mailbox queue.
  1782. * \return
  1783. * void
  1784. *
  1785. * \b Description:
  1786. *
  1787. * This routine handles mailbox timeout events at timer interrupt context.
  1788. */
  1789. void
  1790. lpfc_mbox_timeout(unsigned long ptr)
  1791. {
  1792. struct lpfc_hba *phba;
  1793. unsigned long iflag;
  1794. phba = (struct lpfc_hba *)ptr;
  1795. spin_lock_irqsave(phba->host->host_lock, iflag);
  1796. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1797. phba->work_hba_events |= WORKER_MBOX_TMO;
  1798. if (phba->work_wait)
  1799. wake_up(phba->work_wait);
  1800. }
  1801. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1802. }
  1803. void
  1804. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  1805. {
  1806. LPFC_MBOXQ_t *pmbox;
  1807. MAILBOX_t *mb;
  1808. spin_lock_irq(phba->host->host_lock);
  1809. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1810. spin_unlock_irq(phba->host->host_lock);
  1811. return;
  1812. }
  1813. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1814. pmbox = phba->sli.mbox_active;
  1815. mb = &pmbox->mb;
  1816. /* Mbox cmd <mbxCommand> timeout */
  1817. lpfc_printf_log(phba,
  1818. KERN_ERR,
  1819. LOG_MBOX | LOG_SLI,
  1820. "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  1821. phba->brd_no,
  1822. mb->mbxCommand,
  1823. phba->hba_state,
  1824. phba->sli.sli_flag,
  1825. phba->sli.mbox_active);
  1826. phba->sli.mbox_active = NULL;
  1827. if (pmbox->mbox_cmpl) {
  1828. mb->mbxStatus = MBX_NOT_FINISHED;
  1829. spin_unlock_irq(phba->host->host_lock);
  1830. (pmbox->mbox_cmpl) (phba, pmbox);
  1831. spin_lock_irq(phba->host->host_lock);
  1832. }
  1833. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1834. spin_unlock_irq(phba->host->host_lock);
  1835. lpfc_mbox_abort(phba);
  1836. return;
  1837. }
  1838. int
  1839. lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
  1840. {
  1841. MAILBOX_t *mb;
  1842. struct lpfc_sli *psli;
  1843. uint32_t status, evtctr;
  1844. uint32_t ha_copy;
  1845. int i;
  1846. unsigned long drvr_flag = 0;
  1847. volatile uint32_t word0, ldata;
  1848. void __iomem *to_slim;
  1849. psli = &phba->sli;
  1850. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1851. mb = &pmbox->mb;
  1852. status = MBX_SUCCESS;
  1853. if (phba->hba_state == LPFC_HBA_ERROR) {
  1854. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1855. /* Mbox command <mbxCommand> cannot issue */
  1856. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1857. return (MBX_NOT_FINISHED);
  1858. }
  1859. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  1860. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  1861. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1862. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1863. return (MBX_NOT_FINISHED);
  1864. }
  1865. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  1866. /* Polling for a mbox command when another one is already active
  1867. * is not allowed in SLI. Also, the driver must have established
  1868. * SLI2 mode to queue and process multiple mbox commands.
  1869. */
  1870. if (flag & MBX_POLL) {
  1871. spin_unlock_irqrestore(phba->host->host_lock,
  1872. drvr_flag);
  1873. /* Mbox command <mbxCommand> cannot issue */
  1874. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1875. return (MBX_NOT_FINISHED);
  1876. }
  1877. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1878. spin_unlock_irqrestore(phba->host->host_lock,
  1879. drvr_flag);
  1880. /* Mbox command <mbxCommand> cannot issue */
  1881. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1882. return (MBX_NOT_FINISHED);
  1883. }
  1884. /* Handle STOP IOCB processing flag. This is only meaningful
  1885. * if we are not polling for mbox completion.
  1886. */
  1887. if (flag & MBX_STOP_IOCB) {
  1888. flag &= ~MBX_STOP_IOCB;
  1889. /* Now flag each ring */
  1890. for (i = 0; i < psli->num_rings; i++) {
  1891. /* If the ring is active, flag it */
  1892. if (psli->ring[i].cmdringaddr) {
  1893. psli->ring[i].flag |=
  1894. LPFC_STOP_IOCB_MBX;
  1895. }
  1896. }
  1897. }
  1898. /* Another mailbox command is still being processed, queue this
  1899. * command to be processed later.
  1900. */
  1901. lpfc_mbox_put(phba, pmbox);
  1902. /* Mbox cmd issue - BUSY */
  1903. lpfc_printf_log(phba,
  1904. KERN_INFO,
  1905. LOG_MBOX | LOG_SLI,
  1906. "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
  1907. phba->brd_no,
  1908. mb->mbxCommand,
  1909. phba->hba_state,
  1910. psli->sli_flag,
  1911. flag);
  1912. psli->slistat.mbox_busy++;
  1913. spin_unlock_irqrestore(phba->host->host_lock,
  1914. drvr_flag);
  1915. return (MBX_BUSY);
  1916. }
  1917. /* Handle STOP IOCB processing flag. This is only meaningful
  1918. * if we are not polling for mbox completion.
  1919. */
  1920. if (flag & MBX_STOP_IOCB) {
  1921. flag &= ~MBX_STOP_IOCB;
  1922. if (flag == MBX_NOWAIT) {
  1923. /* Now flag each ring */
  1924. for (i = 0; i < psli->num_rings; i++) {
  1925. /* If the ring is active, flag it */
  1926. if (psli->ring[i].cmdringaddr) {
  1927. psli->ring[i].flag |=
  1928. LPFC_STOP_IOCB_MBX;
  1929. }
  1930. }
  1931. }
  1932. }
  1933. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1934. /* If we are not polling, we MUST be in SLI2 mode */
  1935. if (flag != MBX_POLL) {
  1936. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  1937. (mb->mbxCommand != MBX_KILL_BOARD)) {
  1938. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1939. spin_unlock_irqrestore(phba->host->host_lock,
  1940. drvr_flag);
  1941. /* Mbox command <mbxCommand> cannot issue */
  1942. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
  1943. return (MBX_NOT_FINISHED);
  1944. }
  1945. /* timeout active mbox command */
  1946. mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO);
  1947. }
  1948. /* Mailbox cmd <cmd> issue */
  1949. lpfc_printf_log(phba,
  1950. KERN_INFO,
  1951. LOG_MBOX | LOG_SLI,
  1952. "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
  1953. phba->brd_no,
  1954. mb->mbxCommand,
  1955. phba->hba_state,
  1956. psli->sli_flag,
  1957. flag);
  1958. psli->slistat.mbox_cmd++;
  1959. evtctr = psli->slistat.mbox_event;
  1960. /* next set own bit for the adapter and copy over command word */
  1961. mb->mbxOwner = OWN_CHIP;
  1962. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1963. /* First copy command data to host SLIM area */
  1964. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  1965. } else {
  1966. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1967. /* copy command data into host mbox for cmpl */
  1968. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  1969. MAILBOX_CMD_SIZE);
  1970. }
  1971. /* First copy mbox command data to HBA SLIM, skip past first
  1972. word */
  1973. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1974. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  1975. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  1976. /* Next copy over first word, with mbxOwner set */
  1977. ldata = *((volatile uint32_t *)mb);
  1978. to_slim = phba->MBslimaddr;
  1979. writel(ldata, to_slim);
  1980. readl(to_slim); /* flush */
  1981. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1982. /* switch over to host mailbox */
  1983. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  1984. }
  1985. }
  1986. wmb();
  1987. /* interrupt board to doit right away */
  1988. writel(CA_MBATT, phba->CAregaddr);
  1989. readl(phba->CAregaddr); /* flush */
  1990. switch (flag) {
  1991. case MBX_NOWAIT:
  1992. /* Don't wait for it to finish, just return */
  1993. psli->mbox_active = pmbox;
  1994. break;
  1995. case MBX_POLL:
  1996. i = 0;
  1997. psli->mbox_active = NULL;
  1998. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1999. /* First read mbox status word */
  2000. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  2001. word0 = le32_to_cpu(word0);
  2002. } else {
  2003. /* First read mbox status word */
  2004. word0 = readl(phba->MBslimaddr);
  2005. }
  2006. /* Read the HBA Host Attention Register */
  2007. ha_copy = readl(phba->HAregaddr);
  2008. /* Wait for command to complete */
  2009. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  2010. (!(ha_copy & HA_MBATT) &&
  2011. (phba->hba_state > LPFC_WARM_START))) {
  2012. if (i++ >= 100) {
  2013. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2014. spin_unlock_irqrestore(phba->host->host_lock,
  2015. drvr_flag);
  2016. return (MBX_NOT_FINISHED);
  2017. }
  2018. /* Check if we took a mbox interrupt while we were
  2019. polling */
  2020. if (((word0 & OWN_CHIP) != OWN_CHIP)
  2021. && (evtctr != psli->slistat.mbox_event))
  2022. break;
  2023. spin_unlock_irqrestore(phba->host->host_lock,
  2024. drvr_flag);
  2025. /* Can be in interrupt context, do not sleep */
  2026. /* (or might be called with interrupts disabled) */
  2027. mdelay(i);
  2028. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  2029. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2030. /* First copy command data */
  2031. word0 = *((volatile uint32_t *)
  2032. &phba->slim2p->mbx);
  2033. word0 = le32_to_cpu(word0);
  2034. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2035. MAILBOX_t *slimmb;
  2036. volatile uint32_t slimword0;
  2037. /* Check real SLIM for any errors */
  2038. slimword0 = readl(phba->MBslimaddr);
  2039. slimmb = (MAILBOX_t *) & slimword0;
  2040. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2041. && slimmb->mbxStatus) {
  2042. psli->sli_flag &=
  2043. ~LPFC_SLI2_ACTIVE;
  2044. word0 = slimword0;
  2045. }
  2046. }
  2047. } else {
  2048. /* First copy command data */
  2049. word0 = readl(phba->MBslimaddr);
  2050. }
  2051. /* Read the HBA Host Attention Register */
  2052. ha_copy = readl(phba->HAregaddr);
  2053. }
  2054. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2055. /* copy results back to user */
  2056. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2057. MAILBOX_CMD_SIZE);
  2058. } else {
  2059. /* First copy command data */
  2060. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2061. MAILBOX_CMD_SIZE);
  2062. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2063. pmbox->context2) {
  2064. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2065. phba->MBslimaddr + DMP_RSP_OFFSET,
  2066. mb->un.varDmp.word_cnt);
  2067. }
  2068. }
  2069. writel(HA_MBATT, phba->HAregaddr);
  2070. readl(phba->HAregaddr); /* flush */
  2071. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2072. status = mb->mbxStatus;
  2073. }
  2074. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  2075. return (status);
  2076. }
  2077. static int
  2078. lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2079. struct lpfc_iocbq * piocb)
  2080. {
  2081. /* Insert the caller's iocb in the txq tail for later processing. */
  2082. list_add_tail(&piocb->list, &pring->txq);
  2083. pring->txq_cnt++;
  2084. return (0);
  2085. }
  2086. static struct lpfc_iocbq *
  2087. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2088. struct lpfc_iocbq ** piocb)
  2089. {
  2090. struct lpfc_iocbq * nextiocb;
  2091. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2092. if (!nextiocb) {
  2093. nextiocb = *piocb;
  2094. *piocb = NULL;
  2095. }
  2096. return nextiocb;
  2097. }
  2098. int
  2099. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2100. struct lpfc_iocbq *piocb, uint32_t flag)
  2101. {
  2102. struct lpfc_iocbq *nextiocb;
  2103. IOCB_t *iocb;
  2104. /*
  2105. * We should never get an IOCB if we are in a < LINK_DOWN state
  2106. */
  2107. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2108. return IOCB_ERROR;
  2109. /*
  2110. * Check to see if we are blocking IOCB processing because of a
  2111. * outstanding mbox command.
  2112. */
  2113. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  2114. goto iocb_busy;
  2115. if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
  2116. /*
  2117. * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
  2118. * can be issued if the link is not up.
  2119. */
  2120. switch (piocb->iocb.ulpCommand) {
  2121. case CMD_QUE_RING_BUF_CN:
  2122. case CMD_QUE_RING_BUF64_CN:
  2123. /*
  2124. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2125. * completion, iocb_cmpl MUST be 0.
  2126. */
  2127. if (piocb->iocb_cmpl)
  2128. piocb->iocb_cmpl = NULL;
  2129. /*FALLTHROUGH*/
  2130. case CMD_CREATE_XRI_CR:
  2131. break;
  2132. default:
  2133. goto iocb_busy;
  2134. }
  2135. /*
  2136. * For FCP commands, we must be in a state where we can process link
  2137. * attention events.
  2138. */
  2139. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2140. !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
  2141. goto iocb_busy;
  2142. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2143. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2144. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2145. if (iocb)
  2146. lpfc_sli_update_ring(phba, pring);
  2147. else
  2148. lpfc_sli_update_full_ring(phba, pring);
  2149. if (!piocb)
  2150. return IOCB_SUCCESS;
  2151. goto out_busy;
  2152. iocb_busy:
  2153. pring->stats.iocb_cmd_delay++;
  2154. out_busy:
  2155. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2156. lpfc_sli_ringtx_put(phba, pring, piocb);
  2157. return IOCB_SUCCESS;
  2158. }
  2159. return IOCB_BUSY;
  2160. }
  2161. static int
  2162. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2163. {
  2164. struct lpfc_sli *psli;
  2165. struct lpfc_sli_ring *pring;
  2166. psli = &phba->sli;
  2167. /* Adjust cmd/rsp ring iocb entries more evenly */
  2168. pring = &psli->ring[psli->fcp_ring];
  2169. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2170. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2171. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2172. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2173. pring = &psli->ring[1];
  2174. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2175. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2176. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2177. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2178. /* Setup default profile for this ring */
  2179. pring->iotag_max = 4096;
  2180. pring->num_mask = 1;
  2181. pring->prt[0].profile = 0; /* Mask 0 */
  2182. pring->prt[0].rctl = FC_UNSOL_DATA;
  2183. pring->prt[0].type = 5;
  2184. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2185. return 0;
  2186. }
  2187. int
  2188. lpfc_sli_setup(struct lpfc_hba *phba)
  2189. {
  2190. int i, totiocb = 0;
  2191. struct lpfc_sli *psli = &phba->sli;
  2192. struct lpfc_sli_ring *pring;
  2193. psli->num_rings = MAX_CONFIGURED_RINGS;
  2194. psli->sli_flag = 0;
  2195. psli->fcp_ring = LPFC_FCP_RING;
  2196. psli->next_ring = LPFC_FCP_NEXT_RING;
  2197. psli->ip_ring = LPFC_IP_RING;
  2198. psli->iocbq_lookup = NULL;
  2199. psli->iocbq_lookup_len = 0;
  2200. psli->last_iotag = 0;
  2201. for (i = 0; i < psli->num_rings; i++) {
  2202. pring = &psli->ring[i];
  2203. switch (i) {
  2204. case LPFC_FCP_RING: /* ring 0 - FCP */
  2205. /* numCiocb and numRiocb are used in config_port */
  2206. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2207. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2208. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2209. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2210. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2211. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2212. pring->iotag_ctr = 0;
  2213. pring->iotag_max =
  2214. (phba->cfg_hba_queue_depth * 2);
  2215. pring->fast_iotag = pring->iotag_max;
  2216. pring->num_mask = 0;
  2217. break;
  2218. case LPFC_IP_RING: /* ring 1 - IP */
  2219. /* numCiocb and numRiocb are used in config_port */
  2220. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2221. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2222. pring->num_mask = 0;
  2223. break;
  2224. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2225. /* numCiocb and numRiocb are used in config_port */
  2226. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2227. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2228. pring->fast_iotag = 0;
  2229. pring->iotag_ctr = 0;
  2230. pring->iotag_max = 4096;
  2231. pring->num_mask = 4;
  2232. pring->prt[0].profile = 0; /* Mask 0 */
  2233. pring->prt[0].rctl = FC_ELS_REQ;
  2234. pring->prt[0].type = FC_ELS_DATA;
  2235. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2236. lpfc_els_unsol_event;
  2237. pring->prt[1].profile = 0; /* Mask 1 */
  2238. pring->prt[1].rctl = FC_ELS_RSP;
  2239. pring->prt[1].type = FC_ELS_DATA;
  2240. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2241. lpfc_els_unsol_event;
  2242. pring->prt[2].profile = 0; /* Mask 2 */
  2243. /* NameServer Inquiry */
  2244. pring->prt[2].rctl = FC_UNSOL_CTL;
  2245. /* NameServer */
  2246. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2247. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2248. lpfc_ct_unsol_event;
  2249. pring->prt[3].profile = 0; /* Mask 3 */
  2250. /* NameServer response */
  2251. pring->prt[3].rctl = FC_SOL_CTL;
  2252. /* NameServer */
  2253. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2254. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2255. lpfc_ct_unsol_event;
  2256. break;
  2257. }
  2258. totiocb += (pring->numCiocb + pring->numRiocb);
  2259. }
  2260. if (totiocb > MAX_SLI2_IOCB) {
  2261. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2262. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2263. "%d:0462 Too many cmd / rsp ring entries in "
  2264. "SLI2 SLIM Data: x%x x%x\n",
  2265. phba->brd_no, totiocb, MAX_SLI2_IOCB);
  2266. }
  2267. if (phba->cfg_multi_ring_support == 2)
  2268. lpfc_extra_ring_setup(phba);
  2269. return 0;
  2270. }
  2271. int
  2272. lpfc_sli_queue_setup(struct lpfc_hba * phba)
  2273. {
  2274. struct lpfc_sli *psli;
  2275. struct lpfc_sli_ring *pring;
  2276. int i;
  2277. psli = &phba->sli;
  2278. spin_lock_irq(phba->host->host_lock);
  2279. INIT_LIST_HEAD(&psli->mboxq);
  2280. /* Initialize list headers for txq and txcmplq as double linked lists */
  2281. for (i = 0; i < psli->num_rings; i++) {
  2282. pring = &psli->ring[i];
  2283. pring->ringno = i;
  2284. pring->next_cmdidx = 0;
  2285. pring->local_getidx = 0;
  2286. pring->cmdidx = 0;
  2287. INIT_LIST_HEAD(&pring->txq);
  2288. INIT_LIST_HEAD(&pring->txcmplq);
  2289. INIT_LIST_HEAD(&pring->iocb_continueq);
  2290. INIT_LIST_HEAD(&pring->postbufq);
  2291. }
  2292. spin_unlock_irq(phba->host->host_lock);
  2293. return (1);
  2294. }
  2295. int
  2296. lpfc_sli_hba_down(struct lpfc_hba * phba)
  2297. {
  2298. struct lpfc_sli *psli;
  2299. struct lpfc_sli_ring *pring;
  2300. LPFC_MBOXQ_t *pmb;
  2301. struct lpfc_iocbq *iocb, *next_iocb;
  2302. IOCB_t *icmd = NULL;
  2303. int i;
  2304. unsigned long flags = 0;
  2305. psli = &phba->sli;
  2306. lpfc_hba_down_prep(phba);
  2307. spin_lock_irqsave(phba->host->host_lock, flags);
  2308. for (i = 0; i < psli->num_rings; i++) {
  2309. pring = &psli->ring[i];
  2310. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2311. /*
  2312. * Error everything on the txq since these iocbs have not been
  2313. * given to the FW yet.
  2314. */
  2315. pring->txq_cnt = 0;
  2316. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2317. list_del_init(&iocb->list);
  2318. if (iocb->iocb_cmpl) {
  2319. icmd = &iocb->iocb;
  2320. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2321. icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2322. spin_unlock_irqrestore(phba->host->host_lock,
  2323. flags);
  2324. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2325. spin_lock_irqsave(phba->host->host_lock, flags);
  2326. } else
  2327. lpfc_sli_release_iocbq(phba, iocb);
  2328. }
  2329. INIT_LIST_HEAD(&(pring->txq));
  2330. kfree(pring->fast_lookup);
  2331. pring->fast_lookup = NULL;
  2332. }
  2333. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2334. /* Return any active mbox cmds */
  2335. del_timer_sync(&psli->mbox_tmo);
  2336. spin_lock_irqsave(phba->host->host_lock, flags);
  2337. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  2338. if (psli->mbox_active) {
  2339. pmb = psli->mbox_active;
  2340. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2341. if (pmb->mbox_cmpl) {
  2342. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2343. pmb->mbox_cmpl(phba,pmb);
  2344. spin_lock_irqsave(phba->host->host_lock, flags);
  2345. }
  2346. }
  2347. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2348. psli->mbox_active = NULL;
  2349. /* Return any pending mbox cmds */
  2350. while ((pmb = lpfc_mbox_get(phba)) != NULL) {
  2351. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2352. if (pmb->mbox_cmpl) {
  2353. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2354. pmb->mbox_cmpl(phba,pmb);
  2355. spin_lock_irqsave(phba->host->host_lock, flags);
  2356. }
  2357. }
  2358. INIT_LIST_HEAD(&psli->mboxq);
  2359. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2360. return 1;
  2361. }
  2362. void
  2363. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2364. {
  2365. uint32_t *src = srcp;
  2366. uint32_t *dest = destp;
  2367. uint32_t ldata;
  2368. int i;
  2369. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2370. ldata = *src;
  2371. ldata = le32_to_cpu(ldata);
  2372. *dest = ldata;
  2373. src++;
  2374. dest++;
  2375. }
  2376. }
  2377. int
  2378. lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2379. struct lpfc_dmabuf * mp)
  2380. {
  2381. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2382. later */
  2383. list_add_tail(&mp->list, &pring->postbufq);
  2384. pring->postbufq_cnt++;
  2385. return 0;
  2386. }
  2387. struct lpfc_dmabuf *
  2388. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2389. dma_addr_t phys)
  2390. {
  2391. struct lpfc_dmabuf *mp, *next_mp;
  2392. struct list_head *slp = &pring->postbufq;
  2393. /* Search postbufq, from the begining, looking for a match on phys */
  2394. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2395. if (mp->phys == phys) {
  2396. list_del_init(&mp->list);
  2397. pring->postbufq_cnt--;
  2398. return mp;
  2399. }
  2400. }
  2401. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2402. "%d:0410 Cannot find virtual addr for mapped buf on "
  2403. "ring %d Data x%llx x%p x%p x%x\n",
  2404. phba->brd_no, pring->ringno, (unsigned long long)phys,
  2405. slp->next, slp->prev, pring->postbufq_cnt);
  2406. return NULL;
  2407. }
  2408. static void
  2409. lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2410. struct lpfc_iocbq * rspiocb)
  2411. {
  2412. struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
  2413. /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
  2414. * just aborted.
  2415. * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
  2416. */
  2417. if (cmdiocb->context2) {
  2418. buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
  2419. /* Free the response IOCB before completing the abort
  2420. command. */
  2421. buf_ptr = NULL;
  2422. list_remove_head((&buf_ptr1->list), buf_ptr,
  2423. struct lpfc_dmabuf, list);
  2424. if (buf_ptr) {
  2425. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2426. kfree(buf_ptr);
  2427. }
  2428. lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
  2429. kfree(buf_ptr1);
  2430. }
  2431. if (cmdiocb->context3) {
  2432. buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
  2433. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2434. kfree(buf_ptr);
  2435. }
  2436. lpfc_sli_release_iocbq(phba, cmdiocb);
  2437. return;
  2438. }
  2439. int
  2440. lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
  2441. struct lpfc_sli_ring * pring,
  2442. struct lpfc_iocbq * cmdiocb)
  2443. {
  2444. struct lpfc_iocbq *abtsiocbp;
  2445. IOCB_t *icmd = NULL;
  2446. IOCB_t *iabt = NULL;
  2447. /* issue ABTS for this IOCB based on iotag */
  2448. abtsiocbp = lpfc_sli_get_iocbq(phba);
  2449. if (abtsiocbp == NULL)
  2450. return 0;
  2451. iabt = &abtsiocbp->iocb;
  2452. icmd = &cmdiocb->iocb;
  2453. switch (icmd->ulpCommand) {
  2454. case CMD_ELS_REQUEST64_CR:
  2455. /* Even though we abort the ELS command, the firmware may access
  2456. * the BPL or other resources before it processes our
  2457. * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
  2458. * resources till the actual abort request completes.
  2459. */
  2460. abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
  2461. abtsiocbp->context2 = cmdiocb->context2;
  2462. abtsiocbp->context3 = cmdiocb->context3;
  2463. cmdiocb->context2 = NULL;
  2464. cmdiocb->context3 = NULL;
  2465. abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
  2466. break;
  2467. default:
  2468. lpfc_sli_release_iocbq(phba, abtsiocbp);
  2469. return 0;
  2470. }
  2471. iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
  2472. iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
  2473. iabt->ulpLe = 1;
  2474. iabt->ulpClass = CLASS3;
  2475. iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
  2476. if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
  2477. lpfc_sli_release_iocbq(phba, abtsiocbp);
  2478. return 0;
  2479. }
  2480. return 1;
  2481. }
  2482. static int
  2483. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id,
  2484. uint64_t lun_id, uint32_t ctx,
  2485. lpfc_ctx_cmd ctx_cmd)
  2486. {
  2487. struct lpfc_scsi_buf *lpfc_cmd;
  2488. struct scsi_cmnd *cmnd;
  2489. int rc = 1;
  2490. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  2491. return rc;
  2492. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  2493. cmnd = lpfc_cmd->pCmd;
  2494. if (cmnd == NULL)
  2495. return rc;
  2496. switch (ctx_cmd) {
  2497. case LPFC_CTX_LUN:
  2498. if ((cmnd->device->id == tgt_id) &&
  2499. (cmnd->device->lun == lun_id))
  2500. rc = 0;
  2501. break;
  2502. case LPFC_CTX_TGT:
  2503. if (cmnd->device->id == tgt_id)
  2504. rc = 0;
  2505. break;
  2506. case LPFC_CTX_CTX:
  2507. if (iocbq->iocb.ulpContext == ctx)
  2508. rc = 0;
  2509. break;
  2510. case LPFC_CTX_HOST:
  2511. rc = 0;
  2512. break;
  2513. default:
  2514. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  2515. __FUNCTION__, ctx_cmd);
  2516. break;
  2517. }
  2518. return rc;
  2519. }
  2520. int
  2521. lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2522. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
  2523. {
  2524. struct lpfc_iocbq *iocbq;
  2525. int sum, i;
  2526. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  2527. iocbq = phba->sli.iocbq_lookup[i];
  2528. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  2529. 0, ctx_cmd) == 0)
  2530. sum++;
  2531. }
  2532. return sum;
  2533. }
  2534. void
  2535. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2536. struct lpfc_iocbq * rspiocb)
  2537. {
  2538. spin_lock_irq(phba->host->host_lock);
  2539. lpfc_sli_release_iocbq(phba, cmdiocb);
  2540. spin_unlock_irq(phba->host->host_lock);
  2541. return;
  2542. }
  2543. int
  2544. lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2545. uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
  2546. lpfc_ctx_cmd abort_cmd)
  2547. {
  2548. struct lpfc_iocbq *iocbq;
  2549. struct lpfc_iocbq *abtsiocb;
  2550. IOCB_t *cmd = NULL;
  2551. int errcnt = 0, ret_val = 0;
  2552. int i;
  2553. for (i = 1; i <= phba->sli.last_iotag; i++) {
  2554. iocbq = phba->sli.iocbq_lookup[i];
  2555. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  2556. 0, abort_cmd) != 0)
  2557. continue;
  2558. /* issue ABTS for this IOCB based on iotag */
  2559. abtsiocb = lpfc_sli_get_iocbq(phba);
  2560. if (abtsiocb == NULL) {
  2561. errcnt++;
  2562. continue;
  2563. }
  2564. cmd = &iocbq->iocb;
  2565. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  2566. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  2567. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  2568. abtsiocb->iocb.ulpLe = 1;
  2569. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  2570. if (phba->hba_state >= LPFC_LINK_UP)
  2571. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  2572. else
  2573. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  2574. /* Setup callback routine and issue the command. */
  2575. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  2576. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  2577. if (ret_val == IOCB_ERROR) {
  2578. lpfc_sli_release_iocbq(phba, abtsiocb);
  2579. errcnt++;
  2580. continue;
  2581. }
  2582. }
  2583. return errcnt;
  2584. }
  2585. static void
  2586. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  2587. struct lpfc_iocbq *cmdiocbq,
  2588. struct lpfc_iocbq *rspiocbq)
  2589. {
  2590. wait_queue_head_t *pdone_q;
  2591. unsigned long iflags;
  2592. spin_lock_irqsave(phba->host->host_lock, iflags);
  2593. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  2594. if (cmdiocbq->context2 && rspiocbq)
  2595. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  2596. &rspiocbq->iocb, sizeof(IOCB_t));
  2597. pdone_q = cmdiocbq->context_un.wait_queue;
  2598. spin_unlock_irqrestore(phba->host->host_lock, iflags);
  2599. if (pdone_q)
  2600. wake_up(pdone_q);
  2601. return;
  2602. }
  2603. /*
  2604. * Issue the caller's iocb and wait for its completion, but no longer than the
  2605. * caller's timeout. Note that iocb_flags is cleared before the
  2606. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  2607. * definition this is a wait function.
  2608. */
  2609. int
  2610. lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
  2611. struct lpfc_sli_ring * pring,
  2612. struct lpfc_iocbq * piocb,
  2613. struct lpfc_iocbq * prspiocbq,
  2614. uint32_t timeout)
  2615. {
  2616. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2617. long timeleft, timeout_req = 0;
  2618. int retval = IOCB_SUCCESS;
  2619. uint32_t creg_val;
  2620. /*
  2621. * If the caller has provided a response iocbq buffer, then context2
  2622. * is NULL or its an error.
  2623. */
  2624. if (prspiocbq) {
  2625. if (piocb->context2)
  2626. return IOCB_ERROR;
  2627. piocb->context2 = prspiocbq;
  2628. }
  2629. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  2630. piocb->context_un.wait_queue = &done_q;
  2631. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  2632. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  2633. creg_val = readl(phba->HCregaddr);
  2634. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  2635. writel(creg_val, phba->HCregaddr);
  2636. readl(phba->HCregaddr); /* flush */
  2637. }
  2638. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  2639. if (retval == IOCB_SUCCESS) {
  2640. timeout_req = timeout * HZ;
  2641. spin_unlock_irq(phba->host->host_lock);
  2642. timeleft = wait_event_timeout(done_q,
  2643. piocb->iocb_flag & LPFC_IO_WAKE,
  2644. timeout_req);
  2645. spin_lock_irq(phba->host->host_lock);
  2646. if (timeleft == 0) {
  2647. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2648. "%d:0329 IOCB wait timeout error - no "
  2649. "wake response Data x%x\n",
  2650. phba->brd_no, timeout);
  2651. retval = IOCB_TIMEDOUT;
  2652. } else if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
  2653. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2654. "%d:0330 IOCB wake NOT set, "
  2655. "Data x%x x%lx\n", phba->brd_no,
  2656. timeout, (timeleft / jiffies));
  2657. retval = IOCB_TIMEDOUT;
  2658. } else {
  2659. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2660. "%d:0331 IOCB wake signaled\n",
  2661. phba->brd_no);
  2662. }
  2663. } else {
  2664. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2665. "%d:0332 IOCB wait issue failed, Data x%x\n",
  2666. phba->brd_no, retval);
  2667. retval = IOCB_ERROR;
  2668. }
  2669. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  2670. creg_val = readl(phba->HCregaddr);
  2671. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  2672. writel(creg_val, phba->HCregaddr);
  2673. readl(phba->HCregaddr); /* flush */
  2674. }
  2675. if (prspiocbq)
  2676. piocb->context2 = NULL;
  2677. piocb->context_un.wait_queue = NULL;
  2678. piocb->iocb_cmpl = NULL;
  2679. return retval;
  2680. }
  2681. int
  2682. lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
  2683. uint32_t timeout)
  2684. {
  2685. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2686. DECLARE_WAITQUEUE(wq_entry, current);
  2687. uint32_t timeleft = 0;
  2688. int retval;
  2689. /* The caller must leave context1 empty. */
  2690. if (pmboxq->context1 != 0) {
  2691. return (MBX_NOT_FINISHED);
  2692. }
  2693. /* setup wake call as IOCB callback */
  2694. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  2695. /* setup context field to pass wait_queue pointer to wake function */
  2696. pmboxq->context1 = &done_q;
  2697. /* start to sleep before we wait, to avoid races */
  2698. set_current_state(TASK_INTERRUPTIBLE);
  2699. add_wait_queue(&done_q, &wq_entry);
  2700. /* now issue the command */
  2701. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  2702. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  2703. timeleft = schedule_timeout(timeout * HZ);
  2704. pmboxq->context1 = NULL;
  2705. /* if schedule_timeout returns 0, we timed out and were not
  2706. woken up */
  2707. if ((timeleft == 0) || signal_pending(current))
  2708. retval = MBX_TIMEOUT;
  2709. else
  2710. retval = MBX_SUCCESS;
  2711. }
  2712. set_current_state(TASK_RUNNING);
  2713. remove_wait_queue(&done_q, &wq_entry);
  2714. return retval;
  2715. }
  2716. irqreturn_t
  2717. lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
  2718. {
  2719. struct lpfc_hba *phba;
  2720. uint32_t ha_copy;
  2721. uint32_t work_ha_copy;
  2722. unsigned long status;
  2723. int i;
  2724. uint32_t control;
  2725. /*
  2726. * Get the driver's phba structure from the dev_id and
  2727. * assume the HBA is not interrupting.
  2728. */
  2729. phba = (struct lpfc_hba *) dev_id;
  2730. if (unlikely(!phba))
  2731. return IRQ_NONE;
  2732. phba->sli.slistat.sli_intr++;
  2733. /*
  2734. * Call the HBA to see if it is interrupting. If not, don't claim
  2735. * the interrupt
  2736. */
  2737. /* Ignore all interrupts during initialization. */
  2738. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2739. return IRQ_NONE;
  2740. /*
  2741. * Read host attention register to determine interrupt source
  2742. * Clear Attention Sources, except Error Attention (to
  2743. * preserve status) and Link Attention
  2744. */
  2745. spin_lock(phba->host->host_lock);
  2746. ha_copy = readl(phba->HAregaddr);
  2747. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  2748. readl(phba->HAregaddr); /* flush */
  2749. spin_unlock(phba->host->host_lock);
  2750. if (unlikely(!ha_copy))
  2751. return IRQ_NONE;
  2752. work_ha_copy = ha_copy & phba->work_ha_mask;
  2753. if (unlikely(work_ha_copy)) {
  2754. if (work_ha_copy & HA_LATT) {
  2755. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  2756. /*
  2757. * Turn off Link Attention interrupts
  2758. * until CLEAR_LA done
  2759. */
  2760. spin_lock(phba->host->host_lock);
  2761. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  2762. control = readl(phba->HCregaddr);
  2763. control &= ~HC_LAINT_ENA;
  2764. writel(control, phba->HCregaddr);
  2765. readl(phba->HCregaddr); /* flush */
  2766. spin_unlock(phba->host->host_lock);
  2767. }
  2768. else
  2769. work_ha_copy &= ~HA_LATT;
  2770. }
  2771. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  2772. for (i = 0; i < phba->sli.num_rings; i++) {
  2773. if (work_ha_copy & (HA_RXATT << (4*i))) {
  2774. /*
  2775. * Turn off Slow Rings interrupts
  2776. */
  2777. spin_lock(phba->host->host_lock);
  2778. control = readl(phba->HCregaddr);
  2779. control &= ~(HC_R0INT_ENA << i);
  2780. writel(control, phba->HCregaddr);
  2781. readl(phba->HCregaddr); /* flush */
  2782. spin_unlock(phba->host->host_lock);
  2783. }
  2784. }
  2785. }
  2786. if (work_ha_copy & HA_ERATT) {
  2787. phba->hba_state = LPFC_HBA_ERROR;
  2788. /*
  2789. * There was a link/board error. Read the
  2790. * status register to retrieve the error event
  2791. * and process it.
  2792. */
  2793. phba->sli.slistat.err_attn_event++;
  2794. /* Save status info */
  2795. phba->work_hs = readl(phba->HSregaddr);
  2796. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  2797. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  2798. /* Clear Chip error bit */
  2799. writel(HA_ERATT, phba->HAregaddr);
  2800. readl(phba->HAregaddr); /* flush */
  2801. phba->stopped = 1;
  2802. }
  2803. spin_lock(phba->host->host_lock);
  2804. phba->work_ha |= work_ha_copy;
  2805. if (phba->work_wait)
  2806. wake_up(phba->work_wait);
  2807. spin_unlock(phba->host->host_lock);
  2808. }
  2809. ha_copy &= ~(phba->work_ha_mask);
  2810. /*
  2811. * Process all events on FCP ring. Take the optimized path for
  2812. * FCP IO. Any other IO is slow path and is handled by
  2813. * the worker thread.
  2814. */
  2815. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  2816. status >>= (4*LPFC_FCP_RING);
  2817. if (status & HA_RXATT)
  2818. lpfc_sli_handle_fast_ring_event(phba,
  2819. &phba->sli.ring[LPFC_FCP_RING],
  2820. status);
  2821. return IRQ_HANDLED;
  2822. } /* lpfc_intr_handler */