esp.c 121 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405
  1. /* $Id: esp.c,v 1.101 2002/01/15 06:48:55 davem Exp $
  2. * esp.c: EnhancedScsiProcessor Sun SCSI driver code.
  3. *
  4. * Copyright (C) 1995, 1998 David S. Miller (davem@caip.rutgers.edu)
  5. */
  6. /* TODO:
  7. *
  8. * 1) Maybe disable parity checking in config register one for SCSI1
  9. * targets. (Gilmore says parity error on the SBus can lock up
  10. * old sun4c's)
  11. * 2) Add support for DMA2 pipelining.
  12. * 3) Add tagged queueing.
  13. */
  14. #include <linux/config.h>
  15. #include <linux/kernel.h>
  16. #include <linux/delay.h>
  17. #include <linux/types.h>
  18. #include <linux/string.h>
  19. #include <linux/slab.h>
  20. #include <linux/blkdev.h>
  21. #include <linux/proc_fs.h>
  22. #include <linux/stat.h>
  23. #include <linux/init.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/module.h>
  27. #include "esp.h"
  28. #include <asm/sbus.h>
  29. #include <asm/dma.h>
  30. #include <asm/system.h>
  31. #include <asm/ptrace.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/oplib.h>
  34. #include <asm/io.h>
  35. #include <asm/irq.h>
  36. #ifndef __sparc_v9__
  37. #include <asm/machines.h>
  38. #include <asm/idprom.h>
  39. #endif
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_eh.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #define DRV_VERSION "1.101"
  47. #define DEBUG_ESP
  48. /* #define DEBUG_ESP_HME */
  49. /* #define DEBUG_ESP_DATA */
  50. /* #define DEBUG_ESP_QUEUE */
  51. /* #define DEBUG_ESP_DISCONNECT */
  52. /* #define DEBUG_ESP_STATUS */
  53. /* #define DEBUG_ESP_PHASES */
  54. /* #define DEBUG_ESP_WORKBUS */
  55. /* #define DEBUG_STATE_MACHINE */
  56. /* #define DEBUG_ESP_CMDS */
  57. /* #define DEBUG_ESP_IRQS */
  58. /* #define DEBUG_SDTR */
  59. /* #define DEBUG_ESP_SG */
  60. /* Use the following to sprinkle debugging messages in a way which
  61. * suits you if combinations of the above become too verbose when
  62. * trying to track down a specific problem.
  63. */
  64. /* #define DEBUG_ESP_MISC */
  65. #if defined(DEBUG_ESP)
  66. #define ESPLOG(foo) printk foo
  67. #else
  68. #define ESPLOG(foo)
  69. #endif /* (DEBUG_ESP) */
  70. #if defined(DEBUG_ESP_HME)
  71. #define ESPHME(foo) printk foo
  72. #else
  73. #define ESPHME(foo)
  74. #endif
  75. #if defined(DEBUG_ESP_DATA)
  76. #define ESPDATA(foo) printk foo
  77. #else
  78. #define ESPDATA(foo)
  79. #endif
  80. #if defined(DEBUG_ESP_QUEUE)
  81. #define ESPQUEUE(foo) printk foo
  82. #else
  83. #define ESPQUEUE(foo)
  84. #endif
  85. #if defined(DEBUG_ESP_DISCONNECT)
  86. #define ESPDISC(foo) printk foo
  87. #else
  88. #define ESPDISC(foo)
  89. #endif
  90. #if defined(DEBUG_ESP_STATUS)
  91. #define ESPSTAT(foo) printk foo
  92. #else
  93. #define ESPSTAT(foo)
  94. #endif
  95. #if defined(DEBUG_ESP_PHASES)
  96. #define ESPPHASE(foo) printk foo
  97. #else
  98. #define ESPPHASE(foo)
  99. #endif
  100. #if defined(DEBUG_ESP_WORKBUS)
  101. #define ESPBUS(foo) printk foo
  102. #else
  103. #define ESPBUS(foo)
  104. #endif
  105. #if defined(DEBUG_ESP_IRQS)
  106. #define ESPIRQ(foo) printk foo
  107. #else
  108. #define ESPIRQ(foo)
  109. #endif
  110. #if defined(DEBUG_SDTR)
  111. #define ESPSDTR(foo) printk foo
  112. #else
  113. #define ESPSDTR(foo)
  114. #endif
  115. #if defined(DEBUG_ESP_MISC)
  116. #define ESPMISC(foo) printk foo
  117. #else
  118. #define ESPMISC(foo)
  119. #endif
  120. /* Command phase enumeration. */
  121. enum {
  122. not_issued = 0x00, /* Still in the issue_SC queue. */
  123. /* Various forms of selecting a target. */
  124. #define in_slct_mask 0x10
  125. in_slct_norm = 0x10, /* ESP is arbitrating, normal selection */
  126. in_slct_stop = 0x11, /* ESP will select, then stop with IRQ */
  127. in_slct_msg = 0x12, /* select, then send a message */
  128. in_slct_tag = 0x13, /* select and send tagged queue msg */
  129. in_slct_sneg = 0x14, /* select and acquire sync capabilities */
  130. /* Any post selection activity. */
  131. #define in_phases_mask 0x20
  132. in_datain = 0x20, /* Data is transferring from the bus */
  133. in_dataout = 0x21, /* Data is transferring to the bus */
  134. in_data_done = 0x22, /* Last DMA data operation done (maybe) */
  135. in_msgin = 0x23, /* Eating message from target */
  136. in_msgincont = 0x24, /* Eating more msg bytes from target */
  137. in_msgindone = 0x25, /* Decide what to do with what we got */
  138. in_msgout = 0x26, /* Sending message to target */
  139. in_msgoutdone = 0x27, /* Done sending msg out */
  140. in_cmdbegin = 0x28, /* Sending cmd after abnormal selection */
  141. in_cmdend = 0x29, /* Done sending slow cmd */
  142. in_status = 0x2a, /* Was in status phase, finishing cmd */
  143. in_freeing = 0x2b, /* freeing the bus for cmd cmplt or disc */
  144. in_the_dark = 0x2c, /* Don't know what bus phase we are in */
  145. /* Special states, ie. not normal bus transitions... */
  146. #define in_spec_mask 0x80
  147. in_abortone = 0x80, /* Aborting one command currently */
  148. in_abortall = 0x81, /* Blowing away all commands we have */
  149. in_resetdev = 0x82, /* SCSI target reset in progress */
  150. in_resetbus = 0x83, /* SCSI bus reset in progress */
  151. in_tgterror = 0x84, /* Target did something stupid */
  152. };
  153. enum {
  154. /* Zero has special meaning, see skipahead[12]. */
  155. /*0*/ do_never,
  156. /*1*/ do_phase_determine,
  157. /*2*/ do_reset_bus,
  158. /*3*/ do_reset_complete,
  159. /*4*/ do_work_bus,
  160. /*5*/ do_intr_end
  161. };
  162. /* The master ring of all esp hosts we are managing in this driver. */
  163. static struct esp *espchain;
  164. static DEFINE_SPINLOCK(espchain_lock);
  165. static int esps_running = 0;
  166. /* Forward declarations. */
  167. static irqreturn_t esp_intr(int irq, void *dev_id, struct pt_regs *pregs);
  168. /* Debugging routines */
  169. struct esp_cmdstrings {
  170. u8 cmdchar;
  171. char *text;
  172. } esp_cmd_strings[] = {
  173. /* Miscellaneous */
  174. { ESP_CMD_NULL, "ESP_NOP", },
  175. { ESP_CMD_FLUSH, "FIFO_FLUSH", },
  176. { ESP_CMD_RC, "RSTESP", },
  177. { ESP_CMD_RS, "RSTSCSI", },
  178. /* Disconnected State Group */
  179. { ESP_CMD_RSEL, "RESLCTSEQ", },
  180. { ESP_CMD_SEL, "SLCTNATN", },
  181. { ESP_CMD_SELA, "SLCTATN", },
  182. { ESP_CMD_SELAS, "SLCTATNSTOP", },
  183. { ESP_CMD_ESEL, "ENSLCTRESEL", },
  184. { ESP_CMD_DSEL, "DISSELRESEL", },
  185. { ESP_CMD_SA3, "SLCTATN3", },
  186. { ESP_CMD_RSEL3, "RESLCTSEQ", },
  187. /* Target State Group */
  188. { ESP_CMD_SMSG, "SNDMSG", },
  189. { ESP_CMD_SSTAT, "SNDSTATUS", },
  190. { ESP_CMD_SDATA, "SNDDATA", },
  191. { ESP_CMD_DSEQ, "DISCSEQ", },
  192. { ESP_CMD_TSEQ, "TERMSEQ", },
  193. { ESP_CMD_TCCSEQ, "TRGTCMDCOMPSEQ", },
  194. { ESP_CMD_DCNCT, "DISC", },
  195. { ESP_CMD_RMSG, "RCVMSG", },
  196. { ESP_CMD_RCMD, "RCVCMD", },
  197. { ESP_CMD_RDATA, "RCVDATA", },
  198. { ESP_CMD_RCSEQ, "RCVCMDSEQ", },
  199. /* Initiator State Group */
  200. { ESP_CMD_TI, "TRANSINFO", },
  201. { ESP_CMD_ICCSEQ, "INICMDSEQCOMP", },
  202. { ESP_CMD_MOK, "MSGACCEPTED", },
  203. { ESP_CMD_TPAD, "TPAD", },
  204. { ESP_CMD_SATN, "SATN", },
  205. { ESP_CMD_RATN, "RATN", },
  206. };
  207. #define NUM_ESP_COMMANDS ((sizeof(esp_cmd_strings)) / (sizeof(struct esp_cmdstrings)))
  208. /* Print textual representation of an ESP command */
  209. static inline void esp_print_cmd(u8 espcmd)
  210. {
  211. u8 dma_bit = espcmd & ESP_CMD_DMA;
  212. int i;
  213. espcmd &= ~dma_bit;
  214. for (i = 0; i < NUM_ESP_COMMANDS; i++)
  215. if (esp_cmd_strings[i].cmdchar == espcmd)
  216. break;
  217. if (i == NUM_ESP_COMMANDS)
  218. printk("ESP_Unknown");
  219. else
  220. printk("%s%s", esp_cmd_strings[i].text,
  221. ((dma_bit) ? "+DMA" : ""));
  222. }
  223. /* Print the status register's value */
  224. static inline void esp_print_statreg(u8 statreg)
  225. {
  226. u8 phase;
  227. printk("STATUS<");
  228. phase = statreg & ESP_STAT_PMASK;
  229. printk("%s,", (phase == ESP_DOP ? "DATA-OUT" :
  230. (phase == ESP_DIP ? "DATA-IN" :
  231. (phase == ESP_CMDP ? "COMMAND" :
  232. (phase == ESP_STATP ? "STATUS" :
  233. (phase == ESP_MOP ? "MSG-OUT" :
  234. (phase == ESP_MIP ? "MSG_IN" :
  235. "unknown")))))));
  236. if (statreg & ESP_STAT_TDONE)
  237. printk("TRANS_DONE,");
  238. if (statreg & ESP_STAT_TCNT)
  239. printk("TCOUNT_ZERO,");
  240. if (statreg & ESP_STAT_PERR)
  241. printk("P_ERROR,");
  242. if (statreg & ESP_STAT_SPAM)
  243. printk("SPAM,");
  244. if (statreg & ESP_STAT_INTR)
  245. printk("IRQ,");
  246. printk(">");
  247. }
  248. /* Print the interrupt register's value */
  249. static inline void esp_print_ireg(u8 intreg)
  250. {
  251. printk("INTREG< ");
  252. if (intreg & ESP_INTR_S)
  253. printk("SLCT_NATN ");
  254. if (intreg & ESP_INTR_SATN)
  255. printk("SLCT_ATN ");
  256. if (intreg & ESP_INTR_RSEL)
  257. printk("RSLCT ");
  258. if (intreg & ESP_INTR_FDONE)
  259. printk("FDONE ");
  260. if (intreg & ESP_INTR_BSERV)
  261. printk("BSERV ");
  262. if (intreg & ESP_INTR_DC)
  263. printk("DISCNCT ");
  264. if (intreg & ESP_INTR_IC)
  265. printk("ILL_CMD ");
  266. if (intreg & ESP_INTR_SR)
  267. printk("SCSI_BUS_RESET ");
  268. printk(">");
  269. }
  270. /* Print the sequence step registers contents */
  271. static inline void esp_print_seqreg(u8 stepreg)
  272. {
  273. stepreg &= ESP_STEP_VBITS;
  274. printk("STEP<%s>",
  275. (stepreg == ESP_STEP_ASEL ? "SLCT_ARB_CMPLT" :
  276. (stepreg == ESP_STEP_SID ? "1BYTE_MSG_SENT" :
  277. (stepreg == ESP_STEP_NCMD ? "NOT_IN_CMD_PHASE" :
  278. (stepreg == ESP_STEP_PPC ? "CMD_BYTES_LOST" :
  279. (stepreg == ESP_STEP_FINI4 ? "CMD_SENT_OK" :
  280. "UNKNOWN"))))));
  281. }
  282. static char *phase_string(int phase)
  283. {
  284. switch (phase) {
  285. case not_issued:
  286. return "UNISSUED";
  287. case in_slct_norm:
  288. return "SLCTNORM";
  289. case in_slct_stop:
  290. return "SLCTSTOP";
  291. case in_slct_msg:
  292. return "SLCTMSG";
  293. case in_slct_tag:
  294. return "SLCTTAG";
  295. case in_slct_sneg:
  296. return "SLCTSNEG";
  297. case in_datain:
  298. return "DATAIN";
  299. case in_dataout:
  300. return "DATAOUT";
  301. case in_data_done:
  302. return "DATADONE";
  303. case in_msgin:
  304. return "MSGIN";
  305. case in_msgincont:
  306. return "MSGINCONT";
  307. case in_msgindone:
  308. return "MSGINDONE";
  309. case in_msgout:
  310. return "MSGOUT";
  311. case in_msgoutdone:
  312. return "MSGOUTDONE";
  313. case in_cmdbegin:
  314. return "CMDBEGIN";
  315. case in_cmdend:
  316. return "CMDEND";
  317. case in_status:
  318. return "STATUS";
  319. case in_freeing:
  320. return "FREEING";
  321. case in_the_dark:
  322. return "CLUELESS";
  323. case in_abortone:
  324. return "ABORTONE";
  325. case in_abortall:
  326. return "ABORTALL";
  327. case in_resetdev:
  328. return "RESETDEV";
  329. case in_resetbus:
  330. return "RESETBUS";
  331. case in_tgterror:
  332. return "TGTERROR";
  333. default:
  334. return "UNKNOWN";
  335. };
  336. }
  337. #ifdef DEBUG_STATE_MACHINE
  338. static inline void esp_advance_phase(struct scsi_cmnd *s, int newphase)
  339. {
  340. ESPLOG(("<%s>", phase_string(newphase)));
  341. s->SCp.sent_command = s->SCp.phase;
  342. s->SCp.phase = newphase;
  343. }
  344. #else
  345. #define esp_advance_phase(__s, __newphase) \
  346. (__s)->SCp.sent_command = (__s)->SCp.phase; \
  347. (__s)->SCp.phase = (__newphase);
  348. #endif
  349. #ifdef DEBUG_ESP_CMDS
  350. static inline void esp_cmd(struct esp *esp, u8 cmd)
  351. {
  352. esp->espcmdlog[esp->espcmdent] = cmd;
  353. esp->espcmdent = (esp->espcmdent + 1) & 31;
  354. sbus_writeb(cmd, esp->eregs + ESP_CMD);
  355. }
  356. #else
  357. #define esp_cmd(__esp, __cmd) \
  358. sbus_writeb((__cmd), ((__esp)->eregs) + ESP_CMD)
  359. #endif
  360. #define ESP_INTSOFF(__dregs) \
  361. sbus_writel(sbus_readl((__dregs)+DMA_CSR)&~(DMA_INT_ENAB), (__dregs)+DMA_CSR)
  362. #define ESP_INTSON(__dregs) \
  363. sbus_writel(sbus_readl((__dregs)+DMA_CSR)|DMA_INT_ENAB, (__dregs)+DMA_CSR)
  364. #define ESP_IRQ_P(__dregs) \
  365. (sbus_readl((__dregs)+DMA_CSR) & (DMA_HNDL_INTR|DMA_HNDL_ERROR))
  366. /* How we use the various Linux SCSI data structures for operation.
  367. *
  368. * struct scsi_cmnd:
  369. *
  370. * We keep track of the synchronous capabilities of a target
  371. * in the device member, using sync_min_period and
  372. * sync_max_offset. These are the values we directly write
  373. * into the ESP registers while running a command. If offset
  374. * is zero the ESP will use asynchronous transfers.
  375. * If the borken flag is set we assume we shouldn't even bother
  376. * trying to negotiate for synchronous transfer as this target
  377. * is really stupid. If we notice the target is dropping the
  378. * bus, and we have been allowing it to disconnect, we clear
  379. * the disconnect flag.
  380. */
  381. /* Manipulation of the ESP command queues. Thanks to the aha152x driver
  382. * and its author, Juergen E. Fischer, for the methods used here.
  383. * Note that these are per-ESP queues, not global queues like
  384. * the aha152x driver uses.
  385. */
  386. static inline void append_SC(struct scsi_cmnd **SC, struct scsi_cmnd *new_SC)
  387. {
  388. struct scsi_cmnd *end;
  389. new_SC->host_scribble = (unsigned char *) NULL;
  390. if (!*SC)
  391. *SC = new_SC;
  392. else {
  393. for (end=*SC;end->host_scribble;end=(struct scsi_cmnd *)end->host_scribble)
  394. ;
  395. end->host_scribble = (unsigned char *) new_SC;
  396. }
  397. }
  398. static inline void prepend_SC(struct scsi_cmnd **SC, struct scsi_cmnd *new_SC)
  399. {
  400. new_SC->host_scribble = (unsigned char *) *SC;
  401. *SC = new_SC;
  402. }
  403. static inline struct scsi_cmnd *remove_first_SC(struct scsi_cmnd **SC)
  404. {
  405. struct scsi_cmnd *ptr;
  406. ptr = *SC;
  407. if (ptr)
  408. *SC = (struct scsi_cmnd *) (*SC)->host_scribble;
  409. return ptr;
  410. }
  411. static inline struct scsi_cmnd *remove_SC(struct scsi_cmnd **SC, int target, int lun)
  412. {
  413. struct scsi_cmnd *ptr, *prev;
  414. for (ptr = *SC, prev = NULL;
  415. ptr && ((ptr->device->id != target) || (ptr->device->lun != lun));
  416. prev = ptr, ptr = (struct scsi_cmnd *) ptr->host_scribble)
  417. ;
  418. if (ptr) {
  419. if (prev)
  420. prev->host_scribble=ptr->host_scribble;
  421. else
  422. *SC=(struct scsi_cmnd *)ptr->host_scribble;
  423. }
  424. return ptr;
  425. }
  426. /* Resetting various pieces of the ESP scsi driver chipset/buses. */
  427. static void esp_reset_dma(struct esp *esp)
  428. {
  429. int can_do_burst16, can_do_burst32, can_do_burst64;
  430. int can_do_sbus64;
  431. u32 tmp;
  432. can_do_burst16 = (esp->bursts & DMA_BURST16) != 0;
  433. can_do_burst32 = (esp->bursts & DMA_BURST32) != 0;
  434. can_do_burst64 = 0;
  435. can_do_sbus64 = 0;
  436. if (sbus_can_dma_64bit(esp->sdev))
  437. can_do_sbus64 = 1;
  438. if (sbus_can_burst64(esp->sdev))
  439. can_do_burst64 = (esp->bursts & DMA_BURST64) != 0;
  440. /* Punt the DVMA into a known state. */
  441. if (esp->dma->revision != dvmahme) {
  442. tmp = sbus_readl(esp->dregs + DMA_CSR);
  443. sbus_writel(tmp | DMA_RST_SCSI, esp->dregs + DMA_CSR);
  444. sbus_writel(tmp & ~DMA_RST_SCSI, esp->dregs + DMA_CSR);
  445. }
  446. switch (esp->dma->revision) {
  447. case dvmahme:
  448. /* This is the HME DVMA gate array. */
  449. sbus_writel(DMA_RESET_FAS366, esp->dregs + DMA_CSR);
  450. sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR);
  451. esp->prev_hme_dmacsr = (DMA_PARITY_OFF|DMA_2CLKS|DMA_SCSI_DISAB|DMA_INT_ENAB);
  452. esp->prev_hme_dmacsr &= ~(DMA_ENABLE|DMA_ST_WRITE|DMA_BRST_SZ);
  453. if (can_do_burst64)
  454. esp->prev_hme_dmacsr |= DMA_BRST64;
  455. else if (can_do_burst32)
  456. esp->prev_hme_dmacsr |= DMA_BRST32;
  457. if (can_do_sbus64) {
  458. esp->prev_hme_dmacsr |= DMA_SCSI_SBUS64;
  459. sbus_set_sbus64(esp->sdev, esp->bursts);
  460. }
  461. /* This chip is horrible. */
  462. while (sbus_readl(esp->dregs + DMA_CSR) & DMA_PEND_READ)
  463. udelay(1);
  464. sbus_writel(0, esp->dregs + DMA_CSR);
  465. sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
  466. /* This is necessary to avoid having the SCSI channel
  467. * engine lock up on us.
  468. */
  469. sbus_writel(0, esp->dregs + DMA_ADDR);
  470. break;
  471. case dvmarev2:
  472. /* This is the gate array found in the sun4m
  473. * NCR SBUS I/O subsystem.
  474. */
  475. if (esp->erev != esp100) {
  476. tmp = sbus_readl(esp->dregs + DMA_CSR);
  477. sbus_writel(tmp | DMA_3CLKS, esp->dregs + DMA_CSR);
  478. }
  479. break;
  480. case dvmarev3:
  481. tmp = sbus_readl(esp->dregs + DMA_CSR);
  482. tmp &= ~DMA_3CLKS;
  483. tmp |= DMA_2CLKS;
  484. if (can_do_burst32) {
  485. tmp &= ~DMA_BRST_SZ;
  486. tmp |= DMA_BRST32;
  487. }
  488. sbus_writel(tmp, esp->dregs + DMA_CSR);
  489. break;
  490. case dvmaesc1:
  491. /* This is the DMA unit found on SCSI/Ether cards. */
  492. tmp = sbus_readl(esp->dregs + DMA_CSR);
  493. tmp |= DMA_ADD_ENABLE;
  494. tmp &= ~DMA_BCNT_ENAB;
  495. if (!can_do_burst32 && can_do_burst16) {
  496. tmp |= DMA_ESC_BURST;
  497. } else {
  498. tmp &= ~(DMA_ESC_BURST);
  499. }
  500. sbus_writel(tmp, esp->dregs + DMA_CSR);
  501. break;
  502. default:
  503. break;
  504. };
  505. ESP_INTSON(esp->dregs);
  506. }
  507. /* Reset the ESP chip, _not_ the SCSI bus. */
  508. static void __init esp_reset_esp(struct esp *esp)
  509. {
  510. u8 family_code, version;
  511. int i;
  512. /* Now reset the ESP chip */
  513. esp_cmd(esp, ESP_CMD_RC);
  514. esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  515. esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  516. /* Reload the configuration registers */
  517. sbus_writeb(esp->cfact, esp->eregs + ESP_CFACT);
  518. esp->prev_stp = 0;
  519. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  520. esp->prev_soff = 0;
  521. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  522. sbus_writeb(esp->neg_defp, esp->eregs + ESP_TIMEO);
  523. /* This is the only point at which it is reliable to read
  524. * the ID-code for a fast ESP chip variants.
  525. */
  526. esp->max_period = ((35 * esp->ccycle) / 1000);
  527. if (esp->erev == fast) {
  528. version = sbus_readb(esp->eregs + ESP_UID);
  529. family_code = (version & 0xf8) >> 3;
  530. if (family_code == 0x02)
  531. esp->erev = fas236;
  532. else if (family_code == 0x0a)
  533. esp->erev = fashme; /* Version is usually '5'. */
  534. else
  535. esp->erev = fas100a;
  536. ESPMISC(("esp%d: FAST chip is %s (family=%d, version=%d)\n",
  537. esp->esp_id,
  538. (esp->erev == fas236) ? "fas236" :
  539. ((esp->erev == fas100a) ? "fas100a" :
  540. "fasHME"), family_code, (version & 7)));
  541. esp->min_period = ((4 * esp->ccycle) / 1000);
  542. } else {
  543. esp->min_period = ((5 * esp->ccycle) / 1000);
  544. }
  545. esp->max_period = (esp->max_period + 3)>>2;
  546. esp->min_period = (esp->min_period + 3)>>2;
  547. sbus_writeb(esp->config1, esp->eregs + ESP_CFG1);
  548. switch (esp->erev) {
  549. case esp100:
  550. /* nothing to do */
  551. break;
  552. case esp100a:
  553. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  554. break;
  555. case esp236:
  556. /* Slow 236 */
  557. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  558. esp->prev_cfg3 = esp->config3[0];
  559. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  560. break;
  561. case fashme:
  562. esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
  563. /* fallthrough... */
  564. case fas236:
  565. /* Fast 236 or HME */
  566. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  567. for (i = 0; i < 16; i++) {
  568. if (esp->erev == fashme) {
  569. u8 cfg3;
  570. cfg3 = ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
  571. if (esp->scsi_id >= 8)
  572. cfg3 |= ESP_CONFIG3_IDBIT3;
  573. esp->config3[i] |= cfg3;
  574. } else {
  575. esp->config3[i] |= ESP_CONFIG3_FCLK;
  576. }
  577. }
  578. esp->prev_cfg3 = esp->config3[0];
  579. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  580. if (esp->erev == fashme) {
  581. esp->radelay = 80;
  582. } else {
  583. if (esp->diff)
  584. esp->radelay = 0;
  585. else
  586. esp->radelay = 96;
  587. }
  588. break;
  589. case fas100a:
  590. /* Fast 100a */
  591. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  592. for (i = 0; i < 16; i++)
  593. esp->config3[i] |= ESP_CONFIG3_FCLOCK;
  594. esp->prev_cfg3 = esp->config3[0];
  595. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  596. esp->radelay = 32;
  597. break;
  598. default:
  599. panic("esp: what could it be... I wonder...");
  600. break;
  601. };
  602. /* Eat any bitrot in the chip */
  603. sbus_readb(esp->eregs + ESP_INTRPT);
  604. udelay(100);
  605. }
  606. /* This places the ESP into a known state at boot time. */
  607. static void __init esp_bootup_reset(struct esp *esp)
  608. {
  609. u8 tmp;
  610. /* Reset the DMA */
  611. esp_reset_dma(esp);
  612. /* Reset the ESP */
  613. esp_reset_esp(esp);
  614. /* Reset the SCSI bus, but tell ESP not to generate an irq */
  615. tmp = sbus_readb(esp->eregs + ESP_CFG1);
  616. tmp |= ESP_CONFIG1_SRRDISAB;
  617. sbus_writeb(tmp, esp->eregs + ESP_CFG1);
  618. esp_cmd(esp, ESP_CMD_RS);
  619. udelay(400);
  620. sbus_writeb(esp->config1, esp->eregs + ESP_CFG1);
  621. /* Eat any bitrot in the chip and we are done... */
  622. sbus_readb(esp->eregs + ESP_INTRPT);
  623. }
  624. static void esp_chain_add(struct esp *esp)
  625. {
  626. spin_lock_irq(&espchain_lock);
  627. if (espchain) {
  628. struct esp *elink = espchain;
  629. while (elink->next)
  630. elink = elink->next;
  631. elink->next = esp;
  632. } else {
  633. espchain = esp;
  634. }
  635. esp->next = NULL;
  636. spin_unlock_irq(&espchain_lock);
  637. }
  638. static void esp_chain_del(struct esp *esp)
  639. {
  640. spin_lock_irq(&espchain_lock);
  641. if (espchain == esp) {
  642. espchain = esp->next;
  643. } else {
  644. struct esp *elink = espchain;
  645. while (elink->next != esp)
  646. elink = elink->next;
  647. elink->next = esp->next;
  648. }
  649. esp->next = NULL;
  650. spin_unlock_irq(&espchain_lock);
  651. }
  652. static int __init esp_find_dvma(struct esp *esp, struct sbus_dev *dma_sdev)
  653. {
  654. struct sbus_dev *sdev = esp->sdev;
  655. struct sbus_dma *dma;
  656. if (dma_sdev != NULL) {
  657. for_each_dvma(dma) {
  658. if (dma->sdev == dma_sdev)
  659. break;
  660. }
  661. } else {
  662. for_each_dvma(dma) {
  663. /* If allocated already, can't use it. */
  664. if (dma->allocated)
  665. continue;
  666. if (dma->sdev == NULL)
  667. break;
  668. /* If bus + slot are the same and it has the
  669. * correct OBP name, it's ours.
  670. */
  671. if (sdev->bus == dma->sdev->bus &&
  672. sdev->slot == dma->sdev->slot &&
  673. (!strcmp(dma->sdev->prom_name, "dma") ||
  674. !strcmp(dma->sdev->prom_name, "espdma")))
  675. break;
  676. }
  677. }
  678. /* If we don't know how to handle the dvma,
  679. * do not use this device.
  680. */
  681. if (dma == NULL) {
  682. printk("Cannot find dvma for ESP%d's SCSI\n", esp->esp_id);
  683. return -1;
  684. }
  685. if (dma->allocated) {
  686. printk("esp%d: can't use my espdma\n", esp->esp_id);
  687. return -1;
  688. }
  689. dma->allocated = 1;
  690. esp->dma = dma;
  691. esp->dregs = dma->regs;
  692. return 0;
  693. }
  694. static int __init esp_map_regs(struct esp *esp, int hme)
  695. {
  696. struct sbus_dev *sdev = esp->sdev;
  697. struct resource *res;
  698. /* On HME, two reg sets exist, first is DVMA,
  699. * second is ESP registers.
  700. */
  701. if (hme)
  702. res = &sdev->resource[1];
  703. else
  704. res = &sdev->resource[0];
  705. esp->eregs = sbus_ioremap(res, 0, ESP_REG_SIZE, "ESP Registers");
  706. if (esp->eregs == 0)
  707. return -1;
  708. return 0;
  709. }
  710. static int __init esp_map_cmdarea(struct esp *esp)
  711. {
  712. struct sbus_dev *sdev = esp->sdev;
  713. esp->esp_command = sbus_alloc_consistent(sdev, 16,
  714. &esp->esp_command_dvma);
  715. if (esp->esp_command == NULL ||
  716. esp->esp_command_dvma == 0)
  717. return -1;
  718. return 0;
  719. }
  720. static int __init esp_register_irq(struct esp *esp)
  721. {
  722. esp->ehost->irq = esp->irq = esp->sdev->irqs[0];
  723. /* We used to try various overly-clever things to
  724. * reduce the interrupt processing overhead on
  725. * sun4c/sun4m when multiple ESP's shared the
  726. * same IRQ. It was too complex and messy to
  727. * sanely maintain.
  728. */
  729. if (request_irq(esp->ehost->irq, esp_intr,
  730. SA_SHIRQ, "ESP SCSI", esp)) {
  731. printk("esp%d: Cannot acquire irq line\n",
  732. esp->esp_id);
  733. return -1;
  734. }
  735. printk("esp%d: IRQ %s ", esp->esp_id,
  736. __irq_itoa(esp->ehost->irq));
  737. return 0;
  738. }
  739. static void __init esp_get_scsi_id(struct esp *esp)
  740. {
  741. struct sbus_dev *sdev = esp->sdev;
  742. esp->scsi_id = prom_getintdefault(esp->prom_node,
  743. "initiator-id",
  744. -1);
  745. if (esp->scsi_id == -1)
  746. esp->scsi_id = prom_getintdefault(esp->prom_node,
  747. "scsi-initiator-id",
  748. -1);
  749. if (esp->scsi_id == -1)
  750. esp->scsi_id = (sdev->bus == NULL) ? 7 :
  751. prom_getintdefault(sdev->bus->prom_node,
  752. "scsi-initiator-id",
  753. 7);
  754. esp->ehost->this_id = esp->scsi_id;
  755. esp->scsi_id_mask = (1 << esp->scsi_id);
  756. }
  757. static void __init esp_get_clock_params(struct esp *esp)
  758. {
  759. struct sbus_dev *sdev = esp->sdev;
  760. int prom_node = esp->prom_node;
  761. int sbus_prom_node;
  762. unsigned int fmhz;
  763. u8 ccf;
  764. if (sdev != NULL && sdev->bus != NULL)
  765. sbus_prom_node = sdev->bus->prom_node;
  766. else
  767. sbus_prom_node = 0;
  768. /* This is getting messy but it has to be done
  769. * correctly or else you get weird behavior all
  770. * over the place. We are trying to basically
  771. * figure out three pieces of information.
  772. *
  773. * a) Clock Conversion Factor
  774. *
  775. * This is a representation of the input
  776. * crystal clock frequency going into the
  777. * ESP on this machine. Any operation whose
  778. * timing is longer than 400ns depends on this
  779. * value being correct. For example, you'll
  780. * get blips for arbitration/selection during
  781. * high load or with multiple targets if this
  782. * is not set correctly.
  783. *
  784. * b) Selection Time-Out
  785. *
  786. * The ESP isn't very bright and will arbitrate
  787. * for the bus and try to select a target
  788. * forever if you let it. This value tells
  789. * the ESP when it has taken too long to
  790. * negotiate and that it should interrupt
  791. * the CPU so we can see what happened.
  792. * The value is computed as follows (from
  793. * NCR/Symbios chip docs).
  794. *
  795. * (Time Out Period) * (Input Clock)
  796. * STO = ----------------------------------
  797. * (8192) * (Clock Conversion Factor)
  798. *
  799. * You usually want the time out period to be
  800. * around 250ms, I think we'll set it a little
  801. * bit higher to account for fully loaded SCSI
  802. * bus's and slow devices that don't respond so
  803. * quickly to selection attempts. (yeah, I know
  804. * this is out of spec. but there is a lot of
  805. * buggy pieces of firmware out there so bite me)
  806. *
  807. * c) Imperical constants for synchronous offset
  808. * and transfer period register values
  809. *
  810. * This entails the smallest and largest sync
  811. * period we could ever handle on this ESP.
  812. */
  813. fmhz = prom_getintdefault(prom_node, "clock-frequency", -1);
  814. if (fmhz == -1)
  815. fmhz = (!sbus_prom_node) ? 0 :
  816. prom_getintdefault(sbus_prom_node, "clock-frequency", -1);
  817. if (fmhz <= (5000000))
  818. ccf = 0;
  819. else
  820. ccf = (((5000000 - 1) + (fmhz))/(5000000));
  821. if (!ccf || ccf > 8) {
  822. /* If we can't find anything reasonable,
  823. * just assume 20MHZ. This is the clock
  824. * frequency of the older sun4c's where I've
  825. * been unable to find the clock-frequency
  826. * PROM property. All other machines provide
  827. * useful values it seems.
  828. */
  829. ccf = ESP_CCF_F4;
  830. fmhz = (20000000);
  831. }
  832. if (ccf == (ESP_CCF_F7 + 1))
  833. esp->cfact = ESP_CCF_F0;
  834. else if (ccf == ESP_CCF_NEVER)
  835. esp->cfact = ESP_CCF_F2;
  836. else
  837. esp->cfact = ccf;
  838. esp->raw_cfact = ccf;
  839. esp->cfreq = fmhz;
  840. esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz);
  841. esp->ctick = ESP_TICK(ccf, esp->ccycle);
  842. esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf);
  843. esp->sync_defp = SYNC_DEFP_SLOW;
  844. printk("SCSI ID %d Clk %dMHz CCYC=%d CCF=%d TOut %d ",
  845. esp->scsi_id, (fmhz / 1000000),
  846. (int)esp->ccycle, (int)ccf, (int) esp->neg_defp);
  847. }
  848. static void __init esp_get_bursts(struct esp *esp, struct sbus_dev *dma)
  849. {
  850. struct sbus_dev *sdev = esp->sdev;
  851. u8 bursts;
  852. bursts = prom_getintdefault(esp->prom_node, "burst-sizes", 0xff);
  853. if (dma) {
  854. u8 tmp = prom_getintdefault(dma->prom_node,
  855. "burst-sizes", 0xff);
  856. if (tmp != 0xff)
  857. bursts &= tmp;
  858. }
  859. if (sdev->bus) {
  860. u8 tmp = prom_getintdefault(sdev->bus->prom_node,
  861. "burst-sizes", 0xff);
  862. if (tmp != 0xff)
  863. bursts &= tmp;
  864. }
  865. if (bursts == 0xff ||
  866. (bursts & DMA_BURST16) == 0 ||
  867. (bursts & DMA_BURST32) == 0)
  868. bursts = (DMA_BURST32 - 1);
  869. esp->bursts = bursts;
  870. }
  871. static void __init esp_get_revision(struct esp *esp)
  872. {
  873. u8 tmp;
  874. esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
  875. esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
  876. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  877. tmp = sbus_readb(esp->eregs + ESP_CFG2);
  878. tmp &= ~ESP_CONFIG2_MAGIC;
  879. if (tmp != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
  880. /* If what we write to cfg2 does not come back, cfg2
  881. * is not implemented, therefore this must be a plain
  882. * esp100.
  883. */
  884. esp->erev = esp100;
  885. printk("NCR53C90(esp100)\n");
  886. } else {
  887. esp->config2 = 0;
  888. esp->prev_cfg3 = esp->config3[0] = 5;
  889. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  890. sbus_writeb(0, esp->eregs + ESP_CFG3);
  891. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  892. tmp = sbus_readb(esp->eregs + ESP_CFG3);
  893. if (tmp != 5) {
  894. /* The cfg2 register is implemented, however
  895. * cfg3 is not, must be esp100a.
  896. */
  897. esp->erev = esp100a;
  898. printk("NCR53C90A(esp100a)\n");
  899. } else {
  900. int target;
  901. for (target = 0; target < 16; target++)
  902. esp->config3[target] = 0;
  903. esp->prev_cfg3 = 0;
  904. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  905. /* All of cfg{1,2,3} implemented, must be one of
  906. * the fas variants, figure out which one.
  907. */
  908. if (esp->raw_cfact > ESP_CCF_F5) {
  909. esp->erev = fast;
  910. esp->sync_defp = SYNC_DEFP_FAST;
  911. printk("NCR53C9XF(espfast)\n");
  912. } else {
  913. esp->erev = esp236;
  914. printk("NCR53C9x(esp236)\n");
  915. }
  916. esp->config2 = 0;
  917. sbus_writeb(esp->config2, esp->eregs + ESP_CFG2);
  918. }
  919. }
  920. }
  921. static void __init esp_init_swstate(struct esp *esp)
  922. {
  923. int i;
  924. /* Command queues... */
  925. esp->current_SC = NULL;
  926. esp->disconnected_SC = NULL;
  927. esp->issue_SC = NULL;
  928. /* Target and current command state... */
  929. esp->targets_present = 0;
  930. esp->resetting_bus = 0;
  931. esp->snip = 0;
  932. init_waitqueue_head(&esp->reset_queue);
  933. /* Debugging... */
  934. for(i = 0; i < 32; i++)
  935. esp->espcmdlog[i] = 0;
  936. esp->espcmdent = 0;
  937. /* MSG phase state... */
  938. for(i = 0; i < 16; i++) {
  939. esp->cur_msgout[i] = 0;
  940. esp->cur_msgin[i] = 0;
  941. }
  942. esp->prevmsgout = esp->prevmsgin = 0;
  943. esp->msgout_len = esp->msgin_len = 0;
  944. /* Clear the one behind caches to hold unmatchable values. */
  945. esp->prev_soff = esp->prev_stp = esp->prev_cfg3 = 0xff;
  946. esp->prev_hme_dmacsr = 0xffffffff;
  947. }
  948. static int __init detect_one_esp(struct scsi_host_template *tpnt, struct sbus_dev *esp_dev,
  949. struct sbus_dev *espdma, struct sbus_bus *sbus,
  950. int id, int hme)
  951. {
  952. struct Scsi_Host *esp_host = scsi_register(tpnt, sizeof(struct esp));
  953. struct esp *esp;
  954. if (!esp_host) {
  955. printk("ESP: Cannot register SCSI host\n");
  956. return -1;
  957. }
  958. if (hme)
  959. esp_host->max_id = 16;
  960. esp = (struct esp *) esp_host->hostdata;
  961. esp->ehost = esp_host;
  962. esp->sdev = esp_dev;
  963. esp->esp_id = id;
  964. esp->prom_node = esp_dev->prom_node;
  965. prom_getstring(esp->prom_node, "name", esp->prom_name,
  966. sizeof(esp->prom_name));
  967. esp_chain_add(esp);
  968. if (esp_find_dvma(esp, espdma) < 0)
  969. goto fail_unlink;
  970. if (esp_map_regs(esp, hme) < 0) {
  971. printk("ESP registers unmappable");
  972. goto fail_dvma_release;
  973. }
  974. if (esp_map_cmdarea(esp) < 0) {
  975. printk("ESP DVMA transport area unmappable");
  976. goto fail_unmap_regs;
  977. }
  978. if (esp_register_irq(esp) < 0)
  979. goto fail_unmap_cmdarea;
  980. esp_get_scsi_id(esp);
  981. esp->diff = prom_getbool(esp->prom_node, "differential");
  982. if (esp->diff)
  983. printk("Differential ");
  984. esp_get_clock_params(esp);
  985. esp_get_bursts(esp, espdma);
  986. esp_get_revision(esp);
  987. esp_init_swstate(esp);
  988. esp_bootup_reset(esp);
  989. return 0;
  990. fail_unmap_cmdarea:
  991. sbus_free_consistent(esp->sdev, 16,
  992. (void *) esp->esp_command,
  993. esp->esp_command_dvma);
  994. fail_unmap_regs:
  995. sbus_iounmap(esp->eregs, ESP_REG_SIZE);
  996. fail_dvma_release:
  997. esp->dma->allocated = 0;
  998. fail_unlink:
  999. esp_chain_del(esp);
  1000. scsi_unregister(esp_host);
  1001. return -1;
  1002. }
  1003. /* Detecting ESP chips on the machine. This is the simple and easy
  1004. * version.
  1005. */
  1006. #ifdef CONFIG_SUN4
  1007. #include <asm/sun4paddr.h>
  1008. static int __init esp_detect(struct scsi_host_template *tpnt)
  1009. {
  1010. static struct sbus_dev esp_dev;
  1011. int esps_in_use = 0;
  1012. espchain = NULL;
  1013. if (sun4_esp_physaddr) {
  1014. memset (&esp_dev, 0, sizeof(esp_dev));
  1015. esp_dev.reg_addrs[0].phys_addr = sun4_esp_physaddr;
  1016. esp_dev.irqs[0] = 4;
  1017. esp_dev.resource[0].start = sun4_esp_physaddr;
  1018. esp_dev.resource[0].end = sun4_esp_physaddr + ESP_REG_SIZE - 1;
  1019. esp_dev.resource[0].flags = IORESOURCE_IO;
  1020. if (!detect_one_esp(tpnt, &esp_dev, NULL, NULL, 0, 0))
  1021. esps_in_use++;
  1022. printk("ESP: Total of 1 ESP hosts found, %d actually in use.\n", esps_in_use);
  1023. esps_running = esps_in_use;
  1024. }
  1025. return esps_in_use;
  1026. }
  1027. #else /* !CONFIG_SUN4 */
  1028. static int __init esp_detect(struct scsi_host_template *tpnt)
  1029. {
  1030. struct sbus_bus *sbus;
  1031. struct sbus_dev *esp_dev, *sbdev_iter;
  1032. int nesps = 0, esps_in_use = 0;
  1033. espchain = 0;
  1034. if (!sbus_root) {
  1035. #ifdef CONFIG_PCI
  1036. return 0;
  1037. #else
  1038. panic("No SBUS in esp_detect()");
  1039. #endif
  1040. }
  1041. for_each_sbus(sbus) {
  1042. for_each_sbusdev(sbdev_iter, sbus) {
  1043. struct sbus_dev *espdma = NULL;
  1044. int hme = 0;
  1045. /* Is it an esp sbus device? */
  1046. esp_dev = sbdev_iter;
  1047. if (strcmp(esp_dev->prom_name, "esp") &&
  1048. strcmp(esp_dev->prom_name, "SUNW,esp")) {
  1049. if (!strcmp(esp_dev->prom_name, "SUNW,fas")) {
  1050. hme = 1;
  1051. espdma = esp_dev;
  1052. } else {
  1053. if (!esp_dev->child ||
  1054. (strcmp(esp_dev->prom_name, "espdma") &&
  1055. strcmp(esp_dev->prom_name, "dma")))
  1056. continue; /* nope... */
  1057. espdma = esp_dev;
  1058. esp_dev = esp_dev->child;
  1059. if (strcmp(esp_dev->prom_name, "esp") &&
  1060. strcmp(esp_dev->prom_name, "SUNW,esp"))
  1061. continue; /* how can this happen? */
  1062. }
  1063. }
  1064. if (detect_one_esp(tpnt, esp_dev, espdma, sbus, nesps++, hme) < 0)
  1065. continue;
  1066. esps_in_use++;
  1067. } /* for each sbusdev */
  1068. } /* for each sbus */
  1069. printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps,
  1070. esps_in_use);
  1071. esps_running = esps_in_use;
  1072. return esps_in_use;
  1073. }
  1074. #endif /* !CONFIG_SUN4 */
  1075. /*
  1076. */
  1077. static int esp_release(struct Scsi_Host *host)
  1078. {
  1079. struct esp *esp = (struct esp *) host->hostdata;
  1080. ESP_INTSOFF(esp->dregs);
  1081. #if 0
  1082. esp_reset_dma(esp);
  1083. esp_reset_esp(esp);
  1084. #endif
  1085. free_irq(esp->ehost->irq, esp);
  1086. sbus_free_consistent(esp->sdev, 16,
  1087. (void *) esp->esp_command, esp->esp_command_dvma);
  1088. sbus_iounmap(esp->eregs, ESP_REG_SIZE);
  1089. esp->dma->allocated = 0;
  1090. esp_chain_del(esp);
  1091. return 0;
  1092. }
  1093. /* The info function will return whatever useful
  1094. * information the developer sees fit. If not provided, then
  1095. * the name field will be used instead.
  1096. */
  1097. static const char *esp_info(struct Scsi_Host *host)
  1098. {
  1099. struct esp *esp;
  1100. esp = (struct esp *) host->hostdata;
  1101. switch (esp->erev) {
  1102. case esp100:
  1103. return "Sparc ESP100 (NCR53C90)";
  1104. case esp100a:
  1105. return "Sparc ESP100A (NCR53C90A)";
  1106. case esp236:
  1107. return "Sparc ESP236";
  1108. case fas236:
  1109. return "Sparc ESP236-FAST";
  1110. case fashme:
  1111. return "Sparc ESP366-HME";
  1112. case fas100a:
  1113. return "Sparc ESP100A-FAST";
  1114. default:
  1115. return "Bogon ESP revision";
  1116. };
  1117. }
  1118. /* From Wolfgang Stanglmeier's NCR scsi driver. */
  1119. struct info_str
  1120. {
  1121. char *buffer;
  1122. int length;
  1123. int offset;
  1124. int pos;
  1125. };
  1126. static void copy_mem_info(struct info_str *info, char *data, int len)
  1127. {
  1128. if (info->pos + len > info->length)
  1129. len = info->length - info->pos;
  1130. if (info->pos + len < info->offset) {
  1131. info->pos += len;
  1132. return;
  1133. }
  1134. if (info->pos < info->offset) {
  1135. data += (info->offset - info->pos);
  1136. len -= (info->offset - info->pos);
  1137. }
  1138. if (len > 0) {
  1139. memcpy(info->buffer + info->pos, data, len);
  1140. info->pos += len;
  1141. }
  1142. }
  1143. static int copy_info(struct info_str *info, char *fmt, ...)
  1144. {
  1145. va_list args;
  1146. char buf[81];
  1147. int len;
  1148. va_start(args, fmt);
  1149. len = vsprintf(buf, fmt, args);
  1150. va_end(args);
  1151. copy_mem_info(info, buf, len);
  1152. return len;
  1153. }
  1154. static int esp_host_info(struct esp *esp, char *ptr, off_t offset, int len)
  1155. {
  1156. struct scsi_device *sdev;
  1157. struct info_str info;
  1158. int i;
  1159. info.buffer = ptr;
  1160. info.length = len;
  1161. info.offset = offset;
  1162. info.pos = 0;
  1163. copy_info(&info, "Sparc ESP Host Adapter:\n");
  1164. copy_info(&info, "\tPROM node\t\t%08x\n", (unsigned int) esp->prom_node);
  1165. copy_info(&info, "\tPROM name\t\t%s\n", esp->prom_name);
  1166. copy_info(&info, "\tESP Model\t\t");
  1167. switch (esp->erev) {
  1168. case esp100:
  1169. copy_info(&info, "ESP100\n");
  1170. break;
  1171. case esp100a:
  1172. copy_info(&info, "ESP100A\n");
  1173. break;
  1174. case esp236:
  1175. copy_info(&info, "ESP236\n");
  1176. break;
  1177. case fas236:
  1178. copy_info(&info, "FAS236\n");
  1179. break;
  1180. case fas100a:
  1181. copy_info(&info, "FAS100A\n");
  1182. break;
  1183. case fast:
  1184. copy_info(&info, "FAST\n");
  1185. break;
  1186. case fashme:
  1187. copy_info(&info, "Happy Meal FAS\n");
  1188. break;
  1189. case espunknown:
  1190. default:
  1191. copy_info(&info, "Unknown!\n");
  1192. break;
  1193. };
  1194. copy_info(&info, "\tDMA Revision\t\t");
  1195. switch (esp->dma->revision) {
  1196. case dvmarev0:
  1197. copy_info(&info, "Rev 0\n");
  1198. break;
  1199. case dvmaesc1:
  1200. copy_info(&info, "ESC Rev 1\n");
  1201. break;
  1202. case dvmarev1:
  1203. copy_info(&info, "Rev 1\n");
  1204. break;
  1205. case dvmarev2:
  1206. copy_info(&info, "Rev 2\n");
  1207. break;
  1208. case dvmarev3:
  1209. copy_info(&info, "Rev 3\n");
  1210. break;
  1211. case dvmarevplus:
  1212. copy_info(&info, "Rev 1+\n");
  1213. break;
  1214. case dvmahme:
  1215. copy_info(&info, "Rev HME/FAS\n");
  1216. break;
  1217. default:
  1218. copy_info(&info, "Unknown!\n");
  1219. break;
  1220. };
  1221. copy_info(&info, "\tLive Targets\t\t[ ");
  1222. for (i = 0; i < 15; i++) {
  1223. if (esp->targets_present & (1 << i))
  1224. copy_info(&info, "%d ", i);
  1225. }
  1226. copy_info(&info, "]\n\n");
  1227. /* Now describe the state of each existing target. */
  1228. copy_info(&info, "Target #\tconfig3\t\tSync Capabilities\tDisconnect\tWide\n");
  1229. shost_for_each_device(sdev, esp->ehost) {
  1230. struct esp_device *esp_dev = sdev->hostdata;
  1231. uint id = sdev->id;
  1232. if (!(esp->targets_present & (1 << id)))
  1233. continue;
  1234. copy_info(&info, "%d\t\t", id);
  1235. copy_info(&info, "%08lx\t", esp->config3[id]);
  1236. copy_info(&info, "[%02lx,%02lx]\t\t\t",
  1237. esp_dev->sync_max_offset,
  1238. esp_dev->sync_min_period);
  1239. copy_info(&info, "%s\t\t",
  1240. esp_dev->disconnect ? "yes" : "no");
  1241. copy_info(&info, "%s\n",
  1242. (esp->config3[id] & ESP_CONFIG3_EWIDE) ? "yes" : "no");
  1243. }
  1244. return info.pos > info.offset? info.pos - info.offset : 0;
  1245. }
  1246. /* ESP proc filesystem code. */
  1247. static int esp_proc_info(struct Scsi_Host *host, char *buffer, char **start, off_t offset,
  1248. int length, int inout)
  1249. {
  1250. struct esp *esp;
  1251. if (inout)
  1252. return -EINVAL; /* not yet */
  1253. for_each_esp(esp) {
  1254. if (esp->ehost == host)
  1255. break;
  1256. }
  1257. if (!esp)
  1258. return -EINVAL;
  1259. if (start)
  1260. *start = buffer;
  1261. return esp_host_info(esp, buffer, offset, length);
  1262. }
  1263. static void esp_get_dmabufs(struct esp *esp, struct scsi_cmnd *sp)
  1264. {
  1265. if (sp->use_sg == 0) {
  1266. sp->SCp.this_residual = sp->request_bufflen;
  1267. sp->SCp.buffer = (struct scatterlist *) sp->request_buffer;
  1268. sp->SCp.buffers_residual = 0;
  1269. if (sp->request_bufflen) {
  1270. sp->SCp.have_data_in = sbus_map_single(esp->sdev, sp->SCp.buffer,
  1271. sp->SCp.this_residual,
  1272. sp->sc_data_direction);
  1273. sp->SCp.ptr = (char *) ((unsigned long)sp->SCp.have_data_in);
  1274. } else {
  1275. sp->SCp.ptr = NULL;
  1276. }
  1277. } else {
  1278. sp->SCp.buffer = (struct scatterlist *) sp->buffer;
  1279. sp->SCp.buffers_residual = sbus_map_sg(esp->sdev,
  1280. sp->SCp.buffer,
  1281. sp->use_sg,
  1282. sp->sc_data_direction);
  1283. sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer);
  1284. sp->SCp.ptr = (char *) ((unsigned long)sg_dma_address(sp->SCp.buffer));
  1285. }
  1286. }
  1287. static void esp_release_dmabufs(struct esp *esp, struct scsi_cmnd *sp)
  1288. {
  1289. if (sp->use_sg) {
  1290. sbus_unmap_sg(esp->sdev, sp->buffer, sp->use_sg,
  1291. sp->sc_data_direction);
  1292. } else if (sp->request_bufflen) {
  1293. sbus_unmap_single(esp->sdev,
  1294. sp->SCp.have_data_in,
  1295. sp->request_bufflen,
  1296. sp->sc_data_direction);
  1297. }
  1298. }
  1299. static void esp_restore_pointers(struct esp *esp, struct scsi_cmnd *sp)
  1300. {
  1301. struct esp_pointers *ep = &esp->data_pointers[sp->device->id];
  1302. sp->SCp.ptr = ep->saved_ptr;
  1303. sp->SCp.buffer = ep->saved_buffer;
  1304. sp->SCp.this_residual = ep->saved_this_residual;
  1305. sp->SCp.buffers_residual = ep->saved_buffers_residual;
  1306. }
  1307. static void esp_save_pointers(struct esp *esp, struct scsi_cmnd *sp)
  1308. {
  1309. struct esp_pointers *ep = &esp->data_pointers[sp->device->id];
  1310. ep->saved_ptr = sp->SCp.ptr;
  1311. ep->saved_buffer = sp->SCp.buffer;
  1312. ep->saved_this_residual = sp->SCp.this_residual;
  1313. ep->saved_buffers_residual = sp->SCp.buffers_residual;
  1314. }
  1315. /* Some rules:
  1316. *
  1317. * 1) Never ever panic while something is live on the bus.
  1318. * If there is to be any chance of syncing the disks this
  1319. * rule is to be obeyed.
  1320. *
  1321. * 2) Any target that causes a foul condition will no longer
  1322. * have synchronous transfers done to it, no questions
  1323. * asked.
  1324. *
  1325. * 3) Keep register accesses to a minimum. Think about some
  1326. * day when we have Xbus machines this is running on and
  1327. * the ESP chip is on the other end of the machine on a
  1328. * different board from the cpu where this is running.
  1329. */
  1330. /* Fire off a command. We assume the bus is free and that the only
  1331. * case where we could see an interrupt is where we have disconnected
  1332. * commands active and they are trying to reselect us.
  1333. */
  1334. static inline void esp_check_cmd(struct esp *esp, struct scsi_cmnd *sp)
  1335. {
  1336. switch (sp->cmd_len) {
  1337. case 6:
  1338. case 10:
  1339. case 12:
  1340. esp->esp_slowcmd = 0;
  1341. break;
  1342. default:
  1343. esp->esp_slowcmd = 1;
  1344. esp->esp_scmdleft = sp->cmd_len;
  1345. esp->esp_scmdp = &sp->cmnd[0];
  1346. break;
  1347. };
  1348. }
  1349. static inline void build_sync_nego_msg(struct esp *esp, int period, int offset)
  1350. {
  1351. esp->cur_msgout[0] = EXTENDED_MESSAGE;
  1352. esp->cur_msgout[1] = 3;
  1353. esp->cur_msgout[2] = EXTENDED_SDTR;
  1354. esp->cur_msgout[3] = period;
  1355. esp->cur_msgout[4] = offset;
  1356. esp->msgout_len = 5;
  1357. }
  1358. /* SIZE is in bits, currently HME only supports 16 bit wide transfers. */
  1359. static inline void build_wide_nego_msg(struct esp *esp, int size)
  1360. {
  1361. esp->cur_msgout[0] = EXTENDED_MESSAGE;
  1362. esp->cur_msgout[1] = 2;
  1363. esp->cur_msgout[2] = EXTENDED_WDTR;
  1364. switch (size) {
  1365. case 32:
  1366. esp->cur_msgout[3] = 2;
  1367. break;
  1368. case 16:
  1369. esp->cur_msgout[3] = 1;
  1370. break;
  1371. case 8:
  1372. default:
  1373. esp->cur_msgout[3] = 0;
  1374. break;
  1375. };
  1376. esp->msgout_len = 4;
  1377. }
  1378. static void esp_exec_cmd(struct esp *esp)
  1379. {
  1380. struct scsi_cmnd *SCptr;
  1381. struct scsi_device *SDptr;
  1382. struct esp_device *esp_dev;
  1383. volatile u8 *cmdp = esp->esp_command;
  1384. u8 the_esp_command;
  1385. int lun, target;
  1386. int i;
  1387. /* Hold off if we have disconnected commands and
  1388. * an IRQ is showing...
  1389. */
  1390. if (esp->disconnected_SC && ESP_IRQ_P(esp->dregs))
  1391. return;
  1392. /* Grab first member of the issue queue. */
  1393. SCptr = esp->current_SC = remove_first_SC(&esp->issue_SC);
  1394. /* Safe to panic here because current_SC is null. */
  1395. if (!SCptr)
  1396. panic("esp: esp_exec_cmd and issue queue is NULL");
  1397. SDptr = SCptr->device;
  1398. esp_dev = SDptr->hostdata;
  1399. lun = SCptr->device->lun;
  1400. target = SCptr->device->id;
  1401. esp->snip = 0;
  1402. esp->msgout_len = 0;
  1403. /* Send it out whole, or piece by piece? The ESP
  1404. * only knows how to automatically send out 6, 10,
  1405. * and 12 byte commands. I used to think that the
  1406. * Linux SCSI code would never throw anything other
  1407. * than that to us, but then again there is the
  1408. * SCSI generic driver which can send us anything.
  1409. */
  1410. esp_check_cmd(esp, SCptr);
  1411. /* If arbitration/selection is successful, the ESP will leave
  1412. * ATN asserted, causing the target to go into message out
  1413. * phase. The ESP will feed the target the identify and then
  1414. * the target can only legally go to one of command,
  1415. * datain/out, status, or message in phase, or stay in message
  1416. * out phase (should we be trying to send a sync negotiation
  1417. * message after the identify). It is not allowed to drop
  1418. * BSY, but some buggy targets do and we check for this
  1419. * condition in the selection complete code. Most of the time
  1420. * we'll make the command bytes available to the ESP and it
  1421. * will not interrupt us until it finishes command phase, we
  1422. * cannot do this for command sizes the ESP does not
  1423. * understand and in this case we'll get interrupted right
  1424. * when the target goes into command phase.
  1425. *
  1426. * It is absolutely _illegal_ in the presence of SCSI-2 devices
  1427. * to use the ESP select w/o ATN command. When SCSI-2 devices are
  1428. * present on the bus we _must_ always go straight to message out
  1429. * phase with an identify message for the target. Being that
  1430. * selection attempts in SCSI-1 w/o ATN was an option, doing SCSI-2
  1431. * selections should not confuse SCSI-1 we hope.
  1432. */
  1433. if (esp_dev->sync) {
  1434. /* this targets sync is known */
  1435. #ifndef __sparc_v9__
  1436. do_sync_known:
  1437. #endif
  1438. if (esp_dev->disconnect)
  1439. *cmdp++ = IDENTIFY(1, lun);
  1440. else
  1441. *cmdp++ = IDENTIFY(0, lun);
  1442. if (esp->esp_slowcmd) {
  1443. the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
  1444. esp_advance_phase(SCptr, in_slct_stop);
  1445. } else {
  1446. the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
  1447. esp_advance_phase(SCptr, in_slct_norm);
  1448. }
  1449. } else if (!(esp->targets_present & (1<<target)) || !(esp_dev->disconnect)) {
  1450. /* After the bootup SCSI code sends both the
  1451. * TEST_UNIT_READY and INQUIRY commands we want
  1452. * to at least attempt allowing the device to
  1453. * disconnect.
  1454. */
  1455. ESPMISC(("esp: Selecting device for first time. target=%d "
  1456. "lun=%d\n", target, SCptr->device->lun));
  1457. if (!SDptr->borken && !esp_dev->disconnect)
  1458. esp_dev->disconnect = 1;
  1459. *cmdp++ = IDENTIFY(0, lun);
  1460. esp->prevmsgout = NOP;
  1461. esp_advance_phase(SCptr, in_slct_norm);
  1462. the_esp_command = (ESP_CMD_SELA | ESP_CMD_DMA);
  1463. /* Take no chances... */
  1464. esp_dev->sync_max_offset = 0;
  1465. esp_dev->sync_min_period = 0;
  1466. } else {
  1467. /* Sorry, I have had way too many problems with
  1468. * various CDROM devices on ESP. -DaveM
  1469. */
  1470. int cdrom_hwbug_wkaround = 0;
  1471. #ifndef __sparc_v9__
  1472. /* Never allow disconnects or synchronous transfers on
  1473. * SparcStation1 and SparcStation1+. Allowing those
  1474. * to be enabled seems to lockup the machine completely.
  1475. */
  1476. if ((idprom->id_machtype == (SM_SUN4C | SM_4C_SS1)) ||
  1477. (idprom->id_machtype == (SM_SUN4C | SM_4C_SS1PLUS))) {
  1478. /* But we are nice and allow tapes and removable
  1479. * disks (but not CDROMs) to disconnect.
  1480. */
  1481. if(SDptr->type == TYPE_TAPE ||
  1482. (SDptr->type != TYPE_ROM && SDptr->removable))
  1483. esp_dev->disconnect = 1;
  1484. else
  1485. esp_dev->disconnect = 0;
  1486. esp_dev->sync_max_offset = 0;
  1487. esp_dev->sync_min_period = 0;
  1488. esp_dev->sync = 1;
  1489. esp->snip = 0;
  1490. goto do_sync_known;
  1491. }
  1492. #endif /* !(__sparc_v9__) */
  1493. /* We've talked to this guy before,
  1494. * but never negotiated. Let's try,
  1495. * need to attempt WIDE first, before
  1496. * sync nego, as per SCSI 2 standard.
  1497. */
  1498. if (esp->erev == fashme && !esp_dev->wide) {
  1499. if (!SDptr->borken &&
  1500. SDptr->type != TYPE_ROM &&
  1501. SDptr->removable == 0) {
  1502. build_wide_nego_msg(esp, 16);
  1503. esp_dev->wide = 1;
  1504. esp->wnip = 1;
  1505. goto after_nego_msg_built;
  1506. } else {
  1507. esp_dev->wide = 1;
  1508. /* Fall through and try sync. */
  1509. }
  1510. }
  1511. if (!SDptr->borken) {
  1512. if ((SDptr->type == TYPE_ROM)) {
  1513. /* Nice try sucker... */
  1514. ESPMISC(("esp%d: Disabling sync for buggy "
  1515. "CDROM.\n", esp->esp_id));
  1516. cdrom_hwbug_wkaround = 1;
  1517. build_sync_nego_msg(esp, 0, 0);
  1518. } else if (SDptr->removable != 0) {
  1519. ESPMISC(("esp%d: Not negotiating sync/wide but "
  1520. "allowing disconnect for removable media.\n",
  1521. esp->esp_id));
  1522. build_sync_nego_msg(esp, 0, 0);
  1523. } else {
  1524. build_sync_nego_msg(esp, esp->sync_defp, 15);
  1525. }
  1526. } else {
  1527. build_sync_nego_msg(esp, 0, 0);
  1528. }
  1529. esp_dev->sync = 1;
  1530. esp->snip = 1;
  1531. after_nego_msg_built:
  1532. /* A fix for broken SCSI1 targets, when they disconnect
  1533. * they lock up the bus and confuse ESP. So disallow
  1534. * disconnects for SCSI1 targets for now until we
  1535. * find a better fix.
  1536. *
  1537. * Addendum: This is funny, I figured out what was going
  1538. * on. The blotzed SCSI1 target would disconnect,
  1539. * one of the other SCSI2 targets or both would be
  1540. * disconnected as well. The SCSI1 target would
  1541. * stay disconnected long enough that we start
  1542. * up a command on one of the SCSI2 targets. As
  1543. * the ESP is arbitrating for the bus the SCSI1
  1544. * target begins to arbitrate as well to reselect
  1545. * the ESP. The SCSI1 target refuses to drop it's
  1546. * ID bit on the data bus even though the ESP is
  1547. * at ID 7 and is the obvious winner for any
  1548. * arbitration. The ESP is a poor sport and refuses
  1549. * to lose arbitration, it will continue indefinitely
  1550. * trying to arbitrate for the bus and can only be
  1551. * stopped via a chip reset or SCSI bus reset.
  1552. * Therefore _no_ disconnects for SCSI1 targets
  1553. * thank you very much. ;-)
  1554. */
  1555. if(((SDptr->scsi_level < 3) &&
  1556. (SDptr->type != TYPE_TAPE) &&
  1557. SDptr->removable == 0) ||
  1558. cdrom_hwbug_wkaround || SDptr->borken) {
  1559. ESPMISC((KERN_INFO "esp%d: Disabling DISCONNECT for target %d "
  1560. "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun));
  1561. esp_dev->disconnect = 0;
  1562. *cmdp++ = IDENTIFY(0, lun);
  1563. } else {
  1564. *cmdp++ = IDENTIFY(1, lun);
  1565. }
  1566. /* ESP fifo is only so big...
  1567. * Make this look like a slow command.
  1568. */
  1569. esp->esp_slowcmd = 1;
  1570. esp->esp_scmdleft = SCptr->cmd_len;
  1571. esp->esp_scmdp = &SCptr->cmnd[0];
  1572. the_esp_command = (ESP_CMD_SELAS | ESP_CMD_DMA);
  1573. esp_advance_phase(SCptr, in_slct_msg);
  1574. }
  1575. if (!esp->esp_slowcmd)
  1576. for (i = 0; i < SCptr->cmd_len; i++)
  1577. *cmdp++ = SCptr->cmnd[i];
  1578. /* HME sucks... */
  1579. if (esp->erev == fashme)
  1580. sbus_writeb((target & 0xf) | (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT),
  1581. esp->eregs + ESP_BUSID);
  1582. else
  1583. sbus_writeb(target & 7, esp->eregs + ESP_BUSID);
  1584. if (esp->prev_soff != esp_dev->sync_max_offset ||
  1585. esp->prev_stp != esp_dev->sync_min_period ||
  1586. (esp->erev > esp100a &&
  1587. esp->prev_cfg3 != esp->config3[target])) {
  1588. esp->prev_soff = esp_dev->sync_max_offset;
  1589. esp->prev_stp = esp_dev->sync_min_period;
  1590. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  1591. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  1592. if (esp->erev > esp100a) {
  1593. esp->prev_cfg3 = esp->config3[target];
  1594. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  1595. }
  1596. }
  1597. i = (cmdp - esp->esp_command);
  1598. if (esp->erev == fashme) {
  1599. esp_cmd(esp, ESP_CMD_FLUSH); /* Grrr! */
  1600. /* Set up the DMA and HME counters */
  1601. sbus_writeb(i, esp->eregs + ESP_TCLOW);
  1602. sbus_writeb(0, esp->eregs + ESP_TCMED);
  1603. sbus_writeb(0, esp->eregs + FAS_RLO);
  1604. sbus_writeb(0, esp->eregs + FAS_RHI);
  1605. esp_cmd(esp, the_esp_command);
  1606. /* Talk about touchy hardware... */
  1607. esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
  1608. (DMA_SCSI_DISAB | DMA_ENABLE)) &
  1609. ~(DMA_ST_WRITE));
  1610. sbus_writel(16, esp->dregs + DMA_COUNT);
  1611. sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
  1612. sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
  1613. } else {
  1614. u32 tmp;
  1615. /* Set up the DMA and ESP counters */
  1616. sbus_writeb(i, esp->eregs + ESP_TCLOW);
  1617. sbus_writeb(0, esp->eregs + ESP_TCMED);
  1618. tmp = sbus_readl(esp->dregs + DMA_CSR);
  1619. tmp &= ~DMA_ST_WRITE;
  1620. tmp |= DMA_ENABLE;
  1621. sbus_writel(tmp, esp->dregs + DMA_CSR);
  1622. if (esp->dma->revision == dvmaesc1) {
  1623. if (i) /* Workaround ESC gate array SBUS rerun bug. */
  1624. sbus_writel(PAGE_SIZE, esp->dregs + DMA_COUNT);
  1625. }
  1626. sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
  1627. /* Tell ESP to "go". */
  1628. esp_cmd(esp, the_esp_command);
  1629. }
  1630. }
  1631. /* Queue a SCSI command delivered from the mid-level Linux SCSI code. */
  1632. static int esp_queue(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
  1633. {
  1634. struct esp *esp;
  1635. /* Set up func ptr and initial driver cmd-phase. */
  1636. SCpnt->scsi_done = done;
  1637. SCpnt->SCp.phase = not_issued;
  1638. /* We use the scratch area. */
  1639. ESPQUEUE(("esp_queue: target=%d lun=%d ", SCpnt->device->id, SCpnt->device->lun));
  1640. ESPDISC(("N<%02x,%02x>", SCpnt->device->id, SCpnt->device->lun));
  1641. esp = (struct esp *) SCpnt->device->host->hostdata;
  1642. esp_get_dmabufs(esp, SCpnt);
  1643. esp_save_pointers(esp, SCpnt); /* FIXME for tag queueing */
  1644. SCpnt->SCp.Status = CHECK_CONDITION;
  1645. SCpnt->SCp.Message = 0xff;
  1646. SCpnt->SCp.sent_command = 0;
  1647. /* Place into our queue. */
  1648. if (SCpnt->cmnd[0] == REQUEST_SENSE) {
  1649. ESPQUEUE(("RQSENSE\n"));
  1650. prepend_SC(&esp->issue_SC, SCpnt);
  1651. } else {
  1652. ESPQUEUE(("\n"));
  1653. append_SC(&esp->issue_SC, SCpnt);
  1654. }
  1655. /* Run it now if we can. */
  1656. if (!esp->current_SC && !esp->resetting_bus)
  1657. esp_exec_cmd(esp);
  1658. return 0;
  1659. }
  1660. /* Dump driver state. */
  1661. static void esp_dump_cmd(struct scsi_cmnd *SCptr)
  1662. {
  1663. ESPLOG(("[tgt<%02x> lun<%02x> "
  1664. "pphase<%s> cphase<%s>]",
  1665. SCptr->device->id, SCptr->device->lun,
  1666. phase_string(SCptr->SCp.sent_command),
  1667. phase_string(SCptr->SCp.phase)));
  1668. }
  1669. static void esp_dump_state(struct esp *esp)
  1670. {
  1671. struct scsi_cmnd *SCptr = esp->current_SC;
  1672. #ifdef DEBUG_ESP_CMDS
  1673. int i;
  1674. #endif
  1675. ESPLOG(("esp%d: dumping state\n", esp->esp_id));
  1676. ESPLOG(("esp%d: dma -- cond_reg<%08x> addr<%08x>\n",
  1677. esp->esp_id,
  1678. sbus_readl(esp->dregs + DMA_CSR),
  1679. sbus_readl(esp->dregs + DMA_ADDR)));
  1680. ESPLOG(("esp%d: SW [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
  1681. esp->esp_id, esp->sreg, esp->seqreg, esp->ireg));
  1682. ESPLOG(("esp%d: HW reread [sreg<%02x> sstep<%02x> ireg<%02x>]\n",
  1683. esp->esp_id,
  1684. sbus_readb(esp->eregs + ESP_STATUS),
  1685. sbus_readb(esp->eregs + ESP_SSTEP),
  1686. sbus_readb(esp->eregs + ESP_INTRPT)));
  1687. #ifdef DEBUG_ESP_CMDS
  1688. printk("esp%d: last ESP cmds [", esp->esp_id);
  1689. i = (esp->espcmdent - 1) & 31;
  1690. printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
  1691. i = (i - 1) & 31;
  1692. printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
  1693. i = (i - 1) & 31;
  1694. printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
  1695. i = (i - 1) & 31;
  1696. printk("<"); esp_print_cmd(esp->espcmdlog[i]); printk(">");
  1697. printk("]\n");
  1698. #endif /* (DEBUG_ESP_CMDS) */
  1699. if (SCptr) {
  1700. ESPLOG(("esp%d: current command ", esp->esp_id));
  1701. esp_dump_cmd(SCptr);
  1702. }
  1703. ESPLOG(("\n"));
  1704. SCptr = esp->disconnected_SC;
  1705. ESPLOG(("esp%d: disconnected ", esp->esp_id));
  1706. while (SCptr) {
  1707. esp_dump_cmd(SCptr);
  1708. SCptr = (struct scsi_cmnd *) SCptr->host_scribble;
  1709. }
  1710. ESPLOG(("\n"));
  1711. }
  1712. /* Abort a command. The host_lock is acquired by caller. */
  1713. static int esp_abort(struct scsi_cmnd *SCptr)
  1714. {
  1715. struct esp *esp = (struct esp *) SCptr->device->host->hostdata;
  1716. int don;
  1717. ESPLOG(("esp%d: Aborting command\n", esp->esp_id));
  1718. esp_dump_state(esp);
  1719. /* Wheee, if this is the current command on the bus, the
  1720. * best we can do is assert ATN and wait for msgout phase.
  1721. * This should even fix a hung SCSI bus when we lose state
  1722. * in the driver and timeout because the eventual phase change
  1723. * will cause the ESP to (eventually) give an interrupt.
  1724. */
  1725. if (esp->current_SC == SCptr) {
  1726. esp->cur_msgout[0] = ABORT;
  1727. esp->msgout_len = 1;
  1728. esp->msgout_ctr = 0;
  1729. esp_cmd(esp, ESP_CMD_SATN);
  1730. return SUCCESS;
  1731. }
  1732. /* If it is still in the issue queue then we can safely
  1733. * call the completion routine and report abort success.
  1734. */
  1735. don = (sbus_readl(esp->dregs + DMA_CSR) & DMA_INT_ENAB);
  1736. if (don) {
  1737. ESP_INTSOFF(esp->dregs);
  1738. }
  1739. if (esp->issue_SC) {
  1740. struct scsi_cmnd **prev, *this;
  1741. for (prev = (&esp->issue_SC), this = esp->issue_SC;
  1742. this != NULL;
  1743. prev = (struct scsi_cmnd **) &(this->host_scribble),
  1744. this = (struct scsi_cmnd *) this->host_scribble) {
  1745. if (this == SCptr) {
  1746. *prev = (struct scsi_cmnd *) this->host_scribble;
  1747. this->host_scribble = NULL;
  1748. esp_release_dmabufs(esp, this);
  1749. this->result = DID_ABORT << 16;
  1750. this->scsi_done(this);
  1751. if (don)
  1752. ESP_INTSON(esp->dregs);
  1753. return SUCCESS;
  1754. }
  1755. }
  1756. }
  1757. /* Yuck, the command to abort is disconnected, it is not
  1758. * worth trying to abort it now if something else is live
  1759. * on the bus at this time. So, we let the SCSI code wait
  1760. * a little bit and try again later.
  1761. */
  1762. if (esp->current_SC) {
  1763. if (don)
  1764. ESP_INTSON(esp->dregs);
  1765. return FAILED;
  1766. }
  1767. /* It's disconnected, we have to reconnect to re-establish
  1768. * the nexus and tell the device to abort. However, we really
  1769. * cannot 'reconnect' per se. Don't try to be fancy, just
  1770. * indicate failure, which causes our caller to reset the whole
  1771. * bus.
  1772. */
  1773. if (don)
  1774. ESP_INTSON(esp->dregs);
  1775. return FAILED;
  1776. }
  1777. /* We've sent ESP_CMD_RS to the ESP, the interrupt had just
  1778. * arrived indicating the end of the SCSI bus reset. Our job
  1779. * is to clean out the command queues and begin re-execution
  1780. * of SCSI commands once more.
  1781. */
  1782. static int esp_finish_reset(struct esp *esp)
  1783. {
  1784. struct scsi_cmnd *sp = esp->current_SC;
  1785. /* Clean up currently executing command, if any. */
  1786. if (sp != NULL) {
  1787. esp->current_SC = NULL;
  1788. esp_release_dmabufs(esp, sp);
  1789. sp->result = (DID_RESET << 16);
  1790. sp->scsi_done(sp);
  1791. }
  1792. /* Clean up disconnected queue, they have been invalidated
  1793. * by the bus reset.
  1794. */
  1795. if (esp->disconnected_SC) {
  1796. while ((sp = remove_first_SC(&esp->disconnected_SC)) != NULL) {
  1797. esp_release_dmabufs(esp, sp);
  1798. sp->result = (DID_RESET << 16);
  1799. sp->scsi_done(sp);
  1800. }
  1801. }
  1802. /* SCSI bus reset is complete. */
  1803. esp->resetting_bus = 0;
  1804. wake_up(&esp->reset_queue);
  1805. /* Ok, now it is safe to get commands going once more. */
  1806. if (esp->issue_SC)
  1807. esp_exec_cmd(esp);
  1808. return do_intr_end;
  1809. }
  1810. static int esp_do_resetbus(struct esp *esp)
  1811. {
  1812. ESPLOG(("esp%d: Resetting scsi bus\n", esp->esp_id));
  1813. esp->resetting_bus = 1;
  1814. esp_cmd(esp, ESP_CMD_RS);
  1815. return do_intr_end;
  1816. }
  1817. /* Reset ESP chip, reset hanging bus, then kill active and
  1818. * disconnected commands for targets without soft reset.
  1819. *
  1820. * The host_lock is acquired by caller.
  1821. */
  1822. static int esp_reset(struct scsi_cmnd *SCptr)
  1823. {
  1824. struct esp *esp = (struct esp *) SCptr->device->host->hostdata;
  1825. spin_lock_irq(esp->ehost->host_lock);
  1826. (void) esp_do_resetbus(esp);
  1827. spin_unlock_irq(esp->ehost->host_lock);
  1828. wait_event(esp->reset_queue, (esp->resetting_bus == 0));
  1829. return SUCCESS;
  1830. }
  1831. /* Internal ESP done function. */
  1832. static void esp_done(struct esp *esp, int error)
  1833. {
  1834. struct scsi_cmnd *done_SC = esp->current_SC;
  1835. esp->current_SC = NULL;
  1836. esp_release_dmabufs(esp, done_SC);
  1837. done_SC->result = error;
  1838. done_SC->scsi_done(done_SC);
  1839. /* Bus is free, issue any commands in the queue. */
  1840. if (esp->issue_SC && !esp->current_SC)
  1841. esp_exec_cmd(esp);
  1842. }
  1843. /* Wheee, ESP interrupt engine. */
  1844. /* Forward declarations. */
  1845. static int esp_do_phase_determine(struct esp *esp);
  1846. static int esp_do_data_finale(struct esp *esp);
  1847. static int esp_select_complete(struct esp *esp);
  1848. static int esp_do_status(struct esp *esp);
  1849. static int esp_do_msgin(struct esp *esp);
  1850. static int esp_do_msgindone(struct esp *esp);
  1851. static int esp_do_msgout(struct esp *esp);
  1852. static int esp_do_cmdbegin(struct esp *esp);
  1853. #define sreg_datainp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DIP)
  1854. #define sreg_dataoutp(__sreg) (((__sreg) & ESP_STAT_PMASK) == ESP_DOP)
  1855. /* Read any bytes found in the FAS366 fifo, storing them into
  1856. * the ESP driver software state structure.
  1857. */
  1858. static void hme_fifo_read(struct esp *esp)
  1859. {
  1860. u8 count = 0;
  1861. u8 status = esp->sreg;
  1862. /* Cannot safely frob the fifo for these following cases, but
  1863. * we must always read the fifo when the reselect interrupt
  1864. * is pending.
  1865. */
  1866. if (((esp->ireg & ESP_INTR_RSEL) == 0) &&
  1867. (sreg_datainp(status) ||
  1868. sreg_dataoutp(status) ||
  1869. (esp->current_SC &&
  1870. esp->current_SC->SCp.phase == in_data_done))) {
  1871. ESPHME(("<wkaround_skipped>"));
  1872. } else {
  1873. unsigned long fcnt = sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES;
  1874. /* The HME stores bytes in multiples of 2 in the fifo. */
  1875. ESPHME(("hme_fifo[fcnt=%d", (int)fcnt));
  1876. while (fcnt) {
  1877. esp->hme_fifo_workaround_buffer[count++] =
  1878. sbus_readb(esp->eregs + ESP_FDATA);
  1879. esp->hme_fifo_workaround_buffer[count++] =
  1880. sbus_readb(esp->eregs + ESP_FDATA);
  1881. ESPHME(("<%02x,%02x>", esp->hme_fifo_workaround_buffer[count-2], esp->hme_fifo_workaround_buffer[count-1]));
  1882. fcnt--;
  1883. }
  1884. if (sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_F1BYTE) {
  1885. ESPHME(("<poke_byte>"));
  1886. sbus_writeb(0, esp->eregs + ESP_FDATA);
  1887. esp->hme_fifo_workaround_buffer[count++] =
  1888. sbus_readb(esp->eregs + ESP_FDATA);
  1889. ESPHME(("<%02x,0x00>", esp->hme_fifo_workaround_buffer[count-1]));
  1890. ESPHME(("CMD_FLUSH"));
  1891. esp_cmd(esp, ESP_CMD_FLUSH);
  1892. } else {
  1893. ESPHME(("no_xtra_byte"));
  1894. }
  1895. }
  1896. ESPHME(("wkarnd_cnt=%d]", (int)count));
  1897. esp->hme_fifo_workaround_count = count;
  1898. }
  1899. static inline void hme_fifo_push(struct esp *esp, u8 *bytes, u8 count)
  1900. {
  1901. esp_cmd(esp, ESP_CMD_FLUSH);
  1902. while (count) {
  1903. u8 tmp = *bytes++;
  1904. sbus_writeb(tmp, esp->eregs + ESP_FDATA);
  1905. sbus_writeb(0, esp->eregs + ESP_FDATA);
  1906. count--;
  1907. }
  1908. }
  1909. /* We try to avoid some interrupts by jumping ahead and see if the ESP
  1910. * has gotten far enough yet. Hence the following.
  1911. */
  1912. static inline int skipahead1(struct esp *esp, struct scsi_cmnd *scp,
  1913. int prev_phase, int new_phase)
  1914. {
  1915. if (scp->SCp.sent_command != prev_phase)
  1916. return 0;
  1917. if (ESP_IRQ_P(esp->dregs)) {
  1918. /* Yes, we are able to save an interrupt. */
  1919. if (esp->erev == fashme)
  1920. esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
  1921. esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR));
  1922. esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
  1923. if (esp->erev == fashme) {
  1924. /* This chip is really losing. */
  1925. ESPHME(("HME["));
  1926. /* Must latch fifo before reading the interrupt
  1927. * register else garbage ends up in the FIFO
  1928. * which confuses the driver utterly.
  1929. * Happy Meal indeed....
  1930. */
  1931. ESPHME(("fifo_workaround]"));
  1932. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  1933. (esp->sreg2 & ESP_STAT2_F1BYTE))
  1934. hme_fifo_read(esp);
  1935. }
  1936. if (!(esp->ireg & ESP_INTR_SR))
  1937. return 0;
  1938. else
  1939. return do_reset_complete;
  1940. }
  1941. /* Ho hum, target is taking forever... */
  1942. scp->SCp.sent_command = new_phase; /* so we don't recurse... */
  1943. return do_intr_end;
  1944. }
  1945. static inline int skipahead2(struct esp *esp, struct scsi_cmnd *scp,
  1946. int prev_phase1, int prev_phase2, int new_phase)
  1947. {
  1948. if (scp->SCp.sent_command != prev_phase1 &&
  1949. scp->SCp.sent_command != prev_phase2)
  1950. return 0;
  1951. if (ESP_IRQ_P(esp->dregs)) {
  1952. /* Yes, we are able to save an interrupt. */
  1953. if (esp->erev == fashme)
  1954. esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
  1955. esp->sreg = (sbus_readb(esp->eregs + ESP_STATUS) & ~(ESP_STAT_INTR));
  1956. esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
  1957. if (esp->erev == fashme) {
  1958. /* This chip is really losing. */
  1959. ESPHME(("HME["));
  1960. /* Must latch fifo before reading the interrupt
  1961. * register else garbage ends up in the FIFO
  1962. * which confuses the driver utterly.
  1963. * Happy Meal indeed....
  1964. */
  1965. ESPHME(("fifo_workaround]"));
  1966. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  1967. (esp->sreg2 & ESP_STAT2_F1BYTE))
  1968. hme_fifo_read(esp);
  1969. }
  1970. if (!(esp->ireg & ESP_INTR_SR))
  1971. return 0;
  1972. else
  1973. return do_reset_complete;
  1974. }
  1975. /* Ho hum, target is taking forever... */
  1976. scp->SCp.sent_command = new_phase; /* so we don't recurse... */
  1977. return do_intr_end;
  1978. }
  1979. /* Now some dma helpers. */
  1980. static void dma_setup(struct esp *esp, __u32 addr, int count, int write)
  1981. {
  1982. u32 nreg = sbus_readl(esp->dregs + DMA_CSR);
  1983. if (write)
  1984. nreg |= DMA_ST_WRITE;
  1985. else
  1986. nreg &= ~(DMA_ST_WRITE);
  1987. nreg |= DMA_ENABLE;
  1988. sbus_writel(nreg, esp->dregs + DMA_CSR);
  1989. if (esp->dma->revision == dvmaesc1) {
  1990. /* This ESC gate array sucks! */
  1991. __u32 src = addr;
  1992. __u32 dest = src + count;
  1993. if (dest & (PAGE_SIZE - 1))
  1994. count = PAGE_ALIGN(count);
  1995. sbus_writel(count, esp->dregs + DMA_COUNT);
  1996. }
  1997. sbus_writel(addr, esp->dregs + DMA_ADDR);
  1998. }
  1999. static void dma_drain(struct esp *esp)
  2000. {
  2001. u32 tmp;
  2002. if (esp->dma->revision == dvmahme)
  2003. return;
  2004. if ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_FIFO_ISDRAIN) {
  2005. switch (esp->dma->revision) {
  2006. default:
  2007. tmp |= DMA_FIFO_STDRAIN;
  2008. sbus_writel(tmp, esp->dregs + DMA_CSR);
  2009. case dvmarev3:
  2010. case dvmaesc1:
  2011. while (sbus_readl(esp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
  2012. udelay(1);
  2013. };
  2014. }
  2015. }
  2016. static void dma_invalidate(struct esp *esp)
  2017. {
  2018. u32 tmp;
  2019. if (esp->dma->revision == dvmahme) {
  2020. sbus_writel(DMA_RST_SCSI, esp->dregs + DMA_CSR);
  2021. esp->prev_hme_dmacsr = ((esp->prev_hme_dmacsr |
  2022. (DMA_PARITY_OFF | DMA_2CLKS |
  2023. DMA_SCSI_DISAB | DMA_INT_ENAB)) &
  2024. ~(DMA_ST_WRITE | DMA_ENABLE));
  2025. sbus_writel(0, esp->dregs + DMA_CSR);
  2026. sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
  2027. /* This is necessary to avoid having the SCSI channel
  2028. * engine lock up on us.
  2029. */
  2030. sbus_writel(0, esp->dregs + DMA_ADDR);
  2031. } else {
  2032. while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ)
  2033. udelay(1);
  2034. tmp &= ~(DMA_ENABLE | DMA_ST_WRITE | DMA_BCNT_ENAB);
  2035. tmp |= DMA_FIFO_INV;
  2036. sbus_writel(tmp, esp->dregs + DMA_CSR);
  2037. tmp &= ~DMA_FIFO_INV;
  2038. sbus_writel(tmp, esp->dregs + DMA_CSR);
  2039. }
  2040. }
  2041. static inline void dma_flashclear(struct esp *esp)
  2042. {
  2043. dma_drain(esp);
  2044. dma_invalidate(esp);
  2045. }
  2046. static int dma_can_transfer(struct esp *esp, struct scsi_cmnd *sp)
  2047. {
  2048. __u32 base, end, sz;
  2049. if (esp->dma->revision == dvmarev3) {
  2050. sz = sp->SCp.this_residual;
  2051. if (sz > 0x1000000)
  2052. sz = 0x1000000;
  2053. } else {
  2054. base = ((__u32)((unsigned long)sp->SCp.ptr));
  2055. base &= (0x1000000 - 1);
  2056. end = (base + sp->SCp.this_residual);
  2057. if (end > 0x1000000)
  2058. end = 0x1000000;
  2059. sz = (end - base);
  2060. }
  2061. return sz;
  2062. }
  2063. /* Misc. esp helper macros. */
  2064. #define esp_setcount(__eregs, __cnt, __hme) \
  2065. sbus_writeb(((__cnt)&0xff), (__eregs) + ESP_TCLOW); \
  2066. sbus_writeb((((__cnt)>>8)&0xff), (__eregs) + ESP_TCMED); \
  2067. if (__hme) { \
  2068. sbus_writeb((((__cnt)>>16)&0xff), (__eregs) + FAS_RLO); \
  2069. sbus_writeb(0, (__eregs) + FAS_RHI); \
  2070. }
  2071. #define esp_getcount(__eregs, __hme) \
  2072. ((sbus_readb((__eregs) + ESP_TCLOW)&0xff) | \
  2073. ((sbus_readb((__eregs) + ESP_TCMED)&0xff) << 8) | \
  2074. ((__hme) ? sbus_readb((__eregs) + FAS_RLO) << 16 : 0))
  2075. #define fcount(__esp) \
  2076. (((__esp)->erev == fashme) ? \
  2077. (__esp)->hme_fifo_workaround_count : \
  2078. sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_FBYTES)
  2079. #define fnzero(__esp) \
  2080. (((__esp)->erev == fashme) ? 0 : \
  2081. sbus_readb(((__esp)->eregs) + ESP_FFLAGS) & ESP_FF_ONOTZERO)
  2082. /* XXX speculative nops unnecessary when continuing amidst a data phase
  2083. * XXX even on esp100!!! another case of flooding the bus with I/O reg
  2084. * XXX writes...
  2085. */
  2086. #define esp_maybe_nop(__esp) \
  2087. if ((__esp)->erev == esp100) \
  2088. esp_cmd((__esp), ESP_CMD_NULL)
  2089. #define sreg_to_dataphase(__sreg) \
  2090. ((((__sreg) & ESP_STAT_PMASK) == ESP_DOP) ? in_dataout : in_datain)
  2091. /* The ESP100 when in synchronous data phase, can mistake a long final
  2092. * REQ pulse from the target as an extra byte, it places whatever is on
  2093. * the data lines into the fifo. For now, we will assume when this
  2094. * happens that the target is a bit quirky and we don't want to
  2095. * be talking synchronously to it anyways. Regardless, we need to
  2096. * tell the ESP to eat the extraneous byte so that we can proceed
  2097. * to the next phase.
  2098. */
  2099. static int esp100_sync_hwbug(struct esp *esp, struct scsi_cmnd *sp, int fifocnt)
  2100. {
  2101. /* Do not touch this piece of code. */
  2102. if ((!(esp->erev == esp100)) ||
  2103. (!(sreg_datainp((esp->sreg = sbus_readb(esp->eregs + ESP_STATUS))) &&
  2104. !fifocnt) &&
  2105. !(sreg_dataoutp(esp->sreg) && !fnzero(esp)))) {
  2106. if (sp->SCp.phase == in_dataout)
  2107. esp_cmd(esp, ESP_CMD_FLUSH);
  2108. return 0;
  2109. } else {
  2110. /* Async mode for this guy. */
  2111. build_sync_nego_msg(esp, 0, 0);
  2112. /* Ack the bogus byte, but set ATN first. */
  2113. esp_cmd(esp, ESP_CMD_SATN);
  2114. esp_cmd(esp, ESP_CMD_MOK);
  2115. return 1;
  2116. }
  2117. }
  2118. /* This closes the window during a selection with a reselect pending, because
  2119. * we use DMA for the selection process the FIFO should hold the correct
  2120. * contents if we get reselected during this process. So we just need to
  2121. * ack the possible illegal cmd interrupt pending on the esp100.
  2122. */
  2123. static inline int esp100_reconnect_hwbug(struct esp *esp)
  2124. {
  2125. u8 tmp;
  2126. if (esp->erev != esp100)
  2127. return 0;
  2128. tmp = sbus_readb(esp->eregs + ESP_INTRPT);
  2129. if (tmp & ESP_INTR_SR)
  2130. return 1;
  2131. return 0;
  2132. }
  2133. /* This verifies the BUSID bits during a reselection so that we know which
  2134. * target is talking to us.
  2135. */
  2136. static inline int reconnect_target(struct esp *esp)
  2137. {
  2138. int it, me = esp->scsi_id_mask, targ = 0;
  2139. if (2 != fcount(esp))
  2140. return -1;
  2141. if (esp->erev == fashme) {
  2142. /* HME does not latch it's own BUS ID bits during
  2143. * a reselection. Also the target number is given
  2144. * as an unsigned char, not as a sole bit number
  2145. * like the other ESP's do.
  2146. * Happy Meal indeed....
  2147. */
  2148. targ = esp->hme_fifo_workaround_buffer[0];
  2149. } else {
  2150. it = sbus_readb(esp->eregs + ESP_FDATA);
  2151. if (!(it & me))
  2152. return -1;
  2153. it &= ~me;
  2154. if (it & (it - 1))
  2155. return -1;
  2156. while (!(it & 1))
  2157. targ++, it >>= 1;
  2158. }
  2159. return targ;
  2160. }
  2161. /* This verifies the identify from the target so that we know which lun is
  2162. * being reconnected.
  2163. */
  2164. static inline int reconnect_lun(struct esp *esp)
  2165. {
  2166. int lun;
  2167. if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP)
  2168. return -1;
  2169. if (esp->erev == fashme)
  2170. lun = esp->hme_fifo_workaround_buffer[1];
  2171. else
  2172. lun = sbus_readb(esp->eregs + ESP_FDATA);
  2173. /* Yes, you read this correctly. We report lun of zero
  2174. * if we see parity error. ESP reports parity error for
  2175. * the lun byte, and this is the only way to hope to recover
  2176. * because the target is connected.
  2177. */
  2178. if (esp->sreg & ESP_STAT_PERR)
  2179. return 0;
  2180. /* Check for illegal bits being set in the lun. */
  2181. if ((lun & 0x40) || !(lun & 0x80))
  2182. return -1;
  2183. return lun & 7;
  2184. }
  2185. /* This puts the driver in a state where it can revitalize a command that
  2186. * is being continued due to reselection.
  2187. */
  2188. static inline void esp_connect(struct esp *esp, struct scsi_cmnd *sp)
  2189. {
  2190. struct esp_device *esp_dev = sp->device->hostdata;
  2191. if (esp->prev_soff != esp_dev->sync_max_offset ||
  2192. esp->prev_stp != esp_dev->sync_min_period ||
  2193. (esp->erev > esp100a &&
  2194. esp->prev_cfg3 != esp->config3[sp->device->id])) {
  2195. esp->prev_soff = esp_dev->sync_max_offset;
  2196. esp->prev_stp = esp_dev->sync_min_period;
  2197. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  2198. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  2199. if (esp->erev > esp100a) {
  2200. esp->prev_cfg3 = esp->config3[sp->device->id];
  2201. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  2202. }
  2203. }
  2204. esp->current_SC = sp;
  2205. }
  2206. /* This will place the current working command back into the issue queue
  2207. * if we are to receive a reselection amidst a selection attempt.
  2208. */
  2209. static inline void esp_reconnect(struct esp *esp, struct scsi_cmnd *sp)
  2210. {
  2211. if (!esp->disconnected_SC)
  2212. ESPLOG(("esp%d: Weird, being reselected but disconnected "
  2213. "command queue is empty.\n", esp->esp_id));
  2214. esp->snip = 0;
  2215. esp->current_SC = NULL;
  2216. sp->SCp.phase = not_issued;
  2217. append_SC(&esp->issue_SC, sp);
  2218. }
  2219. /* Begin message in phase. */
  2220. static int esp_do_msgin(struct esp *esp)
  2221. {
  2222. /* Must be very careful with the fifo on the HME */
  2223. if ((esp->erev != fashme) ||
  2224. !(sbus_readb(esp->eregs + ESP_STATUS2) & ESP_STAT2_FEMPTY))
  2225. esp_cmd(esp, ESP_CMD_FLUSH);
  2226. esp_maybe_nop(esp);
  2227. esp_cmd(esp, ESP_CMD_TI);
  2228. esp->msgin_len = 1;
  2229. esp->msgin_ctr = 0;
  2230. esp_advance_phase(esp->current_SC, in_msgindone);
  2231. return do_work_bus;
  2232. }
  2233. /* This uses various DMA csr fields and the fifo flags count value to
  2234. * determine how many bytes were successfully sent/received by the ESP.
  2235. */
  2236. static inline int esp_bytes_sent(struct esp *esp, int fifo_count)
  2237. {
  2238. int rval = sbus_readl(esp->dregs + DMA_ADDR) - esp->esp_command_dvma;
  2239. if (esp->dma->revision == dvmarev1)
  2240. rval -= (4 - ((sbus_readl(esp->dregs + DMA_CSR) & DMA_READ_AHEAD)>>11));
  2241. return rval - fifo_count;
  2242. }
  2243. static inline void advance_sg(struct scsi_cmnd *sp)
  2244. {
  2245. ++sp->SCp.buffer;
  2246. --sp->SCp.buffers_residual;
  2247. sp->SCp.this_residual = sg_dma_len(sp->SCp.buffer);
  2248. sp->SCp.ptr = (char *)((unsigned long)sg_dma_address(sp->SCp.buffer));
  2249. }
  2250. /* Please note that the way I've coded these routines is that I _always_
  2251. * check for a disconnect during any and all information transfer
  2252. * phases. The SCSI standard states that the target _can_ cause a BUS
  2253. * FREE condition by dropping all MSG/CD/IO/BSY signals. Also note
  2254. * that during information transfer phases the target controls every
  2255. * change in phase, the only thing the initiator can do is "ask" for
  2256. * a message out phase by driving ATN true. The target can, and sometimes
  2257. * will, completely ignore this request so we cannot assume anything when
  2258. * we try to force a message out phase to abort/reset a target. Most of
  2259. * the time the target will eventually be nice and go to message out, so
  2260. * we may have to hold on to our state about what we want to tell the target
  2261. * for some period of time.
  2262. */
  2263. /* I think I have things working here correctly. Even partial transfers
  2264. * within a buffer or sub-buffer should not upset us at all no matter
  2265. * how bad the target and/or ESP fucks things up.
  2266. */
  2267. static int esp_do_data(struct esp *esp)
  2268. {
  2269. struct scsi_cmnd *SCptr = esp->current_SC;
  2270. int thisphase, hmuch;
  2271. ESPDATA(("esp_do_data: "));
  2272. esp_maybe_nop(esp);
  2273. thisphase = sreg_to_dataphase(esp->sreg);
  2274. esp_advance_phase(SCptr, thisphase);
  2275. ESPDATA(("newphase<%s> ", (thisphase == in_datain) ? "DATAIN" : "DATAOUT"));
  2276. hmuch = dma_can_transfer(esp, SCptr);
  2277. if (hmuch > (64 * 1024) && (esp->erev != fashme))
  2278. hmuch = (64 * 1024);
  2279. ESPDATA(("hmuch<%d> ", hmuch));
  2280. esp->current_transfer_size = hmuch;
  2281. if (esp->erev == fashme) {
  2282. u32 tmp = esp->prev_hme_dmacsr;
  2283. /* Always set the ESP count registers first. */
  2284. esp_setcount(esp->eregs, hmuch, 1);
  2285. /* Get the DMA csr computed. */
  2286. tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
  2287. if (thisphase == in_datain)
  2288. tmp |= DMA_ST_WRITE;
  2289. else
  2290. tmp &= ~(DMA_ST_WRITE);
  2291. esp->prev_hme_dmacsr = tmp;
  2292. ESPDATA(("DMA|TI --> do_intr_end\n"));
  2293. if (thisphase == in_datain) {
  2294. sbus_writel(hmuch, esp->dregs + DMA_COUNT);
  2295. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  2296. } else {
  2297. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  2298. sbus_writel(hmuch, esp->dregs + DMA_COUNT);
  2299. }
  2300. sbus_writel((__u32)((unsigned long)SCptr->SCp.ptr), esp->dregs+DMA_ADDR);
  2301. sbus_writel(esp->prev_hme_dmacsr, esp->dregs + DMA_CSR);
  2302. } else {
  2303. esp_setcount(esp->eregs, hmuch, 0);
  2304. dma_setup(esp, ((__u32)((unsigned long)SCptr->SCp.ptr)),
  2305. hmuch, (thisphase == in_datain));
  2306. ESPDATA(("DMA|TI --> do_intr_end\n"));
  2307. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  2308. }
  2309. return do_intr_end;
  2310. }
  2311. /* See how successful the data transfer was. */
  2312. static int esp_do_data_finale(struct esp *esp)
  2313. {
  2314. struct scsi_cmnd *SCptr = esp->current_SC;
  2315. struct esp_device *esp_dev = SCptr->device->hostdata;
  2316. int bogus_data = 0, bytes_sent = 0, fifocnt, ecount = 0;
  2317. ESPDATA(("esp_do_data_finale: "));
  2318. if (SCptr->SCp.phase == in_datain) {
  2319. if (esp->sreg & ESP_STAT_PERR) {
  2320. /* Yuck, parity error. The ESP asserts ATN
  2321. * so that we can go to message out phase
  2322. * immediately and inform the target that
  2323. * something bad happened.
  2324. */
  2325. ESPLOG(("esp%d: data bad parity detected.\n",
  2326. esp->esp_id));
  2327. esp->cur_msgout[0] = INITIATOR_ERROR;
  2328. esp->msgout_len = 1;
  2329. }
  2330. dma_drain(esp);
  2331. }
  2332. dma_invalidate(esp);
  2333. /* This could happen for the above parity error case. */
  2334. if (esp->ireg != ESP_INTR_BSERV) {
  2335. /* Please go to msgout phase, please please please... */
  2336. ESPLOG(("esp%d: !BSERV after data, probably to msgout\n",
  2337. esp->esp_id));
  2338. return esp_do_phase_determine(esp);
  2339. }
  2340. /* Check for partial transfers and other horrible events.
  2341. * Note, here we read the real fifo flags register even
  2342. * on HME broken adapters because we skip the HME fifo
  2343. * workaround code in esp_handle() if we are doing data
  2344. * phase things. We don't want to fuck directly with
  2345. * the fifo like that, especially if doing synchronous
  2346. * transfers! Also, will need to double the count on
  2347. * HME if we are doing wide transfers, as the HME fifo
  2348. * will move and count 16-bit quantities during wide data.
  2349. * SMCC _and_ Qlogic can both bite me.
  2350. */
  2351. fifocnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES);
  2352. if (esp->erev != fashme)
  2353. ecount = esp_getcount(esp->eregs, 0);
  2354. bytes_sent = esp->current_transfer_size;
  2355. ESPDATA(("trans_sz(%d), ", bytes_sent));
  2356. if (esp->erev == fashme) {
  2357. if (!(esp->sreg & ESP_STAT_TCNT)) {
  2358. ecount = esp_getcount(esp->eregs, 1);
  2359. bytes_sent -= ecount;
  2360. }
  2361. /* Always subtract any cruft remaining in the FIFO. */
  2362. if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
  2363. fifocnt <<= 1;
  2364. if (SCptr->SCp.phase == in_dataout)
  2365. bytes_sent -= fifocnt;
  2366. /* I have an IBM disk which exhibits the following
  2367. * behavior during writes to it. It disconnects in
  2368. * the middle of a partial transfer, the current sglist
  2369. * buffer is 1024 bytes, the disk stops data transfer
  2370. * at 512 bytes.
  2371. *
  2372. * However the FAS366 reports that 32 more bytes were
  2373. * transferred than really were. This is precisely
  2374. * the size of a fully loaded FIFO in wide scsi mode.
  2375. * The FIFO state recorded indicates that it is empty.
  2376. *
  2377. * I have no idea if this is a bug in the FAS366 chip
  2378. * or a bug in the firmware on this IBM disk. In any
  2379. * event the following seems to be a good workaround. -DaveM
  2380. */
  2381. if (bytes_sent != esp->current_transfer_size &&
  2382. SCptr->SCp.phase == in_dataout) {
  2383. int mask = (64 - 1);
  2384. if ((esp->prev_cfg3 & ESP_CONFIG3_EWIDE) == 0)
  2385. mask >>= 1;
  2386. if (bytes_sent & mask)
  2387. bytes_sent -= (bytes_sent & mask);
  2388. }
  2389. } else {
  2390. if (!(esp->sreg & ESP_STAT_TCNT))
  2391. bytes_sent -= ecount;
  2392. if (SCptr->SCp.phase == in_dataout)
  2393. bytes_sent -= fifocnt;
  2394. }
  2395. ESPDATA(("bytes_sent(%d), ", bytes_sent));
  2396. /* If we were in synchronous mode, check for peculiarities. */
  2397. if (esp->erev == fashme) {
  2398. if (esp_dev->sync_max_offset) {
  2399. if (SCptr->SCp.phase == in_dataout)
  2400. esp_cmd(esp, ESP_CMD_FLUSH);
  2401. } else {
  2402. esp_cmd(esp, ESP_CMD_FLUSH);
  2403. }
  2404. } else {
  2405. if (esp_dev->sync_max_offset)
  2406. bogus_data = esp100_sync_hwbug(esp, SCptr, fifocnt);
  2407. else
  2408. esp_cmd(esp, ESP_CMD_FLUSH);
  2409. }
  2410. /* Until we are sure of what has happened, we are certainly
  2411. * in the dark.
  2412. */
  2413. esp_advance_phase(SCptr, in_the_dark);
  2414. if (bytes_sent < 0) {
  2415. /* I've seen this happen due to lost state in this
  2416. * driver. No idea why it happened, but allowing
  2417. * this value to be negative caused things to
  2418. * lock up. This allows greater chance of recovery.
  2419. * In fact every time I've seen this, it has been
  2420. * a driver bug without question.
  2421. */
  2422. ESPLOG(("esp%d: yieee, bytes_sent < 0!\n", esp->esp_id));
  2423. ESPLOG(("esp%d: csz=%d fifocount=%d ecount=%d\n",
  2424. esp->esp_id,
  2425. esp->current_transfer_size, fifocnt, ecount));
  2426. ESPLOG(("esp%d: use_sg=%d ptr=%p this_residual=%d\n",
  2427. esp->esp_id,
  2428. SCptr->use_sg, SCptr->SCp.ptr, SCptr->SCp.this_residual));
  2429. ESPLOG(("esp%d: Forcing async for target %d\n", esp->esp_id,
  2430. SCptr->device->id));
  2431. SCptr->device->borken = 1;
  2432. esp_dev->sync = 0;
  2433. bytes_sent = 0;
  2434. }
  2435. /* Update the state of our transfer. */
  2436. SCptr->SCp.ptr += bytes_sent;
  2437. SCptr->SCp.this_residual -= bytes_sent;
  2438. if (SCptr->SCp.this_residual < 0) {
  2439. /* shit */
  2440. ESPLOG(("esp%d: Data transfer overrun.\n", esp->esp_id));
  2441. SCptr->SCp.this_residual = 0;
  2442. }
  2443. /* Maybe continue. */
  2444. if (!bogus_data) {
  2445. ESPDATA(("!bogus_data, "));
  2446. /* NO MATTER WHAT, we advance the scatterlist,
  2447. * if the target should decide to disconnect
  2448. * in between scatter chunks (which is common)
  2449. * we could die horribly! I used to have the sg
  2450. * advance occur only if we are going back into
  2451. * (or are staying in) a data phase, you can
  2452. * imagine the hell I went through trying to
  2453. * figure this out.
  2454. */
  2455. if (SCptr->use_sg && !SCptr->SCp.this_residual)
  2456. advance_sg(SCptr);
  2457. if (sreg_datainp(esp->sreg) || sreg_dataoutp(esp->sreg)) {
  2458. ESPDATA(("to more data\n"));
  2459. return esp_do_data(esp);
  2460. }
  2461. ESPDATA(("to new phase\n"));
  2462. return esp_do_phase_determine(esp);
  2463. }
  2464. /* Bogus data, just wait for next interrupt. */
  2465. ESPLOG(("esp%d: bogus_data during end of data phase\n",
  2466. esp->esp_id));
  2467. return do_intr_end;
  2468. }
  2469. /* We received a non-good status return at the end of
  2470. * running a SCSI command. This is used to decide if
  2471. * we should clear our synchronous transfer state for
  2472. * such a device when that happens.
  2473. *
  2474. * The idea is that when spinning up a disk or rewinding
  2475. * a tape, we don't want to go into a loop re-negotiating
  2476. * synchronous capabilities over and over.
  2477. */
  2478. static int esp_should_clear_sync(struct scsi_cmnd *sp)
  2479. {
  2480. u8 cmd1 = sp->cmnd[0];
  2481. u8 cmd2 = sp->data_cmnd[0];
  2482. /* These cases are for spinning up a disk and
  2483. * waiting for that spinup to complete.
  2484. */
  2485. if (cmd1 == START_STOP ||
  2486. cmd2 == START_STOP)
  2487. return 0;
  2488. if (cmd1 == TEST_UNIT_READY ||
  2489. cmd2 == TEST_UNIT_READY)
  2490. return 0;
  2491. /* One more special case for SCSI tape drives,
  2492. * this is what is used to probe the device for
  2493. * completion of a rewind or tape load operation.
  2494. */
  2495. if (sp->device->type == TYPE_TAPE) {
  2496. if (cmd1 == MODE_SENSE ||
  2497. cmd2 == MODE_SENSE)
  2498. return 0;
  2499. }
  2500. return 1;
  2501. }
  2502. /* Either a command is completing or a target is dropping off the bus
  2503. * to continue the command in the background so we can do other work.
  2504. */
  2505. static int esp_do_freebus(struct esp *esp)
  2506. {
  2507. struct scsi_cmnd *SCptr = esp->current_SC;
  2508. struct esp_device *esp_dev = SCptr->device->hostdata;
  2509. int rval;
  2510. rval = skipahead2(esp, SCptr, in_status, in_msgindone, in_freeing);
  2511. if (rval)
  2512. return rval;
  2513. if (esp->ireg != ESP_INTR_DC) {
  2514. ESPLOG(("esp%d: Target will not disconnect\n", esp->esp_id));
  2515. return do_reset_bus; /* target will not drop BSY... */
  2516. }
  2517. esp->msgout_len = 0;
  2518. esp->prevmsgout = NOP;
  2519. if (esp->prevmsgin == COMMAND_COMPLETE) {
  2520. /* Normal end of nexus. */
  2521. if (esp->disconnected_SC || (esp->erev == fashme))
  2522. esp_cmd(esp, ESP_CMD_ESEL);
  2523. if (SCptr->SCp.Status != GOOD &&
  2524. SCptr->SCp.Status != CONDITION_GOOD &&
  2525. ((1<<SCptr->device->id) & esp->targets_present) &&
  2526. esp_dev->sync &&
  2527. esp_dev->sync_max_offset) {
  2528. /* SCSI standard says that the synchronous capabilities
  2529. * should be renegotiated at this point. Most likely
  2530. * we are about to request sense from this target
  2531. * in which case we want to avoid using sync
  2532. * transfers until we are sure of the current target
  2533. * state.
  2534. */
  2535. ESPMISC(("esp: Status <%d> for target %d lun %d\n",
  2536. SCptr->SCp.Status, SCptr->device->id, SCptr->device->lun));
  2537. /* But don't do this when spinning up a disk at
  2538. * boot time while we poll for completion as it
  2539. * fills up the console with messages. Also, tapes
  2540. * can report not ready many times right after
  2541. * loading up a tape.
  2542. */
  2543. if (esp_should_clear_sync(SCptr) != 0)
  2544. esp_dev->sync = 0;
  2545. }
  2546. ESPDISC(("F<%02x,%02x>", SCptr->device->id, SCptr->device->lun));
  2547. esp_done(esp, ((SCptr->SCp.Status & 0xff) |
  2548. ((SCptr->SCp.Message & 0xff)<<8) |
  2549. (DID_OK << 16)));
  2550. } else if (esp->prevmsgin == DISCONNECT) {
  2551. /* Normal disconnect. */
  2552. esp_cmd(esp, ESP_CMD_ESEL);
  2553. ESPDISC(("D<%02x,%02x>", SCptr->device->id, SCptr->device->lun));
  2554. append_SC(&esp->disconnected_SC, SCptr);
  2555. esp->current_SC = NULL;
  2556. if (esp->issue_SC)
  2557. esp_exec_cmd(esp);
  2558. } else {
  2559. /* Driver bug, we do not expect a disconnect here
  2560. * and should not have advanced the state engine
  2561. * to in_freeing.
  2562. */
  2563. ESPLOG(("esp%d: last msg not disc and not cmd cmplt.\n",
  2564. esp->esp_id));
  2565. return do_reset_bus;
  2566. }
  2567. return do_intr_end;
  2568. }
  2569. /* When a reselect occurs, and we cannot find the command to
  2570. * reconnect to in our queues, we do this.
  2571. */
  2572. static int esp_bad_reconnect(struct esp *esp)
  2573. {
  2574. struct scsi_cmnd *sp;
  2575. ESPLOG(("esp%d: Eieeee, reconnecting unknown command!\n",
  2576. esp->esp_id));
  2577. ESPLOG(("QUEUE DUMP\n"));
  2578. sp = esp->issue_SC;
  2579. ESPLOG(("esp%d: issue_SC[", esp->esp_id));
  2580. while (sp) {
  2581. ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
  2582. sp = (struct scsi_cmnd *) sp->host_scribble;
  2583. }
  2584. ESPLOG(("]\n"));
  2585. sp = esp->current_SC;
  2586. ESPLOG(("esp%d: current_SC[", esp->esp_id));
  2587. if (sp)
  2588. ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
  2589. else
  2590. ESPLOG(("<NULL>"));
  2591. ESPLOG(("]\n"));
  2592. sp = esp->disconnected_SC;
  2593. ESPLOG(("esp%d: disconnected_SC[", esp->esp_id));
  2594. while (sp) {
  2595. ESPLOG(("<%02x,%02x>", sp->device->id, sp->device->lun));
  2596. sp = (struct scsi_cmnd *) sp->host_scribble;
  2597. }
  2598. ESPLOG(("]\n"));
  2599. return do_reset_bus;
  2600. }
  2601. /* Do the needy when a target tries to reconnect to us. */
  2602. static int esp_do_reconnect(struct esp *esp)
  2603. {
  2604. int lun, target;
  2605. struct scsi_cmnd *SCptr;
  2606. /* Check for all bogus conditions first. */
  2607. target = reconnect_target(esp);
  2608. if (target < 0) {
  2609. ESPDISC(("bad bus bits\n"));
  2610. return do_reset_bus;
  2611. }
  2612. lun = reconnect_lun(esp);
  2613. if (lun < 0) {
  2614. ESPDISC(("target=%2x, bad identify msg\n", target));
  2615. return do_reset_bus;
  2616. }
  2617. /* Things look ok... */
  2618. ESPDISC(("R<%02x,%02x>", target, lun));
  2619. /* Must not flush FIFO or DVMA on HME. */
  2620. if (esp->erev != fashme) {
  2621. esp_cmd(esp, ESP_CMD_FLUSH);
  2622. if (esp100_reconnect_hwbug(esp))
  2623. return do_reset_bus;
  2624. esp_cmd(esp, ESP_CMD_NULL);
  2625. }
  2626. SCptr = remove_SC(&esp->disconnected_SC, (u8) target, (u8) lun);
  2627. if (!SCptr)
  2628. return esp_bad_reconnect(esp);
  2629. esp_connect(esp, SCptr);
  2630. esp_cmd(esp, ESP_CMD_MOK);
  2631. if (esp->erev == fashme)
  2632. sbus_writeb(((SCptr->device->id & 0xf) |
  2633. (ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT)),
  2634. esp->eregs + ESP_BUSID);
  2635. /* Reconnect implies a restore pointers operation. */
  2636. esp_restore_pointers(esp, SCptr);
  2637. esp->snip = 0;
  2638. esp_advance_phase(SCptr, in_the_dark);
  2639. return do_intr_end;
  2640. }
  2641. /* End of NEXUS (hopefully), pick up status + message byte then leave if
  2642. * all goes well.
  2643. */
  2644. static int esp_do_status(struct esp *esp)
  2645. {
  2646. struct scsi_cmnd *SCptr = esp->current_SC;
  2647. int intr, rval;
  2648. rval = skipahead1(esp, SCptr, in_the_dark, in_status);
  2649. if (rval)
  2650. return rval;
  2651. intr = esp->ireg;
  2652. ESPSTAT(("esp_do_status: "));
  2653. if (intr != ESP_INTR_DC) {
  2654. int message_out = 0; /* for parity problems */
  2655. /* Ack the message. */
  2656. ESPSTAT(("ack msg, "));
  2657. esp_cmd(esp, ESP_CMD_MOK);
  2658. if (esp->erev != fashme) {
  2659. dma_flashclear(esp);
  2660. /* Wait till the first bits settle. */
  2661. while (esp->esp_command[0] == 0xff)
  2662. udelay(1);
  2663. } else {
  2664. esp->esp_command[0] = esp->hme_fifo_workaround_buffer[0];
  2665. esp->esp_command[1] = esp->hme_fifo_workaround_buffer[1];
  2666. }
  2667. ESPSTAT(("got something, "));
  2668. /* ESP chimes in with one of
  2669. *
  2670. * 1) function done interrupt:
  2671. * both status and message in bytes
  2672. * are available
  2673. *
  2674. * 2) bus service interrupt:
  2675. * only status byte was acquired
  2676. *
  2677. * 3) Anything else:
  2678. * can't happen, but we test for it
  2679. * anyways
  2680. *
  2681. * ALSO: If bad parity was detected on either
  2682. * the status _or_ the message byte then
  2683. * the ESP has asserted ATN on the bus
  2684. * and we must therefore wait for the
  2685. * next phase change.
  2686. */
  2687. if (intr & ESP_INTR_FDONE) {
  2688. /* We got it all, hallejulia. */
  2689. ESPSTAT(("got both, "));
  2690. SCptr->SCp.Status = esp->esp_command[0];
  2691. SCptr->SCp.Message = esp->esp_command[1];
  2692. esp->prevmsgin = SCptr->SCp.Message;
  2693. esp->cur_msgin[0] = SCptr->SCp.Message;
  2694. if (esp->sreg & ESP_STAT_PERR) {
  2695. /* There was bad parity for the
  2696. * message byte, the status byte
  2697. * was ok.
  2698. */
  2699. message_out = MSG_PARITY_ERROR;
  2700. }
  2701. } else if (intr == ESP_INTR_BSERV) {
  2702. /* Only got status byte. */
  2703. ESPLOG(("esp%d: got status only, ", esp->esp_id));
  2704. if (!(esp->sreg & ESP_STAT_PERR)) {
  2705. SCptr->SCp.Status = esp->esp_command[0];
  2706. SCptr->SCp.Message = 0xff;
  2707. } else {
  2708. /* The status byte had bad parity.
  2709. * we leave the scsi_pointer Status
  2710. * field alone as we set it to a default
  2711. * of CHECK_CONDITION in esp_queue.
  2712. */
  2713. message_out = INITIATOR_ERROR;
  2714. }
  2715. } else {
  2716. /* This shouldn't happen ever. */
  2717. ESPSTAT(("got bolixed\n"));
  2718. esp_advance_phase(SCptr, in_the_dark);
  2719. return esp_do_phase_determine(esp);
  2720. }
  2721. if (!message_out) {
  2722. ESPSTAT(("status=%2x msg=%2x, ", SCptr->SCp.Status,
  2723. SCptr->SCp.Message));
  2724. if (SCptr->SCp.Message == COMMAND_COMPLETE) {
  2725. ESPSTAT(("and was COMMAND_COMPLETE\n"));
  2726. esp_advance_phase(SCptr, in_freeing);
  2727. return esp_do_freebus(esp);
  2728. } else {
  2729. ESPLOG(("esp%d: and _not_ COMMAND_COMPLETE\n",
  2730. esp->esp_id));
  2731. esp->msgin_len = esp->msgin_ctr = 1;
  2732. esp_advance_phase(SCptr, in_msgindone);
  2733. return esp_do_msgindone(esp);
  2734. }
  2735. } else {
  2736. /* With luck we'll be able to let the target
  2737. * know that bad parity happened, it will know
  2738. * which byte caused the problems and send it
  2739. * again. For the case where the status byte
  2740. * receives bad parity, I do not believe most
  2741. * targets recover very well. We'll see.
  2742. */
  2743. ESPLOG(("esp%d: bad parity somewhere mout=%2x\n",
  2744. esp->esp_id, message_out));
  2745. esp->cur_msgout[0] = message_out;
  2746. esp->msgout_len = esp->msgout_ctr = 1;
  2747. esp_advance_phase(SCptr, in_the_dark);
  2748. return esp_do_phase_determine(esp);
  2749. }
  2750. } else {
  2751. /* If we disconnect now, all hell breaks loose. */
  2752. ESPLOG(("esp%d: whoops, disconnect\n", esp->esp_id));
  2753. esp_advance_phase(SCptr, in_the_dark);
  2754. return esp_do_phase_determine(esp);
  2755. }
  2756. }
  2757. static int esp_enter_status(struct esp *esp)
  2758. {
  2759. u8 thecmd = ESP_CMD_ICCSEQ;
  2760. esp_cmd(esp, ESP_CMD_FLUSH);
  2761. if (esp->erev != fashme) {
  2762. u32 tmp;
  2763. esp->esp_command[0] = esp->esp_command[1] = 0xff;
  2764. sbus_writeb(2, esp->eregs + ESP_TCLOW);
  2765. sbus_writeb(0, esp->eregs + ESP_TCMED);
  2766. tmp = sbus_readl(esp->dregs + DMA_CSR);
  2767. tmp |= (DMA_ST_WRITE | DMA_ENABLE);
  2768. sbus_writel(tmp, esp->dregs + DMA_CSR);
  2769. if (esp->dma->revision == dvmaesc1)
  2770. sbus_writel(0x100, esp->dregs + DMA_COUNT);
  2771. sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
  2772. thecmd |= ESP_CMD_DMA;
  2773. }
  2774. esp_cmd(esp, thecmd);
  2775. esp_advance_phase(esp->current_SC, in_status);
  2776. return esp_do_status(esp);
  2777. }
  2778. static int esp_disconnect_amidst_phases(struct esp *esp)
  2779. {
  2780. struct scsi_cmnd *sp = esp->current_SC;
  2781. struct esp_device *esp_dev = sp->device->hostdata;
  2782. /* This means real problems if we see this
  2783. * here. Unless we were actually trying
  2784. * to force the device to abort/reset.
  2785. */
  2786. ESPLOG(("esp%d Disconnect amidst phases, ", esp->esp_id));
  2787. ESPLOG(("pphase<%s> cphase<%s>, ",
  2788. phase_string(sp->SCp.phase),
  2789. phase_string(sp->SCp.sent_command)));
  2790. if (esp->disconnected_SC != NULL || (esp->erev == fashme))
  2791. esp_cmd(esp, ESP_CMD_ESEL);
  2792. switch (esp->cur_msgout[0]) {
  2793. default:
  2794. /* We didn't expect this to happen at all. */
  2795. ESPLOG(("device is bolixed\n"));
  2796. esp_advance_phase(sp, in_tgterror);
  2797. esp_done(esp, (DID_ERROR << 16));
  2798. break;
  2799. case BUS_DEVICE_RESET:
  2800. ESPLOG(("device reset successful\n"));
  2801. esp_dev->sync_max_offset = 0;
  2802. esp_dev->sync_min_period = 0;
  2803. esp_dev->sync = 0;
  2804. esp_advance_phase(sp, in_resetdev);
  2805. esp_done(esp, (DID_RESET << 16));
  2806. break;
  2807. case ABORT:
  2808. ESPLOG(("device abort successful\n"));
  2809. esp_advance_phase(sp, in_abortone);
  2810. esp_done(esp, (DID_ABORT << 16));
  2811. break;
  2812. };
  2813. return do_intr_end;
  2814. }
  2815. static int esp_enter_msgout(struct esp *esp)
  2816. {
  2817. esp_advance_phase(esp->current_SC, in_msgout);
  2818. return esp_do_msgout(esp);
  2819. }
  2820. static int esp_enter_msgin(struct esp *esp)
  2821. {
  2822. esp_advance_phase(esp->current_SC, in_msgin);
  2823. return esp_do_msgin(esp);
  2824. }
  2825. static int esp_enter_cmd(struct esp *esp)
  2826. {
  2827. esp_advance_phase(esp->current_SC, in_cmdbegin);
  2828. return esp_do_cmdbegin(esp);
  2829. }
  2830. static int esp_enter_badphase(struct esp *esp)
  2831. {
  2832. ESPLOG(("esp%d: Bizarre bus phase %2x.\n", esp->esp_id,
  2833. esp->sreg & ESP_STAT_PMASK));
  2834. return do_reset_bus;
  2835. }
  2836. typedef int (*espfunc_t)(struct esp *);
  2837. static espfunc_t phase_vector[] = {
  2838. esp_do_data, /* ESP_DOP */
  2839. esp_do_data, /* ESP_DIP */
  2840. esp_enter_cmd, /* ESP_CMDP */
  2841. esp_enter_status, /* ESP_STATP */
  2842. esp_enter_badphase, /* ESP_STAT_PMSG */
  2843. esp_enter_badphase, /* ESP_STAT_PMSG | ESP_STAT_PIO */
  2844. esp_enter_msgout, /* ESP_MOP */
  2845. esp_enter_msgin, /* ESP_MIP */
  2846. };
  2847. /* The target has control of the bus and we have to see where it has
  2848. * taken us.
  2849. */
  2850. static int esp_do_phase_determine(struct esp *esp)
  2851. {
  2852. if ((esp->ireg & ESP_INTR_DC) != 0)
  2853. return esp_disconnect_amidst_phases(esp);
  2854. return phase_vector[esp->sreg & ESP_STAT_PMASK](esp);
  2855. }
  2856. /* First interrupt after exec'ing a cmd comes here. */
  2857. static int esp_select_complete(struct esp *esp)
  2858. {
  2859. struct scsi_cmnd *SCptr = esp->current_SC;
  2860. struct esp_device *esp_dev = SCptr->device->hostdata;
  2861. int cmd_bytes_sent, fcnt;
  2862. if (esp->erev != fashme)
  2863. esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS);
  2864. if (esp->erev == fashme)
  2865. fcnt = esp->hme_fifo_workaround_count;
  2866. else
  2867. fcnt = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES);
  2868. cmd_bytes_sent = esp_bytes_sent(esp, fcnt);
  2869. dma_invalidate(esp);
  2870. /* Let's check to see if a reselect happened
  2871. * while we we're trying to select. This must
  2872. * be checked first.
  2873. */
  2874. if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
  2875. esp_reconnect(esp, SCptr);
  2876. return esp_do_reconnect(esp);
  2877. }
  2878. /* Looks like things worked, we should see a bus service &
  2879. * a function complete interrupt at this point. Note we
  2880. * are doing a direct comparison because we don't want to
  2881. * be fooled into thinking selection was successful if
  2882. * ESP_INTR_DC is set, see below.
  2883. */
  2884. if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
  2885. /* target speaks... */
  2886. esp->targets_present |= (1<<SCptr->device->id);
  2887. /* What if the target ignores the sdtr? */
  2888. if (esp->snip)
  2889. esp_dev->sync = 1;
  2890. /* See how far, if at all, we got in getting
  2891. * the information out to the target.
  2892. */
  2893. switch (esp->seqreg) {
  2894. default:
  2895. case ESP_STEP_ASEL:
  2896. /* Arbitration won, target selected, but
  2897. * we are in some phase which is not command
  2898. * phase nor is it message out phase.
  2899. *
  2900. * XXX We've confused the target, obviously.
  2901. * XXX So clear it's state, but we also end
  2902. * XXX up clearing everyone elses. That isn't
  2903. * XXX so nice. I'd like to just reset this
  2904. * XXX target, but if I cannot even get it's
  2905. * XXX attention and finish selection to talk
  2906. * XXX to it, there is not much more I can do.
  2907. * XXX If we have a loaded bus we're going to
  2908. * XXX spend the next second or so renegotiating
  2909. * XXX for synchronous transfers.
  2910. */
  2911. ESPLOG(("esp%d: STEP_ASEL for tgt %d\n",
  2912. esp->esp_id, SCptr->device->id));
  2913. case ESP_STEP_SID:
  2914. /* Arbitration won, target selected, went
  2915. * to message out phase, sent one message
  2916. * byte, then we stopped. ATN is asserted
  2917. * on the SCSI bus and the target is still
  2918. * there hanging on. This is a legal
  2919. * sequence step if we gave the ESP a select
  2920. * and stop command.
  2921. *
  2922. * XXX See above, I could set the borken flag
  2923. * XXX in the device struct and retry the
  2924. * XXX command. But would that help for
  2925. * XXX tagged capable targets?
  2926. */
  2927. case ESP_STEP_NCMD:
  2928. /* Arbitration won, target selected, maybe
  2929. * sent the one message byte in message out
  2930. * phase, but we did not go to command phase
  2931. * in the end. Actually, we could have sent
  2932. * only some of the message bytes if we tried
  2933. * to send out the entire identify and tag
  2934. * message using ESP_CMD_SA3.
  2935. */
  2936. cmd_bytes_sent = 0;
  2937. break;
  2938. case ESP_STEP_PPC:
  2939. /* No, not the powerPC pinhead. Arbitration
  2940. * won, all message bytes sent if we went to
  2941. * message out phase, went to command phase
  2942. * but only part of the command was sent.
  2943. *
  2944. * XXX I've seen this, but usually in conjunction
  2945. * XXX with a gross error which appears to have
  2946. * XXX occurred between the time I told the
  2947. * XXX ESP to arbitrate and when I got the
  2948. * XXX interrupt. Could I have misloaded the
  2949. * XXX command bytes into the fifo? Actually,
  2950. * XXX I most likely missed a phase, and therefore
  2951. * XXX went into never never land and didn't even
  2952. * XXX know it. That was the old driver though.
  2953. * XXX What is even more peculiar is that the ESP
  2954. * XXX showed the proper function complete and
  2955. * XXX bus service bits in the interrupt register.
  2956. */
  2957. case ESP_STEP_FINI4:
  2958. case ESP_STEP_FINI5:
  2959. case ESP_STEP_FINI6:
  2960. case ESP_STEP_FINI7:
  2961. /* Account for the identify message */
  2962. if (SCptr->SCp.phase == in_slct_norm)
  2963. cmd_bytes_sent -= 1;
  2964. };
  2965. if (esp->erev != fashme)
  2966. esp_cmd(esp, ESP_CMD_NULL);
  2967. /* Be careful, we could really get fucked during synchronous
  2968. * data transfers if we try to flush the fifo now.
  2969. */
  2970. if ((esp->erev != fashme) && /* not a Happy Meal and... */
  2971. !fcnt && /* Fifo is empty and... */
  2972. /* either we are not doing synchronous transfers or... */
  2973. (!esp_dev->sync_max_offset ||
  2974. /* We are not going into data in phase. */
  2975. ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
  2976. esp_cmd(esp, ESP_CMD_FLUSH); /* flush is safe */
  2977. /* See how far we got if this is not a slow command. */
  2978. if (!esp->esp_slowcmd) {
  2979. if (cmd_bytes_sent < 0)
  2980. cmd_bytes_sent = 0;
  2981. if (cmd_bytes_sent != SCptr->cmd_len) {
  2982. /* Crapola, mark it as a slowcmd
  2983. * so that we have some chance of
  2984. * keeping the command alive with
  2985. * good luck.
  2986. *
  2987. * XXX Actually, if we didn't send it all
  2988. * XXX this means either we didn't set things
  2989. * XXX up properly (driver bug) or the target
  2990. * XXX or the ESP detected parity on one of
  2991. * XXX the command bytes. This makes much
  2992. * XXX more sense, and therefore this code
  2993. * XXX should be changed to send out a
  2994. * XXX parity error message or if the status
  2995. * XXX register shows no parity error then
  2996. * XXX just expect the target to bring the
  2997. * XXX bus into message in phase so that it
  2998. * XXX can send us the parity error message.
  2999. * XXX SCSI sucks...
  3000. */
  3001. esp->esp_slowcmd = 1;
  3002. esp->esp_scmdp = &(SCptr->cmnd[cmd_bytes_sent]);
  3003. esp->esp_scmdleft = (SCptr->cmd_len - cmd_bytes_sent);
  3004. }
  3005. }
  3006. /* Now figure out where we went. */
  3007. esp_advance_phase(SCptr, in_the_dark);
  3008. return esp_do_phase_determine(esp);
  3009. }
  3010. /* Did the target even make it? */
  3011. if (esp->ireg == ESP_INTR_DC) {
  3012. /* wheee... nobody there or they didn't like
  3013. * what we told it to do, clean up.
  3014. */
  3015. /* If anyone is off the bus, but working on
  3016. * a command in the background for us, tell
  3017. * the ESP to listen for them.
  3018. */
  3019. if (esp->disconnected_SC)
  3020. esp_cmd(esp, ESP_CMD_ESEL);
  3021. if (((1<<SCptr->device->id) & esp->targets_present) &&
  3022. esp->seqreg != 0 &&
  3023. (esp->cur_msgout[0] == EXTENDED_MESSAGE) &&
  3024. (SCptr->SCp.phase == in_slct_msg ||
  3025. SCptr->SCp.phase == in_slct_stop)) {
  3026. /* shit */
  3027. esp->snip = 0;
  3028. ESPLOG(("esp%d: Failed synchronous negotiation for target %d "
  3029. "lun %d\n", esp->esp_id, SCptr->device->id, SCptr->device->lun));
  3030. esp_dev->sync_max_offset = 0;
  3031. esp_dev->sync_min_period = 0;
  3032. esp_dev->sync = 1; /* so we don't negotiate again */
  3033. /* Run the command again, this time though we
  3034. * won't try to negotiate for synchronous transfers.
  3035. *
  3036. * XXX I'd like to do something like send an
  3037. * XXX INITIATOR_ERROR or ABORT message to the
  3038. * XXX target to tell it, "Sorry I confused you,
  3039. * XXX please come back and I will be nicer next
  3040. * XXX time". But that requires having the target
  3041. * XXX on the bus, and it has dropped BSY on us.
  3042. */
  3043. esp->current_SC = NULL;
  3044. esp_advance_phase(SCptr, not_issued);
  3045. prepend_SC(&esp->issue_SC, SCptr);
  3046. esp_exec_cmd(esp);
  3047. return do_intr_end;
  3048. }
  3049. /* Ok, this is normal, this is what we see during boot
  3050. * or whenever when we are scanning the bus for targets.
  3051. * But first make sure that is really what is happening.
  3052. */
  3053. if (((1<<SCptr->device->id) & esp->targets_present)) {
  3054. ESPLOG(("esp%d: Warning, live target %d not responding to "
  3055. "selection.\n", esp->esp_id, SCptr->device->id));
  3056. /* This _CAN_ happen. The SCSI standard states that
  3057. * the target is to _not_ respond to selection if
  3058. * _it_ detects bad parity on the bus for any reason.
  3059. * Therefore, we assume that if we've talked successfully
  3060. * to this target before, bad parity is the problem.
  3061. */
  3062. esp_done(esp, (DID_PARITY << 16));
  3063. } else {
  3064. /* Else, there really isn't anyone there. */
  3065. ESPMISC(("esp: selection failure, maybe nobody there?\n"));
  3066. ESPMISC(("esp: target %d lun %d\n",
  3067. SCptr->device->id, SCptr->device->lun));
  3068. esp_done(esp, (DID_BAD_TARGET << 16));
  3069. }
  3070. return do_intr_end;
  3071. }
  3072. ESPLOG(("esp%d: Selection failure.\n", esp->esp_id));
  3073. printk("esp%d: Currently -- ", esp->esp_id);
  3074. esp_print_ireg(esp->ireg); printk(" ");
  3075. esp_print_statreg(esp->sreg); printk(" ");
  3076. esp_print_seqreg(esp->seqreg); printk("\n");
  3077. printk("esp%d: New -- ", esp->esp_id);
  3078. esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
  3079. esp->seqreg = sbus_readb(esp->eregs + ESP_SSTEP);
  3080. esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT);
  3081. esp_print_ireg(esp->ireg); printk(" ");
  3082. esp_print_statreg(esp->sreg); printk(" ");
  3083. esp_print_seqreg(esp->seqreg); printk("\n");
  3084. ESPLOG(("esp%d: resetting bus\n", esp->esp_id));
  3085. return do_reset_bus; /* ugh... */
  3086. }
  3087. /* Continue reading bytes for msgin phase. */
  3088. static int esp_do_msgincont(struct esp *esp)
  3089. {
  3090. if (esp->ireg & ESP_INTR_BSERV) {
  3091. /* in the right phase too? */
  3092. if ((esp->sreg & ESP_STAT_PMASK) == ESP_MIP) {
  3093. /* phew... */
  3094. esp_cmd(esp, ESP_CMD_TI);
  3095. esp_advance_phase(esp->current_SC, in_msgindone);
  3096. return do_intr_end;
  3097. }
  3098. /* We changed phase but ESP shows bus service,
  3099. * in this case it is most likely that we, the
  3100. * hacker who has been up for 20hrs straight
  3101. * staring at the screen, drowned in coffee
  3102. * smelling like retched cigarette ashes
  3103. * have miscoded something..... so, try to
  3104. * recover as best we can.
  3105. */
  3106. ESPLOG(("esp%d: message in mis-carriage.\n", esp->esp_id));
  3107. }
  3108. esp_advance_phase(esp->current_SC, in_the_dark);
  3109. return do_phase_determine;
  3110. }
  3111. static int check_singlebyte_msg(struct esp *esp)
  3112. {
  3113. esp->prevmsgin = esp->cur_msgin[0];
  3114. if (esp->cur_msgin[0] & 0x80) {
  3115. /* wheee... */
  3116. ESPLOG(("esp%d: target sends identify amidst phases\n",
  3117. esp->esp_id));
  3118. esp_advance_phase(esp->current_SC, in_the_dark);
  3119. return 0;
  3120. } else if (((esp->cur_msgin[0] & 0xf0) == 0x20) ||
  3121. (esp->cur_msgin[0] == EXTENDED_MESSAGE)) {
  3122. esp->msgin_len = 2;
  3123. esp_advance_phase(esp->current_SC, in_msgincont);
  3124. return 0;
  3125. }
  3126. esp_advance_phase(esp->current_SC, in_the_dark);
  3127. switch (esp->cur_msgin[0]) {
  3128. default:
  3129. /* We don't want to hear about it. */
  3130. ESPLOG(("esp%d: msg %02x which we don't know about\n", esp->esp_id,
  3131. esp->cur_msgin[0]));
  3132. return MESSAGE_REJECT;
  3133. case NOP:
  3134. ESPLOG(("esp%d: target %d sends a nop\n", esp->esp_id,
  3135. esp->current_SC->device->id));
  3136. return 0;
  3137. case RESTORE_POINTERS:
  3138. /* In this case we might also have to backup the
  3139. * "slow command" pointer. It is rare to get such
  3140. * a save/restore pointer sequence so early in the
  3141. * bus transition sequences, but cover it.
  3142. */
  3143. if (esp->esp_slowcmd) {
  3144. esp->esp_scmdleft = esp->current_SC->cmd_len;
  3145. esp->esp_scmdp = &esp->current_SC->cmnd[0];
  3146. }
  3147. esp_restore_pointers(esp, esp->current_SC);
  3148. return 0;
  3149. case SAVE_POINTERS:
  3150. esp_save_pointers(esp, esp->current_SC);
  3151. return 0;
  3152. case COMMAND_COMPLETE:
  3153. case DISCONNECT:
  3154. /* Freeing the bus, let it go. */
  3155. esp->current_SC->SCp.phase = in_freeing;
  3156. return 0;
  3157. case MESSAGE_REJECT:
  3158. ESPMISC(("msg reject, "));
  3159. if (esp->prevmsgout == EXTENDED_MESSAGE) {
  3160. struct esp_device *esp_dev = esp->current_SC->device->hostdata;
  3161. /* Doesn't look like this target can
  3162. * do synchronous or WIDE transfers.
  3163. */
  3164. ESPSDTR(("got reject, was trying nego, clearing sync/WIDE\n"));
  3165. esp_dev->sync = 1;
  3166. esp_dev->wide = 1;
  3167. esp_dev->sync_min_period = 0;
  3168. esp_dev->sync_max_offset = 0;
  3169. return 0;
  3170. } else {
  3171. ESPMISC(("not sync nego, sending ABORT\n"));
  3172. return ABORT;
  3173. }
  3174. };
  3175. }
  3176. /* Target negotiates for synchronous transfers before we do, this
  3177. * is legal although very strange. What is even funnier is that
  3178. * the SCSI2 standard specifically recommends against targets doing
  3179. * this because so many initiators cannot cope with this occurring.
  3180. */
  3181. static int target_with_ants_in_pants(struct esp *esp,
  3182. struct scsi_cmnd *SCptr,
  3183. struct esp_device *esp_dev)
  3184. {
  3185. if (esp_dev->sync || SCptr->device->borken) {
  3186. /* sorry, no can do */
  3187. ESPSDTR(("forcing to async, "));
  3188. build_sync_nego_msg(esp, 0, 0);
  3189. esp_dev->sync = 1;
  3190. esp->snip = 1;
  3191. ESPLOG(("esp%d: hoping for msgout\n", esp->esp_id));
  3192. esp_advance_phase(SCptr, in_the_dark);
  3193. return EXTENDED_MESSAGE;
  3194. }
  3195. /* Ok, we'll check them out... */
  3196. return 0;
  3197. }
  3198. static void sync_report(struct esp *esp)
  3199. {
  3200. int msg3, msg4;
  3201. char *type;
  3202. msg3 = esp->cur_msgin[3];
  3203. msg4 = esp->cur_msgin[4];
  3204. if (msg4) {
  3205. int hz = 1000000000 / (msg3 * 4);
  3206. int integer = hz / 1000000;
  3207. int fraction = (hz - (integer * 1000000)) / 10000;
  3208. if ((esp->erev == fashme) &&
  3209. (esp->config3[esp->current_SC->device->id] & ESP_CONFIG3_EWIDE)) {
  3210. type = "FAST-WIDE";
  3211. integer <<= 1;
  3212. fraction <<= 1;
  3213. } else if ((msg3 * 4) < 200) {
  3214. type = "FAST";
  3215. } else {
  3216. type = "synchronous";
  3217. }
  3218. /* Do not transform this back into one big printk
  3219. * again, it triggers a bug in our sparc64-gcc272
  3220. * sibling call optimization. -DaveM
  3221. */
  3222. ESPLOG((KERN_INFO "esp%d: target %d ",
  3223. esp->esp_id, esp->current_SC->device->id));
  3224. ESPLOG(("[period %dns offset %d %d.%02dMHz ",
  3225. (int) msg3 * 4, (int) msg4,
  3226. integer, fraction));
  3227. ESPLOG(("%s SCSI%s]\n", type,
  3228. (((msg3 * 4) < 200) ? "-II" : "")));
  3229. } else {
  3230. ESPLOG((KERN_INFO "esp%d: target %d asynchronous\n",
  3231. esp->esp_id, esp->current_SC->device->id));
  3232. }
  3233. }
  3234. static int check_multibyte_msg(struct esp *esp)
  3235. {
  3236. struct scsi_cmnd *SCptr = esp->current_SC;
  3237. struct esp_device *esp_dev = SCptr->device->hostdata;
  3238. u8 regval = 0;
  3239. int message_out = 0;
  3240. ESPSDTR(("chk multibyte msg: "));
  3241. if (esp->cur_msgin[2] == EXTENDED_SDTR) {
  3242. int period = esp->cur_msgin[3];
  3243. int offset = esp->cur_msgin[4];
  3244. ESPSDTR(("is sync nego response, "));
  3245. if (!esp->snip) {
  3246. int rval;
  3247. /* Target negotiates first! */
  3248. ESPSDTR(("target jumps the gun, "));
  3249. message_out = EXTENDED_MESSAGE; /* we must respond */
  3250. rval = target_with_ants_in_pants(esp, SCptr, esp_dev);
  3251. if (rval)
  3252. return rval;
  3253. }
  3254. ESPSDTR(("examining sdtr, "));
  3255. /* Offset cannot be larger than ESP fifo size. */
  3256. if (offset > 15) {
  3257. ESPSDTR(("offset too big %2x, ", offset));
  3258. offset = 15;
  3259. ESPSDTR(("sending back new offset\n"));
  3260. build_sync_nego_msg(esp, period, offset);
  3261. return EXTENDED_MESSAGE;
  3262. }
  3263. if (offset && period > esp->max_period) {
  3264. /* Yeee, async for this slow device. */
  3265. ESPSDTR(("period too long %2x, ", period));
  3266. build_sync_nego_msg(esp, 0, 0);
  3267. ESPSDTR(("hoping for msgout\n"));
  3268. esp_advance_phase(esp->current_SC, in_the_dark);
  3269. return EXTENDED_MESSAGE;
  3270. } else if (offset && period < esp->min_period) {
  3271. ESPSDTR(("period too short %2x, ", period));
  3272. period = esp->min_period;
  3273. if (esp->erev > esp236)
  3274. regval = 4;
  3275. else
  3276. regval = 5;
  3277. } else if (offset) {
  3278. int tmp;
  3279. ESPSDTR(("period is ok, "));
  3280. tmp = esp->ccycle / 1000;
  3281. regval = (((period << 2) + tmp - 1) / tmp);
  3282. if (regval && ((esp->erev == fas100a ||
  3283. esp->erev == fas236 ||
  3284. esp->erev == fashme))) {
  3285. if (period >= 50)
  3286. regval--;
  3287. }
  3288. }
  3289. if (offset) {
  3290. u8 bit;
  3291. esp_dev->sync_min_period = (regval & 0x1f);
  3292. esp_dev->sync_max_offset = (offset | esp->radelay);
  3293. if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) {
  3294. if ((esp->erev == fas100a) || (esp->erev == fashme))
  3295. bit = ESP_CONFIG3_FAST;
  3296. else
  3297. bit = ESP_CONFIG3_FSCSI;
  3298. if (period < 50) {
  3299. /* On FAS366, if using fast-20 synchronous transfers
  3300. * we need to make sure the REQ/ACK assert/deassert
  3301. * control bits are clear.
  3302. */
  3303. if (esp->erev == fashme)
  3304. esp_dev->sync_max_offset &= ~esp->radelay;
  3305. esp->config3[SCptr->device->id] |= bit;
  3306. } else {
  3307. esp->config3[SCptr->device->id] &= ~bit;
  3308. }
  3309. esp->prev_cfg3 = esp->config3[SCptr->device->id];
  3310. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  3311. }
  3312. esp->prev_soff = esp_dev->sync_max_offset;
  3313. esp->prev_stp = esp_dev->sync_min_period;
  3314. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  3315. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  3316. ESPSDTR(("soff=%2x stp=%2x cfg3=%2x\n",
  3317. esp_dev->sync_max_offset,
  3318. esp_dev->sync_min_period,
  3319. esp->config3[SCptr->device->id]));
  3320. esp->snip = 0;
  3321. } else if (esp_dev->sync_max_offset) {
  3322. u8 bit;
  3323. /* back to async mode */
  3324. ESPSDTR(("unaccaptable sync nego, forcing async\n"));
  3325. esp_dev->sync_max_offset = 0;
  3326. esp_dev->sync_min_period = 0;
  3327. esp->prev_soff = 0;
  3328. esp->prev_stp = 0;
  3329. sbus_writeb(esp->prev_soff, esp->eregs + ESP_SOFF);
  3330. sbus_writeb(esp->prev_stp, esp->eregs + ESP_STP);
  3331. if (esp->erev == fas100a || esp->erev == fas236 || esp->erev == fashme) {
  3332. if ((esp->erev == fas100a) || (esp->erev == fashme))
  3333. bit = ESP_CONFIG3_FAST;
  3334. else
  3335. bit = ESP_CONFIG3_FSCSI;
  3336. esp->config3[SCptr->device->id] &= ~bit;
  3337. esp->prev_cfg3 = esp->config3[SCptr->device->id];
  3338. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  3339. }
  3340. }
  3341. sync_report(esp);
  3342. ESPSDTR(("chk multibyte msg: sync is known, "));
  3343. esp_dev->sync = 1;
  3344. if (message_out) {
  3345. ESPLOG(("esp%d: sending sdtr back, hoping for msgout\n",
  3346. esp->esp_id));
  3347. build_sync_nego_msg(esp, period, offset);
  3348. esp_advance_phase(SCptr, in_the_dark);
  3349. return EXTENDED_MESSAGE;
  3350. }
  3351. ESPSDTR(("returning zero\n"));
  3352. esp_advance_phase(SCptr, in_the_dark); /* ...or else! */
  3353. return 0;
  3354. } else if (esp->cur_msgin[2] == EXTENDED_WDTR) {
  3355. int size = 8 << esp->cur_msgin[3];
  3356. esp->wnip = 0;
  3357. if (esp->erev != fashme) {
  3358. ESPLOG(("esp%d: AIEEE wide msg received and not HME.\n",
  3359. esp->esp_id));
  3360. message_out = MESSAGE_REJECT;
  3361. } else if (size > 16) {
  3362. ESPLOG(("esp%d: AIEEE wide transfer for %d size "
  3363. "not supported.\n", esp->esp_id, size));
  3364. message_out = MESSAGE_REJECT;
  3365. } else {
  3366. /* Things look good; let's see what we got. */
  3367. if (size == 16) {
  3368. /* Set config 3 register for this target. */
  3369. esp->config3[SCptr->device->id] |= ESP_CONFIG3_EWIDE;
  3370. } else {
  3371. /* Just make sure it was one byte sized. */
  3372. if (size != 8) {
  3373. ESPLOG(("esp%d: Aieee, wide nego of %d size.\n",
  3374. esp->esp_id, size));
  3375. message_out = MESSAGE_REJECT;
  3376. goto finish;
  3377. }
  3378. /* Pure paranoia. */
  3379. esp->config3[SCptr->device->id] &= ~(ESP_CONFIG3_EWIDE);
  3380. }
  3381. esp->prev_cfg3 = esp->config3[SCptr->device->id];
  3382. sbus_writeb(esp->prev_cfg3, esp->eregs + ESP_CFG3);
  3383. /* Regardless, next try for sync transfers. */
  3384. build_sync_nego_msg(esp, esp->sync_defp, 15);
  3385. esp_dev->sync = 1;
  3386. esp->snip = 1;
  3387. message_out = EXTENDED_MESSAGE;
  3388. }
  3389. } else if (esp->cur_msgin[2] == EXTENDED_MODIFY_DATA_POINTER) {
  3390. ESPLOG(("esp%d: rejecting modify data ptr msg\n", esp->esp_id));
  3391. message_out = MESSAGE_REJECT;
  3392. }
  3393. finish:
  3394. esp_advance_phase(SCptr, in_the_dark);
  3395. return message_out;
  3396. }
  3397. static int esp_do_msgindone(struct esp *esp)
  3398. {
  3399. struct scsi_cmnd *SCptr = esp->current_SC;
  3400. int message_out = 0, it = 0, rval;
  3401. rval = skipahead1(esp, SCptr, in_msgin, in_msgindone);
  3402. if (rval)
  3403. return rval;
  3404. if (SCptr->SCp.sent_command != in_status) {
  3405. if (!(esp->ireg & ESP_INTR_DC)) {
  3406. if (esp->msgin_len && (esp->sreg & ESP_STAT_PERR)) {
  3407. message_out = MSG_PARITY_ERROR;
  3408. esp_cmd(esp, ESP_CMD_FLUSH);
  3409. } else if (esp->erev != fashme &&
  3410. (it = (sbus_readb(esp->eregs + ESP_FFLAGS) & ESP_FF_FBYTES)) != 1) {
  3411. /* We certainly dropped the ball somewhere. */
  3412. message_out = INITIATOR_ERROR;
  3413. esp_cmd(esp, ESP_CMD_FLUSH);
  3414. } else if (!esp->msgin_len) {
  3415. if (esp->erev == fashme)
  3416. it = esp->hme_fifo_workaround_buffer[0];
  3417. else
  3418. it = sbus_readb(esp->eregs + ESP_FDATA);
  3419. esp_advance_phase(SCptr, in_msgincont);
  3420. } else {
  3421. /* it is ok and we want it */
  3422. if (esp->erev == fashme)
  3423. it = esp->cur_msgin[esp->msgin_ctr] =
  3424. esp->hme_fifo_workaround_buffer[0];
  3425. else
  3426. it = esp->cur_msgin[esp->msgin_ctr] =
  3427. sbus_readb(esp->eregs + ESP_FDATA);
  3428. esp->msgin_ctr++;
  3429. }
  3430. } else {
  3431. esp_advance_phase(SCptr, in_the_dark);
  3432. return do_work_bus;
  3433. }
  3434. } else {
  3435. it = esp->cur_msgin[0];
  3436. }
  3437. if (!message_out && esp->msgin_len) {
  3438. if (esp->msgin_ctr < esp->msgin_len) {
  3439. esp_advance_phase(SCptr, in_msgincont);
  3440. } else if (esp->msgin_len == 1) {
  3441. message_out = check_singlebyte_msg(esp);
  3442. } else if (esp->msgin_len == 2) {
  3443. if (esp->cur_msgin[0] == EXTENDED_MESSAGE) {
  3444. if ((it + 2) >= 15) {
  3445. message_out = MESSAGE_REJECT;
  3446. } else {
  3447. esp->msgin_len = (it + 2);
  3448. esp_advance_phase(SCptr, in_msgincont);
  3449. }
  3450. } else {
  3451. message_out = MESSAGE_REJECT; /* foo on you */
  3452. }
  3453. } else {
  3454. message_out = check_multibyte_msg(esp);
  3455. }
  3456. }
  3457. if (message_out < 0) {
  3458. return -message_out;
  3459. } else if (message_out) {
  3460. if (((message_out != 1) &&
  3461. ((message_out < 0x20) || (message_out & 0x80))))
  3462. esp->msgout_len = 1;
  3463. esp->cur_msgout[0] = message_out;
  3464. esp_cmd(esp, ESP_CMD_SATN);
  3465. esp_advance_phase(SCptr, in_the_dark);
  3466. esp->msgin_len = 0;
  3467. }
  3468. esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
  3469. esp->sreg &= ~(ESP_STAT_INTR);
  3470. if ((esp->sreg & (ESP_STAT_PMSG|ESP_STAT_PCD)) == (ESP_STAT_PMSG|ESP_STAT_PCD))
  3471. esp_cmd(esp, ESP_CMD_MOK);
  3472. if ((SCptr->SCp.sent_command == in_msgindone) &&
  3473. (SCptr->SCp.phase == in_freeing))
  3474. return esp_do_freebus(esp);
  3475. return do_intr_end;
  3476. }
  3477. static int esp_do_cmdbegin(struct esp *esp)
  3478. {
  3479. struct scsi_cmnd *SCptr = esp->current_SC;
  3480. esp_advance_phase(SCptr, in_cmdend);
  3481. if (esp->erev == fashme) {
  3482. u32 tmp = sbus_readl(esp->dregs + DMA_CSR);
  3483. int i;
  3484. for (i = 0; i < esp->esp_scmdleft; i++)
  3485. esp->esp_command[i] = *esp->esp_scmdp++;
  3486. esp->esp_scmdleft = 0;
  3487. esp_cmd(esp, ESP_CMD_FLUSH);
  3488. esp_setcount(esp->eregs, i, 1);
  3489. esp_cmd(esp, (ESP_CMD_DMA | ESP_CMD_TI));
  3490. tmp |= (DMA_SCSI_DISAB | DMA_ENABLE);
  3491. tmp &= ~(DMA_ST_WRITE);
  3492. sbus_writel(i, esp->dregs + DMA_COUNT);
  3493. sbus_writel(esp->esp_command_dvma, esp->dregs + DMA_ADDR);
  3494. sbus_writel(tmp, esp->dregs + DMA_CSR);
  3495. } else {
  3496. u8 tmp;
  3497. esp_cmd(esp, ESP_CMD_FLUSH);
  3498. tmp = *esp->esp_scmdp++;
  3499. esp->esp_scmdleft--;
  3500. sbus_writeb(tmp, esp->eregs + ESP_FDATA);
  3501. esp_cmd(esp, ESP_CMD_TI);
  3502. }
  3503. return do_intr_end;
  3504. }
  3505. static int esp_do_cmddone(struct esp *esp)
  3506. {
  3507. if (esp->erev == fashme)
  3508. dma_invalidate(esp);
  3509. else
  3510. esp_cmd(esp, ESP_CMD_NULL);
  3511. if (esp->ireg & ESP_INTR_BSERV) {
  3512. esp_advance_phase(esp->current_SC, in_the_dark);
  3513. return esp_do_phase_determine(esp);
  3514. }
  3515. ESPLOG(("esp%d: in do_cmddone() but didn't get BSERV interrupt.\n",
  3516. esp->esp_id));
  3517. return do_reset_bus;
  3518. }
  3519. static int esp_do_msgout(struct esp *esp)
  3520. {
  3521. esp_cmd(esp, ESP_CMD_FLUSH);
  3522. switch (esp->msgout_len) {
  3523. case 1:
  3524. if (esp->erev == fashme)
  3525. hme_fifo_push(esp, &esp->cur_msgout[0], 1);
  3526. else
  3527. sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA);
  3528. esp_cmd(esp, ESP_CMD_TI);
  3529. break;
  3530. case 2:
  3531. esp->esp_command[0] = esp->cur_msgout[0];
  3532. esp->esp_command[1] = esp->cur_msgout[1];
  3533. if (esp->erev == fashme) {
  3534. hme_fifo_push(esp, &esp->cur_msgout[0], 2);
  3535. esp_cmd(esp, ESP_CMD_TI);
  3536. } else {
  3537. dma_setup(esp, esp->esp_command_dvma, 2, 0);
  3538. esp_setcount(esp->eregs, 2, 0);
  3539. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  3540. }
  3541. break;
  3542. case 4:
  3543. esp->esp_command[0] = esp->cur_msgout[0];
  3544. esp->esp_command[1] = esp->cur_msgout[1];
  3545. esp->esp_command[2] = esp->cur_msgout[2];
  3546. esp->esp_command[3] = esp->cur_msgout[3];
  3547. esp->snip = 1;
  3548. if (esp->erev == fashme) {
  3549. hme_fifo_push(esp, &esp->cur_msgout[0], 4);
  3550. esp_cmd(esp, ESP_CMD_TI);
  3551. } else {
  3552. dma_setup(esp, esp->esp_command_dvma, 4, 0);
  3553. esp_setcount(esp->eregs, 4, 0);
  3554. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  3555. }
  3556. break;
  3557. case 5:
  3558. esp->esp_command[0] = esp->cur_msgout[0];
  3559. esp->esp_command[1] = esp->cur_msgout[1];
  3560. esp->esp_command[2] = esp->cur_msgout[2];
  3561. esp->esp_command[3] = esp->cur_msgout[3];
  3562. esp->esp_command[4] = esp->cur_msgout[4];
  3563. esp->snip = 1;
  3564. if (esp->erev == fashme) {
  3565. hme_fifo_push(esp, &esp->cur_msgout[0], 5);
  3566. esp_cmd(esp, ESP_CMD_TI);
  3567. } else {
  3568. dma_setup(esp, esp->esp_command_dvma, 5, 0);
  3569. esp_setcount(esp->eregs, 5, 0);
  3570. esp_cmd(esp, ESP_CMD_DMA | ESP_CMD_TI);
  3571. }
  3572. break;
  3573. default:
  3574. /* whoops */
  3575. ESPMISC(("bogus msgout sending NOP\n"));
  3576. esp->cur_msgout[0] = NOP;
  3577. if (esp->erev == fashme) {
  3578. hme_fifo_push(esp, &esp->cur_msgout[0], 1);
  3579. } else {
  3580. sbus_writeb(esp->cur_msgout[0], esp->eregs + ESP_FDATA);
  3581. }
  3582. esp->msgout_len = 1;
  3583. esp_cmd(esp, ESP_CMD_TI);
  3584. break;
  3585. };
  3586. esp_advance_phase(esp->current_SC, in_msgoutdone);
  3587. return do_intr_end;
  3588. }
  3589. static int esp_do_msgoutdone(struct esp *esp)
  3590. {
  3591. if (esp->msgout_len > 1) {
  3592. /* XXX HME/FAS ATN deassert workaround required,
  3593. * XXX no DMA flushing, only possible ESP_CMD_FLUSH
  3594. * XXX to kill the fifo.
  3595. */
  3596. if (esp->erev != fashme) {
  3597. u32 tmp;
  3598. while ((tmp = sbus_readl(esp->dregs + DMA_CSR)) & DMA_PEND_READ)
  3599. udelay(1);
  3600. tmp &= ~DMA_ENABLE;
  3601. sbus_writel(tmp, esp->dregs + DMA_CSR);
  3602. dma_invalidate(esp);
  3603. } else {
  3604. esp_cmd(esp, ESP_CMD_FLUSH);
  3605. }
  3606. }
  3607. if (!(esp->ireg & ESP_INTR_DC)) {
  3608. if (esp->erev != fashme)
  3609. esp_cmd(esp, ESP_CMD_NULL);
  3610. switch (esp->sreg & ESP_STAT_PMASK) {
  3611. case ESP_MOP:
  3612. /* whoops, parity error */
  3613. ESPLOG(("esp%d: still in msgout, parity error assumed\n",
  3614. esp->esp_id));
  3615. if (esp->msgout_len > 1)
  3616. esp_cmd(esp, ESP_CMD_SATN);
  3617. esp_advance_phase(esp->current_SC, in_msgout);
  3618. return do_work_bus;
  3619. case ESP_DIP:
  3620. break;
  3621. default:
  3622. /* Happy Meal fifo is touchy... */
  3623. if ((esp->erev != fashme) &&
  3624. !fcount(esp) &&
  3625. !(((struct esp_device *)esp->current_SC->device->hostdata)->sync_max_offset))
  3626. esp_cmd(esp, ESP_CMD_FLUSH);
  3627. break;
  3628. };
  3629. } else {
  3630. ESPLOG(("esp%d: disconnect, resetting bus\n", esp->esp_id));
  3631. return do_reset_bus;
  3632. }
  3633. /* If we sent out a synchronous negotiation message, update
  3634. * our state.
  3635. */
  3636. if (esp->cur_msgout[2] == EXTENDED_MESSAGE &&
  3637. esp->cur_msgout[4] == EXTENDED_SDTR) {
  3638. esp->snip = 1; /* anal retentiveness... */
  3639. }
  3640. esp->prevmsgout = esp->cur_msgout[0];
  3641. esp->msgout_len = 0;
  3642. esp_advance_phase(esp->current_SC, in_the_dark);
  3643. return esp_do_phase_determine(esp);
  3644. }
  3645. static int esp_bus_unexpected(struct esp *esp)
  3646. {
  3647. ESPLOG(("esp%d: command in weird state %2x\n",
  3648. esp->esp_id, esp->current_SC->SCp.phase));
  3649. return do_reset_bus;
  3650. }
  3651. static espfunc_t bus_vector[] = {
  3652. esp_do_data_finale,
  3653. esp_do_data_finale,
  3654. esp_bus_unexpected,
  3655. esp_do_msgin,
  3656. esp_do_msgincont,
  3657. esp_do_msgindone,
  3658. esp_do_msgout,
  3659. esp_do_msgoutdone,
  3660. esp_do_cmdbegin,
  3661. esp_do_cmddone,
  3662. esp_do_status,
  3663. esp_do_freebus,
  3664. esp_do_phase_determine,
  3665. esp_bus_unexpected,
  3666. esp_bus_unexpected,
  3667. esp_bus_unexpected,
  3668. };
  3669. /* This is the second tier in our dual-level SCSI state machine. */
  3670. static int esp_work_bus(struct esp *esp)
  3671. {
  3672. struct scsi_cmnd *SCptr = esp->current_SC;
  3673. unsigned int phase;
  3674. ESPBUS(("esp_work_bus: "));
  3675. if (!SCptr) {
  3676. ESPBUS(("reconnect\n"));
  3677. return esp_do_reconnect(esp);
  3678. }
  3679. phase = SCptr->SCp.phase;
  3680. if ((phase & 0xf0) == in_phases_mask)
  3681. return bus_vector[(phase & 0x0f)](esp);
  3682. else if ((phase & 0xf0) == in_slct_mask)
  3683. return esp_select_complete(esp);
  3684. else
  3685. return esp_bus_unexpected(esp);
  3686. }
  3687. static espfunc_t isvc_vector[] = {
  3688. NULL,
  3689. esp_do_phase_determine,
  3690. esp_do_resetbus,
  3691. esp_finish_reset,
  3692. esp_work_bus
  3693. };
  3694. /* Main interrupt handler for an esp adapter. */
  3695. static void esp_handle(struct esp *esp)
  3696. {
  3697. struct scsi_cmnd *SCptr;
  3698. int what_next = do_intr_end;
  3699. SCptr = esp->current_SC;
  3700. /* Check for errors. */
  3701. esp->sreg = sbus_readb(esp->eregs + ESP_STATUS);
  3702. esp->sreg &= (~ESP_STAT_INTR);
  3703. if (esp->erev == fashme) {
  3704. esp->sreg2 = sbus_readb(esp->eregs + ESP_STATUS2);
  3705. esp->seqreg = (sbus_readb(esp->eregs + ESP_SSTEP) & ESP_STEP_VBITS);
  3706. }
  3707. if (esp->sreg & (ESP_STAT_SPAM)) {
  3708. /* Gross error, could be due to one of:
  3709. *
  3710. * - top of fifo overwritten, could be because
  3711. * we tried to do a synchronous transfer with
  3712. * an offset greater than ESP fifo size
  3713. *
  3714. * - top of command register overwritten
  3715. *
  3716. * - DMA setup to go in one direction, SCSI
  3717. * bus points in the other, whoops
  3718. *
  3719. * - weird phase change during asynchronous
  3720. * data phase while we are initiator
  3721. */
  3722. ESPLOG(("esp%d: Gross error sreg=%2x\n", esp->esp_id, esp->sreg));
  3723. /* If a command is live on the bus we cannot safely
  3724. * reset the bus, so we'll just let the pieces fall
  3725. * where they may. Here we are hoping that the
  3726. * target will be able to cleanly go away soon
  3727. * so we can safely reset things.
  3728. */
  3729. if (!SCptr) {
  3730. ESPLOG(("esp%d: No current cmd during gross error, "
  3731. "resetting bus\n", esp->esp_id));
  3732. what_next = do_reset_bus;
  3733. goto state_machine;
  3734. }
  3735. }
  3736. if (sbus_readl(esp->dregs + DMA_CSR) & DMA_HNDL_ERROR) {
  3737. /* A DMA gate array error. Here we must
  3738. * be seeing one of two things. Either the
  3739. * virtual to physical address translation
  3740. * on the SBUS could not occur, else the
  3741. * translation it did get pointed to a bogus
  3742. * page. Ho hum...
  3743. */
  3744. ESPLOG(("esp%d: DMA error %08x\n", esp->esp_id,
  3745. sbus_readl(esp->dregs + DMA_CSR)));
  3746. /* DMA gate array itself must be reset to clear the
  3747. * error condition.
  3748. */
  3749. esp_reset_dma(esp);
  3750. what_next = do_reset_bus;
  3751. goto state_machine;
  3752. }
  3753. esp->ireg = sbus_readb(esp->eregs + ESP_INTRPT); /* Unlatch intr reg */
  3754. if (esp->erev == fashme) {
  3755. /* This chip is really losing. */
  3756. ESPHME(("HME["));
  3757. ESPHME(("sreg2=%02x,", esp->sreg2));
  3758. /* Must latch fifo before reading the interrupt
  3759. * register else garbage ends up in the FIFO
  3760. * which confuses the driver utterly.
  3761. */
  3762. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  3763. (esp->sreg2 & ESP_STAT2_F1BYTE)) {
  3764. ESPHME(("fifo_workaround]"));
  3765. hme_fifo_read(esp);
  3766. } else {
  3767. ESPHME(("no_fifo_workaround]"));
  3768. }
  3769. }
  3770. /* No current cmd is only valid at this point when there are
  3771. * commands off the bus or we are trying a reset.
  3772. */
  3773. if (!SCptr && !esp->disconnected_SC && !(esp->ireg & ESP_INTR_SR)) {
  3774. /* Panic is safe, since current_SC is null. */
  3775. ESPLOG(("esp%d: no command in esp_handle()\n", esp->esp_id));
  3776. panic("esp_handle: current_SC == penguin within interrupt!");
  3777. }
  3778. if (esp->ireg & (ESP_INTR_IC)) {
  3779. /* Illegal command fed to ESP. Outside of obvious
  3780. * software bugs that could cause this, there is
  3781. * a condition with esp100 where we can confuse the
  3782. * ESP into an erroneous illegal command interrupt
  3783. * because it does not scrape the FIFO properly
  3784. * for reselection. See esp100_reconnect_hwbug()
  3785. * to see how we try very hard to avoid this.
  3786. */
  3787. ESPLOG(("esp%d: invalid command\n", esp->esp_id));
  3788. esp_dump_state(esp);
  3789. if (SCptr != NULL) {
  3790. /* Devices with very buggy firmware can drop BSY
  3791. * during a scatter list interrupt when using sync
  3792. * mode transfers. We continue the transfer as
  3793. * expected, the target drops the bus, the ESP
  3794. * gets confused, and we get a illegal command
  3795. * interrupt because the bus is in the disconnected
  3796. * state now and ESP_CMD_TI is only allowed when
  3797. * a nexus is alive on the bus.
  3798. */
  3799. ESPLOG(("esp%d: Forcing async and disabling disconnect for "
  3800. "target %d\n", esp->esp_id, SCptr->device->id));
  3801. SCptr->device->borken = 1; /* foo on you */
  3802. }
  3803. what_next = do_reset_bus;
  3804. } else if (!(esp->ireg & ~(ESP_INTR_FDONE | ESP_INTR_BSERV | ESP_INTR_DC))) {
  3805. if (SCptr) {
  3806. unsigned int phase = SCptr->SCp.phase;
  3807. if (phase & in_phases_mask) {
  3808. what_next = esp_work_bus(esp);
  3809. } else if (phase & in_slct_mask) {
  3810. what_next = esp_select_complete(esp);
  3811. } else {
  3812. ESPLOG(("esp%d: interrupt for no good reason...\n",
  3813. esp->esp_id));
  3814. what_next = do_intr_end;
  3815. }
  3816. } else {
  3817. ESPLOG(("esp%d: BSERV or FDONE or DC while SCptr==NULL\n",
  3818. esp->esp_id));
  3819. what_next = do_reset_bus;
  3820. }
  3821. } else if (esp->ireg & ESP_INTR_SR) {
  3822. ESPLOG(("esp%d: SCSI bus reset interrupt\n", esp->esp_id));
  3823. what_next = do_reset_complete;
  3824. } else if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN)) {
  3825. ESPLOG(("esp%d: AIEEE we have been selected by another initiator!\n",
  3826. esp->esp_id));
  3827. what_next = do_reset_bus;
  3828. } else if (esp->ireg & ESP_INTR_RSEL) {
  3829. if (SCptr == NULL) {
  3830. /* This is ok. */
  3831. what_next = esp_do_reconnect(esp);
  3832. } else if (SCptr->SCp.phase & in_slct_mask) {
  3833. /* Only selection code knows how to clean
  3834. * up properly.
  3835. */
  3836. ESPDISC(("Reselected during selection attempt\n"));
  3837. what_next = esp_select_complete(esp);
  3838. } else {
  3839. ESPLOG(("esp%d: Reselected while bus is busy\n",
  3840. esp->esp_id));
  3841. what_next = do_reset_bus;
  3842. }
  3843. }
  3844. /* This is tier-one in our dual level SCSI state machine. */
  3845. state_machine:
  3846. while (what_next != do_intr_end) {
  3847. if (what_next >= do_phase_determine &&
  3848. what_next < do_intr_end) {
  3849. what_next = isvc_vector[what_next](esp);
  3850. } else {
  3851. /* state is completely lost ;-( */
  3852. ESPLOG(("esp%d: interrupt engine loses state, resetting bus\n",
  3853. esp->esp_id));
  3854. what_next = do_reset_bus;
  3855. }
  3856. }
  3857. }
  3858. /* Service only the ESP described by dev_id. */
  3859. static irqreturn_t esp_intr(int irq, void *dev_id, struct pt_regs *pregs)
  3860. {
  3861. struct esp *esp = dev_id;
  3862. unsigned long flags;
  3863. spin_lock_irqsave(esp->ehost->host_lock, flags);
  3864. if (ESP_IRQ_P(esp->dregs)) {
  3865. ESP_INTSOFF(esp->dregs);
  3866. ESPIRQ(("I[%d:%d](", smp_processor_id(), esp->esp_id));
  3867. esp_handle(esp);
  3868. ESPIRQ((")"));
  3869. ESP_INTSON(esp->dregs);
  3870. }
  3871. spin_unlock_irqrestore(esp->ehost->host_lock, flags);
  3872. return IRQ_HANDLED;
  3873. }
  3874. static int esp_slave_alloc(struct scsi_device *SDptr)
  3875. {
  3876. struct esp_device *esp_dev =
  3877. kmalloc(sizeof(struct esp_device), GFP_ATOMIC);
  3878. if (!esp_dev)
  3879. return -ENOMEM;
  3880. memset(esp_dev, 0, sizeof(struct esp_device));
  3881. SDptr->hostdata = esp_dev;
  3882. return 0;
  3883. }
  3884. static void esp_slave_destroy(struct scsi_device *SDptr)
  3885. {
  3886. struct esp *esp = (struct esp *) SDptr->host->hostdata;
  3887. esp->targets_present &= ~(1 << SDptr->id);
  3888. kfree(SDptr->hostdata);
  3889. SDptr->hostdata = NULL;
  3890. }
  3891. static struct scsi_host_template driver_template = {
  3892. .proc_name = "esp",
  3893. .proc_info = esp_proc_info,
  3894. .name = "Sun ESP 100/100a/200",
  3895. .detect = esp_detect,
  3896. .slave_alloc = esp_slave_alloc,
  3897. .slave_destroy = esp_slave_destroy,
  3898. .release = esp_release,
  3899. .info = esp_info,
  3900. .queuecommand = esp_queue,
  3901. .eh_abort_handler = esp_abort,
  3902. .eh_bus_reset_handler = esp_reset,
  3903. .can_queue = 7,
  3904. .this_id = 7,
  3905. .sg_tablesize = SG_ALL,
  3906. .cmd_per_lun = 1,
  3907. .use_clustering = ENABLE_CLUSTERING,
  3908. };
  3909. #include "scsi_module.c"
  3910. MODULE_DESCRIPTION("EnhancedScsiProcessor Sun SCSI driver");
  3911. MODULE_AUTHOR("David S. Miller (davem@redhat.com)");
  3912. MODULE_LICENSE("GPL");
  3913. MODULE_VERSION(DRV_VERSION);