eata_generic.h 15 KB

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  1. /********************************************************
  2. * Header file for eata_dma.c and eata_pio.c *
  3. * Linux EATA SCSI drivers *
  4. * (c) 1993-96 Michael Neuffer *
  5. * mike@i-Connect.Net *
  6. * neuffer@mail.uni-mainz.de *
  7. *********************************************************
  8. * last change: 96/08/14 *
  9. ********************************************************/
  10. #ifndef _EATA_GENERIC_H
  11. #define _EATA_GENERIC_H
  12. /*********************************************
  13. * Misc. definitions *
  14. *********************************************/
  15. #ifndef TRUE
  16. #define TRUE 1
  17. #endif
  18. #ifndef FALSE
  19. #define FALSE 0
  20. #endif
  21. #define R_LIMIT 0x20000
  22. #define MAXISA 4
  23. #define MAXEISA 16
  24. #define MAXPCI 16
  25. #define MAXIRQ 16
  26. #define MAXTARGET 16
  27. #define MAXCHANNEL 3
  28. #define IS_ISA 'I'
  29. #define IS_EISA 'E'
  30. #define IS_PCI 'P'
  31. #define BROKEN_INQUIRY 1
  32. #define BUSMASTER 0xff
  33. #define PIO 0xfe
  34. #define EATA_SIGNATURE 0x45415441 /* BIG ENDIAN coded "EATA" sig. */
  35. #define DPT_ID1 0x12
  36. #define DPT_ID2 0x14
  37. #define ATT_ID1 0x06
  38. #define ATT_ID2 0x94
  39. #define ATT_ID3 0x0
  40. #define NEC_ID1 0x38
  41. #define NEC_ID2 0xa3
  42. #define NEC_ID3 0x82
  43. #define EATA_CP_SIZE 44
  44. #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */
  45. #define MAX_METHOD_2 16 /* Max Devices For Method 2 */
  46. #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */
  47. #define SG_SIZE 64
  48. #define SG_SIZE_BIG 252 /* max. 8096 elements, 64k */
  49. #define UPPER_DEVICE_QUEUE_LIMIT 64 /* The limit we have to set for the
  50. * device queue to keep the broken
  51. * midlevel SCSI code from producing
  52. * bogus timeouts
  53. */
  54. #define TYPE_DISK_QUEUE 16
  55. #define TYPE_TAPE_QUEUE 4
  56. #define TYPE_ROM_QUEUE 4
  57. #define TYPE_OTHER_QUEUE 2
  58. #define FREE 0
  59. #define OK 0
  60. #define NO_TIMEOUT 0
  61. #define USED 1
  62. #define TIMEOUT 2
  63. #define RESET 4
  64. #define LOCKED 8
  65. #define ABORTED 16
  66. #define READ 0
  67. #define WRITE 1
  68. #define OTHER 2
  69. #define HD(cmd) ((hostdata *)&(cmd->device->host->hostdata))
  70. #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble))
  71. #define SD(host) ((hostdata *)&(host->hostdata))
  72. /***********************************************
  73. * EATA Command & Register definitions *
  74. ***********************************************/
  75. #define PCI_REG_DPTconfig 0x40
  76. #define PCI_REG_PumpModeAddress 0x44
  77. #define PCI_REG_PumpModeData 0x48
  78. #define PCI_REG_ConfigParam1 0x50
  79. #define PCI_REG_ConfigParam2 0x54
  80. #define EATA_CMD_PIO_SETUPTEST 0xc6
  81. #define EATA_CMD_PIO_READ_CONFIG 0xf0
  82. #define EATA_CMD_PIO_SET_CONFIG 0xf1
  83. #define EATA_CMD_PIO_SEND_CP 0xf2
  84. #define EATA_CMD_PIO_RECEIVE_SP 0xf3
  85. #define EATA_CMD_PIO_TRUNC 0xf4
  86. #define EATA_CMD_RESET 0xf9
  87. #define EATA_CMD_IMMEDIATE 0xfa
  88. #define EATA_CMD_DMA_READ_CONFIG 0xfd
  89. #define EATA_CMD_DMA_SET_CONFIG 0xfe
  90. #define EATA_CMD_DMA_SEND_CP 0xff
  91. #define ECS_EMULATE_SENSE 0xd4
  92. #define EATA_GENERIC_ABORT 0x00
  93. #define EATA_SPECIFIC_RESET 0x01
  94. #define EATA_BUS_RESET 0x02
  95. #define EATA_SPECIFIC_ABORT 0x03
  96. #define EATA_QUIET_INTR 0x04
  97. #define EATA_COLD_BOOT_HBA 0x06 /* Only as a last resort */
  98. #define EATA_FORCE_IO 0x07
  99. #define HA_CTRLREG 0x206 /* control register for HBA */
  100. #define HA_CTRL_DISINT 0x02 /* CTRLREG: disable interrupts */
  101. #define HA_CTRL_RESCPU 0x04 /* CTRLREG: reset processor */
  102. #define HA_CTRL_8HEADS 0x08 /* CTRLREG: set for drives with*
  103. * >=8 heads (WD1003 rudimentary :-) */
  104. #define HA_WCOMMAND 0x07 /* command register offset */
  105. #define HA_WIFC 0x06 /* immediate command offset */
  106. #define HA_WCODE 0x05
  107. #define HA_WCODE2 0x04
  108. #define HA_WDMAADDR 0x02 /* DMA address LSB offset */
  109. #define HA_RAUXSTAT 0x08 /* aux status register offset*/
  110. #define HA_RSTATUS 0x07 /* status register offset */
  111. #define HA_RDATA 0x00 /* data register (16bit) */
  112. #define HA_WDATA 0x00 /* data register (16bit) */
  113. #define HA_ABUSY 0x01 /* aux busy bit */
  114. #define HA_AIRQ 0x02 /* aux IRQ pending bit */
  115. #define HA_SERROR 0x01 /* pr. command ended in error*/
  116. #define HA_SMORE 0x02 /* more data soon to come */
  117. #define HA_SCORR 0x04 /* data corrected */
  118. #define HA_SDRQ 0x08 /* data request active */
  119. #define HA_SSC 0x10 /* seek complete */
  120. #define HA_SFAULT 0x20 /* write fault */
  121. #define HA_SREADY 0x40 /* drive ready */
  122. #define HA_SBUSY 0x80 /* drive busy */
  123. #define HA_SDRDY HA_SSC+HA_SREADY+HA_SDRQ
  124. /**********************************************
  125. * Message definitions *
  126. **********************************************/
  127. #define HA_NO_ERROR 0x00 /* No Error */
  128. #define HA_ERR_SEL_TO 0x01 /* Selection Timeout */
  129. #define HA_ERR_CMD_TO 0x02 /* Command Timeout */
  130. #define HA_BUS_RESET 0x03 /* SCSI Bus Reset Received */
  131. #define HA_INIT_POWERUP 0x04 /* Initial Controller Power-up */
  132. #define HA_UNX_BUSPHASE 0x05 /* Unexpected Bus Phase */
  133. #define HA_UNX_BUS_FREE 0x06 /* Unexpected Bus Free */
  134. #define HA_BUS_PARITY 0x07 /* Bus Parity Error */
  135. #define HA_SCSI_HUNG 0x08 /* SCSI Hung */
  136. #define HA_UNX_MSGRJCT 0x09 /* Unexpected Message Rejected */
  137. #define HA_RESET_STUCK 0x0a /* SCSI Bus Reset Stuck */
  138. #define HA_RSENSE_FAIL 0x0b /* Auto Request-Sense Failed */
  139. #define HA_PARITY_ERR 0x0c /* Controller Ram Parity Error */
  140. #define HA_CP_ABORT_NA 0x0d /* Abort Message sent to non-active cmd */
  141. #define HA_CP_ABORTED 0x0e /* Abort Message sent to active cmd */
  142. #define HA_CP_RESET_NA 0x0f /* Reset Message sent to non-active cmd */
  143. #define HA_CP_RESET 0x10 /* Reset Message sent to active cmd */
  144. #define HA_ECC_ERR 0x11 /* Controller Ram ECC Error */
  145. #define HA_PCI_PARITY 0x12 /* PCI Parity Error */
  146. #define HA_PCI_MABORT 0x13 /* PCI Master Abort */
  147. #define HA_PCI_TABORT 0x14 /* PCI Target Abort */
  148. #define HA_PCI_STABORT 0x15 /* PCI Signaled Target Abort */
  149. /**********************************************
  150. * Other definitions *
  151. **********************************************/
  152. struct reg_bit { /* reading this one will clear the interrupt */
  153. __u8 error:1; /* previous command ended in an error */
  154. __u8 more:1; /* more DATA coming soon, poll BSY & DRQ (PIO) */
  155. __u8 corr:1; /* data read was successfully corrected with ECC*/
  156. __u8 drq:1; /* data request active */
  157. __u8 sc:1; /* seek complete */
  158. __u8 fault:1; /* write fault */
  159. __u8 ready:1; /* drive ready */
  160. __u8 busy:1; /* controller busy */
  161. };
  162. struct reg_abit { /* reading this won't clear the interrupt */
  163. __u8 abusy:1; /* auxiliary busy */
  164. __u8 irq:1; /* set when drive interrupt is asserted */
  165. __u8 dummy:6;
  166. };
  167. struct eata_register { /* EATA register set */
  168. __u8 data_reg[2]; /* R, couldn't figure this one out */
  169. __u8 cp_addr[4]; /* W, CP address register */
  170. union {
  171. __u8 command; /* W, command code: [read|set] conf, send CP*/
  172. struct reg_bit status; /* R, see register_bit1 */
  173. __u8 statusbyte;
  174. } ovr;
  175. struct reg_abit aux_stat; /* R, see register_bit2 */
  176. };
  177. struct get_conf { /* Read Configuration Array */
  178. __u32 len; /* Should return 0x22, 0x24, etc */
  179. __u32 signature; /* Signature MUST be "EATA" */
  180. __u8 version2:4,
  181. version:4; /* EATA Version level */
  182. __u8 OCS_enabled:1, /* Overlap Command Support enabled */
  183. TAR_support:1, /* SCSI Target Mode supported */
  184. TRNXFR:1, /* Truncate Transfer Cmd not necessary *
  185. * Only used in PIO Mode */
  186. MORE_support:1, /* MORE supported (only PIO Mode) */
  187. DMA_support:1, /* DMA supported Driver uses only *
  188. * this mode */
  189. DMA_valid:1, /* DRQ value in Byte 30 is valid */
  190. ATA:1, /* ATA device connected (not supported) */
  191. HAA_valid:1; /* Hostadapter Address is valid */
  192. __u16 cppadlen; /* Number of pad bytes send after CD data *
  193. * set to zero for DMA commands */
  194. __u8 scsi_id[4]; /* SCSI ID of controller 2-0 Byte 0 res. *
  195. * if not, zero is returned */
  196. __u32 cplen; /* CP length: number of valid cp bytes */
  197. __u32 splen; /* Number of bytes returned after *
  198. * Receive SP command */
  199. __u16 queuesiz; /* max number of queueable CPs */
  200. __u16 dummy;
  201. __u16 SGsiz; /* max number of SG table entries */
  202. __u8 IRQ:4, /* IRQ used this HA */
  203. IRQ_TR:1, /* IRQ Trigger: 0=edge, 1=level */
  204. SECOND:1, /* This is a secondary controller */
  205. DMA_channel:2; /* DRQ index, DRQ is 2comp of DRQX */
  206. __u8 sync; /* device at ID 7 tru 0 is running in *
  207. * synchronous mode, this will disappear */
  208. __u8 DSBLE:1, /* ISA i/o addressing is disabled */
  209. FORCADR:1, /* i/o address has been forced */
  210. SG_64K:1,
  211. SG_UAE:1,
  212. :4;
  213. __u8 MAX_ID:5, /* Max number of SCSI target IDs */
  214. MAX_CHAN:3; /* Number of SCSI busses on HBA */
  215. __u8 MAX_LUN; /* Max number of LUNs */
  216. __u8 :3,
  217. AUTOTRM:1,
  218. M1_inst:1,
  219. ID_qest:1, /* Raidnum ID is questionable */
  220. is_PCI:1, /* HBA is PCI */
  221. is_EISA:1; /* HBA is EISA */
  222. __u8 RAIDNUM; /* unique HBA identifier */
  223. __u8 unused[474];
  224. };
  225. struct eata_sg_list
  226. {
  227. __u32 data;
  228. __u32 len;
  229. };
  230. struct eata_ccb { /* Send Command Packet structure */
  231. __u8 SCSI_Reset:1, /* Cause a SCSI Bus reset on the cmd */
  232. HBA_Init:1, /* Cause Controller to reinitialize */
  233. Auto_Req_Sen:1, /* Do Auto Request Sense on errors */
  234. scatter:1, /* Data Ptr points to a SG Packet */
  235. Resrvd:1, /* RFU */
  236. Interpret:1, /* Interpret the SCSI cdb of own use */
  237. DataOut:1, /* Data Out phase with command */
  238. DataIn:1; /* Data In phase with command */
  239. __u8 reqlen; /* Request Sense Length *
  240. * Valid if Auto_Req_Sen=1 */
  241. __u8 unused[3];
  242. __u8 FWNEST:1, /* send cmd to phys RAID component */
  243. unused2:7;
  244. __u8 Phsunit:1, /* physical unit on mirrored pair */
  245. I_AT:1, /* inhibit address translation */
  246. I_HBA_C:1, /* HBA inhibit caching */
  247. unused3:5;
  248. __u8 cp_id:5, /* SCSI Device ID of target */
  249. cp_channel:3; /* SCSI Channel # of HBA */
  250. __u8 cp_lun:3,
  251. :2,
  252. cp_luntar:1, /* CP is for target ROUTINE */
  253. cp_dispri:1, /* Grant disconnect privilege */
  254. cp_identify:1; /* Always TRUE */
  255. __u8 cp_msg1; /* Message bytes 0-3 */
  256. __u8 cp_msg2;
  257. __u8 cp_msg3;
  258. __u8 cp_cdb[12]; /* Command Descriptor Block */
  259. __u32 cp_datalen; /* Data Transfer Length *
  260. * If scatter=1 len of sg package */
  261. void *cp_viraddr; /* address of this ccb */
  262. __u32 cp_dataDMA; /* Data Address, if scatter=1 *
  263. * address of scatter packet */
  264. __u32 cp_statDMA; /* address for Status Packet */
  265. __u32 cp_reqDMA; /* Request Sense Address, used if *
  266. * CP command ends with error */
  267. /* Additional CP info begins here */
  268. __u32 timestamp; /* Needed to measure command latency */
  269. __u32 timeout;
  270. __u8 sizeindex;
  271. __u8 rw_latency;
  272. __u8 retries;
  273. __u8 status; /* status of this queueslot */
  274. struct scsi_cmnd *cmd; /* address of cmd */
  275. struct eata_sg_list *sg_list;
  276. };
  277. struct eata_sp {
  278. __u8 hba_stat:7, /* HBA status */
  279. EOC:1; /* True if command finished */
  280. __u8 scsi_stat; /* Target SCSI status */
  281. __u8 reserved[2];
  282. __u32 residue_len; /* Number of bytes not transferred */
  283. struct eata_ccb *ccb; /* Address set in COMMAND PACKET */
  284. __u8 msg[12];
  285. };
  286. typedef struct hstd {
  287. __u8 vendor[9];
  288. __u8 name[18];
  289. __u8 revision[6];
  290. __u8 EATA_revision;
  291. __u32 firmware_revision;
  292. __u8 HBA_number;
  293. __u8 bustype; /* bustype of HBA */
  294. __u8 channel; /* # of avail. scsi channels */
  295. __u8 state; /* state of HBA */
  296. __u8 primary; /* true if primary */
  297. __u8 more_support:1, /* HBA supports MORE flag */
  298. immediate_support:1, /* HBA supports IMMEDIATE CMDs*/
  299. broken_INQUIRY:1; /* This is an EISA HBA with *
  300. * broken INQUIRY */
  301. __u8 do_latency; /* Latency measurement flag */
  302. __u32 reads[13];
  303. __u32 writes[13];
  304. __u32 reads_lat[12][4];
  305. __u32 writes_lat[12][4];
  306. __u32 all_lat[4];
  307. __u8 resetlevel[MAXCHANNEL];
  308. __u32 last_ccb; /* Last used ccb */
  309. __u32 cplen; /* size of CP in words */
  310. __u16 cppadlen; /* pad length of cp in words */
  311. __u16 queuesize;
  312. __u16 sgsize; /* # of entries in the SG list*/
  313. __u16 devflags; /* bits set for detected devices */
  314. __u8 hostid; /* SCSI ID of HBA */
  315. __u8 moresupport; /* HBA supports MORE flag */
  316. struct Scsi_Host *next;
  317. struct Scsi_Host *prev;
  318. struct eata_sp sp; /* status packet */
  319. struct eata_ccb ccb[0]; /* ccb array begins here */
  320. }hostdata;
  321. /* structure for max. 2 emulated drives */
  322. struct drive_geom_emul {
  323. __u8 trans; /* translation flag 1=transl */
  324. __u8 channel; /* SCSI channel number */
  325. __u8 HBA; /* HBA number (prim/sec) */
  326. __u8 id; /* drive id */
  327. __u8 lun; /* drive lun */
  328. __u32 heads; /* number of heads */
  329. __u32 sectors; /* number of sectors */
  330. __u32 cylinder; /* number of cylinders */
  331. };
  332. struct geom_emul {
  333. __u8 bios_drives; /* number of emulated drives */
  334. struct drive_geom_emul drv[2]; /* drive structures */
  335. };
  336. #endif /* _EATA_GENERIC_H */
  337. /*
  338. * Overrides for Emacs so that we almost follow Linus's tabbing style.
  339. * Emacs will notice this stuff at the end of the file and automatically
  340. * adjust the settings for this buffer only. This must remain at the end
  341. * of the file.
  342. * ---------------------------------------------------------------------------
  343. * Local variables:
  344. * c-indent-level: 4
  345. * c-brace-imaginary-offset: 0
  346. * c-brace-offset: -4
  347. * c-argdecl-indent: 4
  348. * c-label-offset: -4
  349. * c-continued-statement-offset: 4
  350. * c-continued-brace-offset: 0
  351. * tab-width: 8
  352. * End:
  353. */