rx.c 13 KB

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  1. /*
  2. * Adaptec AAC series RAID controller driver
  3. * (c) Copyright 2001 Red Hat Inc. <alan@redhat.com>
  4. *
  5. * based on the old aacraid driver that is..
  6. * Adaptec aacraid device driver for Linux.
  7. *
  8. * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com)
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2, or (at your option)
  13. * any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; see the file COPYING. If not, write to
  22. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. * Module Name:
  25. * rx.c
  26. *
  27. * Abstract: Hardware miniport for Drawbridge specific hardware functions.
  28. *
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/init.h>
  32. #include <linux/types.h>
  33. #include <linux/sched.h>
  34. #include <linux/pci.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/slab.h>
  37. #include <linux/blkdev.h>
  38. #include <linux/delay.h>
  39. #include <linux/completion.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <asm/semaphore.h>
  43. #include <scsi/scsi_host.h>
  44. #include "aacraid.h"
  45. static irqreturn_t aac_rx_intr(int irq, void *dev_id, struct pt_regs *regs)
  46. {
  47. struct aac_dev *dev = dev_id;
  48. dprintk((KERN_DEBUG "aac_rx_intr(%d,%p,%p)\n", irq, dev_id, regs));
  49. if (dev->new_comm_interface) {
  50. u32 Index = rx_readl(dev, MUnit.OutboundQueue);
  51. if (Index == 0xFFFFFFFFL)
  52. Index = rx_readl(dev, MUnit.OutboundQueue);
  53. if (Index != 0xFFFFFFFFL) {
  54. do {
  55. if (aac_intr_normal(dev, Index)) {
  56. rx_writel(dev, MUnit.OutboundQueue, Index);
  57. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespReady);
  58. }
  59. Index = rx_readl(dev, MUnit.OutboundQueue);
  60. } while (Index != 0xFFFFFFFFL);
  61. return IRQ_HANDLED;
  62. }
  63. } else {
  64. unsigned long bellbits;
  65. u8 intstat;
  66. intstat = rx_readb(dev, MUnit.OISR);
  67. /*
  68. * Read mask and invert because drawbridge is reversed.
  69. * This allows us to only service interrupts that have
  70. * been enabled.
  71. * Check to see if this is our interrupt. If it isn't just return
  72. */
  73. if (intstat & ~(dev->OIMR))
  74. {
  75. bellbits = rx_readl(dev, OutboundDoorbellReg);
  76. if (bellbits & DoorBellPrintfReady) {
  77. aac_printf(dev, rx_readl (dev, IndexRegs.Mailbox[5]));
  78. rx_writel(dev, MUnit.ODR,DoorBellPrintfReady);
  79. rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone);
  80. }
  81. else if (bellbits & DoorBellAdapterNormCmdReady) {
  82. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady);
  83. aac_command_normal(&dev->queues->queue[HostNormCmdQueue]);
  84. }
  85. else if (bellbits & DoorBellAdapterNormRespReady) {
  86. rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady);
  87. aac_response_normal(&dev->queues->queue[HostNormRespQueue]);
  88. }
  89. else if (bellbits & DoorBellAdapterNormCmdNotFull) {
  90. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
  91. }
  92. else if (bellbits & DoorBellAdapterNormRespNotFull) {
  93. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
  94. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull);
  95. }
  96. return IRQ_HANDLED;
  97. }
  98. }
  99. return IRQ_NONE;
  100. }
  101. /**
  102. * aac_rx_disable_interrupt - Disable interrupts
  103. * @dev: Adapter
  104. */
  105. static void aac_rx_disable_interrupt(struct aac_dev *dev)
  106. {
  107. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
  108. }
  109. /**
  110. * rx_sync_cmd - send a command and wait
  111. * @dev: Adapter
  112. * @command: Command to execute
  113. * @p1: first parameter
  114. * @ret: adapter status
  115. *
  116. * This routine will send a synchronous command to the adapter and wait
  117. * for its completion.
  118. */
  119. static int rx_sync_cmd(struct aac_dev *dev, u32 command,
  120. u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
  121. u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
  122. {
  123. unsigned long start;
  124. int ok;
  125. /*
  126. * Write the command into Mailbox 0
  127. */
  128. rx_writel(dev, InboundMailbox0, command);
  129. /*
  130. * Write the parameters into Mailboxes 1 - 6
  131. */
  132. rx_writel(dev, InboundMailbox1, p1);
  133. rx_writel(dev, InboundMailbox2, p2);
  134. rx_writel(dev, InboundMailbox3, p3);
  135. rx_writel(dev, InboundMailbox4, p4);
  136. /*
  137. * Clear the synch command doorbell to start on a clean slate.
  138. */
  139. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  140. /*
  141. * Disable doorbell interrupts
  142. */
  143. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
  144. /*
  145. * Force the completion of the mask register write before issuing
  146. * the interrupt.
  147. */
  148. rx_readb (dev, MUnit.OIMR);
  149. /*
  150. * Signal that there is a new synch command
  151. */
  152. rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0);
  153. ok = 0;
  154. start = jiffies;
  155. /*
  156. * Wait up to 30 seconds
  157. */
  158. while (time_before(jiffies, start+30*HZ))
  159. {
  160. udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
  161. /*
  162. * Mon960 will set doorbell0 bit when it has completed the command.
  163. */
  164. if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) {
  165. /*
  166. * Clear the doorbell.
  167. */
  168. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  169. ok = 1;
  170. break;
  171. }
  172. /*
  173. * Yield the processor in case we are slow
  174. */
  175. msleep(1);
  176. }
  177. if (ok != 1) {
  178. /*
  179. * Restore interrupt mask even though we timed out
  180. */
  181. if (dev->new_comm_interface)
  182. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);
  183. else
  184. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
  185. return -ETIMEDOUT;
  186. }
  187. /*
  188. * Pull the synch status from Mailbox 0.
  189. */
  190. if (status)
  191. *status = rx_readl(dev, IndexRegs.Mailbox[0]);
  192. if (r1)
  193. *r1 = rx_readl(dev, IndexRegs.Mailbox[1]);
  194. if (r2)
  195. *r2 = rx_readl(dev, IndexRegs.Mailbox[2]);
  196. if (r3)
  197. *r3 = rx_readl(dev, IndexRegs.Mailbox[3]);
  198. if (r4)
  199. *r4 = rx_readl(dev, IndexRegs.Mailbox[4]);
  200. /*
  201. * Clear the synch command doorbell.
  202. */
  203. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  204. /*
  205. * Restore interrupt mask
  206. */
  207. if (dev->new_comm_interface)
  208. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);
  209. else
  210. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
  211. return 0;
  212. }
  213. /**
  214. * aac_rx_interrupt_adapter - interrupt adapter
  215. * @dev: Adapter
  216. *
  217. * Send an interrupt to the i960 and breakpoint it.
  218. */
  219. static void aac_rx_interrupt_adapter(struct aac_dev *dev)
  220. {
  221. rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
  222. }
  223. /**
  224. * aac_rx_notify_adapter - send an event to the adapter
  225. * @dev: Adapter
  226. * @event: Event to send
  227. *
  228. * Notify the i960 that something it probably cares about has
  229. * happened.
  230. */
  231. static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event)
  232. {
  233. switch (event) {
  234. case AdapNormCmdQue:
  235. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1);
  236. break;
  237. case HostNormRespNotFull:
  238. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4);
  239. break;
  240. case AdapNormRespQue:
  241. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2);
  242. break;
  243. case HostNormCmdNotFull:
  244. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3);
  245. break;
  246. case HostShutdown:
  247. // rx_sync_cmd(dev, HOST_CRASHING, 0, 0, 0, 0, 0, 0,
  248. // NULL, NULL, NULL, NULL, NULL);
  249. break;
  250. case FastIo:
  251. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6);
  252. break;
  253. case AdapPrintfDone:
  254. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5);
  255. break;
  256. default:
  257. BUG();
  258. break;
  259. }
  260. }
  261. /**
  262. * aac_rx_start_adapter - activate adapter
  263. * @dev: Adapter
  264. *
  265. * Start up processing on an i960 based AAC adapter
  266. */
  267. static void aac_rx_start_adapter(struct aac_dev *dev)
  268. {
  269. struct aac_init *init;
  270. init = dev->init;
  271. init->HostElapsedSeconds = cpu_to_le32(get_seconds());
  272. // We can only use a 32 bit address here
  273. rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
  274. 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
  275. }
  276. /**
  277. * aac_rx_check_health
  278. * @dev: device to check if healthy
  279. *
  280. * Will attempt to determine if the specified adapter is alive and
  281. * capable of handling requests, returning 0 if alive.
  282. */
  283. static int aac_rx_check_health(struct aac_dev *dev)
  284. {
  285. u32 status = rx_readl(dev, MUnit.OMRx[0]);
  286. /*
  287. * Check to see if the board failed any self tests.
  288. */
  289. if (status & SELF_TEST_FAILED)
  290. return -1;
  291. /*
  292. * Check to see if the board panic'd.
  293. */
  294. if (status & KERNEL_PANIC) {
  295. char * buffer;
  296. struct POSTSTATUS {
  297. __le32 Post_Command;
  298. __le32 Post_Address;
  299. } * post;
  300. dma_addr_t paddr, baddr;
  301. int ret;
  302. if ((status & 0xFF000000L) == 0xBC000000L)
  303. return (status >> 16) & 0xFF;
  304. buffer = pci_alloc_consistent(dev->pdev, 512, &baddr);
  305. ret = -2;
  306. if (buffer == NULL)
  307. return ret;
  308. post = pci_alloc_consistent(dev->pdev,
  309. sizeof(struct POSTSTATUS), &paddr);
  310. if (post == NULL) {
  311. pci_free_consistent(dev->pdev, 512, buffer, baddr);
  312. return ret;
  313. }
  314. memset(buffer, 0, 512);
  315. post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS);
  316. post->Post_Address = cpu_to_le32(baddr);
  317. rx_writel(dev, MUnit.IMRx[0], paddr);
  318. rx_sync_cmd(dev, COMMAND_POST_RESULTS, baddr, 0, 0, 0, 0, 0,
  319. NULL, NULL, NULL, NULL, NULL);
  320. pci_free_consistent(dev->pdev, sizeof(struct POSTSTATUS),
  321. post, paddr);
  322. if ((buffer[0] == '0') && ((buffer[1] == 'x') || (buffer[1] == 'X'))) {
  323. ret = (buffer[2] <= '9') ? (buffer[2] - '0') : (buffer[2] - 'A' + 10);
  324. ret <<= 4;
  325. ret += (buffer[3] <= '9') ? (buffer[3] - '0') : (buffer[3] - 'A' + 10);
  326. }
  327. pci_free_consistent(dev->pdev, 512, buffer, baddr);
  328. return ret;
  329. }
  330. /*
  331. * Wait for the adapter to be up and running.
  332. */
  333. if (!(status & KERNEL_UP_AND_RUNNING))
  334. return -3;
  335. /*
  336. * Everything is OK
  337. */
  338. return 0;
  339. }
  340. /**
  341. * aac_rx_send
  342. * @fib: fib to issue
  343. *
  344. * Will send a fib, returning 0 if successful.
  345. */
  346. static int aac_rx_send(struct fib * fib)
  347. {
  348. u64 addr = fib->hw_fib_pa;
  349. struct aac_dev *dev = fib->dev;
  350. volatile void __iomem *device = dev->regs.rx;
  351. u32 Index;
  352. dprintk((KERN_DEBUG "%p->aac_rx_send(%p->%llx)\n", dev, fib, addr));
  353. Index = rx_readl(dev, MUnit.InboundQueue);
  354. if (Index == 0xFFFFFFFFL)
  355. Index = rx_readl(dev, MUnit.InboundQueue);
  356. dprintk((KERN_DEBUG "Index = 0x%x\n", Index));
  357. if (Index == 0xFFFFFFFFL)
  358. return Index;
  359. device += Index;
  360. dprintk((KERN_DEBUG "entry = %x %x %u\n", (u32)(addr & 0xffffffff),
  361. (u32)(addr >> 32), (u32)le16_to_cpu(fib->hw_fib->header.Size)));
  362. writel((u32)(addr & 0xffffffff), device);
  363. device += sizeof(u32);
  364. writel((u32)(addr >> 32), device);
  365. device += sizeof(u32);
  366. writel(le16_to_cpu(fib->hw_fib->header.Size), device);
  367. rx_writel(dev, MUnit.InboundQueue, Index);
  368. dprintk((KERN_DEBUG "aac_rx_send - return 0\n"));
  369. return 0;
  370. }
  371. /**
  372. * aac_rx_init - initialize an i960 based AAC card
  373. * @dev: device to configure
  374. *
  375. * Allocate and set up resources for the i960 based AAC variants. The
  376. * device_interface in the commregion will be allocated and linked
  377. * to the comm region.
  378. */
  379. int aac_rx_init(struct aac_dev *dev)
  380. {
  381. unsigned long start;
  382. unsigned long status;
  383. int instance;
  384. const char * name;
  385. instance = dev->id;
  386. name = dev->name;
  387. /*
  388. * Check to see if the board panic'd while booting.
  389. */
  390. /*
  391. * Check to see if the board failed any self tests.
  392. */
  393. if (rx_readl(dev, MUnit.OMRx[0]) & SELF_TEST_FAILED) {
  394. printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
  395. goto error_iounmap;
  396. }
  397. /*
  398. * Check to see if the board panic'd while booting.
  399. */
  400. if (rx_readl(dev, MUnit.OMRx[0]) & KERNEL_PANIC) {
  401. printk(KERN_ERR "%s%d: adapter kernel panic.\n", dev->name, instance);
  402. goto error_iounmap;
  403. }
  404. /*
  405. * Check to see if the monitor panic'd while booting.
  406. */
  407. if (rx_readl(dev, MUnit.OMRx[0]) & MONITOR_PANIC) {
  408. printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
  409. goto error_iounmap;
  410. }
  411. start = jiffies;
  412. /*
  413. * Wait for the adapter to be up and running. Wait up to 3 minutes
  414. */
  415. while ((!(rx_readl(dev, IndexRegs.Mailbox[7]) & KERNEL_UP_AND_RUNNING))
  416. || (!(rx_readl(dev, MUnit.OMRx[0]) & KERNEL_UP_AND_RUNNING)))
  417. {
  418. if(time_after(jiffies, start+180*HZ))
  419. {
  420. status = rx_readl(dev, IndexRegs.Mailbox[7]);
  421. printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
  422. dev->name, instance, status);
  423. goto error_iounmap;
  424. }
  425. schedule_timeout_uninterruptible(1);
  426. }
  427. if (request_irq(dev->scsi_host_ptr->irq, aac_rx_intr, SA_SHIRQ|SA_INTERRUPT, "aacraid", (void *)dev)<0)
  428. {
  429. printk(KERN_ERR "%s%d: Interrupt unavailable.\n", name, instance);
  430. goto error_iounmap;
  431. }
  432. /*
  433. * Fill in the function dispatch table.
  434. */
  435. dev->a_ops.adapter_interrupt = aac_rx_interrupt_adapter;
  436. dev->a_ops.adapter_disable_int = aac_rx_disable_interrupt;
  437. dev->a_ops.adapter_notify = aac_rx_notify_adapter;
  438. dev->a_ops.adapter_sync_cmd = rx_sync_cmd;
  439. dev->a_ops.adapter_check_health = aac_rx_check_health;
  440. dev->a_ops.adapter_send = aac_rx_send;
  441. /*
  442. * First clear out all interrupts. Then enable the one's that we
  443. * can handle.
  444. */
  445. rx_writeb(dev, MUnit.OIMR, 0xff);
  446. rx_writel(dev, MUnit.ODR, 0xffffffff);
  447. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
  448. if (aac_init_adapter(dev) == NULL)
  449. goto error_irq;
  450. if (dev->new_comm_interface)
  451. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);
  452. /*
  453. * Tell the adapter that all is configured, and it can start
  454. * accepting requests
  455. */
  456. aac_rx_start_adapter(dev);
  457. return 0;
  458. error_irq:
  459. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
  460. free_irq(dev->scsi_host_ptr->irq, (void *)dev);
  461. error_iounmap:
  462. return -1;
  463. }