a100u2w.h 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416
  1. /*
  2. * Initio A100 device driver for Linux.
  3. *
  4. * Copyright (c) 1994-1998 Initio Corporation
  5. * All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; see the file COPYING. If not, write to
  19. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  20. *
  21. * --------------------------------------------------------------------------
  22. *
  23. * Redistribution and use in source and binary forms, with or without
  24. * modification, are permitted provided that the following conditions
  25. * are met:
  26. * 1. Redistributions of source code must retain the above copyright
  27. * notice, this list of conditions, and the following disclaimer,
  28. * without modification, immediately at the beginning of the file.
  29. * 2. Redistributions in binary form must reproduce the above copyright
  30. * notice, this list of conditions and the following disclaimer in the
  31. * documentation and/or other materials provided with the distribution.
  32. * 3. The name of the author may not be used to endorse or promote products
  33. * derived from this software without specific prior written permission.
  34. *
  35. * Where this Software is combined with software released under the terms of
  36. * the GNU General Public License ("GPL") and the terms of the GPL would require the
  37. * combined work to also be released under the terms of the GPL, the terms
  38. * and conditions of this License will apply in addition to those of the
  39. * GPL with the exception of any terms or conditions of this License that
  40. * conflict with, or are expressly prohibited by, the GPL.
  41. *
  42. * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  43. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  44. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  45. * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  46. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  47. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  48. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  49. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  50. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  51. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  52. * SUCH DAMAGE.
  53. */
  54. /*
  55. * Revision History:
  56. * 06/18/98 HL, Initial production Version 1.02
  57. * 12/19/98 bv, Use spinlocks for 2.1.95 and up
  58. * 06/25/02 Doug Ledford <dledford@redhat.com>
  59. * - This and the i60uscsi.h file are almost identical,
  60. * merged them into a single header used by both .c files.
  61. */
  62. #define inia100_REVID "Initio INI-A100U2W SCSI device driver; Revision: 1.02d"
  63. #define ULONG unsigned long
  64. #define USHORT unsigned short
  65. #define UCHAR unsigned char
  66. #define BYTE unsigned char
  67. #define WORD unsigned short
  68. #define DWORD unsigned long
  69. #define UBYTE unsigned char
  70. #define UWORD unsigned short
  71. #define UDWORD unsigned long
  72. #define U32 u32
  73. #if 1
  74. #define ORC_MAXQUEUE 245
  75. #define ORC_MAXTAGS 64
  76. #else
  77. #define ORC_MAXQUEUE 25
  78. #define ORC_MAXTAGS 8
  79. #endif
  80. #define TOTAL_SG_ENTRY 32
  81. #define MAX_TARGETS 16
  82. #define IMAX_CDB 15
  83. #define SENSE_SIZE 14
  84. /************************************************************************/
  85. /* Scatter-Gather Element Structure */
  86. /************************************************************************/
  87. typedef struct ORC_SG_Struc {
  88. U32 SG_Ptr; /* Data Pointer */
  89. U32 SG_Len; /* Data Length */
  90. } ORC_SG;
  91. /* SCSI related definition */
  92. #define DISC_NOT_ALLOW 0x80 /* Disconnect is not allowed */
  93. #define DISC_ALLOW 0xC0 /* Disconnect is allowed */
  94. #define ORC_OFFSET_SCB 16
  95. #define ORC_MAX_SCBS 250
  96. #define MAX_CHANNELS 2
  97. #define MAX_ESCB_ELE 64
  98. #define TCF_DRV_255_63 0x0400
  99. /********************************************************/
  100. /* Orchid Host Command Set */
  101. /********************************************************/
  102. #define ORC_CMD_NOP 0x00 /* Host command - NOP */
  103. #define ORC_CMD_VERSION 0x01 /* Host command - Get F/W version */
  104. #define ORC_CMD_ECHO 0x02 /* Host command - ECHO */
  105. #define ORC_CMD_SET_NVM 0x03 /* Host command - Set NVRAM */
  106. #define ORC_CMD_GET_NVM 0x04 /* Host command - Get NVRAM */
  107. #define ORC_CMD_GET_BUS_STATUS 0x05 /* Host command - Get SCSI bus status */
  108. #define ORC_CMD_ABORT_SCB 0x06 /* Host command - Abort SCB */
  109. #define ORC_CMD_ISSUE_SCB 0x07 /* Host command - Issue SCB */
  110. /********************************************************/
  111. /* Orchid Register Set */
  112. /********************************************************/
  113. #define ORC_GINTS 0xA0 /* Global Interrupt Status */
  114. #define QINT 0x04 /* Reply Queue Interrupt */
  115. #define ORC_GIMSK 0xA1 /* Global Interrupt MASK */
  116. #define MQINT 0x04 /* Mask Reply Queue Interrupt */
  117. #define ORC_GCFG 0xA2 /* Global Configure */
  118. #define EEPRG 0x01 /* Enable EEPROM programming */
  119. #define ORC_GSTAT 0xA3 /* Global status */
  120. #define WIDEBUS 0x10 /* Wide SCSI Devices connected */
  121. #define ORC_HDATA 0xA4 /* Host Data */
  122. #define ORC_HCTRL 0xA5 /* Host Control */
  123. #define SCSIRST 0x80 /* SCSI bus reset */
  124. #define HDO 0x40 /* Host data out */
  125. #define HOSTSTOP 0x02 /* Host stop RISC engine */
  126. #define DEVRST 0x01 /* Device reset */
  127. #define ORC_HSTUS 0xA6 /* Host Status */
  128. #define HDI 0x02 /* Host data in */
  129. #define RREADY 0x01 /* RISC engine is ready to receive */
  130. #define ORC_NVRAM 0xA7 /* Nvram port address */
  131. #define SE2CS 0x008
  132. #define SE2CLK 0x004
  133. #define SE2DO 0x002
  134. #define SE2DI 0x001
  135. #define ORC_PQUEUE 0xA8 /* Posting queue FIFO */
  136. #define ORC_PQCNT 0xA9 /* Posting queue FIFO Cnt */
  137. #define ORC_RQUEUE 0xAA /* Reply queue FIFO */
  138. #define ORC_RQUEUECNT 0xAB /* Reply queue FIFO Cnt */
  139. #define ORC_FWBASEADR 0xAC /* Firmware base address */
  140. #define ORC_EBIOSADR0 0xB0 /* External Bios address */
  141. #define ORC_EBIOSADR1 0xB1 /* External Bios address */
  142. #define ORC_EBIOSADR2 0xB2 /* External Bios address */
  143. #define ORC_EBIOSDATA 0xB3 /* External Bios address */
  144. #define ORC_SCBSIZE 0xB7 /* SCB size register */
  145. #define ORC_SCBBASE0 0xB8 /* SCB base address 0 */
  146. #define ORC_SCBBASE1 0xBC /* SCB base address 1 */
  147. #define ORC_RISCCTL 0xE0 /* RISC Control */
  148. #define PRGMRST 0x002
  149. #define DOWNLOAD 0x001
  150. #define ORC_PRGMCTR0 0xE2 /* RISC program counter */
  151. #define ORC_PRGMCTR1 0xE3 /* RISC program counter */
  152. #define ORC_RISCRAM 0xEC /* RISC RAM data port 4 bytes */
  153. typedef struct orc_extended_scb { /* Extended SCB */
  154. ORC_SG ESCB_SGList[TOTAL_SG_ENTRY]; /*0 Start of SG list */
  155. struct scsi_cmnd *SCB_Srb; /*50 SRB Pointer */
  156. } ESCB;
  157. /***********************************************************************
  158. SCSI Control Block
  159. ************************************************************************/
  160. typedef struct orc_scb { /* Scsi_Ctrl_Blk */
  161. UBYTE SCB_Opcode; /*00 SCB command code&residual */
  162. UBYTE SCB_Flags; /*01 SCB Flags */
  163. UBYTE SCB_Target; /*02 Target Id */
  164. UBYTE SCB_Lun; /*03 Lun */
  165. U32 SCB_Reserved0; /*04 Reserved for ORCHID must 0 */
  166. U32 SCB_XferLen; /*08 Data Transfer Length */
  167. U32 SCB_Reserved1; /*0C Reserved for ORCHID must 0 */
  168. U32 SCB_SGLen; /*10 SG list # * 8 */
  169. U32 SCB_SGPAddr; /*14 SG List Buf physical Addr */
  170. U32 SCB_SGPAddrHigh; /*18 SG Buffer high physical Addr */
  171. UBYTE SCB_HaStat; /*1C Host Status */
  172. UBYTE SCB_TaStat; /*1D Target Status */
  173. UBYTE SCB_Status; /*1E SCB status */
  174. UBYTE SCB_Link; /*1F Link pointer, default 0xFF */
  175. UBYTE SCB_SenseLen; /*20 Sense Allocation Length */
  176. UBYTE SCB_CDBLen; /*21 CDB Length */
  177. UBYTE SCB_Ident; /*22 Identify */
  178. UBYTE SCB_TagMsg; /*23 Tag Message */
  179. UBYTE SCB_CDB[IMAX_CDB]; /*24 SCSI CDBs */
  180. UBYTE SCB_ScbIdx; /*3C Index for this ORCSCB */
  181. U32 SCB_SensePAddr; /*34 Sense Buffer physical Addr */
  182. ESCB *SCB_EScb; /*38 Extended SCB Pointer */
  183. #ifndef ALPHA
  184. UBYTE SCB_Reserved2[4]; /*3E Reserved for Driver use */
  185. #endif
  186. } ORC_SCB;
  187. /* Opcodes of ORCSCB_Opcode */
  188. #define ORC_EXECSCSI 0x00 /* SCSI initiator command with residual */
  189. #define ORC_BUSDEVRST 0x01 /* SCSI Bus Device Reset */
  190. /* Status of ORCSCB_Status */
  191. #define ORCSCB_COMPLETE 0x00 /* SCB request completed */
  192. #define ORCSCB_POST 0x01 /* SCB is posted by the HOST */
  193. /* Bit Definition for ORCSCB_Flags */
  194. #define SCF_DISINT 0x01 /* Disable HOST interrupt */
  195. #define SCF_DIR 0x18 /* Direction bits */
  196. #define SCF_NO_DCHK 0x00 /* Direction determined by SCSI */
  197. #define SCF_DIN 0x08 /* From Target to Initiator */
  198. #define SCF_DOUT 0x10 /* From Initiator to Target */
  199. #define SCF_NO_XF 0x18 /* No data transfer */
  200. #define SCF_POLL 0x40
  201. /* Error Codes for ORCSCB_HaStat */
  202. #define HOST_SEL_TOUT 0x11
  203. #define HOST_DO_DU 0x12
  204. #define HOST_BUS_FREE 0x13
  205. #define HOST_BAD_PHAS 0x14
  206. #define HOST_INV_CMD 0x16
  207. #define HOST_SCSI_RST 0x1B
  208. #define HOST_DEV_RST 0x1C
  209. /* Error Codes for ORCSCB_TaStat */
  210. #define TARGET_CHK_COND 0x02
  211. #define TARGET_BUSY 0x08
  212. #define TARGET_TAG_FULL 0x28
  213. /***********************************************************************
  214. Target Device Control Structure
  215. **********************************************************************/
  216. typedef struct ORC_Tar_Ctrl_Struc {
  217. UBYTE TCS_DrvDASD; /* 6 */
  218. UBYTE TCS_DrvSCSI; /* 7 */
  219. UBYTE TCS_DrvHead; /* 8 */
  220. UWORD TCS_DrvFlags; /* 4 */
  221. UBYTE TCS_DrvSector; /* 7 */
  222. } ORC_TCS;
  223. /* Bit Definition for TCF_DrvFlags */
  224. #define TCS_DF_NODASD_SUPT 0x20 /* Suppress OS/2 DASD Mgr support */
  225. #define TCS_DF_NOSCSI_SUPT 0x40 /* Suppress OS/2 SCSI Mgr support */
  226. /***********************************************************************
  227. Host Adapter Control Structure
  228. ************************************************************************/
  229. typedef struct ORC_Ha_Ctrl_Struc {
  230. USHORT HCS_Base; /* 00 */
  231. UBYTE HCS_Index; /* 02 */
  232. UBYTE HCS_Intr; /* 04 */
  233. UBYTE HCS_SCSI_ID; /* 06 H/A SCSI ID */
  234. UBYTE HCS_BIOS; /* 07 BIOS configuration */
  235. UBYTE HCS_Flags; /* 0B */
  236. UBYTE HCS_HAConfig1; /* 1B SCSI0MAXTags */
  237. UBYTE HCS_MaxTar; /* 1B SCSI0MAXTags */
  238. USHORT HCS_Units; /* Number of units this adapter */
  239. USHORT HCS_AFlags; /* Adapter info. defined flags */
  240. ULONG HCS_Timeout; /* Adapter timeout value */
  241. ORC_SCB *HCS_virScbArray; /* 28 Virtual Pointer to SCB array */
  242. dma_addr_t HCS_physScbArray; /* Scb Physical address */
  243. ESCB *HCS_virEscbArray; /* Virtual pointer to ESCB Scatter list */
  244. dma_addr_t HCS_physEscbArray; /* scatter list Physical address */
  245. UBYTE TargetFlag[16]; /* 30 target configuration, TCF_EN_TAG */
  246. UBYTE MaximumTags[16]; /* 40 ORC_MAX_SCBS */
  247. UBYTE ActiveTags[16][16]; /* 50 */
  248. ORC_TCS HCS_Tcs[16]; /* 28 */
  249. U32 BitAllocFlag[MAX_CHANNELS][8]; /* Max STB is 256, So 256/32 */
  250. spinlock_t BitAllocFlagLock;
  251. struct pci_dev *pdev;
  252. } ORC_HCS;
  253. /* Bit Definition for HCS_Flags */
  254. #define HCF_SCSI_RESET 0x01 /* SCSI BUS RESET */
  255. #define HCF_PARITY 0x02 /* parity card */
  256. #define HCF_LVDS 0x10 /* parity card */
  257. /* Bit Definition for TargetFlag */
  258. #define TCF_EN_255 0x08
  259. #define TCF_EN_TAG 0x10
  260. #define TCF_BUSY 0x20
  261. #define TCF_DISCONNECT 0x40
  262. #define TCF_SPIN_UP 0x80
  263. /* Bit Definition for HCS_AFlags */
  264. #define HCS_AF_IGNORE 0x01 /* Adapter ignore */
  265. #define HCS_AF_DISABLE_RESET 0x10 /* Adapter disable reset */
  266. #define HCS_AF_DISABLE_ADPT 0x80 /* Adapter disable */
  267. typedef struct _NVRAM {
  268. /*----------header ---------------*/
  269. UCHAR SubVendorID0; /* 00 - Sub Vendor ID */
  270. UCHAR SubVendorID1; /* 00 - Sub Vendor ID */
  271. UCHAR SubSysID0; /* 02 - Sub System ID */
  272. UCHAR SubSysID1; /* 02 - Sub System ID */
  273. UCHAR SubClass; /* 04 - Sub Class */
  274. UCHAR VendorID0; /* 05 - Vendor ID */
  275. UCHAR VendorID1; /* 05 - Vendor ID */
  276. UCHAR DeviceID0; /* 07 - Device ID */
  277. UCHAR DeviceID1; /* 07 - Device ID */
  278. UCHAR Reserved0[2]; /* 09 - Reserved */
  279. UCHAR Revision; /* 0B - Revision of data structure */
  280. /* ----Host Adapter Structure ---- */
  281. UCHAR NumOfCh; /* 0C - Number of SCSI channel */
  282. UCHAR BIOSConfig1; /* 0D - BIOS configuration 1 */
  283. UCHAR BIOSConfig2; /* 0E - BIOS boot channel&target ID */
  284. UCHAR BIOSConfig3; /* 0F - BIOS configuration 3 */
  285. /* ----SCSI channel Structure ---- */
  286. /* from "CTRL-I SCSI Host Adapter SetUp menu " */
  287. UCHAR SCSI0Id; /* 10 - Channel 0 SCSI ID */
  288. UCHAR SCSI0Config; /* 11 - Channel 0 SCSI configuration */
  289. UCHAR SCSI0MaxTags; /* 12 - Channel 0 Maximum tags */
  290. UCHAR SCSI0ResetTime; /* 13 - Channel 0 Reset recovering time */
  291. UCHAR ReservedforChannel0[2]; /* 14 - Reserved */
  292. /* ----SCSI target Structure ---- */
  293. /* from "CTRL-I SCSI device SetUp menu " */
  294. UCHAR Target00Config; /* 16 - Channel 0 Target 0 config */
  295. UCHAR Target01Config; /* 17 - Channel 0 Target 1 config */
  296. UCHAR Target02Config; /* 18 - Channel 0 Target 2 config */
  297. UCHAR Target03Config; /* 19 - Channel 0 Target 3 config */
  298. UCHAR Target04Config; /* 1A - Channel 0 Target 4 config */
  299. UCHAR Target05Config; /* 1B - Channel 0 Target 5 config */
  300. UCHAR Target06Config; /* 1C - Channel 0 Target 6 config */
  301. UCHAR Target07Config; /* 1D - Channel 0 Target 7 config */
  302. UCHAR Target08Config; /* 1E - Channel 0 Target 8 config */
  303. UCHAR Target09Config; /* 1F - Channel 0 Target 9 config */
  304. UCHAR Target0AConfig; /* 20 - Channel 0 Target A config */
  305. UCHAR Target0BConfig; /* 21 - Channel 0 Target B config */
  306. UCHAR Target0CConfig; /* 22 - Channel 0 Target C config */
  307. UCHAR Target0DConfig; /* 23 - Channel 0 Target D config */
  308. UCHAR Target0EConfig; /* 24 - Channel 0 Target E config */
  309. UCHAR Target0FConfig; /* 25 - Channel 0 Target F config */
  310. UCHAR SCSI1Id; /* 26 - Channel 1 SCSI ID */
  311. UCHAR SCSI1Config; /* 27 - Channel 1 SCSI configuration */
  312. UCHAR SCSI1MaxTags; /* 28 - Channel 1 Maximum tags */
  313. UCHAR SCSI1ResetTime; /* 29 - Channel 1 Reset recovering time */
  314. UCHAR ReservedforChannel1[2]; /* 2A - Reserved */
  315. /* ----SCSI target Structure ---- */
  316. /* from "CTRL-I SCSI device SetUp menu " */
  317. UCHAR Target10Config; /* 2C - Channel 1 Target 0 config */
  318. UCHAR Target11Config; /* 2D - Channel 1 Target 1 config */
  319. UCHAR Target12Config; /* 2E - Channel 1 Target 2 config */
  320. UCHAR Target13Config; /* 2F - Channel 1 Target 3 config */
  321. UCHAR Target14Config; /* 30 - Channel 1 Target 4 config */
  322. UCHAR Target15Config; /* 31 - Channel 1 Target 5 config */
  323. UCHAR Target16Config; /* 32 - Channel 1 Target 6 config */
  324. UCHAR Target17Config; /* 33 - Channel 1 Target 7 config */
  325. UCHAR Target18Config; /* 34 - Channel 1 Target 8 config */
  326. UCHAR Target19Config; /* 35 - Channel 1 Target 9 config */
  327. UCHAR Target1AConfig; /* 36 - Channel 1 Target A config */
  328. UCHAR Target1BConfig; /* 37 - Channel 1 Target B config */
  329. UCHAR Target1CConfig; /* 38 - Channel 1 Target C config */
  330. UCHAR Target1DConfig; /* 39 - Channel 1 Target D config */
  331. UCHAR Target1EConfig; /* 3A - Channel 1 Target E config */
  332. UCHAR Target1FConfig; /* 3B - Channel 1 Target F config */
  333. UCHAR reserved[3]; /* 3C - Reserved */
  334. /* ---------- CheckSum ---------- */
  335. UCHAR CheckSum; /* 3F - Checksum of NVRam */
  336. } NVRAM, *PNVRAM;
  337. /* Bios Configuration for nvram->BIOSConfig1 */
  338. #define NBC_BIOSENABLE 0x01 /* BIOS enable */
  339. #define NBC_CDROM 0x02 /* Support bootable CDROM */
  340. #define NBC_REMOVABLE 0x04 /* Support removable drive */
  341. /* Bios Configuration for nvram->BIOSConfig2 */
  342. #define NBB_TARGET_MASK 0x0F /* Boot SCSI target ID number */
  343. #define NBB_CHANL_MASK 0xF0 /* Boot SCSI channel number */
  344. /* Bit definition for nvram->SCSIConfig */
  345. #define NCC_BUSRESET 0x01 /* Reset SCSI bus at power up */
  346. #define NCC_PARITYCHK 0x02 /* SCSI parity enable */
  347. #define NCC_LVDS 0x10 /* Enable LVDS */
  348. #define NCC_ACTTERM1 0x20 /* Enable active terminator 1 */
  349. #define NCC_ACTTERM2 0x40 /* Enable active terminator 2 */
  350. #define NCC_AUTOTERM 0x80 /* Enable auto termination */
  351. /* Bit definition for nvram->TargetxConfig */
  352. #define NTC_PERIOD 0x07 /* Maximum Sync. Speed */
  353. #define NTC_1GIGA 0x08 /* 255 head / 63 sectors (64/32) */
  354. #define NTC_NO_SYNC 0x10 /* NO SYNC. NEGO */
  355. #define NTC_NO_WIDESYNC 0x20 /* NO WIDE SYNC. NEGO */
  356. #define NTC_DISC_ENABLE 0x40 /* Enable SCSI disconnect */
  357. #define NTC_SPINUP 0x80 /* Start disk drive */
  358. /* Default NVRam values */
  359. #define NBC_DEFAULT (NBC_ENABLE)
  360. #define NCC_DEFAULT (NCC_BUSRESET | NCC_AUTOTERM | NCC_PARITYCHK)
  361. #define NCC_MAX_TAGS 0x20 /* Maximum tags per target */
  362. #define NCC_RESET_TIME 0x0A /* SCSI RESET recovering time */
  363. #define NTC_DEFAULT (NTC_1GIGA | NTC_NO_WIDESYNC | NTC_DISC_ENABLE)
  364. #define ORC_RD(x,y) (UCHAR)(inb( (int)((ULONG)((ULONG)x+(UCHAR)y)) ))
  365. #define ORC_RDWORD(x,y) (short)(inl((int)((ULONG)((ULONG)x+(UCHAR)y)) ))
  366. #define ORC_RDLONG(x,y) (long)(inl((int)((ULONG)((ULONG)x+(UCHAR)y)) ))
  367. #define ORC_WR( adr,data) outb( (UCHAR)(data), (int)(adr))
  368. #define ORC_WRSHORT(adr,data) outw( (UWORD)(data), (int)(adr))
  369. #define ORC_WRLONG( adr,data) outl( (ULONG)(data), (int)(adr))