rtc-x1205.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614
  1. /*
  2. * An i2c driver for the Xicor/Intersil X1205 RTC
  3. * Copyright 2004 Karen Spearel
  4. * Copyright 2005 Alessandro Zummo
  5. *
  6. * please send all reports to:
  7. * Karen Spearel <kas111 at gmail dot com>
  8. * Alessandro Zummo <a.zummo@towertech.it>
  9. *
  10. * based on a lot of other RTC drivers.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. */
  16. #include <linux/i2c.h>
  17. #include <linux/bcd.h>
  18. #include <linux/rtc.h>
  19. #include <linux/delay.h>
  20. #define DRV_VERSION "1.0.7"
  21. /* Addresses to scan: none. This chip is located at
  22. * 0x6f and uses a two bytes register addressing.
  23. * Two bytes need to be written to read a single register,
  24. * while most other chips just require one and take the second
  25. * one as the data to be written. To prevent corrupting
  26. * unknown chips, the user must explicitely set the probe parameter.
  27. */
  28. static unsigned short normal_i2c[] = { I2C_CLIENT_END };
  29. /* Insmod parameters */
  30. I2C_CLIENT_INSMOD;
  31. /* offsets into CCR area */
  32. #define CCR_SEC 0
  33. #define CCR_MIN 1
  34. #define CCR_HOUR 2
  35. #define CCR_MDAY 3
  36. #define CCR_MONTH 4
  37. #define CCR_YEAR 5
  38. #define CCR_WDAY 6
  39. #define CCR_Y2K 7
  40. #define X1205_REG_SR 0x3F /* status register */
  41. #define X1205_REG_Y2K 0x37
  42. #define X1205_REG_DW 0x36
  43. #define X1205_REG_YR 0x35
  44. #define X1205_REG_MO 0x34
  45. #define X1205_REG_DT 0x33
  46. #define X1205_REG_HR 0x32
  47. #define X1205_REG_MN 0x31
  48. #define X1205_REG_SC 0x30
  49. #define X1205_REG_DTR 0x13
  50. #define X1205_REG_ATR 0x12
  51. #define X1205_REG_INT 0x11
  52. #define X1205_REG_0 0x10
  53. #define X1205_REG_Y2K1 0x0F
  54. #define X1205_REG_DWA1 0x0E
  55. #define X1205_REG_YRA1 0x0D
  56. #define X1205_REG_MOA1 0x0C
  57. #define X1205_REG_DTA1 0x0B
  58. #define X1205_REG_HRA1 0x0A
  59. #define X1205_REG_MNA1 0x09
  60. #define X1205_REG_SCA1 0x08
  61. #define X1205_REG_Y2K0 0x07
  62. #define X1205_REG_DWA0 0x06
  63. #define X1205_REG_YRA0 0x05
  64. #define X1205_REG_MOA0 0x04
  65. #define X1205_REG_DTA0 0x03
  66. #define X1205_REG_HRA0 0x02
  67. #define X1205_REG_MNA0 0x01
  68. #define X1205_REG_SCA0 0x00
  69. #define X1205_CCR_BASE 0x30 /* Base address of CCR */
  70. #define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
  71. #define X1205_SR_RTCF 0x01 /* Clock failure */
  72. #define X1205_SR_WEL 0x02 /* Write Enable Latch */
  73. #define X1205_SR_RWEL 0x04 /* Register Write Enable */
  74. #define X1205_DTR_DTR0 0x01
  75. #define X1205_DTR_DTR1 0x02
  76. #define X1205_DTR_DTR2 0x04
  77. #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
  78. /* Prototypes */
  79. static int x1205_attach(struct i2c_adapter *adapter);
  80. static int x1205_detach(struct i2c_client *client);
  81. static int x1205_probe(struct i2c_adapter *adapter, int address, int kind);
  82. static struct i2c_driver x1205_driver = {
  83. .driver = {
  84. .name = "x1205",
  85. },
  86. .id = I2C_DRIVERID_X1205,
  87. .attach_adapter = &x1205_attach,
  88. .detach_client = &x1205_detach,
  89. };
  90. /*
  91. * In the routines that deal directly with the x1205 hardware, we use
  92. * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
  93. * Epoch is initialized as 2000. Time is set to UTC.
  94. */
  95. static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
  96. unsigned char reg_base)
  97. {
  98. unsigned char dt_addr[2] = { 0, reg_base };
  99. unsigned char buf[8];
  100. struct i2c_msg msgs[] = {
  101. { client->addr, 0, 2, dt_addr }, /* setup read ptr */
  102. { client->addr, I2C_M_RD, 8, buf }, /* read date */
  103. };
  104. /* read date registers */
  105. if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
  106. dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
  107. return -EIO;
  108. }
  109. dev_dbg(&client->dev,
  110. "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
  111. "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
  112. __FUNCTION__,
  113. buf[0], buf[1], buf[2], buf[3],
  114. buf[4], buf[5], buf[6], buf[7]);
  115. tm->tm_sec = BCD2BIN(buf[CCR_SEC]);
  116. tm->tm_min = BCD2BIN(buf[CCR_MIN]);
  117. tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
  118. tm->tm_mday = BCD2BIN(buf[CCR_MDAY]);
  119. tm->tm_mon = BCD2BIN(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
  120. tm->tm_year = BCD2BIN(buf[CCR_YEAR])
  121. + (BCD2BIN(buf[CCR_Y2K]) * 100) - 1900;
  122. tm->tm_wday = buf[CCR_WDAY];
  123. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  124. "mday=%d, mon=%d, year=%d, wday=%d\n",
  125. __FUNCTION__,
  126. tm->tm_sec, tm->tm_min, tm->tm_hour,
  127. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  128. return 0;
  129. }
  130. static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
  131. {
  132. static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
  133. struct i2c_msg msgs[] = {
  134. { client->addr, 0, 2, sr_addr }, /* setup read ptr */
  135. { client->addr, I2C_M_RD, 1, sr }, /* read status */
  136. };
  137. /* read status register */
  138. if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
  139. dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
  140. return -EIO;
  141. }
  142. return 0;
  143. }
  144. static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
  145. int datetoo, u8 reg_base)
  146. {
  147. int i, xfer;
  148. unsigned char buf[8];
  149. static const unsigned char wel[3] = { 0, X1205_REG_SR,
  150. X1205_SR_WEL };
  151. static const unsigned char rwel[3] = { 0, X1205_REG_SR,
  152. X1205_SR_WEL | X1205_SR_RWEL };
  153. static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
  154. dev_dbg(&client->dev,
  155. "%s: secs=%d, mins=%d, hours=%d\n",
  156. __FUNCTION__,
  157. tm->tm_sec, tm->tm_min, tm->tm_hour);
  158. buf[CCR_SEC] = BIN2BCD(tm->tm_sec);
  159. buf[CCR_MIN] = BIN2BCD(tm->tm_min);
  160. /* set hour and 24hr bit */
  161. buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) | X1205_HR_MIL;
  162. /* should we also set the date? */
  163. if (datetoo) {
  164. dev_dbg(&client->dev,
  165. "%s: mday=%d, mon=%d, year=%d, wday=%d\n",
  166. __FUNCTION__,
  167. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  168. buf[CCR_MDAY] = BIN2BCD(tm->tm_mday);
  169. /* month, 1 - 12 */
  170. buf[CCR_MONTH] = BIN2BCD(tm->tm_mon + 1);
  171. /* year, since the rtc epoch*/
  172. buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100);
  173. buf[CCR_WDAY] = tm->tm_wday & 0x07;
  174. buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100);
  175. }
  176. /* this sequence is required to unlock the chip */
  177. if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
  178. dev_err(&client->dev, "%s: wel - %d\n", __FUNCTION__, xfer);
  179. return -EIO;
  180. }
  181. if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
  182. dev_err(&client->dev, "%s: rwel - %d\n", __FUNCTION__, xfer);
  183. return -EIO;
  184. }
  185. /* write register's data */
  186. for (i = 0; i < (datetoo ? 8 : 3); i++) {
  187. unsigned char rdata[3] = { 0, reg_base + i, buf[i] };
  188. xfer = i2c_master_send(client, rdata, 3);
  189. if (xfer != 3) {
  190. dev_err(&client->dev,
  191. "%s: xfer=%d addr=%02x, data=%02x\n",
  192. __FUNCTION__,
  193. xfer, rdata[1], rdata[2]);
  194. return -EIO;
  195. }
  196. };
  197. /* disable further writes */
  198. if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
  199. dev_err(&client->dev, "%s: diswe - %d\n", __FUNCTION__, xfer);
  200. return -EIO;
  201. }
  202. return 0;
  203. }
  204. static int x1205_fix_osc(struct i2c_client *client)
  205. {
  206. int err;
  207. struct rtc_time tm;
  208. tm.tm_hour = tm.tm_min = tm.tm_sec = 0;
  209. if ((err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE)) < 0)
  210. dev_err(&client->dev,
  211. "unable to restart the oscillator\n");
  212. return err;
  213. }
  214. static int x1205_get_dtrim(struct i2c_client *client, int *trim)
  215. {
  216. unsigned char dtr;
  217. static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
  218. struct i2c_msg msgs[] = {
  219. { client->addr, 0, 2, dtr_addr }, /* setup read ptr */
  220. { client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */
  221. };
  222. /* read dtr register */
  223. if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
  224. dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
  225. return -EIO;
  226. }
  227. dev_dbg(&client->dev, "%s: raw dtr=%x\n", __FUNCTION__, dtr);
  228. *trim = 0;
  229. if (dtr & X1205_DTR_DTR0)
  230. *trim += 20;
  231. if (dtr & X1205_DTR_DTR1)
  232. *trim += 10;
  233. if (dtr & X1205_DTR_DTR2)
  234. *trim = -*trim;
  235. return 0;
  236. }
  237. static int x1205_get_atrim(struct i2c_client *client, int *trim)
  238. {
  239. s8 atr;
  240. static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
  241. struct i2c_msg msgs[] = {
  242. { client->addr, 0, 2, atr_addr }, /* setup read ptr */
  243. { client->addr, I2C_M_RD, 1, &atr }, /* read atr */
  244. };
  245. /* read atr register */
  246. if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
  247. dev_err(&client->dev, "%s: read error\n", __FUNCTION__);
  248. return -EIO;
  249. }
  250. dev_dbg(&client->dev, "%s: raw atr=%x\n", __FUNCTION__, atr);
  251. /* atr is a two's complement value on 6 bits,
  252. * perform sign extension. The formula is
  253. * Catr = (atr * 0.25pF) + 11.00pF.
  254. */
  255. if (atr & 0x20)
  256. atr |= 0xC0;
  257. dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __FUNCTION__, atr, atr);
  258. *trim = (atr * 250) + 11000;
  259. dev_dbg(&client->dev, "%s: real=%d\n", __FUNCTION__, *trim);
  260. return 0;
  261. }
  262. struct x1205_limit
  263. {
  264. unsigned char reg, mask, min, max;
  265. };
  266. static int x1205_validate_client(struct i2c_client *client)
  267. {
  268. int i, xfer;
  269. /* Probe array. We will read the register at the specified
  270. * address and check if the given bits are zero.
  271. */
  272. static const unsigned char probe_zero_pattern[] = {
  273. /* register, mask */
  274. X1205_REG_SR, 0x18,
  275. X1205_REG_DTR, 0xF8,
  276. X1205_REG_ATR, 0xC0,
  277. X1205_REG_INT, 0x18,
  278. X1205_REG_0, 0xFF,
  279. };
  280. static const struct x1205_limit probe_limits_pattern[] = {
  281. /* register, mask, min, max */
  282. { X1205_REG_Y2K, 0xFF, 19, 20 },
  283. { X1205_REG_DW, 0xFF, 0, 6 },
  284. { X1205_REG_YR, 0xFF, 0, 99 },
  285. { X1205_REG_MO, 0xFF, 0, 12 },
  286. { X1205_REG_DT, 0xFF, 0, 31 },
  287. { X1205_REG_HR, 0x7F, 0, 23 },
  288. { X1205_REG_MN, 0xFF, 0, 59 },
  289. { X1205_REG_SC, 0xFF, 0, 59 },
  290. { X1205_REG_Y2K1, 0xFF, 19, 20 },
  291. { X1205_REG_Y2K0, 0xFF, 19, 20 },
  292. };
  293. /* check that registers have bits a 0 where expected */
  294. for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
  295. unsigned char buf;
  296. unsigned char addr[2] = { 0, probe_zero_pattern[i] };
  297. struct i2c_msg msgs[2] = {
  298. { client->addr, 0, 2, addr },
  299. { client->addr, I2C_M_RD, 1, &buf },
  300. };
  301. if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
  302. dev_err(&client->adapter->dev,
  303. "%s: could not read register %x\n",
  304. __FUNCTION__, probe_zero_pattern[i]);
  305. return -EIO;
  306. }
  307. if ((buf & probe_zero_pattern[i+1]) != 0) {
  308. dev_err(&client->adapter->dev,
  309. "%s: register=%02x, zero pattern=%d, value=%x\n",
  310. __FUNCTION__, probe_zero_pattern[i], i, buf);
  311. return -ENODEV;
  312. }
  313. }
  314. /* check limits (only registers with bcd values) */
  315. for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
  316. unsigned char reg, value;
  317. unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
  318. struct i2c_msg msgs[2] = {
  319. { client->addr, 0, 2, addr },
  320. { client->addr, I2C_M_RD, 1, &reg },
  321. };
  322. if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
  323. dev_err(&client->adapter->dev,
  324. "%s: could not read register %x\n",
  325. __FUNCTION__, probe_limits_pattern[i].reg);
  326. return -EIO;
  327. }
  328. value = BCD2BIN(reg & probe_limits_pattern[i].mask);
  329. if (value > probe_limits_pattern[i].max ||
  330. value < probe_limits_pattern[i].min) {
  331. dev_dbg(&client->adapter->dev,
  332. "%s: register=%x, lim pattern=%d, value=%d\n",
  333. __FUNCTION__, probe_limits_pattern[i].reg,
  334. i, value);
  335. return -ENODEV;
  336. }
  337. }
  338. return 0;
  339. }
  340. static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  341. {
  342. return x1205_get_datetime(to_i2c_client(dev),
  343. &alrm->time, X1205_ALM0_BASE);
  344. }
  345. static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  346. {
  347. return x1205_set_datetime(to_i2c_client(dev),
  348. &alrm->time, 1, X1205_ALM0_BASE);
  349. }
  350. static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
  351. {
  352. return x1205_get_datetime(to_i2c_client(dev),
  353. tm, X1205_CCR_BASE);
  354. }
  355. static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
  356. {
  357. return x1205_set_datetime(to_i2c_client(dev),
  358. tm, 1, X1205_CCR_BASE);
  359. }
  360. static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
  361. {
  362. int err, dtrim, atrim;
  363. if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
  364. seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
  365. if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
  366. seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
  367. atrim / 1000, atrim % 1000);
  368. return 0;
  369. }
  370. static struct rtc_class_ops x1205_rtc_ops = {
  371. .proc = x1205_rtc_proc,
  372. .read_time = x1205_rtc_read_time,
  373. .set_time = x1205_rtc_set_time,
  374. .read_alarm = x1205_rtc_read_alarm,
  375. .set_alarm = x1205_rtc_set_alarm,
  376. };
  377. static ssize_t x1205_sysfs_show_atrim(struct device *dev,
  378. struct device_attribute *attr, char *buf)
  379. {
  380. int err, atrim;
  381. err = x1205_get_atrim(to_i2c_client(dev), &atrim);
  382. if (err)
  383. return err;
  384. return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
  385. }
  386. static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
  387. static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
  388. struct device_attribute *attr, char *buf)
  389. {
  390. int err, dtrim;
  391. err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
  392. if (err)
  393. return err;
  394. return sprintf(buf, "%d ppm\n", dtrim);
  395. }
  396. static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
  397. static int x1205_attach(struct i2c_adapter *adapter)
  398. {
  399. return i2c_probe(adapter, &addr_data, x1205_probe);
  400. }
  401. static int x1205_probe(struct i2c_adapter *adapter, int address, int kind)
  402. {
  403. int err = 0;
  404. unsigned char sr;
  405. struct i2c_client *client;
  406. struct rtc_device *rtc;
  407. dev_dbg(&adapter->dev, "%s\n", __FUNCTION__);
  408. if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
  409. err = -ENODEV;
  410. goto exit;
  411. }
  412. if (!(client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL))) {
  413. err = -ENOMEM;
  414. goto exit;
  415. }
  416. /* I2C client */
  417. client->addr = address;
  418. client->driver = &x1205_driver;
  419. client->adapter = adapter;
  420. strlcpy(client->name, x1205_driver.driver.name, I2C_NAME_SIZE);
  421. /* Verify the chip is really an X1205 */
  422. if (kind < 0) {
  423. if (x1205_validate_client(client) < 0) {
  424. err = -ENODEV;
  425. goto exit_kfree;
  426. }
  427. }
  428. /* Inform the i2c layer */
  429. if ((err = i2c_attach_client(client)))
  430. goto exit_kfree;
  431. dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
  432. rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
  433. &x1205_rtc_ops, THIS_MODULE);
  434. if (IS_ERR(rtc)) {
  435. err = PTR_ERR(rtc);
  436. goto exit_detach;
  437. }
  438. i2c_set_clientdata(client, rtc);
  439. /* Check for power failures and eventualy enable the osc */
  440. if ((err = x1205_get_status(client, &sr)) == 0) {
  441. if (sr & X1205_SR_RTCF) {
  442. dev_err(&client->dev,
  443. "power failure detected, "
  444. "please set the clock\n");
  445. udelay(50);
  446. x1205_fix_osc(client);
  447. }
  448. }
  449. else
  450. dev_err(&client->dev, "couldn't read status\n");
  451. device_create_file(&client->dev, &dev_attr_atrim);
  452. device_create_file(&client->dev, &dev_attr_dtrim);
  453. return 0;
  454. exit_detach:
  455. i2c_detach_client(client);
  456. exit_kfree:
  457. kfree(client);
  458. exit:
  459. return err;
  460. }
  461. static int x1205_detach(struct i2c_client *client)
  462. {
  463. int err;
  464. struct rtc_device *rtc = i2c_get_clientdata(client);
  465. if (rtc)
  466. rtc_device_unregister(rtc);
  467. if ((err = i2c_detach_client(client)))
  468. return err;
  469. kfree(client);
  470. return 0;
  471. }
  472. static int __init x1205_init(void)
  473. {
  474. return i2c_add_driver(&x1205_driver);
  475. }
  476. static void __exit x1205_exit(void)
  477. {
  478. i2c_del_driver(&x1205_driver);
  479. }
  480. MODULE_AUTHOR(
  481. "Karen Spearel <kas111 at gmail dot com>, "
  482. "Alessandro Zummo <a.zummo@towertech.it>");
  483. MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
  484. MODULE_LICENSE("GPL");
  485. MODULE_VERSION(DRV_VERSION);
  486. module_init(x1205_init);
  487. module_exit(x1205_exit);