pxa2xx_base.c 6.2 KB

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  1. /*======================================================================
  2. Device driver for the PCMCIA control functionality of PXA2xx
  3. microprocessors.
  4. The contents of this file may be used under the
  5. terms of the GNU Public License version 2 (the "GPL")
  6. (c) Ian Molton (spyro@f2s.com) 2003
  7. (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4
  8. derived from sa11xx_base.c
  9. Portions created by John G. Dorsey are
  10. Copyright (C) 1999 John G. Dorsey.
  11. ======================================================================*/
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/config.h>
  15. #include <linux/cpufreq.h>
  16. #include <linux/ioport.h>
  17. #include <linux/kernel.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/platform_device.h>
  20. #include <asm/hardware.h>
  21. #include <asm/io.h>
  22. #include <asm/irq.h>
  23. #include <asm/system.h>
  24. #include <asm/arch/pxa-regs.h>
  25. #include <pcmcia/cs_types.h>
  26. #include <pcmcia/ss.h>
  27. #include <pcmcia/bulkmem.h>
  28. #include <pcmcia/cistpl.h>
  29. #include "cs_internal.h"
  30. #include "soc_common.h"
  31. #include "pxa2xx_base.h"
  32. #define MCXX_SETUP_MASK (0x7f)
  33. #define MCXX_ASST_MASK (0x1f)
  34. #define MCXX_HOLD_MASK (0x3f)
  35. #define MCXX_SETUP_SHIFT (0)
  36. #define MCXX_ASST_SHIFT (7)
  37. #define MCXX_HOLD_SHIFT (14)
  38. static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,
  39. u_int mem_clk_10khz)
  40. {
  41. u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  42. return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
  43. }
  44. static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,
  45. u_int mem_clk_10khz)
  46. {
  47. u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  48. return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
  49. }
  50. static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,
  51. u_int mem_clk_10khz)
  52. {
  53. u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  54. return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;
  55. }
  56. /* This function returns the (approximate) command assertion period, in
  57. * nanoseconds, for a given CPU clock frequency and MCXX_ASST value:
  58. */
  59. static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,
  60. u_int pcmcia_mcxx_asst)
  61. {
  62. return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
  63. }
  64. static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock )
  65. {
  66. MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock)
  67. & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
  68. | ((pxa2xx_mcxx_asst(speed, clock)
  69. & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
  70. | ((pxa2xx_mcxx_hold(speed, clock)
  71. & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
  72. return 0;
  73. }
  74. static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock )
  75. {
  76. MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock)
  77. & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
  78. | ((pxa2xx_mcxx_asst(speed, clock)
  79. & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
  80. | ((pxa2xx_mcxx_hold(speed, clock)
  81. & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
  82. return 0;
  83. }
  84. static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock )
  85. {
  86. MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock)
  87. & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
  88. | ((pxa2xx_mcxx_asst(speed, clock)
  89. & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
  90. | ((pxa2xx_mcxx_hold(speed, clock)
  91. & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
  92. return 0;
  93. }
  94. static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk)
  95. {
  96. struct soc_pcmcia_timing timing;
  97. int sock = skt->nr;
  98. soc_common_pcmcia_get_timing(skt, &timing);
  99. pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk);
  100. pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk);
  101. pxa2xx_pcmcia_set_mcio(sock, timing.io, clk);
  102. return 0;
  103. }
  104. static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
  105. {
  106. unsigned int clk = get_memclk_frequency_10khz();
  107. return pxa2xx_pcmcia_set_mcxx(skt, clk);
  108. }
  109. #ifdef CONFIG_CPU_FREQ
  110. static int
  111. pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
  112. unsigned long val,
  113. struct cpufreq_freqs *freqs)
  114. {
  115. #warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
  116. switch (val) {
  117. case CPUFREQ_PRECHANGE:
  118. if (freqs->new > freqs->old) {
  119. debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "
  120. "pre-updating\n",
  121. freqs->new / 1000, (freqs->new / 100) % 10,
  122. freqs->old / 1000, (freqs->old / 100) % 10);
  123. pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
  124. }
  125. break;
  126. case CPUFREQ_POSTCHANGE:
  127. if (freqs->new < freqs->old) {
  128. debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "
  129. "post-updating\n",
  130. freqs->new / 1000, (freqs->new / 100) % 10,
  131. freqs->old / 1000, (freqs->old / 100) % 10);
  132. pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
  133. }
  134. break;
  135. }
  136. return 0;
  137. }
  138. #endif
  139. int pxa2xx_drv_pcmcia_probe(struct device *dev)
  140. {
  141. int ret;
  142. struct pcmcia_low_level *ops;
  143. int first, nr;
  144. if (!dev || !dev->platform_data)
  145. return -ENODEV;
  146. ops = (struct pcmcia_low_level *)dev->platform_data;
  147. first = ops->first;
  148. nr = ops->nr;
  149. /* Provide our PXA2xx specific timing routines. */
  150. ops->set_timing = pxa2xx_pcmcia_set_timing;
  151. #ifdef CONFIG_CPU_FREQ
  152. ops->frequency_change = pxa2xx_pcmcia_frequency_change;
  153. #endif
  154. ret = soc_common_drv_pcmcia_probe(dev, ops, first, nr);
  155. if (ret == 0) {
  156. /*
  157. * We have at least one socket, so set MECR:CIT
  158. * (Card Is There)
  159. */
  160. MECR |= MECR_CIT;
  161. /* Set MECR:NOS (Number Of Sockets) */
  162. if (nr > 1)
  163. MECR |= MECR_NOS;
  164. else
  165. MECR &= ~MECR_NOS;
  166. }
  167. return ret;
  168. }
  169. EXPORT_SYMBOL(pxa2xx_drv_pcmcia_probe);
  170. static int pxa2xx_drv_pcmcia_resume(struct device *dev)
  171. {
  172. struct pcmcia_low_level *ops = dev->platform_data;
  173. int nr = ops ? ops->nr : 0;
  174. MECR = nr > 1 ? MECR_CIT | MECR_NOS : (nr > 0 ? MECR_CIT : 0);
  175. return pcmcia_socket_dev_resume(dev);
  176. }
  177. static struct device_driver pxa2xx_pcmcia_driver = {
  178. .probe = pxa2xx_drv_pcmcia_probe,
  179. .remove = soc_common_drv_pcmcia_remove,
  180. .suspend = pcmcia_socket_dev_suspend,
  181. .resume = pxa2xx_drv_pcmcia_resume,
  182. .name = "pxa2xx-pcmcia",
  183. .bus = &platform_bus_type,
  184. };
  185. static int __init pxa2xx_pcmcia_init(void)
  186. {
  187. return driver_register(&pxa2xx_pcmcia_driver);
  188. }
  189. static void __exit pxa2xx_pcmcia_exit(void)
  190. {
  191. driver_unregister(&pxa2xx_pcmcia_driver);
  192. }
  193. fs_initcall(pxa2xx_pcmcia_init);
  194. module_exit(pxa2xx_pcmcia_exit);
  195. MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
  196. MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");
  197. MODULE_LICENSE("GPL");