parport_gsc.c 11 KB

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  1. /*
  2. * Low-level parallel-support for PC-style hardware integrated in the
  3. * LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * (C) 1999-2001 by Helge Deller <deller@gmx.de>
  11. *
  12. *
  13. * based on parport_pc.c by
  14. * Grant Guenther <grant@torque.net>
  15. * Phil Blundell <philb@gnu.org>
  16. * Tim Waugh <tim@cyberelk.demon.co.uk>
  17. * Jose Renau <renau@acm.org>
  18. * David Campbell <campbell@torque.net>
  19. * Andrea Arcangeli
  20. */
  21. #undef DEBUG /* undef for production */
  22. #include <linux/module.h>
  23. #include <linux/init.h>
  24. #include <linux/sched.h>
  25. #include <linux/delay.h>
  26. #include <linux/errno.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/ioport.h>
  29. #include <linux/kernel.h>
  30. #include <linux/slab.h>
  31. #include <linux/pci.h>
  32. #include <linux/sysctl.h>
  33. #include <asm/io.h>
  34. #include <asm/dma.h>
  35. #include <asm/uaccess.h>
  36. #include <asm/superio.h>
  37. #include <linux/parport.h>
  38. #include <asm/pdc.h>
  39. #include <asm/parisc-device.h>
  40. #include <asm/hardware.h>
  41. #include "parport_gsc.h"
  42. MODULE_AUTHOR("Helge Deller <deller@gmx.de>");
  43. MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
  44. MODULE_SUPPORTED_DEVICE("integrated PC-style parallel port");
  45. MODULE_LICENSE("GPL");
  46. /*
  47. * Clear TIMEOUT BIT in EPP MODE
  48. *
  49. * This is also used in SPP detection.
  50. */
  51. static int clear_epp_timeout(struct parport *pb)
  52. {
  53. unsigned char r;
  54. if (!(parport_gsc_read_status(pb) & 0x01))
  55. return 1;
  56. /* To clear timeout some chips require double read */
  57. parport_gsc_read_status(pb);
  58. r = parport_gsc_read_status(pb);
  59. parport_writeb (r | 0x01, STATUS (pb)); /* Some reset by writing 1 */
  60. parport_writeb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */
  61. r = parport_gsc_read_status(pb);
  62. return !(r & 0x01);
  63. }
  64. /*
  65. * Access functions.
  66. *
  67. * Most of these aren't static because they may be used by the
  68. * parport_xxx_yyy macros. extern __inline__ versions of several
  69. * of these are in parport_gsc.h.
  70. */
  71. static irqreturn_t parport_gsc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  72. {
  73. parport_generic_irq(irq, (struct parport *) dev_id, regs);
  74. return IRQ_HANDLED;
  75. }
  76. void parport_gsc_init_state(struct pardevice *dev, struct parport_state *s)
  77. {
  78. s->u.pc.ctr = 0xc | (dev->irq_func ? 0x10 : 0x0);
  79. }
  80. void parport_gsc_save_state(struct parport *p, struct parport_state *s)
  81. {
  82. s->u.pc.ctr = parport_readb (CONTROL (p));
  83. }
  84. void parport_gsc_restore_state(struct parport *p, struct parport_state *s)
  85. {
  86. parport_writeb (s->u.pc.ctr, CONTROL (p));
  87. }
  88. struct parport_operations parport_gsc_ops =
  89. {
  90. .write_data = parport_gsc_write_data,
  91. .read_data = parport_gsc_read_data,
  92. .write_control = parport_gsc_write_control,
  93. .read_control = parport_gsc_read_control,
  94. .frob_control = parport_gsc_frob_control,
  95. .read_status = parport_gsc_read_status,
  96. .enable_irq = parport_gsc_enable_irq,
  97. .disable_irq = parport_gsc_disable_irq,
  98. .data_forward = parport_gsc_data_forward,
  99. .data_reverse = parport_gsc_data_reverse,
  100. .init_state = parport_gsc_init_state,
  101. .save_state = parport_gsc_save_state,
  102. .restore_state = parport_gsc_restore_state,
  103. .epp_write_data = parport_ieee1284_epp_write_data,
  104. .epp_read_data = parport_ieee1284_epp_read_data,
  105. .epp_write_addr = parport_ieee1284_epp_write_addr,
  106. .epp_read_addr = parport_ieee1284_epp_read_addr,
  107. .ecp_write_data = parport_ieee1284_ecp_write_data,
  108. .ecp_read_data = parport_ieee1284_ecp_read_data,
  109. .ecp_write_addr = parport_ieee1284_ecp_write_addr,
  110. .compat_write_data = parport_ieee1284_write_compat,
  111. .nibble_read_data = parport_ieee1284_read_nibble,
  112. .byte_read_data = parport_ieee1284_read_byte,
  113. .owner = THIS_MODULE,
  114. };
  115. /* --- Mode detection ------------------------------------- */
  116. /*
  117. * Checks for port existence, all ports support SPP MODE
  118. */
  119. static int __devinit parport_SPP_supported(struct parport *pb)
  120. {
  121. unsigned char r, w;
  122. /*
  123. * first clear an eventually pending EPP timeout
  124. * I (sailer@ife.ee.ethz.ch) have an SMSC chipset
  125. * that does not even respond to SPP cycles if an EPP
  126. * timeout is pending
  127. */
  128. clear_epp_timeout(pb);
  129. /* Do a simple read-write test to make sure the port exists. */
  130. w = 0xc;
  131. parport_writeb (w, CONTROL (pb));
  132. /* Is there a control register that we can read from? Some
  133. * ports don't allow reads, so read_control just returns a
  134. * software copy. Some ports _do_ allow reads, so bypass the
  135. * software copy here. In addition, some bits aren't
  136. * writable. */
  137. r = parport_readb (CONTROL (pb));
  138. if ((r & 0xf) == w) {
  139. w = 0xe;
  140. parport_writeb (w, CONTROL (pb));
  141. r = parport_readb (CONTROL (pb));
  142. parport_writeb (0xc, CONTROL (pb));
  143. if ((r & 0xf) == w)
  144. return PARPORT_MODE_PCSPP;
  145. }
  146. /* Try the data register. The data lines aren't tri-stated at
  147. * this stage, so we expect back what we wrote. */
  148. w = 0xaa;
  149. parport_gsc_write_data (pb, w);
  150. r = parport_gsc_read_data (pb);
  151. if (r == w) {
  152. w = 0x55;
  153. parport_gsc_write_data (pb, w);
  154. r = parport_gsc_read_data (pb);
  155. if (r == w)
  156. return PARPORT_MODE_PCSPP;
  157. }
  158. return 0;
  159. }
  160. /* Detect PS/2 support.
  161. *
  162. * Bit 5 (0x20) sets the PS/2 data direction; setting this high
  163. * allows us to read data from the data lines. In theory we would get back
  164. * 0xff but any peripheral attached to the port may drag some or all of the
  165. * lines down to zero. So if we get back anything that isn't the contents
  166. * of the data register we deem PS/2 support to be present.
  167. *
  168. * Some SPP ports have "half PS/2" ability - you can't turn off the line
  169. * drivers, but an external peripheral with sufficiently beefy drivers of
  170. * its own can overpower them and assert its own levels onto the bus, from
  171. * where they can then be read back as normal. Ports with this property
  172. * and the right type of device attached are likely to fail the SPP test,
  173. * (as they will appear to have stuck bits) and so the fact that they might
  174. * be misdetected here is rather academic.
  175. */
  176. static int __devinit parport_PS2_supported(struct parport *pb)
  177. {
  178. int ok = 0;
  179. clear_epp_timeout(pb);
  180. /* try to tri-state the buffer */
  181. parport_gsc_data_reverse (pb);
  182. parport_gsc_write_data(pb, 0x55);
  183. if (parport_gsc_read_data(pb) != 0x55) ok++;
  184. parport_gsc_write_data(pb, 0xaa);
  185. if (parport_gsc_read_data(pb) != 0xaa) ok++;
  186. /* cancel input mode */
  187. parport_gsc_data_forward (pb);
  188. if (ok) {
  189. pb->modes |= PARPORT_MODE_TRISTATE;
  190. } else {
  191. struct parport_gsc_private *priv = pb->private_data;
  192. priv->ctr_writable &= ~0x20;
  193. }
  194. return ok;
  195. }
  196. /* --- Initialisation code -------------------------------- */
  197. struct parport *__devinit parport_gsc_probe_port (unsigned long base,
  198. unsigned long base_hi,
  199. int irq, int dma,
  200. struct pci_dev *dev)
  201. {
  202. struct parport_gsc_private *priv;
  203. struct parport_operations *ops;
  204. struct parport tmp;
  205. struct parport *p = &tmp;
  206. priv = kzalloc (sizeof (struct parport_gsc_private), GFP_KERNEL);
  207. if (!priv) {
  208. printk (KERN_DEBUG "parport (0x%lx): no memory!\n", base);
  209. return NULL;
  210. }
  211. ops = kmalloc (sizeof (struct parport_operations), GFP_KERNEL);
  212. if (!ops) {
  213. printk (KERN_DEBUG "parport (0x%lx): no memory for ops!\n",
  214. base);
  215. kfree (priv);
  216. return NULL;
  217. }
  218. memcpy (ops, &parport_gsc_ops, sizeof (struct parport_operations));
  219. priv->ctr = 0xc;
  220. priv->ctr_writable = 0xff;
  221. priv->dma_buf = 0;
  222. priv->dma_handle = 0;
  223. priv->dev = dev;
  224. p->base = base;
  225. p->base_hi = base_hi;
  226. p->irq = irq;
  227. p->dma = dma;
  228. p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT;
  229. p->ops = ops;
  230. p->private_data = priv;
  231. p->physport = p;
  232. if (!parport_SPP_supported (p)) {
  233. /* No port. */
  234. kfree (priv);
  235. return NULL;
  236. }
  237. parport_PS2_supported (p);
  238. if (!(p = parport_register_port(base, PARPORT_IRQ_NONE,
  239. PARPORT_DMA_NONE, ops))) {
  240. kfree (priv);
  241. kfree (ops);
  242. return NULL;
  243. }
  244. p->base_hi = base_hi;
  245. p->modes = tmp.modes;
  246. p->size = (p->modes & PARPORT_MODE_EPP)?8:3;
  247. p->private_data = priv;
  248. printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base);
  249. p->irq = irq;
  250. if (p->irq == PARPORT_IRQ_AUTO) {
  251. p->irq = PARPORT_IRQ_NONE;
  252. }
  253. if (p->irq != PARPORT_IRQ_NONE) {
  254. printk(", irq %d", p->irq);
  255. if (p->dma == PARPORT_DMA_AUTO) {
  256. p->dma = PARPORT_DMA_NONE;
  257. }
  258. }
  259. if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq
  260. is mandatory (see above) */
  261. p->dma = PARPORT_DMA_NONE;
  262. printk(" [");
  263. #define printmode(x) {if(p->modes&PARPORT_MODE_##x){printk("%s%s",f?",":"",#x);f++;}}
  264. {
  265. int f = 0;
  266. printmode(PCSPP);
  267. printmode(TRISTATE);
  268. printmode(COMPAT)
  269. printmode(EPP);
  270. // printmode(ECP);
  271. // printmode(DMA);
  272. }
  273. #undef printmode
  274. printk("]\n");
  275. if (p->irq != PARPORT_IRQ_NONE) {
  276. if (request_irq (p->irq, parport_gsc_interrupt,
  277. 0, p->name, p)) {
  278. printk (KERN_WARNING "%s: irq %d in use, "
  279. "resorting to polled operation\n",
  280. p->name, p->irq);
  281. p->irq = PARPORT_IRQ_NONE;
  282. p->dma = PARPORT_DMA_NONE;
  283. }
  284. }
  285. /* Done probing. Now put the port into a sensible start-up state. */
  286. parport_gsc_write_data(p, 0);
  287. parport_gsc_data_forward (p);
  288. /* Now that we've told the sharing engine about the port, and
  289. found out its characteristics, let the high-level drivers
  290. know about it. */
  291. parport_announce_port (p);
  292. return p;
  293. }
  294. #define PARPORT_GSC_OFFSET 0x800
  295. static int __initdata parport_count;
  296. static int __devinit parport_init_chip(struct parisc_device *dev)
  297. {
  298. struct parport *p;
  299. unsigned long port;
  300. if (!dev->irq) {
  301. printk(KERN_WARNING "IRQ not found for parallel device at 0x%lx\n",
  302. dev->hpa.start);
  303. return -ENODEV;
  304. }
  305. port = dev->hpa.start + PARPORT_GSC_OFFSET;
  306. /* some older machines with ASP-chip don't support
  307. * the enhanced parport modes.
  308. */
  309. if (boot_cpu_data.cpu_type > pcxt && !pdc_add_valid(port+4)) {
  310. /* Initialize bidirectional-mode (0x10) & data-tranfer-mode #1 (0x20) */
  311. printk("%s: initialize bidirectional-mode.\n", __FUNCTION__);
  312. parport_writeb ( (0x10 + 0x20), port + 4);
  313. } else {
  314. printk("%s: enhanced parport-modes not supported.\n", __FUNCTION__);
  315. }
  316. p = parport_gsc_probe_port(port, 0, dev->irq,
  317. /* PARPORT_IRQ_NONE */ PARPORT_DMA_NONE, NULL);
  318. if (p)
  319. parport_count++;
  320. dev->dev.driver_data = p;
  321. return 0;
  322. }
  323. static int __devexit parport_remove_chip(struct parisc_device *dev)
  324. {
  325. struct parport *p = dev->dev.driver_data;
  326. if (p) {
  327. struct parport_gsc_private *priv = p->private_data;
  328. struct parport_operations *ops = p->ops;
  329. parport_remove_port(p);
  330. if (p->dma != PARPORT_DMA_NONE)
  331. free_dma(p->dma);
  332. if (p->irq != PARPORT_IRQ_NONE)
  333. free_irq(p->irq, p);
  334. if (priv->dma_buf)
  335. pci_free_consistent(priv->dev, PAGE_SIZE,
  336. priv->dma_buf,
  337. priv->dma_handle);
  338. kfree (p->private_data);
  339. parport_put_port(p);
  340. kfree (ops); /* hope no-one cached it */
  341. }
  342. return 0;
  343. }
  344. static struct parisc_device_id parport_tbl[] = {
  345. { HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x74 },
  346. { 0, }
  347. };
  348. MODULE_DEVICE_TABLE(parisc, parport_tbl);
  349. static struct parisc_driver parport_driver = {
  350. .name = "Parallel",
  351. .id_table = parport_tbl,
  352. .probe = parport_init_chip,
  353. .remove = __devexit_p(parport_remove_chip),
  354. };
  355. int __devinit parport_gsc_init(void)
  356. {
  357. return register_parisc_driver(&parport_driver);
  358. }
  359. static void __devexit parport_gsc_exit(void)
  360. {
  361. unregister_parisc_driver(&parport_driver);
  362. }
  363. module_init(parport_gsc_init);
  364. module_exit(parport_gsc_exit);