superio.c 14 KB

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  1. /* National Semiconductor NS87560UBD Super I/O controller used in
  2. * HP [BCJ]x000 workstations.
  3. *
  4. * This chip is a horrid piece of engineering, and National
  5. * denies any knowledge of its existence. Thus no datasheet is
  6. * available off www.national.com.
  7. *
  8. * (C) Copyright 2000 Linuxcare, Inc.
  9. * (C) Copyright 2000 Linuxcare Canada, Inc.
  10. * (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
  11. * (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
  12. * (C) Copyright 2001 John Marvin <jsm fc hp com>
  13. * (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
  14. * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
  15. * (C) Copyright 2006 Helge Deller <deller@gmx.de>
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * The initial version of this is by Martin Peterson. Alex deVries
  23. * has spent a bit of time trying to coax it into working.
  24. *
  25. * Major changes to get basic interrupt infrastructure working to
  26. * hopefully be able to support all SuperIO devices. Currently
  27. * works with serial. -- John Marvin <jsm@fc.hp.com>
  28. *
  29. * Converted superio_init() to be a PCI_FIXUP_FINAL callee.
  30. * -- Kyle McMartin <kyle@parisc-linux.org>
  31. */
  32. /* NOTES:
  33. *
  34. * Function 0 is an IDE controller. It is identical to a PC87415 IDE
  35. * controller (and identifies itself as such).
  36. *
  37. * Function 1 is a "Legacy I/O" controller. Under this function is a
  38. * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
  39. * all the functionality in hardware, but the following is available:
  40. *
  41. * Two 16550A compatible serial controllers
  42. * An IEEE 1284 compatible parallel port
  43. * A floppy disk controller
  44. *
  45. * Function 2 is a USB controller.
  46. *
  47. * We must be incredibly careful during initialization. Since all
  48. * interrupts are routed through function 1 (which is not allowed by
  49. * the PCI spec), we need to program the PICs on the legacy I/O port
  50. * *before* we attempt to set up IDE and USB. @#$!&
  51. *
  52. * According to HP, devices are only enabled by firmware if they have
  53. * a physical device connected.
  54. *
  55. * Configuration register bits:
  56. * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
  57. * 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
  58. *
  59. */
  60. #include <linux/errno.h>
  61. #include <linux/init.h>
  62. #include <linux/module.h>
  63. #include <linux/types.h>
  64. #include <linux/interrupt.h>
  65. #include <linux/ioport.h>
  66. #include <linux/serial.h>
  67. #include <linux/pci.h>
  68. #include <linux/parport.h>
  69. #include <linux/parport_pc.h>
  70. #include <linux/termios.h>
  71. #include <linux/tty.h>
  72. #include <linux/serial_core.h>
  73. #include <linux/delay.h>
  74. #include <asm/io.h>
  75. #include <asm/hardware.h>
  76. #include <asm/superio.h>
  77. static struct superio_device sio_dev;
  78. #undef DEBUG_SUPERIO_INIT
  79. #ifdef DEBUG_SUPERIO_INIT
  80. #define DBG_INIT(x...) printk(x)
  81. #else
  82. #define DBG_INIT(x...)
  83. #endif
  84. #define SUPERIO "SuperIO"
  85. #define PFX SUPERIO ": "
  86. static irqreturn_t
  87. superio_interrupt(int parent_irq, void *devp, struct pt_regs *regs)
  88. {
  89. u8 results;
  90. u8 local_irq;
  91. /* Poll the 8259 to see if there's an interrupt. */
  92. outb (OCW3_POLL,IC_PIC1+0);
  93. results = inb(IC_PIC1+0);
  94. /*
  95. * Bit 7: 1 = active Interrupt; 0 = no Interrupt pending
  96. * Bits 6-3: zero
  97. * Bits 2-0: highest priority, active requesting interrupt ID (0-7)
  98. */
  99. if ((results & 0x80) == 0) {
  100. /* I suspect "spurious" interrupts are from unmasking an IRQ.
  101. * We don't know if an interrupt was/is pending and thus
  102. * just call the handler for that IRQ as if it were pending.
  103. */
  104. return IRQ_NONE;
  105. }
  106. /* Check to see which device is interrupting */
  107. local_irq = results & 0x0f;
  108. if (local_irq == 2 || local_irq > 7) {
  109. printk(KERN_ERR PFX "slave interrupted!\n");
  110. return IRQ_HANDLED;
  111. }
  112. if (local_irq == 7) {
  113. /* Could be spurious. Check in service bits */
  114. outb(OCW3_ISR,IC_PIC1+0);
  115. results = inb(IC_PIC1+0);
  116. if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
  117. printk(KERN_WARNING PFX "spurious interrupt!\n");
  118. return IRQ_HANDLED;
  119. }
  120. }
  121. /* Call the appropriate device's interrupt */
  122. __do_IRQ(local_irq, regs);
  123. /* set EOI - forces a new interrupt if a lower priority device
  124. * still needs service.
  125. */
  126. outb((OCW2_SEOI|local_irq),IC_PIC1 + 0);
  127. return IRQ_HANDLED;
  128. }
  129. /* Initialize Super I/O device */
  130. static void
  131. superio_init(struct pci_dev *pcidev)
  132. {
  133. struct superio_device *sio = &sio_dev;
  134. struct pci_dev *pdev = sio->lio_pdev;
  135. u16 word;
  136. if (sio->suckyio_irq_enabled)
  137. return;
  138. BUG_ON(!pdev);
  139. BUG_ON(!sio->usb_pdev);
  140. /* use the IRQ iosapic found for USB INT D... */
  141. pdev->irq = sio->usb_pdev->irq;
  142. /* ...then properly fixup the USB to point at suckyio PIC */
  143. sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);
  144. printk(KERN_INFO PFX "Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
  145. pci_name(pdev), pdev->irq);
  146. pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
  147. sio->sp1_base &= ~1;
  148. printk(KERN_INFO PFX "Serial port 1 at 0x%x\n", sio->sp1_base);
  149. pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
  150. sio->sp2_base &= ~1;
  151. printk(KERN_INFO PFX "Serial port 2 at 0x%x\n", sio->sp2_base);
  152. pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
  153. sio->pp_base &= ~1;
  154. printk(KERN_INFO PFX "Parallel port at 0x%x\n", sio->pp_base);
  155. pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
  156. sio->fdc_base &= ~1;
  157. printk(KERN_INFO PFX "Floppy controller at 0x%x\n", sio->fdc_base);
  158. pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
  159. sio->acpi_base &= ~1;
  160. printk(KERN_INFO PFX "ACPI at 0x%x\n", sio->acpi_base);
  161. request_region (IC_PIC1, 0x1f, "pic1");
  162. request_region (IC_PIC2, 0x1f, "pic2");
  163. request_region (sio->acpi_base, 0x1f, "acpi");
  164. /* Enable the legacy I/O function */
  165. pci_read_config_word (pdev, PCI_COMMAND, &word);
  166. word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
  167. pci_write_config_word (pdev, PCI_COMMAND, word);
  168. pci_set_master (pdev);
  169. pci_enable_device(pdev);
  170. /*
  171. * Next project is programming the onboard interrupt controllers.
  172. * PDC hasn't done this for us, since it's using polled I/O.
  173. *
  174. * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
  175. * space access. PCI is by nature a 32-bit bus and config
  176. * space can be sensitive to that.
  177. */
  178. /* 0x64 - 0x67 :
  179. DMA Rtg 2
  180. DMA Rtg 3
  181. DMA Chan Ctl
  182. TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge
  183. */
  184. pci_write_config_dword (pdev, 0x64, 0x82000000U);
  185. /* 0x68 - 0x6b :
  186. TRIGGER_2 == 0x00 all edge triggered (not used)
  187. CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4
  188. CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6
  189. CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved
  190. */
  191. pci_write_config_dword (pdev, TRIGGER_2, 0x07654300U);
  192. /* 0x6c - 0x6f :
  193. CFG_IR_INTAB == 0x00
  194. CFG_IR_INTCD == 0x10 USB = IRQ1
  195. CFG_IR_PS2 == 0x00
  196. CFG_IR_FXBUS == 0x00
  197. */
  198. pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);
  199. /* 0x70 - 0x73 :
  200. CFG_IR_USB == 0x00 not used. USB is connected to INTD.
  201. CFG_IR_ACPI == 0x00 not used.
  202. DMA Priority == 0x4c88 Power on default value. NFC.
  203. */
  204. pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);
  205. /* PIC1 Initialization Command Word register programming */
  206. outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req | ICW1 */
  207. outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */
  208. outb (0x04,IC_PIC1+1); /* ICW3: Cascade */
  209. outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */
  210. /* PIC1 Program Operational Control Words */
  211. outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
  212. outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */
  213. /* PIC2 Initialization Command Word register programming */
  214. outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req | ICW1 */
  215. outb (0x00,IC_PIC2+1); /* ICW2: N/A */
  216. outb (0x02,IC_PIC2+1); /* ICW3: Slave ID code */
  217. outb (0x01,IC_PIC2+1); /* ICW4: x86 mode */
  218. /* Program Operational Control Words */
  219. outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
  220. outb (0x68,IC_PIC1+0); /* OCW3: OCW3 select | ESMM | SMM */
  221. /* Write master mask reg */
  222. outb (0xff,IC_PIC1+1);
  223. /* Setup USB power regulation */
  224. outb(1, sio->acpi_base + USB_REG_CR);
  225. if (inb(sio->acpi_base + USB_REG_CR) & 1)
  226. printk(KERN_INFO PFX "USB regulator enabled\n");
  227. else
  228. printk(KERN_ERR PFX "USB regulator not initialized!\n");
  229. if (request_irq(pdev->irq, superio_interrupt, SA_INTERRUPT,
  230. SUPERIO, (void *)sio)) {
  231. printk(KERN_ERR PFX "could not get irq\n");
  232. BUG();
  233. return;
  234. }
  235. sio->suckyio_irq_enabled = 1;
  236. }
  237. DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
  238. static void superio_disable_irq(unsigned int irq)
  239. {
  240. u8 r8;
  241. if ((irq < 1) || (irq == 2) || (irq > 7)) {
  242. printk(KERN_ERR PFX "Illegal irq number.\n");
  243. BUG();
  244. return;
  245. }
  246. /* Mask interrupt */
  247. r8 = inb(IC_PIC1+1);
  248. r8 |= (1 << irq);
  249. outb (r8,IC_PIC1+1);
  250. }
  251. static void superio_enable_irq(unsigned int irq)
  252. {
  253. u8 r8;
  254. if ((irq < 1) || (irq == 2) || (irq > 7)) {
  255. printk(KERN_ERR PFX "Illegal irq number (%d).\n", irq);
  256. BUG();
  257. return;
  258. }
  259. /* Unmask interrupt */
  260. r8 = inb(IC_PIC1+1);
  261. r8 &= ~(1 << irq);
  262. outb (r8,IC_PIC1+1);
  263. }
  264. static unsigned int superio_startup_irq(unsigned int irq)
  265. {
  266. superio_enable_irq(irq);
  267. return 0;
  268. }
  269. static struct hw_interrupt_type superio_interrupt_type = {
  270. .typename = SUPERIO,
  271. .startup = superio_startup_irq,
  272. .shutdown = superio_disable_irq,
  273. .enable = superio_enable_irq,
  274. .disable = superio_disable_irq,
  275. .ack = no_ack_irq,
  276. .end = no_end_irq,
  277. };
  278. #ifdef DEBUG_SUPERIO_INIT
  279. static unsigned short expected_device[3] = {
  280. PCI_DEVICE_ID_NS_87415,
  281. PCI_DEVICE_ID_NS_87560_LIO,
  282. PCI_DEVICE_ID_NS_87560_USB
  283. };
  284. #endif
  285. int superio_fixup_irq(struct pci_dev *pcidev)
  286. {
  287. int local_irq, i;
  288. #ifdef DEBUG_SUPERIO_INIT
  289. int fn;
  290. fn = PCI_FUNC(pcidev->devfn);
  291. /* Verify the function number matches the expected device id. */
  292. if (expected_device[fn] != pcidev->device) {
  293. BUG();
  294. return -1;
  295. }
  296. printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
  297. pci_name(pcidev),
  298. pcidev->vendor, pcidev->device,
  299. __builtin_return_address(0));
  300. #endif
  301. for (i = 0; i < 16; i++) {
  302. irq_desc[i].handler = &superio_interrupt_type;
  303. }
  304. /*
  305. * We don't allocate a SuperIO irq for the legacy IO function,
  306. * since it is a "bridge". Instead, we will allocate irq's for
  307. * each legacy device as they are initialized.
  308. */
  309. switch(pcidev->device) {
  310. case PCI_DEVICE_ID_NS_87415: /* Function 0 */
  311. local_irq = IDE_IRQ;
  312. break;
  313. case PCI_DEVICE_ID_NS_87560_LIO: /* Function 1 */
  314. sio_dev.lio_pdev = pcidev; /* save for superio_init() */
  315. return -1;
  316. case PCI_DEVICE_ID_NS_87560_USB: /* Function 2 */
  317. sio_dev.usb_pdev = pcidev; /* save for superio_init() */
  318. local_irq = USB_IRQ;
  319. break;
  320. default:
  321. local_irq = -1;
  322. BUG();
  323. break;
  324. }
  325. return local_irq;
  326. }
  327. static void __devinit superio_serial_init(void)
  328. {
  329. #ifdef CONFIG_SERIAL_8250
  330. int retval;
  331. struct uart_port serial_port;
  332. memset(&serial_port, 0, sizeof(serial_port));
  333. serial_port.iotype = UPIO_PORT;
  334. serial_port.type = PORT_16550A;
  335. serial_port.uartclk = 115200*16;
  336. serial_port.fifosize = 16;
  337. spin_lock_init(&serial_port.lock);
  338. /* serial port #1 */
  339. serial_port.iobase = sio_dev.sp1_base;
  340. serial_port.irq = SP1_IRQ;
  341. serial_port.line = 0;
  342. retval = early_serial_setup(&serial_port);
  343. if (retval < 0) {
  344. printk(KERN_WARNING PFX "Register Serial #0 failed.\n");
  345. return;
  346. }
  347. /* serial port #2 */
  348. serial_port.iobase = sio_dev.sp2_base;
  349. serial_port.irq = SP2_IRQ;
  350. serial_port.line = 1;
  351. retval = early_serial_setup(&serial_port);
  352. if (retval < 0)
  353. printk(KERN_WARNING PFX "Register Serial #1 failed.\n");
  354. #endif /* CONFIG_SERIAL_8250 */
  355. }
  356. static void __devinit superio_parport_init(void)
  357. {
  358. #ifdef CONFIG_PARPORT_PC
  359. if (!parport_pc_probe_port(sio_dev.pp_base,
  360. 0 /*base_hi*/,
  361. PAR_IRQ,
  362. PARPORT_DMA_NONE /* dma */,
  363. NULL /*struct pci_dev* */) )
  364. printk(KERN_WARNING PFX "Probing parallel port failed.\n");
  365. #endif /* CONFIG_PARPORT_PC */
  366. }
  367. static void superio_fixup_pci(struct pci_dev *pdev)
  368. {
  369. u8 prog;
  370. pdev->class |= 0x5;
  371. pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);
  372. pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
  373. printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
  374. }
  375. DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);
  376. static int __devinit
  377. superio_probe(struct pci_dev *dev, const struct pci_device_id *id)
  378. {
  379. struct superio_device *sio = &sio_dev;
  380. /*
  381. ** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
  382. ** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
  383. ** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
  384. */
  385. DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
  386. pci_name(dev),
  387. dev->vendor, dev->device,
  388. dev->subsystem_vendor, dev->subsystem_device,
  389. dev->class);
  390. BUG_ON(!sio->suckyio_irq_enabled); /* Enabled by PCI_FIXUP_FINAL */
  391. if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) { /* Function 1 */
  392. superio_parport_init();
  393. superio_serial_init();
  394. /* REVISIT XXX : superio_fdc_init() ? */
  395. return 0;
  396. } else if (dev->device == PCI_DEVICE_ID_NS_87415) { /* Function 0 */
  397. DBG_INIT("superio_probe: ignoring IDE 87415\n");
  398. } else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */
  399. DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
  400. } else {
  401. DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
  402. }
  403. /* Let appropriate other driver claim this device. */
  404. return -ENODEV;
  405. }
  406. static struct pci_device_id superio_tbl[] = {
  407. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO) },
  408. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_USB) },
  409. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415) },
  410. { 0, }
  411. };
  412. static struct pci_driver superio_driver = {
  413. .name = SUPERIO,
  414. .id_table = superio_tbl,
  415. .probe = superio_probe,
  416. };
  417. static int __init superio_modinit(void)
  418. {
  419. return pci_register_driver(&superio_driver);
  420. }
  421. static void __exit superio_exit(void)
  422. {
  423. pci_unregister_driver(&superio_driver);
  424. }
  425. module_init(superio_modinit);
  426. module_exit(superio_exit);