lmc_main.c 63 KB

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  1. /*
  2. * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
  3. * All rights reserved. www.lanmedia.com
  4. *
  5. * This code is written by:
  6. * Andrew Stanley-Jones (asj@cban.com)
  7. * Rob Braun (bbraun@vix.com),
  8. * Michael Graff (explorer@vix.com) and
  9. * Matt Thomas (matt@3am-software.com).
  10. *
  11. * With Help By:
  12. * David Boggs
  13. * Ron Crane
  14. * Alan Cox
  15. *
  16. * This software may be used and distributed according to the terms
  17. * of the GNU General Public License version 2, incorporated herein by reference.
  18. *
  19. * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
  20. *
  21. * To control link specific options lmcctl is required.
  22. * It can be obtained from ftp.lanmedia.com.
  23. *
  24. * Linux driver notes:
  25. * Linux uses the device struct lmc_private to pass private information
  26. * arround.
  27. *
  28. * The initialization portion of this driver (the lmc_reset() and the
  29. * lmc_dec_reset() functions, as well as the led controls and the
  30. * lmc_initcsrs() functions.
  31. *
  32. * The watchdog function runs every second and checks to see if
  33. * we still have link, and that the timing source is what we expected
  34. * it to be. If link is lost, the interface is marked down, and
  35. * we no longer can transmit.
  36. *
  37. */
  38. /* $Id: lmc_main.c,v 1.36 2000/04/11 05:25:25 asj Exp $ */
  39. #include <linux/kernel.h>
  40. #include <linux/module.h>
  41. #include <linux/string.h>
  42. #include <linux/timer.h>
  43. #include <linux/ptrace.h>
  44. #include <linux/errno.h>
  45. #include <linux/ioport.h>
  46. #include <linux/slab.h>
  47. #include <linux/interrupt.h>
  48. #include <linux/pci.h>
  49. #include <linux/delay.h>
  50. #include <linux/init.h>
  51. #include <linux/in.h>
  52. #include <linux/if_arp.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/etherdevice.h>
  55. #include <linux/skbuff.h>
  56. #include <linux/inet.h>
  57. #include <linux/bitops.h>
  58. #include <net/syncppp.h>
  59. #include <asm/processor.h> /* Processor type for cache alignment. */
  60. #include <asm/io.h>
  61. #include <asm/dma.h>
  62. #include <asm/uaccess.h>
  63. //#include <asm/spinlock.h>
  64. #define DRIVER_MAJOR_VERSION 1
  65. #define DRIVER_MINOR_VERSION 34
  66. #define DRIVER_SUB_VERSION 0
  67. #define DRIVER_VERSION ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
  68. #include "lmc.h"
  69. #include "lmc_var.h"
  70. #include "lmc_ioctl.h"
  71. #include "lmc_debug.h"
  72. #include "lmc_proto.h"
  73. static int lmc_first_load = 0;
  74. static int LMC_PKT_BUF_SZ = 1542;
  75. static struct pci_device_id lmc_pci_tbl[] = {
  76. { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  77. PCI_VENDOR_ID_LMC, PCI_ANY_ID },
  78. { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  79. PCI_ANY_ID, PCI_VENDOR_ID_LMC },
  80. { 0 }
  81. };
  82. MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
  83. MODULE_LICENSE("GPL");
  84. static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev);
  85. static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev);
  86. static int lmc_rx (struct net_device *dev);
  87. static int lmc_open(struct net_device *dev);
  88. static int lmc_close(struct net_device *dev);
  89. static struct net_device_stats *lmc_get_stats(struct net_device *dev);
  90. static irqreturn_t lmc_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
  91. static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
  92. static void lmc_softreset(lmc_softc_t * const);
  93. static void lmc_running_reset(struct net_device *dev);
  94. static int lmc_ifdown(struct net_device * const);
  95. static void lmc_watchdog(unsigned long data);
  96. static void lmc_reset(lmc_softc_t * const sc);
  97. static void lmc_dec_reset(lmc_softc_t * const sc);
  98. static void lmc_driver_timeout(struct net_device *dev);
  99. /*
  100. * linux reserves 16 device specific IOCTLs. We call them
  101. * LMCIOC* to control various bits of our world.
  102. */
  103. int lmc_ioctl (struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
  104. {
  105. lmc_softc_t *sc;
  106. lmc_ctl_t ctl;
  107. int ret;
  108. u_int16_t regVal;
  109. unsigned long flags;
  110. struct sppp *sp;
  111. ret = -EOPNOTSUPP;
  112. sc = dev->priv;
  113. lmc_trace(dev, "lmc_ioctl in");
  114. /*
  115. * Most functions mess with the structure
  116. * Disable interrupts while we do the polling
  117. */
  118. spin_lock_irqsave(&sc->lmc_lock, flags);
  119. switch (cmd) {
  120. /*
  121. * Return current driver state. Since we keep this up
  122. * To date internally, just copy this out to the user.
  123. */
  124. case LMCIOCGINFO: /*fold01*/
  125. if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof (lmc_ctl_t)))
  126. return -EFAULT;
  127. ret = 0;
  128. break;
  129. case LMCIOCSINFO: /*fold01*/
  130. sp = &((struct ppp_device *) dev)->sppp;
  131. if (!capable(CAP_NET_ADMIN)) {
  132. ret = -EPERM;
  133. break;
  134. }
  135. if(dev->flags & IFF_UP){
  136. ret = -EBUSY;
  137. break;
  138. }
  139. if (copy_from_user(&ctl, ifr->ifr_data, sizeof (lmc_ctl_t)))
  140. return -EFAULT;
  141. sc->lmc_media->set_status (sc, &ctl);
  142. if(ctl.crc_length != sc->ictl.crc_length) {
  143. sc->lmc_media->set_crc_length(sc, ctl.crc_length);
  144. if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
  145. sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
  146. else
  147. sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
  148. }
  149. if (ctl.keepalive_onoff == LMC_CTL_OFF)
  150. sp->pp_flags &= ~PP_KEEPALIVE; /* Turn off */
  151. else
  152. sp->pp_flags |= PP_KEEPALIVE; /* Turn on */
  153. ret = 0;
  154. break;
  155. case LMCIOCIFTYPE: /*fold01*/
  156. {
  157. u_int16_t old_type = sc->if_type;
  158. u_int16_t new_type;
  159. if (!capable(CAP_NET_ADMIN)) {
  160. ret = -EPERM;
  161. break;
  162. }
  163. if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u_int16_t)))
  164. return -EFAULT;
  165. if (new_type == old_type)
  166. {
  167. ret = 0 ;
  168. break; /* no change */
  169. }
  170. lmc_proto_close(sc);
  171. lmc_proto_detach(sc);
  172. sc->if_type = new_type;
  173. // lmc_proto_init(sc);
  174. lmc_proto_attach(sc);
  175. lmc_proto_open(sc);
  176. ret = 0 ;
  177. break ;
  178. }
  179. case LMCIOCGETXINFO: /*fold01*/
  180. sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
  181. sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
  182. sc->lmc_xinfo.PciSlotNumber = 0;
  183. sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
  184. sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
  185. sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
  186. sc->lmc_xinfo.XilinxRevisionNumber =
  187. lmc_mii_readreg (sc, 0, 3) & 0xf;
  188. sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
  189. sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
  190. sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
  191. sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
  192. if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
  193. sizeof (struct lmc_xinfo)))
  194. return -EFAULT;
  195. ret = 0;
  196. break;
  197. case LMCIOCGETLMCSTATS: /*fold01*/
  198. if (sc->lmc_cardtype == LMC_CARDTYPE_T1){
  199. lmc_mii_writereg (sc, 0, 17, T1FRAMER_FERR_LSB);
  200. sc->stats.framingBitErrorCount +=
  201. lmc_mii_readreg (sc, 0, 18) & 0xff;
  202. lmc_mii_writereg (sc, 0, 17, T1FRAMER_FERR_MSB);
  203. sc->stats.framingBitErrorCount +=
  204. (lmc_mii_readreg (sc, 0, 18) & 0xff) << 8;
  205. lmc_mii_writereg (sc, 0, 17, T1FRAMER_LCV_LSB);
  206. sc->stats.lineCodeViolationCount +=
  207. lmc_mii_readreg (sc, 0, 18) & 0xff;
  208. lmc_mii_writereg (sc, 0, 17, T1FRAMER_LCV_MSB);
  209. sc->stats.lineCodeViolationCount +=
  210. (lmc_mii_readreg (sc, 0, 18) & 0xff) << 8;
  211. lmc_mii_writereg (sc, 0, 17, T1FRAMER_AERR);
  212. regVal = lmc_mii_readreg (sc, 0, 18) & 0xff;
  213. sc->stats.lossOfFrameCount +=
  214. (regVal & T1FRAMER_LOF_MASK) >> 4;
  215. sc->stats.changeOfFrameAlignmentCount +=
  216. (regVal & T1FRAMER_COFA_MASK) >> 2;
  217. sc->stats.severelyErroredFrameCount +=
  218. regVal & T1FRAMER_SEF_MASK;
  219. }
  220. if (copy_to_user(ifr->ifr_data, &sc->stats,
  221. sizeof (struct lmc_statistics)))
  222. return -EFAULT;
  223. ret = 0;
  224. break;
  225. case LMCIOCCLEARLMCSTATS: /*fold01*/
  226. if (!capable(CAP_NET_ADMIN)){
  227. ret = -EPERM;
  228. break;
  229. }
  230. memset (&sc->stats, 0, sizeof (struct lmc_statistics));
  231. sc->stats.check = STATCHECK;
  232. sc->stats.version_size = (DRIVER_VERSION << 16) +
  233. sizeof (struct lmc_statistics);
  234. sc->stats.lmc_cardtype = sc->lmc_cardtype;
  235. ret = 0;
  236. break;
  237. case LMCIOCSETCIRCUIT: /*fold01*/
  238. if (!capable(CAP_NET_ADMIN)){
  239. ret = -EPERM;
  240. break;
  241. }
  242. if(dev->flags & IFF_UP){
  243. ret = -EBUSY;
  244. break;
  245. }
  246. if (copy_from_user(&ctl, ifr->ifr_data, sizeof (lmc_ctl_t)))
  247. return -EFAULT;
  248. sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
  249. sc->ictl.circuit_type = ctl.circuit_type;
  250. ret = 0;
  251. break;
  252. case LMCIOCRESET: /*fold01*/
  253. if (!capable(CAP_NET_ADMIN)){
  254. ret = -EPERM;
  255. break;
  256. }
  257. /* Reset driver and bring back to current state */
  258. printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
  259. lmc_running_reset (dev);
  260. printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
  261. LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
  262. ret = 0;
  263. break;
  264. #ifdef DEBUG
  265. case LMCIOCDUMPEVENTLOG:
  266. if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof (u32)))
  267. return -EFAULT;
  268. if (copy_to_user(ifr->ifr_data + sizeof (u32), lmcEventLogBuf, sizeof (lmcEventLogBuf)))
  269. return -EFAULT;
  270. ret = 0;
  271. break;
  272. #endif /* end ifdef _DBG_EVENTLOG */
  273. case LMCIOCT1CONTROL: /*fold01*/
  274. if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
  275. ret = -EOPNOTSUPP;
  276. break;
  277. }
  278. break;
  279. case LMCIOCXILINX: /*fold01*/
  280. {
  281. struct lmc_xilinx_control xc; /*fold02*/
  282. if (!capable(CAP_NET_ADMIN)){
  283. ret = -EPERM;
  284. break;
  285. }
  286. /*
  287. * Stop the xwitter whlie we restart the hardware
  288. */
  289. netif_stop_queue(dev);
  290. if (copy_from_user(&xc, ifr->ifr_data, sizeof (struct lmc_xilinx_control)))
  291. return -EFAULT;
  292. switch(xc.command){
  293. case lmc_xilinx_reset: /*fold02*/
  294. {
  295. u16 mii;
  296. mii = lmc_mii_readreg (sc, 0, 16);
  297. /*
  298. * Make all of them 0 and make input
  299. */
  300. lmc_gpio_mkinput(sc, 0xff);
  301. /*
  302. * make the reset output
  303. */
  304. lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
  305. /*
  306. * RESET low to force configuration. This also forces
  307. * the transmitter clock to be internal, but we expect to reset
  308. * that later anyway.
  309. */
  310. sc->lmc_gpio &= ~LMC_GEP_RESET;
  311. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  312. /*
  313. * hold for more than 10 microseconds
  314. */
  315. udelay(50);
  316. sc->lmc_gpio |= LMC_GEP_RESET;
  317. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  318. /*
  319. * stop driving Xilinx-related signals
  320. */
  321. lmc_gpio_mkinput(sc, 0xff);
  322. /* Reset the frammer hardware */
  323. sc->lmc_media->set_link_status (sc, 1);
  324. sc->lmc_media->set_status (sc, NULL);
  325. // lmc_softreset(sc);
  326. {
  327. int i;
  328. for(i = 0; i < 5; i++){
  329. lmc_led_on(sc, LMC_DS3_LED0);
  330. mdelay(100);
  331. lmc_led_off(sc, LMC_DS3_LED0);
  332. lmc_led_on(sc, LMC_DS3_LED1);
  333. mdelay(100);
  334. lmc_led_off(sc, LMC_DS3_LED1);
  335. lmc_led_on(sc, LMC_DS3_LED3);
  336. mdelay(100);
  337. lmc_led_off(sc, LMC_DS3_LED3);
  338. lmc_led_on(sc, LMC_DS3_LED2);
  339. mdelay(100);
  340. lmc_led_off(sc, LMC_DS3_LED2);
  341. }
  342. }
  343. ret = 0x0;
  344. }
  345. break;
  346. case lmc_xilinx_load_prom: /*fold02*/
  347. {
  348. u16 mii;
  349. int timeout = 500000;
  350. mii = lmc_mii_readreg (sc, 0, 16);
  351. /*
  352. * Make all of them 0 and make input
  353. */
  354. lmc_gpio_mkinput(sc, 0xff);
  355. /*
  356. * make the reset output
  357. */
  358. lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET);
  359. /*
  360. * RESET low to force configuration. This also forces
  361. * the transmitter clock to be internal, but we expect to reset
  362. * that later anyway.
  363. */
  364. sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
  365. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  366. /*
  367. * hold for more than 10 microseconds
  368. */
  369. udelay(50);
  370. sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
  371. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  372. /*
  373. * busy wait for the chip to reset
  374. */
  375. while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
  376. (timeout-- > 0))
  377. ;
  378. /*
  379. * stop driving Xilinx-related signals
  380. */
  381. lmc_gpio_mkinput(sc, 0xff);
  382. ret = 0x0;
  383. break;
  384. }
  385. case lmc_xilinx_load: /*fold02*/
  386. {
  387. char *data;
  388. int pos;
  389. int timeout = 500000;
  390. if(xc.data == 0x0){
  391. ret = -EINVAL;
  392. break;
  393. }
  394. data = kmalloc(xc.len, GFP_KERNEL);
  395. if(data == 0x0){
  396. printk(KERN_WARNING "%s: Failed to allocate memory for copy\n", dev->name);
  397. ret = -ENOMEM;
  398. break;
  399. }
  400. if(copy_from_user(data, xc.data, xc.len))
  401. {
  402. kfree(data);
  403. ret = -ENOMEM;
  404. break;
  405. }
  406. printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
  407. lmc_gpio_mkinput(sc, 0xff);
  408. /*
  409. * Clear the Xilinx and start prgramming from the DEC
  410. */
  411. /*
  412. * Set ouput as:
  413. * Reset: 0 (active)
  414. * DP: 0 (active)
  415. * Mode: 1
  416. *
  417. */
  418. sc->lmc_gpio = 0x00;
  419. sc->lmc_gpio &= ~LMC_GEP_DP;
  420. sc->lmc_gpio &= ~LMC_GEP_RESET;
  421. sc->lmc_gpio |= LMC_GEP_MODE;
  422. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  423. lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
  424. /*
  425. * Wait at least 10 us 20 to be safe
  426. */
  427. udelay(50);
  428. /*
  429. * Clear reset and activate programming lines
  430. * Reset: Input
  431. * DP: Input
  432. * Clock: Output
  433. * Data: Output
  434. * Mode: Output
  435. */
  436. lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
  437. /*
  438. * Set LOAD, DATA, Clock to 1
  439. */
  440. sc->lmc_gpio = 0x00;
  441. sc->lmc_gpio |= LMC_GEP_MODE;
  442. sc->lmc_gpio |= LMC_GEP_DATA;
  443. sc->lmc_gpio |= LMC_GEP_CLK;
  444. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  445. lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
  446. /*
  447. * busy wait for the chip to reset
  448. */
  449. while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
  450. (timeout-- > 0))
  451. ;
  452. printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
  453. for(pos = 0; pos < xc.len; pos++){
  454. switch(data[pos]){
  455. case 0:
  456. sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
  457. break;
  458. case 1:
  459. sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
  460. break;
  461. default:
  462. printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
  463. sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
  464. }
  465. sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
  466. sc->lmc_gpio |= LMC_GEP_MODE;
  467. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  468. udelay(1);
  469. sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
  470. sc->lmc_gpio |= LMC_GEP_MODE;
  471. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  472. udelay(1);
  473. }
  474. if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
  475. printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
  476. }
  477. else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
  478. printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
  479. }
  480. else {
  481. printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
  482. }
  483. lmc_gpio_mkinput(sc, 0xff);
  484. sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
  485. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  486. sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
  487. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  488. kfree(data);
  489. ret = 0;
  490. break;
  491. }
  492. default: /*fold02*/
  493. ret = -EBADE;
  494. break;
  495. }
  496. netif_wake_queue(dev);
  497. sc->lmc_txfull = 0;
  498. }
  499. break;
  500. default: /*fold01*/
  501. /* If we don't know what to do, give the protocol a shot. */
  502. ret = lmc_proto_ioctl (sc, ifr, cmd);
  503. break;
  504. }
  505. spin_unlock_irqrestore(&sc->lmc_lock, flags); /*fold01*/
  506. lmc_trace(dev, "lmc_ioctl out");
  507. return ret;
  508. }
  509. /* the watchdog process that cruises around */
  510. static void lmc_watchdog (unsigned long data) /*fold00*/
  511. {
  512. struct net_device *dev = (struct net_device *) data;
  513. lmc_softc_t *sc;
  514. int link_status;
  515. u_int32_t ticks;
  516. unsigned long flags;
  517. sc = dev->priv;
  518. lmc_trace(dev, "lmc_watchdog in");
  519. spin_lock_irqsave(&sc->lmc_lock, flags);
  520. if(sc->check != 0xBEAFCAFE){
  521. printk("LMC: Corrupt net_device struct, breaking out\n");
  522. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  523. return;
  524. }
  525. /* Make sure the tx jabber and rx watchdog are off,
  526. * and the transmit and receive processes are running.
  527. */
  528. LMC_CSR_WRITE (sc, csr_15, 0x00000011);
  529. sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
  530. LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
  531. if (sc->lmc_ok == 0)
  532. goto kick_timer;
  533. LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
  534. /* --- begin time out check -----------------------------------
  535. * check for a transmit interrupt timeout
  536. * Has the packet xmt vs xmt serviced threshold been exceeded */
  537. if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
  538. sc->stats.tx_packets > sc->lasttx_packets &&
  539. sc->tx_TimeoutInd == 0)
  540. {
  541. /* wait for the watchdog to come around again */
  542. sc->tx_TimeoutInd = 1;
  543. }
  544. else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
  545. sc->stats.tx_packets > sc->lasttx_packets &&
  546. sc->tx_TimeoutInd)
  547. {
  548. LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
  549. sc->tx_TimeoutDisplay = 1;
  550. sc->stats.tx_TimeoutCnt++;
  551. /* DEC chip is stuck, hit it with a RESET!!!! */
  552. lmc_running_reset (dev);
  553. /* look at receive & transmit process state to make sure they are running */
  554. LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
  555. /* look at: DSR - 02 for Reg 16
  556. * CTS - 08
  557. * DCD - 10
  558. * RI - 20
  559. * for Reg 17
  560. */
  561. LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
  562. /* reset the transmit timeout detection flag */
  563. sc->tx_TimeoutInd = 0;
  564. sc->lastlmc_taint_tx = sc->lmc_taint_tx;
  565. sc->lasttx_packets = sc->stats.tx_packets;
  566. }
  567. else
  568. {
  569. sc->tx_TimeoutInd = 0;
  570. sc->lastlmc_taint_tx = sc->lmc_taint_tx;
  571. sc->lasttx_packets = sc->stats.tx_packets;
  572. }
  573. /* --- end time out check ----------------------------------- */
  574. link_status = sc->lmc_media->get_link_status (sc);
  575. /*
  576. * hardware level link lost, but the interface is marked as up.
  577. * Mark it as down.
  578. */
  579. if ((link_status == 0) && (sc->last_link_status != 0)) {
  580. printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
  581. sc->last_link_status = 0;
  582. /* lmc_reset (sc); Why reset??? The link can go down ok */
  583. /* Inform the world that link has been lost */
  584. netif_carrier_off(dev);
  585. }
  586. /*
  587. * hardware link is up, but the interface is marked as down.
  588. * Bring it back up again.
  589. */
  590. if (link_status != 0 && sc->last_link_status == 0) {
  591. printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
  592. sc->last_link_status = 1;
  593. /* lmc_reset (sc); Again why reset??? */
  594. /* Inform the world that link protocol is back up. */
  595. netif_carrier_on(dev);
  596. /* Now we have to tell the syncppp that we had an outage
  597. * and that it should deal. Calling sppp_reopen here
  598. * should do the trick, but we may have to call sppp_close
  599. * when the link goes down, and call sppp_open here.
  600. * Subject to more testing.
  601. * --bbraun
  602. */
  603. lmc_proto_reopen(sc);
  604. }
  605. /* Call media specific watchdog functions */
  606. sc->lmc_media->watchdog(sc);
  607. /*
  608. * Poke the transmitter to make sure it
  609. * never stops, even if we run out of mem
  610. */
  611. LMC_CSR_WRITE(sc, csr_rxpoll, 0);
  612. /*
  613. * Check for code that failed
  614. * and try and fix it as appropriate
  615. */
  616. if(sc->failed_ring == 1){
  617. /*
  618. * Failed to setup the recv/xmit rin
  619. * Try again
  620. */
  621. sc->failed_ring = 0;
  622. lmc_softreset(sc);
  623. }
  624. if(sc->failed_recv_alloc == 1){
  625. /*
  626. * We failed to alloc mem in the
  627. * interrupt handler, go through the rings
  628. * and rebuild them
  629. */
  630. sc->failed_recv_alloc = 0;
  631. lmc_softreset(sc);
  632. }
  633. /*
  634. * remember the timer value
  635. */
  636. kick_timer:
  637. ticks = LMC_CSR_READ (sc, csr_gp_timer);
  638. LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
  639. sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
  640. /*
  641. * restart this timer.
  642. */
  643. sc->timer.expires = jiffies + (HZ);
  644. add_timer (&sc->timer);
  645. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  646. lmc_trace(dev, "lmc_watchdog out");
  647. }
  648. static void lmc_setup(struct net_device * const dev) /*fold00*/
  649. {
  650. lmc_trace(dev, "lmc_setup in");
  651. dev->type = ARPHRD_HDLC;
  652. dev->hard_start_xmit = lmc_start_xmit;
  653. dev->open = lmc_open;
  654. dev->stop = lmc_close;
  655. dev->get_stats = lmc_get_stats;
  656. dev->do_ioctl = lmc_ioctl;
  657. dev->tx_timeout = lmc_driver_timeout;
  658. dev->watchdog_timeo = (HZ); /* 1 second */
  659. lmc_trace(dev, "lmc_setup out");
  660. }
  661. static int __devinit lmc_init_one(struct pci_dev *pdev,
  662. const struct pci_device_id *ent)
  663. {
  664. struct net_device *dev;
  665. lmc_softc_t *sc;
  666. u16 subdevice;
  667. u_int16_t AdapModelNum;
  668. int err = -ENOMEM;
  669. static int cards_found;
  670. #ifndef GCOM
  671. /* We name by type not by vendor */
  672. static const char lmcname[] = "hdlc%d";
  673. #else
  674. /*
  675. * GCOM uses LMC vendor name so that clients can know which card
  676. * to attach to.
  677. */
  678. static const char lmcname[] = "lmc%d";
  679. #endif
  680. /*
  681. * Allocate our own device structure
  682. */
  683. dev = alloc_netdev(sizeof(lmc_softc_t), lmcname, lmc_setup);
  684. if (!dev) {
  685. printk (KERN_ERR "lmc:alloc_netdev for device failed\n");
  686. goto out1;
  687. }
  688. lmc_trace(dev, "lmc_init_one in");
  689. err = pci_enable_device(pdev);
  690. if (err) {
  691. printk(KERN_ERR "lmc: pci enable failed:%d\n", err);
  692. goto out2;
  693. }
  694. if (pci_request_regions(pdev, "lmc")) {
  695. printk(KERN_ERR "lmc: pci_request_region failed\n");
  696. err = -EIO;
  697. goto out3;
  698. }
  699. pci_set_drvdata(pdev, dev);
  700. if(lmc_first_load == 0){
  701. printk(KERN_INFO "Lan Media Corporation WAN Driver Version %d.%d.%d\n",
  702. DRIVER_MAJOR_VERSION, DRIVER_MINOR_VERSION,DRIVER_SUB_VERSION);
  703. lmc_first_load = 1;
  704. }
  705. sc = dev->priv;
  706. sc->lmc_device = dev;
  707. sc->name = dev->name;
  708. /* Initialize the sppp layer */
  709. /* An ioctl can cause a subsequent detach for raw frame interface */
  710. sc->if_type = LMC_PPP;
  711. sc->check = 0xBEAFCAFE;
  712. dev->base_addr = pci_resource_start(pdev, 0);
  713. dev->irq = pdev->irq;
  714. SET_MODULE_OWNER(dev);
  715. SET_NETDEV_DEV(dev, &pdev->dev);
  716. /*
  717. * This will get the protocol layer ready and do any 1 time init's
  718. * Must have a valid sc and dev structure
  719. */
  720. lmc_proto_init(sc);
  721. lmc_proto_attach(sc);
  722. /*
  723. * Why were we changing this???
  724. dev->tx_queue_len = 100;
  725. */
  726. /* Init the spin lock so can call it latter */
  727. spin_lock_init(&sc->lmc_lock);
  728. pci_set_master(pdev);
  729. printk ("%s: detected at %lx, irq %d\n", dev->name,
  730. dev->base_addr, dev->irq);
  731. if (register_netdev (dev) != 0) {
  732. printk (KERN_ERR "%s: register_netdev failed.\n", dev->name);
  733. goto out4;
  734. }
  735. sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
  736. sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
  737. /*
  738. *
  739. * Check either the subvendor or the subdevice, some systems reverse
  740. * the setting in the bois, seems to be version and arch dependent?
  741. * Fix the error, exchange the two values
  742. */
  743. if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
  744. subdevice = pdev->subsystem_vendor;
  745. switch (subdevice) {
  746. case PCI_DEVICE_ID_LMC_HSSI:
  747. printk ("%s: LMC HSSI\n", dev->name);
  748. sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
  749. sc->lmc_media = &lmc_hssi_media;
  750. break;
  751. case PCI_DEVICE_ID_LMC_DS3:
  752. printk ("%s: LMC DS3\n", dev->name);
  753. sc->lmc_cardtype = LMC_CARDTYPE_DS3;
  754. sc->lmc_media = &lmc_ds3_media;
  755. break;
  756. case PCI_DEVICE_ID_LMC_SSI:
  757. printk ("%s: LMC SSI\n", dev->name);
  758. sc->lmc_cardtype = LMC_CARDTYPE_SSI;
  759. sc->lmc_media = &lmc_ssi_media;
  760. break;
  761. case PCI_DEVICE_ID_LMC_T1:
  762. printk ("%s: LMC T1\n", dev->name);
  763. sc->lmc_cardtype = LMC_CARDTYPE_T1;
  764. sc->lmc_media = &lmc_t1_media;
  765. break;
  766. default:
  767. printk (KERN_WARNING "%s: LMC UNKOWN CARD!\n", dev->name);
  768. break;
  769. }
  770. lmc_initcsrs (sc, dev->base_addr, 8);
  771. lmc_gpio_mkinput (sc, 0xff);
  772. sc->lmc_gpio = 0; /* drive no signals yet */
  773. sc->lmc_media->defaults (sc);
  774. sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
  775. /* verify that the PCI Sub System ID matches the Adapter Model number
  776. * from the MII register
  777. */
  778. AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
  779. if ((AdapModelNum == LMC_ADAP_T1
  780. && subdevice == PCI_DEVICE_ID_LMC_T1) || /* detect LMC1200 */
  781. (AdapModelNum == LMC_ADAP_SSI
  782. && subdevice == PCI_DEVICE_ID_LMC_SSI) || /* detect LMC1000 */
  783. (AdapModelNum == LMC_ADAP_DS3
  784. && subdevice == PCI_DEVICE_ID_LMC_DS3) || /* detect LMC5245 */
  785. (AdapModelNum == LMC_ADAP_HSSI
  786. && subdevice == PCI_DEVICE_ID_LMC_HSSI))
  787. { /* detect LMC5200 */
  788. }
  789. else {
  790. printk ("%s: Model number (%d) miscompare for PCI Subsystem ID = 0x%04x\n",
  791. dev->name, AdapModelNum, subdevice);
  792. // return (NULL);
  793. }
  794. /*
  795. * reset clock
  796. */
  797. LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
  798. sc->board_idx = cards_found++;
  799. sc->stats.check = STATCHECK;
  800. sc->stats.version_size = (DRIVER_VERSION << 16) +
  801. sizeof (struct lmc_statistics);
  802. sc->stats.lmc_cardtype = sc->lmc_cardtype;
  803. sc->lmc_ok = 0;
  804. sc->last_link_status = 0;
  805. lmc_trace(dev, "lmc_init_one out");
  806. return 0;
  807. out4:
  808. lmc_proto_detach(sc);
  809. out3:
  810. if (pdev) {
  811. pci_release_regions(pdev);
  812. pci_set_drvdata(pdev, NULL);
  813. }
  814. out2:
  815. free_netdev(dev);
  816. out1:
  817. return err;
  818. }
  819. /*
  820. * Called from pci when removing module.
  821. */
  822. static void __devexit lmc_remove_one (struct pci_dev *pdev)
  823. {
  824. struct net_device *dev = pci_get_drvdata(pdev);
  825. if (dev) {
  826. lmc_softc_t *sc = dev->priv;
  827. printk("%s: removing...\n", dev->name);
  828. lmc_proto_detach(sc);
  829. unregister_netdev(dev);
  830. free_netdev(dev);
  831. pci_release_regions(pdev);
  832. pci_disable_device(pdev);
  833. pci_set_drvdata(pdev, NULL);
  834. }
  835. }
  836. /* After this is called, packets can be sent.
  837. * Does not initialize the addresses
  838. */
  839. static int lmc_open (struct net_device *dev) /*fold00*/
  840. {
  841. lmc_softc_t *sc = dev->priv;
  842. lmc_trace(dev, "lmc_open in");
  843. lmc_led_on(sc, LMC_DS3_LED0);
  844. lmc_dec_reset (sc);
  845. lmc_reset (sc);
  846. LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
  847. LMC_EVENT_LOG(LMC_EVENT_RESET2,
  848. lmc_mii_readreg (sc, 0, 16),
  849. lmc_mii_readreg (sc, 0, 17));
  850. if (sc->lmc_ok){
  851. lmc_trace(dev, "lmc_open lmc_ok out");
  852. return (0);
  853. }
  854. lmc_softreset (sc);
  855. /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
  856. if (request_irq (dev->irq, &lmc_interrupt, SA_SHIRQ, dev->name, dev)){
  857. printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
  858. lmc_trace(dev, "lmc_open irq failed out");
  859. return -EAGAIN;
  860. }
  861. sc->got_irq = 1;
  862. /* Assert Terminal Active */
  863. sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
  864. sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
  865. /*
  866. * reset to last state.
  867. */
  868. sc->lmc_media->set_status (sc, NULL);
  869. /* setup default bits to be used in tulip_desc_t transmit descriptor
  870. * -baz */
  871. sc->TxDescriptControlInit = (
  872. LMC_TDES_INTERRUPT_ON_COMPLETION
  873. | LMC_TDES_FIRST_SEGMENT
  874. | LMC_TDES_LAST_SEGMENT
  875. | LMC_TDES_SECOND_ADDR_CHAINED
  876. | LMC_TDES_DISABLE_PADDING
  877. );
  878. if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
  879. /* disable 32 bit CRC generated by ASIC */
  880. sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
  881. }
  882. sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
  883. /* Acknoledge the Terminal Active and light LEDs */
  884. /* dev->flags |= IFF_UP; */
  885. lmc_proto_open(sc);
  886. dev->do_ioctl = lmc_ioctl;
  887. netif_start_queue(dev);
  888. sc->stats.tx_tbusy0++ ;
  889. /*
  890. * select what interrupts we want to get
  891. */
  892. sc->lmc_intrmask = 0;
  893. /* Should be using the default interrupt mask defined in the .h file. */
  894. sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
  895. | TULIP_STS_RXINTR
  896. | TULIP_STS_TXINTR
  897. | TULIP_STS_ABNRMLINTR
  898. | TULIP_STS_SYSERROR
  899. | TULIP_STS_TXSTOPPED
  900. | TULIP_STS_TXUNDERFLOW
  901. | TULIP_STS_RXSTOPPED
  902. | TULIP_STS_RXNOBUF
  903. );
  904. LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
  905. sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
  906. sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
  907. LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
  908. sc->lmc_ok = 1; /* Run watchdog */
  909. /*
  910. * Set the if up now - pfb
  911. */
  912. sc->last_link_status = 1;
  913. /*
  914. * Setup a timer for the watchdog on probe, and start it running.
  915. * Since lmc_ok == 0, it will be a NOP for now.
  916. */
  917. init_timer (&sc->timer);
  918. sc->timer.expires = jiffies + HZ;
  919. sc->timer.data = (unsigned long) dev;
  920. sc->timer.function = &lmc_watchdog;
  921. add_timer (&sc->timer);
  922. lmc_trace(dev, "lmc_open out");
  923. return (0);
  924. }
  925. /* Total reset to compensate for the AdTran DSU doing bad things
  926. * under heavy load
  927. */
  928. static void lmc_running_reset (struct net_device *dev) /*fold00*/
  929. {
  930. lmc_softc_t *sc = (lmc_softc_t *) dev->priv;
  931. lmc_trace(dev, "lmc_runnig_reset in");
  932. /* stop interrupts */
  933. /* Clear the interrupt mask */
  934. LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
  935. lmc_dec_reset (sc);
  936. lmc_reset (sc);
  937. lmc_softreset (sc);
  938. /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
  939. sc->lmc_media->set_link_status (sc, 1);
  940. sc->lmc_media->set_status (sc, NULL);
  941. netif_wake_queue(dev);
  942. sc->lmc_txfull = 0;
  943. sc->stats.tx_tbusy0++ ;
  944. sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
  945. LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
  946. sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
  947. LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
  948. lmc_trace(dev, "lmc_runnin_reset_out");
  949. }
  950. /* This is what is called when you ifconfig down a device.
  951. * This disables the timer for the watchdog and keepalives,
  952. * and disables the irq for dev.
  953. */
  954. static int lmc_close (struct net_device *dev) /*fold00*/
  955. {
  956. /* not calling release_region() as we should */
  957. lmc_softc_t *sc;
  958. lmc_trace(dev, "lmc_close in");
  959. sc = dev->priv;
  960. sc->lmc_ok = 0;
  961. sc->lmc_media->set_link_status (sc, 0);
  962. del_timer (&sc->timer);
  963. lmc_proto_close(sc);
  964. lmc_ifdown (dev);
  965. lmc_trace(dev, "lmc_close out");
  966. return 0;
  967. }
  968. /* Ends the transfer of packets */
  969. /* When the interface goes down, this is called */
  970. static int lmc_ifdown (struct net_device *dev) /*fold00*/
  971. {
  972. lmc_softc_t *sc = dev->priv;
  973. u32 csr6;
  974. int i;
  975. lmc_trace(dev, "lmc_ifdown in");
  976. /* Don't let anything else go on right now */
  977. // dev->start = 0;
  978. netif_stop_queue(dev);
  979. sc->stats.tx_tbusy1++ ;
  980. /* stop interrupts */
  981. /* Clear the interrupt mask */
  982. LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
  983. /* Stop Tx and Rx on the chip */
  984. csr6 = LMC_CSR_READ (sc, csr_command);
  985. csr6 &= ~LMC_DEC_ST; /* Turn off the Transmission bit */
  986. csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */
  987. LMC_CSR_WRITE (sc, csr_command, csr6);
  988. sc->stats.rx_missed_errors +=
  989. LMC_CSR_READ (sc, csr_missed_frames) & 0xffff;
  990. /* release the interrupt */
  991. if(sc->got_irq == 1){
  992. free_irq (dev->irq, dev);
  993. sc->got_irq = 0;
  994. }
  995. /* free skbuffs in the Rx queue */
  996. for (i = 0; i < LMC_RXDESCS; i++)
  997. {
  998. struct sk_buff *skb = sc->lmc_rxq[i];
  999. sc->lmc_rxq[i] = NULL;
  1000. sc->lmc_rxring[i].status = 0;
  1001. sc->lmc_rxring[i].length = 0;
  1002. sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
  1003. if (skb != NULL)
  1004. dev_kfree_skb(skb);
  1005. sc->lmc_rxq[i] = NULL;
  1006. }
  1007. for (i = 0; i < LMC_TXDESCS; i++)
  1008. {
  1009. if (sc->lmc_txq[i] != NULL)
  1010. dev_kfree_skb(sc->lmc_txq[i]);
  1011. sc->lmc_txq[i] = NULL;
  1012. }
  1013. lmc_led_off (sc, LMC_MII16_LED_ALL);
  1014. netif_wake_queue(dev);
  1015. sc->stats.tx_tbusy0++ ;
  1016. lmc_trace(dev, "lmc_ifdown out");
  1017. return 0;
  1018. }
  1019. /* Interrupt handling routine. This will take an incoming packet, or clean
  1020. * up after a trasmit.
  1021. */
  1022. static irqreturn_t lmc_interrupt (int irq, void *dev_instance, struct pt_regs *regs) /*fold00*/
  1023. {
  1024. struct net_device *dev = (struct net_device *) dev_instance;
  1025. lmc_softc_t *sc;
  1026. u32 csr;
  1027. int i;
  1028. s32 stat;
  1029. unsigned int badtx;
  1030. u32 firstcsr;
  1031. int max_work = LMC_RXDESCS;
  1032. int handled = 0;
  1033. lmc_trace(dev, "lmc_interrupt in");
  1034. sc = dev->priv;
  1035. spin_lock(&sc->lmc_lock);
  1036. /*
  1037. * Read the csr to find what interrupts we have (if any)
  1038. */
  1039. csr = LMC_CSR_READ (sc, csr_status);
  1040. /*
  1041. * Make sure this is our interrupt
  1042. */
  1043. if ( ! (csr & sc->lmc_intrmask)) {
  1044. goto lmc_int_fail_out;
  1045. }
  1046. firstcsr = csr;
  1047. /* always go through this loop at least once */
  1048. while (csr & sc->lmc_intrmask) {
  1049. handled = 1;
  1050. /*
  1051. * Clear interrupt bits, we handle all case below
  1052. */
  1053. LMC_CSR_WRITE (sc, csr_status, csr);
  1054. /*
  1055. * One of
  1056. * - Transmit process timed out CSR5<1>
  1057. * - Transmit jabber timeout CSR5<3>
  1058. * - Transmit underflow CSR5<5>
  1059. * - Transmit Receiver buffer unavailable CSR5<7>
  1060. * - Receive process stopped CSR5<8>
  1061. * - Receive watchdog timeout CSR5<9>
  1062. * - Early transmit interrupt CSR5<10>
  1063. *
  1064. * Is this really right? Should we do a running reset for jabber?
  1065. * (being a WAN card and all)
  1066. */
  1067. if (csr & TULIP_STS_ABNRMLINTR){
  1068. lmc_running_reset (dev);
  1069. break;
  1070. }
  1071. if (csr & TULIP_STS_RXINTR){
  1072. lmc_trace(dev, "rx interrupt");
  1073. lmc_rx (dev);
  1074. }
  1075. if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
  1076. int n_compl = 0 ;
  1077. /* reset the transmit timeout detection flag -baz */
  1078. sc->stats.tx_NoCompleteCnt = 0;
  1079. badtx = sc->lmc_taint_tx;
  1080. i = badtx % LMC_TXDESCS;
  1081. while ((badtx < sc->lmc_next_tx)) {
  1082. stat = sc->lmc_txring[i].status;
  1083. LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
  1084. sc->lmc_txring[i].length);
  1085. /*
  1086. * If bit 31 is 1 the tulip owns it break out of the loop
  1087. */
  1088. if (stat & 0x80000000)
  1089. break;
  1090. n_compl++ ; /* i.e., have an empty slot in ring */
  1091. /*
  1092. * If we have no skbuff or have cleared it
  1093. * Already continue to the next buffer
  1094. */
  1095. if (sc->lmc_txq[i] == NULL)
  1096. continue;
  1097. /*
  1098. * Check the total error summary to look for any errors
  1099. */
  1100. if (stat & 0x8000) {
  1101. sc->stats.tx_errors++;
  1102. if (stat & 0x4104)
  1103. sc->stats.tx_aborted_errors++;
  1104. if (stat & 0x0C00)
  1105. sc->stats.tx_carrier_errors++;
  1106. if (stat & 0x0200)
  1107. sc->stats.tx_window_errors++;
  1108. if (stat & 0x0002)
  1109. sc->stats.tx_fifo_errors++;
  1110. }
  1111. else {
  1112. sc->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
  1113. sc->stats.tx_packets++;
  1114. }
  1115. // dev_kfree_skb(sc->lmc_txq[i]);
  1116. dev_kfree_skb_irq(sc->lmc_txq[i]);
  1117. sc->lmc_txq[i] = NULL;
  1118. badtx++;
  1119. i = badtx % LMC_TXDESCS;
  1120. }
  1121. if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
  1122. {
  1123. printk ("%s: out of sync pointer\n", dev->name);
  1124. badtx += LMC_TXDESCS;
  1125. }
  1126. LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
  1127. sc->lmc_txfull = 0;
  1128. netif_wake_queue(dev);
  1129. sc->stats.tx_tbusy0++ ;
  1130. #ifdef DEBUG
  1131. sc->stats.dirtyTx = badtx;
  1132. sc->stats.lmc_next_tx = sc->lmc_next_tx;
  1133. sc->stats.lmc_txfull = sc->lmc_txfull;
  1134. #endif
  1135. sc->lmc_taint_tx = badtx;
  1136. /*
  1137. * Why was there a break here???
  1138. */
  1139. } /* end handle transmit interrupt */
  1140. if (csr & TULIP_STS_SYSERROR) {
  1141. u32 error;
  1142. printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
  1143. error = csr>>23 & 0x7;
  1144. switch(error){
  1145. case 0x000:
  1146. printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
  1147. break;
  1148. case 0x001:
  1149. printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
  1150. break;
  1151. case 0x010:
  1152. printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
  1153. break;
  1154. default:
  1155. printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
  1156. }
  1157. lmc_dec_reset (sc);
  1158. lmc_reset (sc);
  1159. LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
  1160. LMC_EVENT_LOG(LMC_EVENT_RESET2,
  1161. lmc_mii_readreg (sc, 0, 16),
  1162. lmc_mii_readreg (sc, 0, 17));
  1163. }
  1164. if(max_work-- <= 0)
  1165. break;
  1166. /*
  1167. * Get current csr status to make sure
  1168. * we've cleared all interrupts
  1169. */
  1170. csr = LMC_CSR_READ (sc, csr_status);
  1171. } /* end interrupt loop */
  1172. LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
  1173. lmc_int_fail_out:
  1174. spin_unlock(&sc->lmc_lock);
  1175. lmc_trace(dev, "lmc_interrupt out");
  1176. return IRQ_RETVAL(handled);
  1177. }
  1178. static int lmc_start_xmit (struct sk_buff *skb, struct net_device *dev) /*fold00*/
  1179. {
  1180. lmc_softc_t *sc;
  1181. u32 flag;
  1182. int entry;
  1183. int ret = 0;
  1184. unsigned long flags;
  1185. lmc_trace(dev, "lmc_start_xmit in");
  1186. sc = dev->priv;
  1187. spin_lock_irqsave(&sc->lmc_lock, flags);
  1188. /* normal path, tbusy known to be zero */
  1189. entry = sc->lmc_next_tx % LMC_TXDESCS;
  1190. sc->lmc_txq[entry] = skb;
  1191. sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
  1192. LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
  1193. #ifndef GCOM
  1194. /* If the queue is less than half full, don't interrupt */
  1195. if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
  1196. {
  1197. /* Do not interrupt on completion of this packet */
  1198. flag = 0x60000000;
  1199. netif_wake_queue(dev);
  1200. }
  1201. else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
  1202. {
  1203. /* This generates an interrupt on completion of this packet */
  1204. flag = 0xe0000000;
  1205. netif_wake_queue(dev);
  1206. }
  1207. else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
  1208. {
  1209. /* Do not interrupt on completion of this packet */
  1210. flag = 0x60000000;
  1211. netif_wake_queue(dev);
  1212. }
  1213. else
  1214. {
  1215. /* This generates an interrupt on completion of this packet */
  1216. flag = 0xe0000000;
  1217. sc->lmc_txfull = 1;
  1218. netif_stop_queue(dev);
  1219. }
  1220. #else
  1221. flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
  1222. if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
  1223. { /* ring full, go busy */
  1224. sc->lmc_txfull = 1;
  1225. netif_stop_queue(dev);
  1226. sc->stats.tx_tbusy1++ ;
  1227. LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
  1228. }
  1229. #endif
  1230. if (entry == LMC_TXDESCS - 1) /* last descriptor in ring */
  1231. flag |= LMC_TDES_END_OF_RING; /* flag as such for Tulip */
  1232. /* don't pad small packets either */
  1233. flag = sc->lmc_txring[entry].length = (skb->len) | flag |
  1234. sc->TxDescriptControlInit;
  1235. /* set the transmit timeout flag to be checked in
  1236. * the watchdog timer handler. -baz
  1237. */
  1238. sc->stats.tx_NoCompleteCnt++;
  1239. sc->lmc_next_tx++;
  1240. /* give ownership to the chip */
  1241. LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
  1242. sc->lmc_txring[entry].status = 0x80000000;
  1243. /* send now! */
  1244. LMC_CSR_WRITE (sc, csr_txpoll, 0);
  1245. dev->trans_start = jiffies;
  1246. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  1247. lmc_trace(dev, "lmc_start_xmit_out");
  1248. return ret;
  1249. }
  1250. static int lmc_rx (struct net_device *dev) /*fold00*/
  1251. {
  1252. lmc_softc_t *sc;
  1253. int i;
  1254. int rx_work_limit = LMC_RXDESCS;
  1255. unsigned int next_rx;
  1256. int rxIntLoopCnt; /* debug -baz */
  1257. int localLengthErrCnt = 0;
  1258. long stat;
  1259. struct sk_buff *skb, *nsb;
  1260. u16 len;
  1261. lmc_trace(dev, "lmc_rx in");
  1262. sc = dev->priv;
  1263. lmc_led_on(sc, LMC_DS3_LED3);
  1264. rxIntLoopCnt = 0; /* debug -baz */
  1265. i = sc->lmc_next_rx % LMC_RXDESCS;
  1266. next_rx = sc->lmc_next_rx;
  1267. while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
  1268. {
  1269. rxIntLoopCnt++; /* debug -baz */
  1270. len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
  1271. if ((stat & 0x0300) != 0x0300) { /* Check first segment and last segment */
  1272. if ((stat & 0x0000ffff) != 0x7fff) {
  1273. /* Oversized frame */
  1274. sc->stats.rx_length_errors++;
  1275. goto skip_packet;
  1276. }
  1277. }
  1278. if(stat & 0x00000008){ /* Catch a dribbling bit error */
  1279. sc->stats.rx_errors++;
  1280. sc->stats.rx_frame_errors++;
  1281. goto skip_packet;
  1282. }
  1283. if(stat & 0x00000004){ /* Catch a CRC error by the Xilinx */
  1284. sc->stats.rx_errors++;
  1285. sc->stats.rx_crc_errors++;
  1286. goto skip_packet;
  1287. }
  1288. if (len > LMC_PKT_BUF_SZ){
  1289. sc->stats.rx_length_errors++;
  1290. localLengthErrCnt++;
  1291. goto skip_packet;
  1292. }
  1293. if (len < sc->lmc_crcSize + 2) {
  1294. sc->stats.rx_length_errors++;
  1295. sc->stats.rx_SmallPktCnt++;
  1296. localLengthErrCnt++;
  1297. goto skip_packet;
  1298. }
  1299. if(stat & 0x00004000){
  1300. printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
  1301. }
  1302. len -= sc->lmc_crcSize;
  1303. skb = sc->lmc_rxq[i];
  1304. /*
  1305. * We ran out of memory at some point
  1306. * just allocate an skb buff and continue.
  1307. */
  1308. if(skb == 0x0){
  1309. nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
  1310. if (nsb) {
  1311. sc->lmc_rxq[i] = nsb;
  1312. nsb->dev = dev;
  1313. sc->lmc_rxring[i].buffer1 = virt_to_bus (nsb->tail);
  1314. }
  1315. sc->failed_recv_alloc = 1;
  1316. goto skip_packet;
  1317. }
  1318. dev->last_rx = jiffies;
  1319. sc->stats.rx_packets++;
  1320. sc->stats.rx_bytes += len;
  1321. LMC_CONSOLE_LOG("recv", skb->data, len);
  1322. /*
  1323. * I'm not sure of the sanity of this
  1324. * Packets could be arriving at a constant
  1325. * 44.210mbits/sec and we're going to copy
  1326. * them into a new buffer??
  1327. */
  1328. if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
  1329. /*
  1330. * If it's a large packet don't copy it just hand it up
  1331. */
  1332. give_it_anyways:
  1333. sc->lmc_rxq[i] = NULL;
  1334. sc->lmc_rxring[i].buffer1 = 0x0;
  1335. skb_put (skb, len);
  1336. skb->protocol = lmc_proto_type(sc, skb);
  1337. skb->protocol = htons(ETH_P_WAN_PPP);
  1338. skb->mac.raw = skb->data;
  1339. // skb->nh.raw = skb->data;
  1340. skb->dev = dev;
  1341. lmc_proto_netif(sc, skb);
  1342. /*
  1343. * This skb will be destroyed by the upper layers, make a new one
  1344. */
  1345. nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
  1346. if (nsb) {
  1347. sc->lmc_rxq[i] = nsb;
  1348. nsb->dev = dev;
  1349. sc->lmc_rxring[i].buffer1 = virt_to_bus (nsb->tail);
  1350. /* Transferred to 21140 below */
  1351. }
  1352. else {
  1353. /*
  1354. * We've run out of memory, stop trying to allocate
  1355. * memory and exit the interrupt handler
  1356. *
  1357. * The chip may run out of receivers and stop
  1358. * in which care we'll try to allocate the buffer
  1359. * again. (once a second)
  1360. */
  1361. sc->stats.rx_BuffAllocErr++;
  1362. LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
  1363. sc->failed_recv_alloc = 1;
  1364. goto skip_out_of_mem;
  1365. }
  1366. }
  1367. else {
  1368. nsb = dev_alloc_skb(len);
  1369. if(!nsb) {
  1370. goto give_it_anyways;
  1371. }
  1372. memcpy(skb_put(nsb, len), skb->data, len);
  1373. nsb->protocol = lmc_proto_type(sc, skb);
  1374. nsb->mac.raw = nsb->data;
  1375. // nsb->nh.raw = nsb->data;
  1376. nsb->dev = dev;
  1377. lmc_proto_netif(sc, nsb);
  1378. }
  1379. skip_packet:
  1380. LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
  1381. sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
  1382. sc->lmc_next_rx++;
  1383. i = sc->lmc_next_rx % LMC_RXDESCS;
  1384. rx_work_limit--;
  1385. if (rx_work_limit < 0)
  1386. break;
  1387. }
  1388. /* detect condition for LMC1000 where DSU cable attaches and fills
  1389. * descriptors with bogus packets
  1390. *
  1391. if (localLengthErrCnt > LMC_RXDESCS - 3) {
  1392. sc->stats.rx_BadPktSurgeCnt++;
  1393. LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE,
  1394. localLengthErrCnt,
  1395. sc->stats.rx_BadPktSurgeCnt);
  1396. } */
  1397. /* save max count of receive descriptors serviced */
  1398. if (rxIntLoopCnt > sc->stats.rxIntLoopCnt) {
  1399. sc->stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
  1400. }
  1401. #ifdef DEBUG
  1402. if (rxIntLoopCnt == 0)
  1403. {
  1404. for (i = 0; i < LMC_RXDESCS; i++)
  1405. {
  1406. if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
  1407. != DESC_OWNED_BY_DC21X4)
  1408. {
  1409. rxIntLoopCnt++;
  1410. }
  1411. }
  1412. LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
  1413. }
  1414. #endif
  1415. lmc_led_off(sc, LMC_DS3_LED3);
  1416. skip_out_of_mem:
  1417. lmc_trace(dev, "lmc_rx out");
  1418. return 0;
  1419. }
  1420. static struct net_device_stats *lmc_get_stats (struct net_device *dev) /*fold00*/
  1421. {
  1422. lmc_softc_t *sc = dev->priv;
  1423. unsigned long flags;
  1424. lmc_trace(dev, "lmc_get_stats in");
  1425. spin_lock_irqsave(&sc->lmc_lock, flags);
  1426. sc->stats.rx_missed_errors += LMC_CSR_READ (sc, csr_missed_frames) & 0xffff;
  1427. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  1428. lmc_trace(dev, "lmc_get_stats out");
  1429. return (struct net_device_stats *) &sc->stats;
  1430. }
  1431. static struct pci_driver lmc_driver = {
  1432. .name = "lmc",
  1433. .id_table = lmc_pci_tbl,
  1434. .probe = lmc_init_one,
  1435. .remove = __devexit_p(lmc_remove_one),
  1436. };
  1437. static int __init init_lmc(void)
  1438. {
  1439. return pci_module_init(&lmc_driver);
  1440. }
  1441. static void __exit exit_lmc(void)
  1442. {
  1443. pci_unregister_driver(&lmc_driver);
  1444. }
  1445. module_init(init_lmc);
  1446. module_exit(exit_lmc);
  1447. unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
  1448. {
  1449. int i;
  1450. int command = (0xf6 << 10) | (devaddr << 5) | regno;
  1451. int retval = 0;
  1452. lmc_trace(sc->lmc_device, "lmc_mii_readreg in");
  1453. LMC_MII_SYNC (sc);
  1454. lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync");
  1455. for (i = 15; i >= 0; i--)
  1456. {
  1457. int dataval = (command & (1 << i)) ? 0x20000 : 0;
  1458. LMC_CSR_WRITE (sc, csr_9, dataval);
  1459. lmc_delay ();
  1460. /* __SLOW_DOWN_IO; */
  1461. LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
  1462. lmc_delay ();
  1463. /* __SLOW_DOWN_IO; */
  1464. }
  1465. lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1");
  1466. for (i = 19; i > 0; i--)
  1467. {
  1468. LMC_CSR_WRITE (sc, csr_9, 0x40000);
  1469. lmc_delay ();
  1470. /* __SLOW_DOWN_IO; */
  1471. retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
  1472. LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
  1473. lmc_delay ();
  1474. /* __SLOW_DOWN_IO; */
  1475. }
  1476. lmc_trace(sc->lmc_device, "lmc_mii_readreg out");
  1477. return (retval >> 1) & 0xffff;
  1478. }
  1479. void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
  1480. {
  1481. int i = 32;
  1482. int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
  1483. lmc_trace(sc->lmc_device, "lmc_mii_writereg in");
  1484. LMC_MII_SYNC (sc);
  1485. i = 31;
  1486. while (i >= 0)
  1487. {
  1488. int datav;
  1489. if (command & (1 << i))
  1490. datav = 0x20000;
  1491. else
  1492. datav = 0x00000;
  1493. LMC_CSR_WRITE (sc, csr_9, datav);
  1494. lmc_delay ();
  1495. /* __SLOW_DOWN_IO; */
  1496. LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
  1497. lmc_delay ();
  1498. /* __SLOW_DOWN_IO; */
  1499. i--;
  1500. }
  1501. i = 2;
  1502. while (i > 0)
  1503. {
  1504. LMC_CSR_WRITE (sc, csr_9, 0x40000);
  1505. lmc_delay ();
  1506. /* __SLOW_DOWN_IO; */
  1507. LMC_CSR_WRITE (sc, csr_9, 0x50000);
  1508. lmc_delay ();
  1509. /* __SLOW_DOWN_IO; */
  1510. i--;
  1511. }
  1512. lmc_trace(sc->lmc_device, "lmc_mii_writereg out");
  1513. }
  1514. static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
  1515. {
  1516. int i;
  1517. lmc_trace(sc->lmc_device, "lmc_softreset in");
  1518. /* Initialize the receive rings and buffers. */
  1519. sc->lmc_txfull = 0;
  1520. sc->lmc_next_rx = 0;
  1521. sc->lmc_next_tx = 0;
  1522. sc->lmc_taint_rx = 0;
  1523. sc->lmc_taint_tx = 0;
  1524. /*
  1525. * Setup each one of the receiver buffers
  1526. * allocate an skbuff for each one, setup the descriptor table
  1527. * and point each buffer at the next one
  1528. */
  1529. for (i = 0; i < LMC_RXDESCS; i++)
  1530. {
  1531. struct sk_buff *skb;
  1532. if (sc->lmc_rxq[i] == NULL)
  1533. {
  1534. skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
  1535. if(skb == NULL){
  1536. printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
  1537. sc->failed_ring = 1;
  1538. break;
  1539. }
  1540. else{
  1541. sc->lmc_rxq[i] = skb;
  1542. }
  1543. }
  1544. else
  1545. {
  1546. skb = sc->lmc_rxq[i];
  1547. }
  1548. skb->dev = sc->lmc_device;
  1549. /* owned by 21140 */
  1550. sc->lmc_rxring[i].status = 0x80000000;
  1551. /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
  1552. sc->lmc_rxring[i].length = skb->end - skb->data;
  1553. /* use to be tail which is dumb since you're thinking why write
  1554. * to the end of the packj,et but since there's nothing there tail == data
  1555. */
  1556. sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
  1557. /* This is fair since the structure is static and we have the next address */
  1558. sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
  1559. }
  1560. /*
  1561. * Sets end of ring
  1562. */
  1563. sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
  1564. sc->lmc_rxring[i - 1].buffer2 = virt_to_bus (&sc->lmc_rxring[0]); /* Point back to the start */
  1565. LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
  1566. /* Initialize the transmit rings and buffers */
  1567. for (i = 0; i < LMC_TXDESCS; i++)
  1568. {
  1569. if (sc->lmc_txq[i] != NULL){ /* have buffer */
  1570. dev_kfree_skb(sc->lmc_txq[i]); /* free it */
  1571. sc->stats.tx_dropped++; /* We just dropped a packet */
  1572. }
  1573. sc->lmc_txq[i] = NULL;
  1574. sc->lmc_txring[i].status = 0x00000000;
  1575. sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
  1576. }
  1577. sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
  1578. LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
  1579. lmc_trace(sc->lmc_device, "lmc_softreset out");
  1580. }
  1581. void lmc_gpio_mkinput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/
  1582. {
  1583. lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in");
  1584. sc->lmc_gpio_io &= ~bits;
  1585. LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
  1586. lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out");
  1587. }
  1588. void lmc_gpio_mkoutput(lmc_softc_t * const sc, u_int32_t bits) /*fold00*/
  1589. {
  1590. lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in");
  1591. sc->lmc_gpio_io |= bits;
  1592. LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
  1593. lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out");
  1594. }
  1595. void lmc_led_on(lmc_softc_t * const sc, u_int32_t led) /*fold00*/
  1596. {
  1597. lmc_trace(sc->lmc_device, "lmc_led_on in");
  1598. if((~sc->lmc_miireg16) & led){ /* Already on! */
  1599. lmc_trace(sc->lmc_device, "lmc_led_on aon out");
  1600. return;
  1601. }
  1602. sc->lmc_miireg16 &= ~led;
  1603. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  1604. lmc_trace(sc->lmc_device, "lmc_led_on out");
  1605. }
  1606. void lmc_led_off(lmc_softc_t * const sc, u_int32_t led) /*fold00*/
  1607. {
  1608. lmc_trace(sc->lmc_device, "lmc_led_off in");
  1609. if(sc->lmc_miireg16 & led){ /* Already set don't do anything */
  1610. lmc_trace(sc->lmc_device, "lmc_led_off aoff out");
  1611. return;
  1612. }
  1613. sc->lmc_miireg16 |= led;
  1614. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  1615. lmc_trace(sc->lmc_device, "lmc_led_off out");
  1616. }
  1617. static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
  1618. {
  1619. lmc_trace(sc->lmc_device, "lmc_reset in");
  1620. sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
  1621. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  1622. sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
  1623. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  1624. /*
  1625. * make some of the GPIO pins be outputs
  1626. */
  1627. lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
  1628. /*
  1629. * RESET low to force state reset. This also forces
  1630. * the transmitter clock to be internal, but we expect to reset
  1631. * that later anyway.
  1632. */
  1633. sc->lmc_gpio &= ~(LMC_GEP_RESET);
  1634. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  1635. /*
  1636. * hold for more than 10 microseconds
  1637. */
  1638. udelay(50);
  1639. /*
  1640. * stop driving Xilinx-related signals
  1641. */
  1642. lmc_gpio_mkinput(sc, LMC_GEP_RESET);
  1643. /*
  1644. * Call media specific init routine
  1645. */
  1646. sc->lmc_media->init(sc);
  1647. sc->stats.resetCount++;
  1648. lmc_trace(sc->lmc_device, "lmc_reset out");
  1649. }
  1650. static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
  1651. {
  1652. u_int32_t val;
  1653. lmc_trace(sc->lmc_device, "lmc_dec_reset in");
  1654. /*
  1655. * disable all interrupts
  1656. */
  1657. sc->lmc_intrmask = 0;
  1658. LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
  1659. /*
  1660. * Reset the chip with a software reset command.
  1661. * Wait 10 microseconds (actually 50 PCI cycles but at
  1662. * 33MHz that comes to two microseconds but wait a
  1663. * bit longer anyways)
  1664. */
  1665. LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
  1666. udelay(25);
  1667. #ifdef __sparc__
  1668. sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
  1669. sc->lmc_busmode = 0x00100000;
  1670. sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
  1671. LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
  1672. #endif
  1673. sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
  1674. /*
  1675. * We want:
  1676. * no ethernet address in frames we write
  1677. * disable padding (txdesc, padding disable)
  1678. * ignore runt frames (rdes0 bit 15)
  1679. * no receiver watchdog or transmitter jabber timer
  1680. * (csr15 bit 0,14 == 1)
  1681. * if using 16-bit CRC, turn off CRC (trans desc, crc disable)
  1682. */
  1683. sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
  1684. | TULIP_CMD_FULLDUPLEX
  1685. | TULIP_CMD_PASSBADPKT
  1686. | TULIP_CMD_NOHEARTBEAT
  1687. | TULIP_CMD_PORTSELECT
  1688. | TULIP_CMD_RECEIVEALL
  1689. | TULIP_CMD_MUSTBEONE
  1690. );
  1691. sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
  1692. | TULIP_CMD_THRESHOLDCTL
  1693. | TULIP_CMD_STOREFWD
  1694. | TULIP_CMD_TXTHRSHLDCTL
  1695. );
  1696. LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
  1697. /*
  1698. * disable receiver watchdog and transmit jabber
  1699. */
  1700. val = LMC_CSR_READ(sc, csr_sia_general);
  1701. val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
  1702. LMC_CSR_WRITE(sc, csr_sia_general, val);
  1703. lmc_trace(sc->lmc_device, "lmc_dec_reset out");
  1704. }
  1705. static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
  1706. size_t csr_size)
  1707. {
  1708. lmc_trace(sc->lmc_device, "lmc_initcsrs in");
  1709. sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size;
  1710. sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size;
  1711. sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size;
  1712. sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size;
  1713. sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size;
  1714. sc->lmc_csrs.csr_status = csr_base + 5 * csr_size;
  1715. sc->lmc_csrs.csr_command = csr_base + 6 * csr_size;
  1716. sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size;
  1717. sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size;
  1718. sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size;
  1719. sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size;
  1720. sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size;
  1721. sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size;
  1722. sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size;
  1723. sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size;
  1724. sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size;
  1725. lmc_trace(sc->lmc_device, "lmc_initcsrs out");
  1726. }
  1727. static void lmc_driver_timeout(struct net_device *dev) { /*fold00*/
  1728. lmc_softc_t *sc;
  1729. u32 csr6;
  1730. unsigned long flags;
  1731. lmc_trace(dev, "lmc_driver_timeout in");
  1732. sc = dev->priv;
  1733. spin_lock_irqsave(&sc->lmc_lock, flags);
  1734. printk("%s: Xmitter busy|\n", dev->name);
  1735. sc->stats.tx_tbusy_calls++ ;
  1736. if (jiffies - dev->trans_start < TX_TIMEOUT) {
  1737. goto bug_out;
  1738. }
  1739. /*
  1740. * Chip seems to have locked up
  1741. * Reset it
  1742. * This whips out all our decriptor
  1743. * table and starts from scartch
  1744. */
  1745. LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
  1746. LMC_CSR_READ (sc, csr_status),
  1747. sc->stats.tx_ProcTimeout);
  1748. lmc_running_reset (dev);
  1749. LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
  1750. LMC_EVENT_LOG(LMC_EVENT_RESET2,
  1751. lmc_mii_readreg (sc, 0, 16),
  1752. lmc_mii_readreg (sc, 0, 17));
  1753. /* restart the tx processes */
  1754. csr6 = LMC_CSR_READ (sc, csr_command);
  1755. LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
  1756. LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
  1757. /* immediate transmit */
  1758. LMC_CSR_WRITE (sc, csr_txpoll, 0);
  1759. sc->stats.tx_errors++;
  1760. sc->stats.tx_ProcTimeout++; /* -baz */
  1761. dev->trans_start = jiffies;
  1762. bug_out:
  1763. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  1764. lmc_trace(dev, "lmc_driver_timout out");
  1765. }