drvfbi.c 29 KB

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  1. /******************************************************************************
  2. *
  3. * (C)Copyright 1998,1999 SysKonnect,
  4. * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
  5. *
  6. * See the file "skfddi.c" for further information.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * The information in this file is provided "AS IS" without warranty.
  14. *
  15. ******************************************************************************/
  16. /*
  17. * FBI board dependent Driver for SMT and LLC
  18. */
  19. #include "h/types.h"
  20. #include "h/fddi.h"
  21. #include "h/smc.h"
  22. #include "h/supern_2.h"
  23. #include "h/skfbiinc.h"
  24. #ifndef lint
  25. static const char ID_sccs[] = "@(#)drvfbi.c 1.63 99/02/11 (C) SK " ;
  26. #endif
  27. /*
  28. * PCM active state
  29. */
  30. #define PC8_ACTIVE 8
  31. #define LED_Y_ON 0x11 /* Used for ring up/down indication */
  32. #define LED_Y_OFF 0x10
  33. #define MS2BCLK(x) ((x)*12500L)
  34. /*
  35. * valid configuration values are:
  36. */
  37. #ifdef ISA
  38. const int opt_ints[] = {8, 3, 4, 5, 9, 10, 11, 12, 15} ;
  39. const int opt_iops[] = {8,
  40. 0x100, 0x120, 0x180, 0x1a0, 0x220, 0x240, 0x320, 0x340};
  41. const int opt_dmas[] = {4, 3, 5, 6, 7} ;
  42. const int opt_eproms[] = {15, 0xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce,
  43. 0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc} ;
  44. #endif
  45. #ifdef EISA
  46. const int opt_ints[] = {5, 9, 10, 11} ;
  47. const int opt_dmas[] = {0, 5, 6, 7} ;
  48. const int opt_eproms[] = {0xc0, 0xc2, 0xc4, 0xc6, 0xc8, 0xca, 0xcc, 0xce,
  49. 0xd0, 0xd2, 0xd4, 0xd6, 0xd8, 0xda, 0xdc} ;
  50. #endif
  51. #ifdef MCA
  52. int opt_ints[] = {3, 11, 10, 9} ; /* FM1 */
  53. int opt_eproms[] = {0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4, 0xd8, 0xdc} ;
  54. #endif /* MCA */
  55. /*
  56. * xPOS_ID:xxxx
  57. * | \ /
  58. * | \/
  59. * | --------------------- the patched POS_ID of the Adapter
  60. * | xxxx = (Vendor ID low byte,
  61. * | Vendor ID high byte,
  62. * | Device ID low byte,
  63. * | Device ID high byte)
  64. * +------------------------------ the patched oem_id must be
  65. * 'S' for SK or 'I' for IBM
  66. * this is a short id for the driver.
  67. */
  68. #ifndef MULT_OEM
  69. #ifndef OEM_CONCEPT
  70. #ifndef MCA
  71. const u_char oem_id[] = "xPOS_ID:xxxx" ;
  72. #else
  73. const u_char oem_id[] = "xPOSID1:xxxx" ; /* FM1 card id. */
  74. #endif
  75. #else /* OEM_CONCEPT */
  76. #ifndef MCA
  77. const u_char oem_id[] = OEM_ID ;
  78. #else
  79. const u_char oem_id[] = OEM_ID1 ; /* FM1 card id. */
  80. #endif /* MCA */
  81. #endif /* OEM_CONCEPT */
  82. #define ID_BYTE0 8
  83. #define OEMID(smc,i) oem_id[ID_BYTE0 + i]
  84. #else /* MULT_OEM */
  85. const struct s_oem_ids oem_ids[] = {
  86. #include "oemids.h"
  87. {0}
  88. };
  89. #define OEMID(smc,i) smc->hw.oem_id->oi_id[i]
  90. #endif /* MULT_OEM */
  91. /* Prototypes of external functions */
  92. #ifdef AIX
  93. extern int AIX_vpdReadByte() ;
  94. #endif
  95. /* Prototype of a local function. */
  96. static void smt_stop_watchdog(struct s_smc *smc);
  97. #ifdef MCA
  98. static int read_card_id() ;
  99. static void DisableSlotAccess() ;
  100. static void EnableSlotAccess() ;
  101. #ifdef AIX
  102. extern int attach_POS_addr() ;
  103. extern int detach_POS_addr() ;
  104. extern u_char read_POS() ;
  105. extern void write_POS() ;
  106. extern int AIX_vpdReadByte() ;
  107. #else
  108. #define read_POS(smc,a1,a2) ((u_char) inp(a1))
  109. #define write_POS(smc,a1,a2,a3) outp((a1),(a3))
  110. #endif
  111. #endif /* MCA */
  112. /*
  113. * FDDI card reset
  114. */
  115. static void card_start(struct s_smc *smc)
  116. {
  117. int i ;
  118. #ifdef PCI
  119. u_char rev_id ;
  120. u_short word;
  121. #endif
  122. smt_stop_watchdog(smc) ;
  123. #ifdef ISA
  124. outpw(CSR_A,0) ; /* reset for all chips */
  125. for (i = 10 ; i ; i--) /* delay for PLC's */
  126. (void)inpw(ISR_A) ;
  127. OUT_82c54_TIMER(3,COUNT(2) | RW_OP(3) | TMODE(2)) ;
  128. /* counter 2, mode 2 */
  129. OUT_82c54_TIMER(2,97) ; /* LSB */
  130. OUT_82c54_TIMER(2,0) ; /* MSB ( 15.6 us ) */
  131. outpw(CSR_A,CS_CRESET) ;
  132. #endif
  133. #ifdef EISA
  134. outpw(CSR_A,0) ; /* reset for all chips */
  135. for (i = 10 ; i ; i--) /* delay for PLC's */
  136. (void)inpw(ISR_A) ;
  137. outpw(CSR_A,CS_CRESET) ;
  138. smc->hw.led = (2<<6) ;
  139. outpw(CSR_A,CS_CRESET | smc->hw.led) ;
  140. #endif
  141. #ifdef MCA
  142. outp(ADDR(CARD_DIS),0) ; /* reset for all chips */
  143. for (i = 10 ; i ; i--) /* delay for PLC's */
  144. (void)inpw(ISR_A) ;
  145. outp(ADDR(CARD_EN),0) ;
  146. /* first I/O after reset must not be a access to FORMAC or PLC */
  147. /*
  148. * bus timeout (MCA)
  149. */
  150. OUT_82c54_TIMER(3,COUNT(2) | RW_OP(3) | TMODE(3)) ;
  151. /* counter 2, mode 3 */
  152. OUT_82c54_TIMER(2,(2*24)) ; /* 3.9 us * 2 square wave */
  153. OUT_82c54_TIMER(2,0) ; /* MSB */
  154. /* POS 102 indicated an activ Check Line or Buss Error monitoring */
  155. if (inpw(CSA_A) & (POS_EN_CHKINT | POS_EN_BUS_ERR)) {
  156. outp(ADDR(IRQ_CHCK_EN),0) ;
  157. }
  158. if (!((i = inpw(CSR_A)) & CS_SAS)) {
  159. if (!(i & CS_BYSTAT)) {
  160. outp(ADDR(BYPASS(STAT_INS)),0) ;/* insert station */
  161. }
  162. }
  163. outpw(LEDR_A,LED_1) ; /* yellow */
  164. #endif /* MCA */
  165. #ifdef PCI
  166. /*
  167. * make sure no transfer activity is pending
  168. */
  169. outpw(FM_A(FM_MDREG1),FM_MINIT) ;
  170. outp(ADDR(B0_CTRL), CTRL_HPI_SET) ;
  171. hwt_wait_time(smc,hwt_quick_read(smc),MS2BCLK(10)) ;
  172. /*
  173. * now reset everything
  174. */
  175. outp(ADDR(B0_CTRL),CTRL_RST_SET) ; /* reset for all chips */
  176. i = (int) inp(ADDR(B0_CTRL)) ; /* do dummy read */
  177. SK_UNUSED(i) ; /* Make LINT happy. */
  178. outp(ADDR(B0_CTRL), CTRL_RST_CLR) ;
  179. /*
  180. * Reset all bits in the PCI STATUS register
  181. */
  182. outp(ADDR(B0_TST_CTRL), TST_CFG_WRITE_ON) ; /* enable for writes */
  183. word = inpw(PCI_C(PCI_STATUS)) ;
  184. outpw(PCI_C(PCI_STATUS), word | PCI_ERRBITS) ;
  185. outp(ADDR(B0_TST_CTRL), TST_CFG_WRITE_OFF) ; /* disable writes */
  186. /*
  187. * Release the reset of all the State machines
  188. * Release Master_Reset
  189. * Release HPI_SM_Reset
  190. */
  191. outp(ADDR(B0_CTRL), CTRL_MRST_CLR|CTRL_HPI_CLR) ;
  192. /*
  193. * determine the adapter type
  194. * Note: Do it here, because some drivers may call card_start() once
  195. * at very first before any other initialization functions is
  196. * executed.
  197. */
  198. rev_id = inp(PCI_C(PCI_REV_ID)) ;
  199. if ((rev_id & 0xf0) == SK_ML_ID_1 || (rev_id & 0xf0) == SK_ML_ID_2) {
  200. smc->hw.hw_is_64bit = TRUE ;
  201. } else {
  202. smc->hw.hw_is_64bit = FALSE ;
  203. }
  204. /*
  205. * Watermark initialization
  206. */
  207. if (!smc->hw.hw_is_64bit) {
  208. outpd(ADDR(B4_R1_F), RX_WATERMARK) ;
  209. outpd(ADDR(B5_XA_F), TX_WATERMARK) ;
  210. outpd(ADDR(B5_XS_F), TX_WATERMARK) ;
  211. }
  212. outp(ADDR(B0_CTRL),CTRL_RST_CLR) ; /* clear the reset chips */
  213. outp(ADDR(B0_LED),LED_GA_OFF|LED_MY_ON|LED_GB_OFF) ; /* ye LED on */
  214. /* init the timer value for the watch dog 2,5 minutes */
  215. outpd(ADDR(B2_WDOG_INI),0x6FC23AC0) ;
  216. /* initialize the ISR mask */
  217. smc->hw.is_imask = ISR_MASK ;
  218. smc->hw.hw_state = STOPPED ;
  219. #endif
  220. GET_PAGE(0) ; /* necessary for BOOT */
  221. }
  222. void card_stop(struct s_smc *smc)
  223. {
  224. smt_stop_watchdog(smc) ;
  225. smc->hw.mac_ring_is_up = 0 ; /* ring down */
  226. #ifdef ISA
  227. outpw(CSR_A,0) ; /* reset for all chips */
  228. #endif
  229. #ifdef EISA
  230. outpw(CSR_A,0) ; /* reset for all chips */
  231. #endif
  232. #ifdef MCA
  233. outp(ADDR(CARD_DIS),0) ; /* reset for all chips */
  234. #endif
  235. #ifdef PCI
  236. /*
  237. * make sure no transfer activity is pending
  238. */
  239. outpw(FM_A(FM_MDREG1),FM_MINIT) ;
  240. outp(ADDR(B0_CTRL), CTRL_HPI_SET) ;
  241. hwt_wait_time(smc,hwt_quick_read(smc),MS2BCLK(10)) ;
  242. /*
  243. * now reset everything
  244. */
  245. outp(ADDR(B0_CTRL),CTRL_RST_SET) ; /* reset for all chips */
  246. outp(ADDR(B0_CTRL),CTRL_RST_CLR) ; /* reset for all chips */
  247. outp(ADDR(B0_LED),LED_GA_OFF|LED_MY_OFF|LED_GB_OFF) ; /* all LEDs off */
  248. smc->hw.hw_state = STOPPED ;
  249. #endif
  250. }
  251. /*--------------------------- ISR handling ----------------------------------*/
  252. void mac1_irq(struct s_smc *smc, u_short stu, u_short stl)
  253. {
  254. int restart_tx = 0 ;
  255. again:
  256. #ifndef PCI
  257. #ifndef ISA
  258. /*
  259. * FORMAC+ bug modified the queue pointer if many read/write accesses happens!?
  260. */
  261. if (stl & (FM_SPCEPDS | /* parit/coding err. syn.q.*/
  262. FM_SPCEPDA0 | /* parit/coding err. a.q.0 */
  263. FM_SPCEPDA1 | /* parit/coding err. a.q.1 */
  264. FM_SPCEPDA2)) { /* parit/coding err. a.q.2 */
  265. SMT_PANIC(smc,SMT_E0132, SMT_E0132_MSG) ;
  266. }
  267. if (stl & (FM_STBURS | /* tx buffer underrun syn.q.*/
  268. FM_STBURA0 | /* tx buffer underrun a.q.0 */
  269. FM_STBURA1 | /* tx buffer underrun a.q.1 */
  270. FM_STBURA2)) { /* tx buffer underrun a.q.2 */
  271. SMT_PANIC(smc,SMT_E0133, SMT_E0133_MSG) ;
  272. }
  273. #endif
  274. if ( (stu & (FM_SXMTABT | /* transmit abort */
  275. #ifdef SYNC
  276. FM_STXABRS | /* syn. tx abort */
  277. #endif /* SYNC */
  278. FM_STXABRA0)) || /* asyn. tx abort */
  279. (stl & (FM_SQLCKS | /* lock for syn. q. */
  280. FM_SQLCKA0)) ) { /* lock for asyn. q. */
  281. formac_tx_restart(smc) ; /* init tx */
  282. restart_tx = 1 ;
  283. stu = inpw(FM_A(FM_ST1U)) ;
  284. stl = inpw(FM_A(FM_ST1L)) ;
  285. stu &= ~ (FM_STECFRMA0 | FM_STEFRMA0 | FM_STEFRMS) ;
  286. if (stu || stl)
  287. goto again ;
  288. }
  289. #ifndef SYNC
  290. if (stu & (FM_STECFRMA0 | /* end of chain asyn tx */
  291. FM_STEFRMA0)) { /* end of frame asyn tx */
  292. /* free tx_queue */
  293. smc->hw.n_a_send = 0 ;
  294. if (++smc->hw.fp.tx_free < smc->hw.fp.tx_max) {
  295. start_next_send(smc);
  296. }
  297. restart_tx = 1 ;
  298. }
  299. #else /* SYNC */
  300. if (stu & (FM_STEFRMA0 | /* end of asyn tx */
  301. FM_STEFRMS)) { /* end of sync tx */
  302. restart_tx = 1 ;
  303. }
  304. #endif /* SYNC */
  305. if (restart_tx)
  306. llc_restart_tx(smc) ;
  307. }
  308. #else /* PCI */
  309. /*
  310. * parity error: note encoding error is not possible in tag mode
  311. */
  312. if (stl & (FM_SPCEPDS | /* parity err. syn.q.*/
  313. FM_SPCEPDA0 | /* parity err. a.q.0 */
  314. FM_SPCEPDA1)) { /* parity err. a.q.1 */
  315. SMT_PANIC(smc,SMT_E0134, SMT_E0134_MSG) ;
  316. }
  317. /*
  318. * buffer underrun: can only occur if a tx threshold is specified
  319. */
  320. if (stl & (FM_STBURS | /* tx buffer underrun syn.q.*/
  321. FM_STBURA0 | /* tx buffer underrun a.q.0 */
  322. FM_STBURA1)) { /* tx buffer underrun a.q.2 */
  323. SMT_PANIC(smc,SMT_E0133, SMT_E0133_MSG) ;
  324. }
  325. if ( (stu & (FM_SXMTABT | /* transmit abort */
  326. FM_STXABRS | /* syn. tx abort */
  327. FM_STXABRA0)) || /* asyn. tx abort */
  328. (stl & (FM_SQLCKS | /* lock for syn. q. */
  329. FM_SQLCKA0)) ) { /* lock for asyn. q. */
  330. formac_tx_restart(smc) ; /* init tx */
  331. restart_tx = 1 ;
  332. stu = inpw(FM_A(FM_ST1U)) ;
  333. stl = inpw(FM_A(FM_ST1L)) ;
  334. stu &= ~ (FM_STECFRMA0 | FM_STEFRMA0 | FM_STEFRMS) ;
  335. if (stu || stl)
  336. goto again ;
  337. }
  338. if (stu & (FM_STEFRMA0 | /* end of asyn tx */
  339. FM_STEFRMS)) { /* end of sync tx */
  340. restart_tx = 1 ;
  341. }
  342. if (restart_tx)
  343. llc_restart_tx(smc) ;
  344. }
  345. #endif /* PCI */
  346. /*
  347. * interrupt source= plc1
  348. * this function is called in nwfbisr.asm
  349. */
  350. void plc1_irq(struct s_smc *smc)
  351. {
  352. u_short st = inpw(PLC(PB,PL_INTR_EVENT)) ;
  353. #if (defined(ISA) || defined(EISA))
  354. /* reset PLC Int. bits */
  355. outpw(PLC1_I,inpw(PLC1_I)) ;
  356. #endif
  357. plc_irq(smc,PB,st) ;
  358. }
  359. /*
  360. * interrupt source= plc2
  361. * this function is called in nwfbisr.asm
  362. */
  363. void plc2_irq(struct s_smc *smc)
  364. {
  365. u_short st = inpw(PLC(PA,PL_INTR_EVENT)) ;
  366. #if (defined(ISA) || defined(EISA))
  367. /* reset PLC Int. bits */
  368. outpw(PLC2_I,inpw(PLC2_I)) ;
  369. #endif
  370. plc_irq(smc,PA,st) ;
  371. }
  372. /*
  373. * interrupt source= timer
  374. */
  375. void timer_irq(struct s_smc *smc)
  376. {
  377. hwt_restart(smc);
  378. smc->hw.t_stop = smc->hw.t_start;
  379. smt_timer_done(smc) ;
  380. }
  381. /*
  382. * return S-port (PA or PB)
  383. */
  384. int pcm_get_s_port(struct s_smc *smc)
  385. {
  386. SK_UNUSED(smc) ;
  387. return(PS) ;
  388. }
  389. /*
  390. * Station Label = "FDDI-XYZ" where
  391. *
  392. * X = connector type
  393. * Y = PMD type
  394. * Z = port type
  395. */
  396. #define STATION_LABEL_CONNECTOR_OFFSET 5
  397. #define STATION_LABEL_PMD_OFFSET 6
  398. #define STATION_LABEL_PORT_OFFSET 7
  399. void read_address(struct s_smc *smc, u_char *mac_addr)
  400. {
  401. char ConnectorType ;
  402. char PmdType ;
  403. int i ;
  404. extern const u_char canonical[256] ;
  405. #if (defined(ISA) || defined(MCA))
  406. for (i = 0; i < 4 ;i++) { /* read mac address from board */
  407. smc->hw.fddi_phys_addr.a[i] =
  408. canonical[(inpw(PR_A(i+SA_MAC))&0xff)] ;
  409. }
  410. for (i = 4; i < 6; i++) {
  411. smc->hw.fddi_phys_addr.a[i] =
  412. canonical[(inpw(PR_A(i+SA_MAC+PRA_OFF))&0xff)] ;
  413. }
  414. #endif
  415. #ifdef EISA
  416. /*
  417. * Note: We get trouble on an Alpha machine if we make a inpw()
  418. * instead of inp()
  419. */
  420. for (i = 0; i < 4 ;i++) { /* read mac address from board */
  421. smc->hw.fddi_phys_addr.a[i] =
  422. canonical[inp(PR_A(i+SA_MAC))] ;
  423. }
  424. for (i = 4; i < 6; i++) {
  425. smc->hw.fddi_phys_addr.a[i] =
  426. canonical[inp(PR_A(i+SA_MAC+PRA_OFF))] ;
  427. }
  428. #endif
  429. #ifdef PCI
  430. for (i = 0; i < 6; i++) { /* read mac address from board */
  431. smc->hw.fddi_phys_addr.a[i] =
  432. canonical[inp(ADDR(B2_MAC_0+i))] ;
  433. }
  434. #endif
  435. #ifndef PCI
  436. ConnectorType = inpw(PR_A(SA_PMD_TYPE)) & 0xff ;
  437. PmdType = inpw(PR_A(SA_PMD_TYPE+1)) & 0xff ;
  438. #else
  439. ConnectorType = inp(ADDR(B2_CONN_TYP)) ;
  440. PmdType = inp(ADDR(B2_PMD_TYP)) ;
  441. #endif
  442. smc->y[PA].pmd_type[PMD_SK_CONN] =
  443. smc->y[PB].pmd_type[PMD_SK_CONN] = ConnectorType ;
  444. smc->y[PA].pmd_type[PMD_SK_PMD ] =
  445. smc->y[PB].pmd_type[PMD_SK_PMD ] = PmdType ;
  446. if (mac_addr) {
  447. for (i = 0; i < 6 ;i++) {
  448. smc->hw.fddi_canon_addr.a[i] = mac_addr[i] ;
  449. smc->hw.fddi_home_addr.a[i] = canonical[mac_addr[i]] ;
  450. }
  451. return ;
  452. }
  453. smc->hw.fddi_home_addr = smc->hw.fddi_phys_addr ;
  454. for (i = 0; i < 6 ;i++) {
  455. smc->hw.fddi_canon_addr.a[i] =
  456. canonical[smc->hw.fddi_phys_addr.a[i]] ;
  457. }
  458. }
  459. /*
  460. * FDDI card soft reset
  461. */
  462. void init_board(struct s_smc *smc, u_char *mac_addr)
  463. {
  464. card_start(smc) ;
  465. read_address(smc,mac_addr) ;
  466. #ifndef PCI
  467. if (inpw(CSR_A) & CS_SAS)
  468. #else
  469. if (!(inp(ADDR(B0_DAS)) & DAS_AVAIL))
  470. #endif
  471. smc->s.sas = SMT_SAS ; /* Single att. station */
  472. else
  473. smc->s.sas = SMT_DAS ; /* Dual att. station */
  474. #ifndef PCI
  475. if (inpw(CSR_A) & CS_BYSTAT)
  476. #else
  477. if (!(inp(ADDR(B0_DAS)) & DAS_BYP_ST))
  478. #endif
  479. smc->mib.fddiSMTBypassPresent = 0 ;
  480. /* without opt. bypass */
  481. else
  482. smc->mib.fddiSMTBypassPresent = 1 ;
  483. /* with opt. bypass */
  484. }
  485. /*
  486. * insert or deinsert optical bypass (called by ECM)
  487. */
  488. void sm_pm_bypass_req(struct s_smc *smc, int mode)
  489. {
  490. #if (defined(ISA) || defined(EISA))
  491. int csra_v ;
  492. #endif
  493. DB_ECMN(1,"ECM : sm_pm_bypass_req(%s)\n",(mode == BP_INSERT) ?
  494. "BP_INSERT" : "BP_DEINSERT",0) ;
  495. if (smc->s.sas != SMT_DAS)
  496. return ;
  497. #if (defined(ISA) || defined(EISA))
  498. csra_v = inpw(CSR_A) & ~CS_BYPASS ;
  499. #ifdef EISA
  500. csra_v |= smc->hw.led ;
  501. #endif
  502. switch(mode) {
  503. case BP_INSERT :
  504. outpw(CSR_A,csra_v | CS_BYPASS) ;
  505. break ;
  506. case BP_DEINSERT :
  507. outpw(CSR_A,csra_v) ;
  508. break ;
  509. }
  510. #endif /* ISA / EISA */
  511. #ifdef MCA
  512. switch(mode) {
  513. case BP_INSERT :
  514. outp(ADDR(BYPASS(STAT_INS)),0) ;/* insert station */
  515. break ;
  516. case BP_DEINSERT :
  517. outp(ADDR(BYPASS(STAT_BYP)),0) ; /* bypass station */
  518. break ;
  519. }
  520. #endif
  521. #ifdef PCI
  522. switch(mode) {
  523. case BP_INSERT :
  524. outp(ADDR(B0_DAS),DAS_BYP_INS) ; /* insert station */
  525. break ;
  526. case BP_DEINSERT :
  527. outp(ADDR(B0_DAS),DAS_BYP_RMV) ; /* bypass station */
  528. break ;
  529. }
  530. #endif
  531. }
  532. /*
  533. * check if bypass connected
  534. */
  535. int sm_pm_bypass_present(struct s_smc *smc)
  536. {
  537. #ifndef PCI
  538. return( (inpw(CSR_A) & CS_BYSTAT) ? FALSE : TRUE ) ;
  539. #else
  540. return( (inp(ADDR(B0_DAS)) & DAS_BYP_ST) ? TRUE: FALSE) ;
  541. #endif
  542. }
  543. void plc_clear_irq(struct s_smc *smc, int p)
  544. {
  545. SK_UNUSED(p) ;
  546. #if (defined(ISA) || defined(EISA))
  547. switch (p) {
  548. case PA :
  549. /* reset PLC Int. bits */
  550. outpw(PLC2_I,inpw(PLC2_I)) ;
  551. break ;
  552. case PB :
  553. /* reset PLC Int. bits */
  554. outpw(PLC1_I,inpw(PLC1_I)) ;
  555. break ;
  556. }
  557. #else
  558. SK_UNUSED(smc) ;
  559. #endif
  560. }
  561. /*
  562. * led_indication called by rmt_indication() and
  563. * pcm_state_change()
  564. *
  565. * Input:
  566. * smc: SMT context
  567. * led_event:
  568. * 0 Only switch green LEDs according to their respective PCM state
  569. * LED_Y_OFF just switch yellow LED off
  570. * LED_Y_ON just switch yello LED on
  571. */
  572. static void led_indication(struct s_smc *smc, int led_event)
  573. {
  574. /* use smc->hw.mac_ring_is_up == TRUE
  575. * as indication for Ring Operational
  576. */
  577. u_short led_state ;
  578. struct s_phy *phy ;
  579. struct fddi_mib_p *mib_a ;
  580. struct fddi_mib_p *mib_b ;
  581. phy = &smc->y[PA] ;
  582. mib_a = phy->mib ;
  583. phy = &smc->y[PB] ;
  584. mib_b = phy->mib ;
  585. #ifdef EISA
  586. /* Ring up = yellow led OFF*/
  587. if (led_event == LED_Y_ON) {
  588. smc->hw.led |= CS_LED_1 ;
  589. }
  590. else if (led_event == LED_Y_OFF) {
  591. smc->hw.led &= ~CS_LED_1 ;
  592. }
  593. else {
  594. /* Link at Port A or B = green led ON */
  595. if (mib_a->fddiPORTPCMState == PC8_ACTIVE ||
  596. mib_b->fddiPORTPCMState == PC8_ACTIVE) {
  597. smc->hw.led |= CS_LED_0 ;
  598. }
  599. else {
  600. smc->hw.led &= ~CS_LED_0 ;
  601. }
  602. }
  603. #endif
  604. #ifdef MCA
  605. led_state = inpw(LEDR_A) ;
  606. /* Ring up = yellow led OFF*/
  607. if (led_event == LED_Y_ON) {
  608. led_state |= LED_1 ;
  609. }
  610. else if (led_event == LED_Y_OFF) {
  611. led_state &= ~LED_1 ;
  612. }
  613. else {
  614. led_state &= ~(LED_2|LED_0) ;
  615. /* Link at Port A = green led A ON */
  616. if (mib_a->fddiPORTPCMState == PC8_ACTIVE) {
  617. led_state |= LED_2 ;
  618. }
  619. /* Link at Port B/S = green led B ON */
  620. if (mib_b->fddiPORTPCMState == PC8_ACTIVE) {
  621. led_state |= LED_0 ;
  622. }
  623. }
  624. outpw(LEDR_A, led_state) ;
  625. #endif /* MCA */
  626. #ifdef PCI
  627. led_state = 0 ;
  628. /* Ring up = yellow led OFF*/
  629. if (led_event == LED_Y_ON) {
  630. led_state |= LED_MY_ON ;
  631. }
  632. else if (led_event == LED_Y_OFF) {
  633. led_state |= LED_MY_OFF ;
  634. }
  635. else { /* PCM state changed */
  636. /* Link at Port A/S = green led A ON */
  637. if (mib_a->fddiPORTPCMState == PC8_ACTIVE) {
  638. led_state |= LED_GA_ON ;
  639. }
  640. else {
  641. led_state |= LED_GA_OFF ;
  642. }
  643. /* Link at Port B = green led B ON */
  644. if (mib_b->fddiPORTPCMState == PC8_ACTIVE) {
  645. led_state |= LED_GB_ON ;
  646. }
  647. else {
  648. led_state |= LED_GB_OFF ;
  649. }
  650. }
  651. outp(ADDR(B0_LED), led_state) ;
  652. #endif /* PCI */
  653. }
  654. void pcm_state_change(struct s_smc *smc, int plc, int p_state)
  655. {
  656. /*
  657. * the current implementation of pcm_state_change() in the driver
  658. * parts must be renamed to drv_pcm_state_change() which will be called
  659. * now after led_indication.
  660. */
  661. DRV_PCM_STATE_CHANGE(smc,plc,p_state) ;
  662. led_indication(smc,0) ;
  663. }
  664. void rmt_indication(struct s_smc *smc, int i)
  665. {
  666. /* Call a driver special function if defined */
  667. DRV_RMT_INDICATION(smc,i) ;
  668. led_indication(smc, i ? LED_Y_OFF : LED_Y_ON) ;
  669. }
  670. /*
  671. * llc_recover_tx called by init_tx (fplus.c)
  672. */
  673. void llc_recover_tx(struct s_smc *smc)
  674. {
  675. #ifdef LOAD_GEN
  676. extern int load_gen_flag ;
  677. load_gen_flag = 0 ;
  678. #endif
  679. #ifndef SYNC
  680. smc->hw.n_a_send= 0 ;
  681. #else
  682. SK_UNUSED(smc) ;
  683. #endif
  684. }
  685. #ifdef MULT_OEM
  686. static int is_equal_num(char comp1[], char comp2[], int num)
  687. {
  688. int i ;
  689. for (i = 0 ; i < num ; i++) {
  690. if (comp1[i] != comp2[i])
  691. return (0) ;
  692. }
  693. return (1) ;
  694. } /* is_equal_num */
  695. /*
  696. * set the OEM ID defaults, and test the contents of the OEM data base
  697. * The default OEM is the first ACTIVE entry in the OEM data base
  698. *
  699. * returns: 0 success
  700. * 1 error in data base
  701. * 2 data base empty
  702. * 3 no active entry
  703. */
  704. int set_oi_id_def(struct s_smc *smc)
  705. {
  706. int sel_id ;
  707. int i ;
  708. int act_entries ;
  709. i = 0 ;
  710. sel_id = -1 ;
  711. act_entries = FALSE ;
  712. smc->hw.oem_id = 0 ;
  713. smc->hw.oem_min_status = OI_STAT_ACTIVE ;
  714. /* check OEM data base */
  715. while (oem_ids[i].oi_status) {
  716. switch (oem_ids[i].oi_status) {
  717. case OI_STAT_ACTIVE:
  718. act_entries = TRUE ; /* we have active IDs */
  719. if (sel_id == -1)
  720. sel_id = i ; /* save the first active ID */
  721. case OI_STAT_VALID:
  722. case OI_STAT_PRESENT:
  723. i++ ;
  724. break ; /* entry ok */
  725. default:
  726. return (1) ; /* invalid oi_status */
  727. }
  728. }
  729. if (i == 0)
  730. return (2) ;
  731. if (!act_entries)
  732. return (3) ;
  733. /* ok, we have a valid OEM data base with an active entry */
  734. smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[sel_id] ;
  735. return (0) ;
  736. }
  737. #endif /* MULT_OEM */
  738. #ifdef MCA
  739. /************************
  740. *
  741. * BEGIN_MANUAL_ENTRY()
  742. *
  743. * exist_board
  744. *
  745. * Check if an MCA board is present in the specified slot.
  746. *
  747. * int exist_board(
  748. * struct s_smc *smc,
  749. * int slot) ;
  750. * In
  751. * smc - A pointer to the SMT Context struct.
  752. *
  753. * slot - The number of the slot to inspect.
  754. * Out
  755. * 0 = No adapter present.
  756. * 1 = Found FM1 adapter.
  757. *
  758. * Pseudo
  759. * Read MCA ID
  760. * for all valid OEM_IDs
  761. * compare with ID read
  762. * if equal, return 1
  763. * return(0
  764. *
  765. * Note
  766. * The smc pointer must be valid now.
  767. *
  768. * END_MANUAL_ENTRY()
  769. *
  770. ************************/
  771. #define LONG_CARD_ID(lo, hi) ((((hi) & 0xff) << 8) | ((lo) & 0xff))
  772. int exist_board(struct s_smc *smc, int slot)
  773. {
  774. #ifdef MULT_OEM
  775. SK_LOC_DECL(u_char,id[2]) ;
  776. int idi ;
  777. #endif /* MULT_OEM */
  778. /* No longer valid. */
  779. if (smc == NULL)
  780. return(0) ;
  781. #ifndef MULT_OEM
  782. if (read_card_id(smc, slot)
  783. == LONG_CARD_ID(OEMID(smc,0), OEMID(smc,1)))
  784. return (1) ; /* Found FM adapter. */
  785. #else /* MULT_OEM */
  786. idi = read_card_id(smc, slot) ;
  787. id[0] = idi & 0xff ;
  788. id[1] = idi >> 8 ;
  789. smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
  790. for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
  791. if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
  792. continue ;
  793. if (is_equal_num(&id[0],&OEMID(smc,0),2))
  794. return (1) ;
  795. }
  796. #endif /* MULT_OEM */
  797. return (0) ; /* No adapter found. */
  798. }
  799. /************************
  800. *
  801. * read_card_id
  802. *
  803. * Read the MCA card id from the specified slot.
  804. * In
  805. * smc - A pointer to the SMT Context struct.
  806. * CAVEAT: This pointer may be NULL and *must not* be used within this
  807. * function. It's only purpose is for drivers that need some information
  808. * for the inp() and outp() macros.
  809. *
  810. * slot - The number of the slot for which the card id is returned.
  811. * Out
  812. * Returns the card id read from the specified slot. If an illegal slot
  813. * number is specified, the function returns zero.
  814. *
  815. ************************/
  816. static int read_card_id(struct s_smc *smc, int slot)
  817. /* struct s_smc *smc ; Do not use. */
  818. {
  819. int card_id ;
  820. SK_UNUSED(smc) ; /* Make LINT happy. */
  821. if ((slot < 1) || (slot > 15)) /* max 16 slots, 0 = motherboard */
  822. return (0) ; /* Illegal slot number specified. */
  823. EnableSlotAccess(smc, slot) ;
  824. card_id = ((read_POS(smc,POS_ID_HIGH,slot - 1) & 0xff) << 8) |
  825. (read_POS(smc,POS_ID_LOW,slot - 1) & 0xff) ;
  826. DisableSlotAccess(smc) ;
  827. return (card_id) ;
  828. }
  829. /************************
  830. *
  831. * BEGIN_MANUAL_ENTRY()
  832. *
  833. * get_board_para
  834. *
  835. * Get adapter configuration information. Fill all board specific
  836. * parameters within the 'smc' structure.
  837. *
  838. * int get_board_para(
  839. * struct s_smc *smc,
  840. * int slot) ;
  841. * In
  842. * smc - A pointer to the SMT Context struct, to which this function will
  843. * write some adapter configuration data.
  844. *
  845. * slot - The number of the slot, in which the adapter is installed.
  846. * Out
  847. * 0 = No adapter present.
  848. * 1 = Ok.
  849. * 2 = Adapter present, but card enable bit not set.
  850. *
  851. * END_MANUAL_ENTRY()
  852. *
  853. ************************/
  854. int get_board_para(struct s_smc *smc, int slot)
  855. {
  856. int val ;
  857. int i ;
  858. /* Check if adapter present & get type of adapter. */
  859. switch (exist_board(smc, slot)) {
  860. case 0: /* Adapter not present. */
  861. return (0) ;
  862. case 1: /* FM Rev. 1 */
  863. smc->hw.rev = FM1_REV ;
  864. smc->hw.VFullRead = 0x0a ;
  865. smc->hw.VFullWrite = 0x05 ;
  866. smc->hw.DmaWriteExtraBytes = 8 ; /* 2 extra words. */
  867. break ;
  868. }
  869. smc->hw.slot = slot ;
  870. EnableSlotAccess(smc, slot) ;
  871. if (!(read_POS(smc,POS_102, slot - 1) & POS_CARD_EN)) {
  872. DisableSlotAccess(smc) ;
  873. return (2) ; /* Card enable bit not set. */
  874. }
  875. val = read_POS(smc,POS_104, slot - 1) ; /* I/O, IRQ */
  876. #ifndef MEM_MAPPED_IO /* is defined by the operating system */
  877. i = val & POS_IOSEL ; /* I/O base addr. (0x0200 .. 0xfe00) */
  878. smc->hw.iop = (i + 1) * 0x0400 - 0x200 ;
  879. #endif
  880. i = ((val & POS_IRQSEL) >> 6) & 0x03 ; /* IRQ <0, 1> */
  881. smc->hw.irq = opt_ints[i] ;
  882. /* FPROM base addr. */
  883. i = ((read_POS(smc,POS_103, slot - 1) & POS_MSEL) >> 4) & 0x07 ;
  884. smc->hw.eprom = opt_eproms[i] ;
  885. DisableSlotAccess(smc) ;
  886. /* before this, the smc->hw.iop must be set !!! */
  887. smc->hw.slot_32 = inpw(CSF_A) & SLOT_32 ;
  888. return (1) ;
  889. }
  890. /* Enable access to specified MCA slot. */
  891. static void EnableSlotAccess(struct s_smc *smc, int slot)
  892. {
  893. SK_UNUSED(slot) ;
  894. #ifndef AIX
  895. SK_UNUSED(smc) ;
  896. /* System mode. */
  897. outp(POS_SYS_SETUP, POS_SYSTEM) ;
  898. /* Select slot. */
  899. outp(POS_CHANNEL_POS, POS_CHANNEL_BIT | (slot-1)) ;
  900. #else
  901. attach_POS_addr (smc) ;
  902. #endif
  903. }
  904. /* Disable access to MCA slot formerly enabled via EnableSlotAccess(). */
  905. static void DisableSlotAccess(struct s_smc *smc)
  906. {
  907. #ifndef AIX
  908. SK_UNUSED(smc) ;
  909. outp(POS_CHANNEL_POS, 0) ;
  910. #else
  911. detach_POS_addr (smc) ;
  912. #endif
  913. }
  914. #endif /* MCA */
  915. #ifdef EISA
  916. #ifndef MEM_MAPPED_IO
  917. #define SADDR(slot) (((slot)<<12)&0xf000)
  918. #else /* MEM_MAPPED_IO */
  919. #define SADDR(slot) (smc->hw.iop)
  920. #endif /* MEM_MAPPED_IO */
  921. /************************
  922. *
  923. * BEGIN_MANUAL_ENTRY()
  924. *
  925. * exist_board
  926. *
  927. * Check if an EISA board is present in the specified slot.
  928. *
  929. * int exist_board(
  930. * struct s_smc *smc,
  931. * int slot) ;
  932. * In
  933. * smc - A pointer to the SMT Context struct.
  934. *
  935. * slot - The number of the slot to inspect.
  936. * Out
  937. * 0 = No adapter present.
  938. * 1 = Found adapter.
  939. *
  940. * Pseudo
  941. * Read EISA ID
  942. * for all valid OEM_IDs
  943. * compare with ID read
  944. * if equal, return 1
  945. * return(0
  946. *
  947. * Note
  948. * The smc pointer must be valid now.
  949. *
  950. ************************/
  951. int exist_board(struct s_smc *smc, int slot)
  952. {
  953. int i ;
  954. #ifdef MULT_OEM
  955. SK_LOC_DECL(u_char,id[4]) ;
  956. #endif /* MULT_OEM */
  957. /* No longer valid. */
  958. if (smc == NULL)
  959. return(0);
  960. SK_UNUSED(slot) ;
  961. #ifndef MULT_OEM
  962. for (i = 0 ; i < 4 ; i++) {
  963. if (inp(SADDR(slot)+PRA(i)) != OEMID(smc,i))
  964. return(0) ;
  965. }
  966. return(1) ;
  967. #else /* MULT_OEM */
  968. for (i = 0 ; i < 4 ; i++)
  969. id[i] = inp(SADDR(slot)+PRA(i)) ;
  970. smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
  971. for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
  972. if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
  973. continue ;
  974. if (is_equal_num(&id[0],&OEMID(smc,0),4))
  975. return (1) ;
  976. }
  977. return (0) ; /* No adapter found. */
  978. #endif /* MULT_OEM */
  979. }
  980. int get_board_para(struct s_smc *smc, int slot)
  981. {
  982. int i ;
  983. if (!exist_board(smc,slot))
  984. return(0) ;
  985. smc->hw.slot = slot ;
  986. #ifndef MEM_MAPPED_IO /* if defined by the operating system */
  987. smc->hw.iop = SADDR(slot) ;
  988. #endif
  989. if (!(inp(C0_A(0))&CFG_CARD_EN)) {
  990. return(2) ; /* CFG_CARD_EN bit not set! */
  991. }
  992. smc->hw.irq = opt_ints[(inp(C1_A(0)) & CFG_IRQ_SEL)] ;
  993. smc->hw.dma = opt_dmas[((inp(C1_A(0)) & CFG_DRQ_SEL)>>3)] ;
  994. if ((i = inp(C2_A(0)) & CFG_EPROM_SEL) != 0x0f)
  995. smc->hw.eprom = opt_eproms[i] ;
  996. else
  997. smc->hw.eprom = 0 ;
  998. smc->hw.DmaWriteExtraBytes = 8 ;
  999. return(1) ;
  1000. }
  1001. #endif /* EISA */
  1002. #ifdef ISA
  1003. #ifndef MULT_OEM
  1004. const u_char sklogo[6] = SKLOGO_STR ;
  1005. #define SIZE_SKLOGO(smc) sizeof(sklogo)
  1006. #define SKLOGO(smc,i) sklogo[i]
  1007. #else /* MULT_OEM */
  1008. #define SIZE_SKLOGO(smc) smc->hw.oem_id->oi_logo_len
  1009. #define SKLOGO(smc,i) smc->hw.oem_id->oi_logo[i]
  1010. #endif /* MULT_OEM */
  1011. int exist_board(struct s_smc *smc, HW_PTR port)
  1012. {
  1013. int i ;
  1014. #ifdef MULT_OEM
  1015. int bytes_read ;
  1016. u_char board_logo[15] ;
  1017. SK_LOC_DECL(u_char,id[4]) ;
  1018. #endif /* MULT_OEM */
  1019. /* No longer valid. */
  1020. if (smc == NULL)
  1021. return(0);
  1022. SK_UNUSED(smc) ;
  1023. #ifndef MULT_OEM
  1024. for (i = SADDRL ; i < (signed) (SADDRL+SIZE_SKLOGO(smc)) ; i++) {
  1025. if ((u_char)inpw((PRA(i)+port)) != SKLOGO(smc,i-SADDRL)) {
  1026. return(0) ;
  1027. }
  1028. }
  1029. /* check MAC address (S&K or other) */
  1030. for (i = 0 ; i < 3 ; i++) {
  1031. if ((u_char)inpw((PRA(i)+port)) != OEMID(smc,i))
  1032. return(0) ;
  1033. }
  1034. return(1) ;
  1035. #else /* MULT_OEM */
  1036. smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
  1037. board_logo[0] = (u_char)inpw((PRA(SADDRL)+port)) ;
  1038. bytes_read = 1 ;
  1039. for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
  1040. if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
  1041. continue ;
  1042. /* Test all read bytes with current OEM_entry */
  1043. /* for (i=0; (i<bytes_read) && (i < SIZE_SKLOGO(smc)); i++) { */
  1044. for (i = 0; i < bytes_read; i++) {
  1045. if (board_logo[i] != SKLOGO(smc,i))
  1046. break ;
  1047. }
  1048. /* If mismatch, switch to next OEM entry */
  1049. if ((board_logo[i] != SKLOGO(smc,i)) && (i < bytes_read))
  1050. continue ;
  1051. --i ;
  1052. while (bytes_read < SIZE_SKLOGO(smc)) {
  1053. // inpw next byte SK_Logo
  1054. i++ ;
  1055. board_logo[i] = (u_char)inpw((PRA(SADDRL+i)+port)) ;
  1056. bytes_read++ ;
  1057. if (board_logo[i] != SKLOGO(smc,i))
  1058. break ;
  1059. }
  1060. for (i = 0 ; i < 3 ; i++)
  1061. id[i] = (u_char)inpw((PRA(i)+port)) ;
  1062. if ((board_logo[i] == SKLOGO(smc,i))
  1063. && (bytes_read == SIZE_SKLOGO(smc))) {
  1064. if (is_equal_num(&id[0],&OEMID(smc,0),3))
  1065. return(1);
  1066. }
  1067. } /* for */
  1068. return(0) ;
  1069. #endif /* MULT_OEM */
  1070. }
  1071. int get_board_para(struct s_smc *smc, int slot)
  1072. {
  1073. SK_UNUSED(smc) ;
  1074. SK_UNUSED(slot) ;
  1075. return(0) ; /* for ISA not supported */
  1076. }
  1077. #endif /* ISA */
  1078. #ifdef PCI
  1079. #ifdef USE_BIOS_FUN
  1080. int exist_board(struct s_smc *smc, int slot)
  1081. {
  1082. u_short dev_id ;
  1083. u_short ven_id ;
  1084. int found ;
  1085. int i ;
  1086. found = FALSE ; /* make sure we returned with adatper not found*/
  1087. /* if an empty oemids.h was included */
  1088. #ifdef MULT_OEM
  1089. smc->hw.oem_id = (struct s_oem_ids *) &oem_ids[0] ;
  1090. for (; smc->hw.oem_id->oi_status != OI_STAT_LAST; smc->hw.oem_id++) {
  1091. if (smc->hw.oem_id->oi_status < smc->hw.oem_min_status)
  1092. continue ;
  1093. #endif
  1094. ven_id = OEMID(smc,0) + (OEMID(smc,1) << 8) ;
  1095. dev_id = OEMID(smc,2) + (OEMID(smc,3) << 8) ;
  1096. for (i = 0; i < slot; i++) {
  1097. if (pci_find_device(i,&smc->hw.pci_handle,
  1098. dev_id,ven_id) != 0) {
  1099. found = FALSE ;
  1100. } else {
  1101. found = TRUE ;
  1102. }
  1103. }
  1104. if (found) {
  1105. return(1) ; /* adapter was found */
  1106. }
  1107. #ifdef MULT_OEM
  1108. }
  1109. #endif
  1110. return(0) ; /* adapter was not found */
  1111. }
  1112. #endif /* PCI */
  1113. #endif /* USE_BIOS_FUNC */
  1114. void driver_get_bia(struct s_smc *smc, struct fddi_addr *bia_addr)
  1115. {
  1116. int i ;
  1117. extern const u_char canonical[256] ;
  1118. for (i = 0 ; i < 6 ; i++) {
  1119. bia_addr->a[i] = canonical[smc->hw.fddi_phys_addr.a[i]] ;
  1120. }
  1121. }
  1122. void smt_start_watchdog(struct s_smc *smc)
  1123. {
  1124. SK_UNUSED(smc) ; /* Make LINT happy. */
  1125. #ifndef DEBUG
  1126. #ifdef PCI
  1127. if (smc->hw.wdog_used) {
  1128. outpw(ADDR(B2_WDOG_CRTL),TIM_START) ; /* Start timer. */
  1129. }
  1130. #endif
  1131. #endif /* DEBUG */
  1132. }
  1133. static void smt_stop_watchdog(struct s_smc *smc)
  1134. {
  1135. SK_UNUSED(smc) ; /* Make LINT happy. */
  1136. #ifndef DEBUG
  1137. #ifdef PCI
  1138. if (smc->hw.wdog_used) {
  1139. outpw(ADDR(B2_WDOG_CRTL),TIM_STOP) ; /* Stop timer. */
  1140. }
  1141. #endif
  1142. #endif /* DEBUG */
  1143. }
  1144. #ifdef PCI
  1145. void mac_do_pci_fix(struct s_smc *smc)
  1146. {
  1147. SK_UNUSED(smc) ;
  1148. }
  1149. #endif /* PCI */