baycom_ser_hdx.c 21 KB

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  1. /*****************************************************************************/
  2. /*
  3. * baycom_ser_hdx.c -- baycom ser12 halfduplex radio modem driver.
  4. *
  5. * Copyright (C) 1996-2000 Thomas Sailer (sailer@ife.ee.ethz.ch)
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. *
  21. * Please note that the GPL allows you to use the driver, NOT the radio.
  22. * In order to use the radio, you need a license from the communications
  23. * authority of your country.
  24. *
  25. *
  26. * Supported modems
  27. *
  28. * ser12: This is a very simple 1200 baud AFSK modem. The modem consists only
  29. * of a modulator/demodulator chip, usually a TI TCM3105. The computer
  30. * is responsible for regenerating the receiver bit clock, as well as
  31. * for handling the HDLC protocol. The modem connects to a serial port,
  32. * hence the name. Since the serial port is not used as an async serial
  33. * port, the kernel driver for serial ports cannot be used, and this
  34. * driver only supports standard serial hardware (8250, 16450, 16550A)
  35. *
  36. *
  37. * Command line options (insmod command line)
  38. *
  39. * mode ser12 hardware DCD
  40. * ser12* software DCD
  41. * ser12@ hardware/software DCD, i.e. no explicit DCD signal but hardware
  42. * mutes audio input to the modem
  43. * ser12+ hardware DCD, inverted signal at DCD pin
  44. * iobase base address of the port; common values are 0x3f8, 0x2f8, 0x3e8, 0x2e8
  45. * irq interrupt line of the port; common values are 4,3
  46. *
  47. *
  48. * History:
  49. * 0.1 26.06.1996 Adapted from baycom.c and made network driver interface
  50. * 18.10.1996 Changed to new user space access routines (copy_{to,from}_user)
  51. * 0.3 26.04.1997 init code/data tagged
  52. * 0.4 08.07.1997 alternative ser12 decoding algorithm (uses delta CTS ints)
  53. * 0.5 11.11.1997 ser12/par96 split into separate files
  54. * 0.6 14.04.1998 cleanups
  55. * 0.7 03.08.1999 adapt to Linus' new __setup/__initcall
  56. * 0.8 10.08.1999 use module_init/module_exit
  57. * 0.9 12.02.2000 adapted to softnet driver interface
  58. * 0.10 03.07.2000 fix interface name handling
  59. */
  60. /*****************************************************************************/
  61. #include <linux/module.h>
  62. #include <linux/ioport.h>
  63. #include <linux/string.h>
  64. #include <linux/init.h>
  65. #include <asm/uaccess.h>
  66. #include <asm/io.h>
  67. #include <linux/hdlcdrv.h>
  68. #include <linux/baycom.h>
  69. #include <linux/jiffies.h>
  70. /* --------------------------------------------------------------------- */
  71. #define BAYCOM_DEBUG
  72. /* --------------------------------------------------------------------- */
  73. static const char bc_drvname[] = "baycom_ser_hdx";
  74. static const char bc_drvinfo[] = KERN_INFO "baycom_ser_hdx: (C) 1996-2000 Thomas Sailer, HB9JNX/AE4WA\n"
  75. KERN_INFO "baycom_ser_hdx: version 0.10 compiled " __TIME__ " " __DATE__ "\n";
  76. /* --------------------------------------------------------------------- */
  77. #define NR_PORTS 4
  78. static struct net_device *baycom_device[NR_PORTS];
  79. /* --------------------------------------------------------------------- */
  80. #define RBR(iobase) (iobase+0)
  81. #define THR(iobase) (iobase+0)
  82. #define IER(iobase) (iobase+1)
  83. #define IIR(iobase) (iobase+2)
  84. #define FCR(iobase) (iobase+2)
  85. #define LCR(iobase) (iobase+3)
  86. #define MCR(iobase) (iobase+4)
  87. #define LSR(iobase) (iobase+5)
  88. #define MSR(iobase) (iobase+6)
  89. #define SCR(iobase) (iobase+7)
  90. #define DLL(iobase) (iobase+0)
  91. #define DLM(iobase) (iobase+1)
  92. #define SER12_EXTENT 8
  93. /* ---------------------------------------------------------------------- */
  94. /*
  95. * Information that need to be kept for each board.
  96. */
  97. struct baycom_state {
  98. struct hdlcdrv_state hdrv;
  99. int opt_dcd;
  100. struct modem_state {
  101. short arb_divider;
  102. unsigned char flags;
  103. unsigned int shreg;
  104. struct modem_state_ser12 {
  105. unsigned char tx_bit;
  106. int dcd_sum0, dcd_sum1, dcd_sum2;
  107. unsigned char last_sample;
  108. unsigned char last_rxbit;
  109. unsigned int dcd_shreg;
  110. unsigned int dcd_time;
  111. unsigned int bit_pll;
  112. unsigned char interm_sample;
  113. } ser12;
  114. } modem;
  115. #ifdef BAYCOM_DEBUG
  116. struct debug_vals {
  117. unsigned long last_jiffies;
  118. unsigned cur_intcnt;
  119. unsigned last_intcnt;
  120. int cur_pllcorr;
  121. int last_pllcorr;
  122. } debug_vals;
  123. #endif /* BAYCOM_DEBUG */
  124. };
  125. /* --------------------------------------------------------------------- */
  126. static inline void baycom_int_freq(struct baycom_state *bc)
  127. {
  128. #ifdef BAYCOM_DEBUG
  129. unsigned long cur_jiffies = jiffies;
  130. /*
  131. * measure the interrupt frequency
  132. */
  133. bc->debug_vals.cur_intcnt++;
  134. if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
  135. bc->debug_vals.last_jiffies = cur_jiffies;
  136. bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
  137. bc->debug_vals.cur_intcnt = 0;
  138. bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
  139. bc->debug_vals.cur_pllcorr = 0;
  140. }
  141. #endif /* BAYCOM_DEBUG */
  142. }
  143. /* --------------------------------------------------------------------- */
  144. /*
  145. * ===================== SER12 specific routines =========================
  146. */
  147. static inline void ser12_set_divisor(struct net_device *dev,
  148. unsigned char divisor)
  149. {
  150. outb(0x81, LCR(dev->base_addr)); /* DLAB = 1 */
  151. outb(divisor, DLL(dev->base_addr));
  152. outb(0, DLM(dev->base_addr));
  153. outb(0x01, LCR(dev->base_addr)); /* word length = 6 */
  154. /*
  155. * make sure the next interrupt is generated;
  156. * 0 must be used to power the modem; the modem draws its
  157. * power from the TxD line
  158. */
  159. outb(0x00, THR(dev->base_addr));
  160. /*
  161. * it is important not to set the divider while transmitting;
  162. * this reportedly makes some UARTs generating interrupts
  163. * in the hundredthousands per second region
  164. * Reported by: Ignacio.Arenaza@studi.epfl.ch (Ignacio Arenaza Nuno)
  165. */
  166. }
  167. /* --------------------------------------------------------------------- */
  168. /*
  169. * must call the TX arbitrator every 10ms
  170. */
  171. #define SER12_ARB_DIVIDER(bc) (bc->opt_dcd ? 24 : 36)
  172. #define SER12_DCD_INTERVAL(bc) (bc->opt_dcd ? 12 : 240)
  173. static inline void ser12_tx(struct net_device *dev, struct baycom_state *bc)
  174. {
  175. /* one interrupt per channel bit */
  176. ser12_set_divisor(dev, 12);
  177. /*
  178. * first output the last bit (!) then call HDLC transmitter,
  179. * since this may take quite long
  180. */
  181. outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr));
  182. if (bc->modem.shreg <= 1)
  183. bc->modem.shreg = 0x10000 | hdlcdrv_getbits(&bc->hdrv);
  184. bc->modem.ser12.tx_bit = !(bc->modem.ser12.tx_bit ^
  185. (bc->modem.shreg & 1));
  186. bc->modem.shreg >>= 1;
  187. }
  188. /* --------------------------------------------------------------------- */
  189. static inline void ser12_rx(struct net_device *dev, struct baycom_state *bc)
  190. {
  191. unsigned char cur_s;
  192. /*
  193. * do demodulator
  194. */
  195. cur_s = inb(MSR(dev->base_addr)) & 0x10; /* the CTS line */
  196. hdlcdrv_channelbit(&bc->hdrv, cur_s);
  197. bc->modem.ser12.dcd_shreg = (bc->modem.ser12.dcd_shreg << 1) |
  198. (cur_s != bc->modem.ser12.last_sample);
  199. bc->modem.ser12.last_sample = cur_s;
  200. if(bc->modem.ser12.dcd_shreg & 1) {
  201. if (!bc->opt_dcd) {
  202. unsigned int dcdspos, dcdsneg;
  203. dcdspos = dcdsneg = 0;
  204. dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
  205. if (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
  206. dcdspos += 2;
  207. dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
  208. dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
  209. dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);
  210. bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
  211. } else
  212. bc->modem.ser12.dcd_sum0--;
  213. }
  214. if(!bc->modem.ser12.dcd_time) {
  215. hdlcdrv_setdcd(&bc->hdrv, (bc->modem.ser12.dcd_sum0 +
  216. bc->modem.ser12.dcd_sum1 +
  217. bc->modem.ser12.dcd_sum2) < 0);
  218. bc->modem.ser12.dcd_sum2 = bc->modem.ser12.dcd_sum1;
  219. bc->modem.ser12.dcd_sum1 = bc->modem.ser12.dcd_sum0;
  220. /* offset to ensure DCD off on silent input */
  221. bc->modem.ser12.dcd_sum0 = 2;
  222. bc->modem.ser12.dcd_time = SER12_DCD_INTERVAL(bc);
  223. }
  224. bc->modem.ser12.dcd_time--;
  225. if (!bc->opt_dcd) {
  226. /*
  227. * PLL code for the improved software DCD algorithm
  228. */
  229. if (bc->modem.ser12.interm_sample) {
  230. /*
  231. * intermediate sample; set timing correction to normal
  232. */
  233. ser12_set_divisor(dev, 4);
  234. } else {
  235. /*
  236. * do PLL correction and call HDLC receiver
  237. */
  238. switch (bc->modem.ser12.dcd_shreg & 7) {
  239. case 1: /* transition too late */
  240. ser12_set_divisor(dev, 5);
  241. #ifdef BAYCOM_DEBUG
  242. bc->debug_vals.cur_pllcorr++;
  243. #endif /* BAYCOM_DEBUG */
  244. break;
  245. case 4: /* transition too early */
  246. ser12_set_divisor(dev, 3);
  247. #ifdef BAYCOM_DEBUG
  248. bc->debug_vals.cur_pllcorr--;
  249. #endif /* BAYCOM_DEBUG */
  250. break;
  251. default:
  252. ser12_set_divisor(dev, 4);
  253. break;
  254. }
  255. bc->modem.shreg >>= 1;
  256. if (bc->modem.ser12.last_sample ==
  257. bc->modem.ser12.last_rxbit)
  258. bc->modem.shreg |= 0x10000;
  259. bc->modem.ser12.last_rxbit =
  260. bc->modem.ser12.last_sample;
  261. }
  262. if (++bc->modem.ser12.interm_sample >= 3)
  263. bc->modem.ser12.interm_sample = 0;
  264. /*
  265. * DCD stuff
  266. */
  267. if (bc->modem.ser12.dcd_shreg & 1) {
  268. unsigned int dcdspos, dcdsneg;
  269. dcdspos = dcdsneg = 0;
  270. dcdspos += ((bc->modem.ser12.dcd_shreg >> 1) & 1);
  271. dcdspos += (!(bc->modem.ser12.dcd_shreg & 0x7ffffffe))
  272. << 1;
  273. dcdsneg += ((bc->modem.ser12.dcd_shreg >> 2) & 1);
  274. dcdsneg += ((bc->modem.ser12.dcd_shreg >> 3) & 1);
  275. dcdsneg += ((bc->modem.ser12.dcd_shreg >> 4) & 1);
  276. bc->modem.ser12.dcd_sum0 += 16*dcdspos - dcdsneg;
  277. }
  278. } else {
  279. /*
  280. * PLL algorithm for the hardware squelch DCD algorithm
  281. */
  282. if (bc->modem.ser12.interm_sample) {
  283. /*
  284. * intermediate sample; set timing correction to normal
  285. */
  286. ser12_set_divisor(dev, 6);
  287. } else {
  288. /*
  289. * do PLL correction and call HDLC receiver
  290. */
  291. switch (bc->modem.ser12.dcd_shreg & 3) {
  292. case 1: /* transition too late */
  293. ser12_set_divisor(dev, 7);
  294. #ifdef BAYCOM_DEBUG
  295. bc->debug_vals.cur_pllcorr++;
  296. #endif /* BAYCOM_DEBUG */
  297. break;
  298. case 2: /* transition too early */
  299. ser12_set_divisor(dev, 5);
  300. #ifdef BAYCOM_DEBUG
  301. bc->debug_vals.cur_pllcorr--;
  302. #endif /* BAYCOM_DEBUG */
  303. break;
  304. default:
  305. ser12_set_divisor(dev, 6);
  306. break;
  307. }
  308. bc->modem.shreg >>= 1;
  309. if (bc->modem.ser12.last_sample ==
  310. bc->modem.ser12.last_rxbit)
  311. bc->modem.shreg |= 0x10000;
  312. bc->modem.ser12.last_rxbit =
  313. bc->modem.ser12.last_sample;
  314. }
  315. bc->modem.ser12.interm_sample = !bc->modem.ser12.interm_sample;
  316. /*
  317. * DCD stuff
  318. */
  319. bc->modem.ser12.dcd_sum0 -= (bc->modem.ser12.dcd_shreg & 1);
  320. }
  321. outb(0x0d, MCR(dev->base_addr)); /* transmitter off */
  322. if (bc->modem.shreg & 1) {
  323. hdlcdrv_putbits(&bc->hdrv, bc->modem.shreg >> 1);
  324. bc->modem.shreg = 0x10000;
  325. }
  326. if(!bc->modem.ser12.dcd_time) {
  327. if (bc->opt_dcd & 1)
  328. hdlcdrv_setdcd(&bc->hdrv, !((inb(MSR(dev->base_addr)) ^ bc->opt_dcd) & 0x80));
  329. else
  330. hdlcdrv_setdcd(&bc->hdrv, (bc->modem.ser12.dcd_sum0 +
  331. bc->modem.ser12.dcd_sum1 +
  332. bc->modem.ser12.dcd_sum2) < 0);
  333. bc->modem.ser12.dcd_sum2 = bc->modem.ser12.dcd_sum1;
  334. bc->modem.ser12.dcd_sum1 = bc->modem.ser12.dcd_sum0;
  335. /* offset to ensure DCD off on silent input */
  336. bc->modem.ser12.dcd_sum0 = 2;
  337. bc->modem.ser12.dcd_time = SER12_DCD_INTERVAL(bc);
  338. }
  339. bc->modem.ser12.dcd_time--;
  340. }
  341. /* --------------------------------------------------------------------- */
  342. static irqreturn_t ser12_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  343. {
  344. struct net_device *dev = (struct net_device *)dev_id;
  345. struct baycom_state *bc = netdev_priv(dev);
  346. unsigned char iir;
  347. if (!dev || !bc || bc->hdrv.magic != HDLCDRV_MAGIC)
  348. return IRQ_NONE;
  349. /* fast way out */
  350. if ((iir = inb(IIR(dev->base_addr))) & 1)
  351. return IRQ_NONE;
  352. baycom_int_freq(bc);
  353. do {
  354. switch (iir & 6) {
  355. case 6:
  356. inb(LSR(dev->base_addr));
  357. break;
  358. case 4:
  359. inb(RBR(dev->base_addr));
  360. break;
  361. case 2:
  362. /*
  363. * check if transmitter active
  364. */
  365. if (hdlcdrv_ptt(&bc->hdrv))
  366. ser12_tx(dev, bc);
  367. else {
  368. ser12_rx(dev, bc);
  369. bc->modem.arb_divider--;
  370. }
  371. outb(0x00, THR(dev->base_addr));
  372. break;
  373. default:
  374. inb(MSR(dev->base_addr));
  375. break;
  376. }
  377. iir = inb(IIR(dev->base_addr));
  378. } while (!(iir & 1));
  379. if (bc->modem.arb_divider <= 0) {
  380. bc->modem.arb_divider = SER12_ARB_DIVIDER(bc);
  381. local_irq_enable();
  382. hdlcdrv_arbitrate(dev, &bc->hdrv);
  383. }
  384. local_irq_enable();
  385. hdlcdrv_transmitter(dev, &bc->hdrv);
  386. hdlcdrv_receiver(dev, &bc->hdrv);
  387. local_irq_disable();
  388. return IRQ_HANDLED;
  389. }
  390. /* --------------------------------------------------------------------- */
  391. enum uart { c_uart_unknown, c_uart_8250,
  392. c_uart_16450, c_uart_16550, c_uart_16550A};
  393. static const char *uart_str[] = {
  394. "unknown", "8250", "16450", "16550", "16550A"
  395. };
  396. static enum uart ser12_check_uart(unsigned int iobase)
  397. {
  398. unsigned char b1,b2,b3;
  399. enum uart u;
  400. enum uart uart_tab[] =
  401. { c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A };
  402. b1 = inb(MCR(iobase));
  403. outb(b1 | 0x10, MCR(iobase)); /* loopback mode */
  404. b2 = inb(MSR(iobase));
  405. outb(0x1a, MCR(iobase));
  406. b3 = inb(MSR(iobase)) & 0xf0;
  407. outb(b1, MCR(iobase)); /* restore old values */
  408. outb(b2, MSR(iobase));
  409. if (b3 != 0x90)
  410. return c_uart_unknown;
  411. inb(RBR(iobase));
  412. inb(RBR(iobase));
  413. outb(0x01, FCR(iobase)); /* enable FIFOs */
  414. u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
  415. if (u == c_uart_16450) {
  416. outb(0x5a, SCR(iobase));
  417. b1 = inb(SCR(iobase));
  418. outb(0xa5, SCR(iobase));
  419. b2 = inb(SCR(iobase));
  420. if ((b1 != 0x5a) || (b2 != 0xa5))
  421. u = c_uart_8250;
  422. }
  423. return u;
  424. }
  425. /* --------------------------------------------------------------------- */
  426. static int ser12_open(struct net_device *dev)
  427. {
  428. struct baycom_state *bc = netdev_priv(dev);
  429. enum uart u;
  430. if (!dev || !bc)
  431. return -ENXIO;
  432. if (!dev->base_addr || dev->base_addr > 0x1000-SER12_EXTENT ||
  433. dev->irq < 2 || dev->irq > 15)
  434. return -ENXIO;
  435. if (!request_region(dev->base_addr, SER12_EXTENT, "baycom_ser12"))
  436. return -EACCES;
  437. memset(&bc->modem, 0, sizeof(bc->modem));
  438. bc->hdrv.par.bitrate = 1200;
  439. if ((u = ser12_check_uart(dev->base_addr)) == c_uart_unknown) {
  440. release_region(dev->base_addr, SER12_EXTENT);
  441. return -EIO;
  442. }
  443. outb(0, FCR(dev->base_addr)); /* disable FIFOs */
  444. outb(0x0d, MCR(dev->base_addr));
  445. outb(0, IER(dev->base_addr));
  446. if (request_irq(dev->irq, ser12_interrupt, SA_INTERRUPT | SA_SHIRQ,
  447. "baycom_ser12", dev)) {
  448. release_region(dev->base_addr, SER12_EXTENT);
  449. return -EBUSY;
  450. }
  451. /*
  452. * enable transmitter empty interrupt
  453. */
  454. outb(2, IER(dev->base_addr));
  455. /*
  456. * set the SIO to 6 Bits/character and 19200 or 28800 baud, so that
  457. * we get exactly (hopefully) 2 or 3 interrupts per radio symbol,
  458. * depending on the usage of the software DCD routine
  459. */
  460. ser12_set_divisor(dev, bc->opt_dcd ? 6 : 4);
  461. printk(KERN_INFO "%s: ser12 at iobase 0x%lx irq %u uart %s\n",
  462. bc_drvname, dev->base_addr, dev->irq, uart_str[u]);
  463. return 0;
  464. }
  465. /* --------------------------------------------------------------------- */
  466. static int ser12_close(struct net_device *dev)
  467. {
  468. struct baycom_state *bc = netdev_priv(dev);
  469. if (!dev || !bc)
  470. return -EINVAL;
  471. /*
  472. * disable interrupts
  473. */
  474. outb(0, IER(dev->base_addr));
  475. outb(1, MCR(dev->base_addr));
  476. free_irq(dev->irq, dev);
  477. release_region(dev->base_addr, SER12_EXTENT);
  478. printk(KERN_INFO "%s: close ser12 at iobase 0x%lx irq %u\n",
  479. bc_drvname, dev->base_addr, dev->irq);
  480. return 0;
  481. }
  482. /* --------------------------------------------------------------------- */
  483. /*
  484. * ===================== hdlcdrv driver interface =========================
  485. */
  486. /* --------------------------------------------------------------------- */
  487. static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr,
  488. struct hdlcdrv_ioctl *hi, int cmd);
  489. /* --------------------------------------------------------------------- */
  490. static struct hdlcdrv_ops ser12_ops = {
  491. .drvname = bc_drvname,
  492. .drvinfo = bc_drvinfo,
  493. .open = ser12_open,
  494. .close = ser12_close,
  495. .ioctl = baycom_ioctl,
  496. };
  497. /* --------------------------------------------------------------------- */
  498. static int baycom_setmode(struct baycom_state *bc, const char *modestr)
  499. {
  500. if (strchr(modestr, '*'))
  501. bc->opt_dcd = 0;
  502. else if (strchr(modestr, '+'))
  503. bc->opt_dcd = -1;
  504. else if (strchr(modestr, '@'))
  505. bc->opt_dcd = -2;
  506. else
  507. bc->opt_dcd = 1;
  508. return 0;
  509. }
  510. /* --------------------------------------------------------------------- */
  511. static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr,
  512. struct hdlcdrv_ioctl *hi, int cmd)
  513. {
  514. struct baycom_state *bc;
  515. struct baycom_ioctl bi;
  516. if (!dev)
  517. return -EINVAL;
  518. bc = netdev_priv(dev);
  519. BUG_ON(bc->hdrv.magic != HDLCDRV_MAGIC);
  520. if (cmd != SIOCDEVPRIVATE)
  521. return -ENOIOCTLCMD;
  522. switch (hi->cmd) {
  523. default:
  524. break;
  525. case HDLCDRVCTL_GETMODE:
  526. strcpy(hi->data.modename, "ser12");
  527. if (bc->opt_dcd <= 0)
  528. strcat(hi->data.modename, (!bc->opt_dcd) ? "*" : (bc->opt_dcd == -2) ? "@" : "+");
  529. if (copy_to_user(ifr->ifr_data, hi, sizeof(struct hdlcdrv_ioctl)))
  530. return -EFAULT;
  531. return 0;
  532. case HDLCDRVCTL_SETMODE:
  533. if (netif_running(dev) || !capable(CAP_NET_ADMIN))
  534. return -EACCES;
  535. hi->data.modename[sizeof(hi->data.modename)-1] = '\0';
  536. return baycom_setmode(bc, hi->data.modename);
  537. case HDLCDRVCTL_MODELIST:
  538. strcpy(hi->data.modename, "ser12");
  539. if (copy_to_user(ifr->ifr_data, hi, sizeof(struct hdlcdrv_ioctl)))
  540. return -EFAULT;
  541. return 0;
  542. case HDLCDRVCTL_MODEMPARMASK:
  543. return HDLCDRV_PARMASK_IOBASE | HDLCDRV_PARMASK_IRQ;
  544. }
  545. if (copy_from_user(&bi, ifr->ifr_data, sizeof(bi)))
  546. return -EFAULT;
  547. switch (bi.cmd) {
  548. default:
  549. return -ENOIOCTLCMD;
  550. #ifdef BAYCOM_DEBUG
  551. case BAYCOMCTL_GETDEBUG:
  552. bi.data.dbg.debug1 = bc->hdrv.ptt_keyed;
  553. bi.data.dbg.debug2 = bc->debug_vals.last_intcnt;
  554. bi.data.dbg.debug3 = bc->debug_vals.last_pllcorr;
  555. break;
  556. #endif /* BAYCOM_DEBUG */
  557. }
  558. if (copy_to_user(ifr->ifr_data, &bi, sizeof(bi)))
  559. return -EFAULT;
  560. return 0;
  561. }
  562. /* --------------------------------------------------------------------- */
  563. /*
  564. * command line settable parameters
  565. */
  566. static char *mode[NR_PORTS] = { "ser12*", };
  567. static int iobase[NR_PORTS] = { 0x3f8, };
  568. static int irq[NR_PORTS] = { 4, };
  569. module_param_array(mode, charp, NULL, 0);
  570. MODULE_PARM_DESC(mode, "baycom operating mode; * for software DCD");
  571. module_param_array(iobase, int, NULL, 0);
  572. MODULE_PARM_DESC(iobase, "baycom io base address");
  573. module_param_array(irq, int, NULL, 0);
  574. MODULE_PARM_DESC(irq, "baycom irq number");
  575. MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
  576. MODULE_DESCRIPTION("Baycom ser12 half duplex amateur radio modem driver");
  577. MODULE_LICENSE("GPL");
  578. /* --------------------------------------------------------------------- */
  579. static int __init init_baycomserhdx(void)
  580. {
  581. int i, found = 0;
  582. char set_hw = 1;
  583. printk(bc_drvinfo);
  584. /*
  585. * register net devices
  586. */
  587. for (i = 0; i < NR_PORTS; i++) {
  588. struct net_device *dev;
  589. struct baycom_state *bc;
  590. char ifname[IFNAMSIZ];
  591. sprintf(ifname, "bcsh%d", i);
  592. if (!mode[i])
  593. set_hw = 0;
  594. if (!set_hw)
  595. iobase[i] = irq[i] = 0;
  596. dev = hdlcdrv_register(&ser12_ops,
  597. sizeof(struct baycom_state),
  598. ifname, iobase[i], irq[i], 0);
  599. if (IS_ERR(dev))
  600. break;
  601. bc = netdev_priv(dev);
  602. if (set_hw && baycom_setmode(bc, mode[i]))
  603. set_hw = 0;
  604. found++;
  605. baycom_device[i] = dev;
  606. }
  607. if (!found)
  608. return -ENXIO;
  609. return 0;
  610. }
  611. static void __exit cleanup_baycomserhdx(void)
  612. {
  613. int i;
  614. for(i = 0; i < NR_PORTS; i++) {
  615. struct net_device *dev = baycom_device[i];
  616. if (dev)
  617. hdlcdrv_unregister(dev);
  618. }
  619. }
  620. module_init(init_baycomserhdx);
  621. module_exit(cleanup_baycomserhdx);
  622. /* --------------------------------------------------------------------- */
  623. #ifndef MODULE
  624. /*
  625. * format: baycom_ser_hdx=io,irq,mode
  626. * mode: ser12 hardware DCD
  627. * ser12* software DCD
  628. * ser12@ hardware/software DCD, i.e. no explicit DCD signal but hardware
  629. * mutes audio input to the modem
  630. * ser12+ hardware DCD, inverted signal at DCD pin
  631. */
  632. static int __init baycom_ser_hdx_setup(char *str)
  633. {
  634. static unsigned nr_dev;
  635. int ints[3];
  636. if (nr_dev >= NR_PORTS)
  637. return 0;
  638. str = get_options(str, 3, ints);
  639. if (ints[0] < 2)
  640. return 0;
  641. mode[nr_dev] = str;
  642. iobase[nr_dev] = ints[1];
  643. irq[nr_dev] = ints[2];
  644. nr_dev++;
  645. return 1;
  646. }
  647. __setup("baycom_ser_hdx=", baycom_ser_hdx_setup);
  648. #endif /* MODULE */
  649. /* --------------------------------------------------------------------- */