e1000_main.c 130 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 7.0.33 3-Feb-2006
  23. * o Added another fix for the pass false carrier bit
  24. * 7.0.32 24-Jan-2006
  25. * o Need to rebuild with noew version number for the pass false carrier
  26. * fix in e1000_hw.c
  27. * 7.0.30 18-Jan-2006
  28. * o fixup for tso workaround to disable it for pci-x
  29. * o fix mem leak on 82542
  30. * o fixes for 10 Mb/s connections and incorrect stats
  31. * 7.0.28 01/06/2006
  32. * o hardware workaround to only set "speed mode" bit for 1G link.
  33. * 7.0.26 12/23/2005
  34. * o wake on lan support modified for device ID 10B5
  35. * o fix dhcp + vlan issue not making it to the iAMT firmware
  36. * 7.0.24 12/9/2005
  37. * o New hardware support for the Gigabit NIC embedded in the south bridge
  38. * o Fixes to the recycling logic (skb->tail) from IBM LTC
  39. * 6.3.9 12/16/2005
  40. * o incorporate fix for recycled skbs from IBM LTC
  41. * 6.3.7 11/18/2005
  42. * o Honor eeprom setting for enabling/disabling Wake On Lan
  43. * 6.3.5 11/17/2005
  44. * o Fix memory leak in rx ring handling for PCI Express adapters
  45. * 6.3.4 11/8/05
  46. * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
  47. * 6.3.2 9/20/05
  48. * o Render logic that sets/resets DRV_LOAD as inline functions to
  49. * avoid code replication. If f/w is AMT then set DRV_LOAD only when
  50. * network interface is open.
  51. * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
  52. * o Adjust PBA partioning for Jumbo frames using MTU size and not
  53. * rx_buffer_len
  54. * 6.3.1 9/19/05
  55. * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
  56. * (e1000_clean_tx_irq)
  57. * o Support for 8086:10B5 device (Quad Port)
  58. */
  59. char e1000_driver_name[] = "e1000";
  60. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  61. #ifndef CONFIG_E1000_NAPI
  62. #define DRIVERNAPI
  63. #else
  64. #define DRIVERNAPI "-NAPI"
  65. #endif
  66. #define DRV_VERSION "7.0.33-k2"DRIVERNAPI
  67. char e1000_driver_version[] = DRV_VERSION;
  68. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  69. /* e1000_pci_tbl - PCI Device ID Table
  70. *
  71. * Last entry must be all 0s
  72. *
  73. * Macro expands to...
  74. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  75. */
  76. static struct pci_device_id e1000_pci_tbl[] = {
  77. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  78. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  79. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  80. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  81. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  82. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  83. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  84. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  85. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  86. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  87. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  89. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  90. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  91. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  92. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  93. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  94. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  95. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  96. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  97. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  98. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  99. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  100. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  101. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  102. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  103. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  104. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  105. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  106. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  107. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  108. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  109. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  110. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  111. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  112. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  113. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  114. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  115. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  116. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  117. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  118. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  119. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  120. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  121. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  122. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  123. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  124. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  125. /* required last entry */
  126. {0,}
  127. };
  128. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  129. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  130. struct e1000_tx_ring *txdr);
  131. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  132. struct e1000_rx_ring *rxdr);
  133. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  134. struct e1000_tx_ring *tx_ring);
  135. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  136. struct e1000_rx_ring *rx_ring);
  137. /* Local Function Prototypes */
  138. static int e1000_init_module(void);
  139. static void e1000_exit_module(void);
  140. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  141. static void __devexit e1000_remove(struct pci_dev *pdev);
  142. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  143. static int e1000_sw_init(struct e1000_adapter *adapter);
  144. static int e1000_open(struct net_device *netdev);
  145. static int e1000_close(struct net_device *netdev);
  146. static void e1000_configure_tx(struct e1000_adapter *adapter);
  147. static void e1000_configure_rx(struct e1000_adapter *adapter);
  148. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  149. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  150. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  151. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  152. struct e1000_tx_ring *tx_ring);
  153. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  154. struct e1000_rx_ring *rx_ring);
  155. static void e1000_set_multi(struct net_device *netdev);
  156. static void e1000_update_phy_info(unsigned long data);
  157. static void e1000_watchdog(unsigned long data);
  158. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  159. static void e1000_82547_tx_fifo_stall(unsigned long data);
  160. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  161. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  162. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  163. static int e1000_set_mac(struct net_device *netdev, void *p);
  164. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  165. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  166. struct e1000_tx_ring *tx_ring);
  167. #ifdef CONFIG_E1000_NAPI
  168. static int e1000_clean(struct net_device *poll_dev, int *budget);
  169. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  170. struct e1000_rx_ring *rx_ring,
  171. int *work_done, int work_to_do);
  172. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  173. struct e1000_rx_ring *rx_ring,
  174. int *work_done, int work_to_do);
  175. #else
  176. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  177. struct e1000_rx_ring *rx_ring);
  178. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  179. struct e1000_rx_ring *rx_ring);
  180. #endif
  181. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  182. struct e1000_rx_ring *rx_ring,
  183. int cleaned_count);
  184. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  185. struct e1000_rx_ring *rx_ring,
  186. int cleaned_count);
  187. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  188. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  189. int cmd);
  190. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  191. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  192. static void e1000_tx_timeout(struct net_device *dev);
  193. static void e1000_reset_task(struct net_device *dev);
  194. static void e1000_smartspeed(struct e1000_adapter *adapter);
  195. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  196. struct sk_buff *skb);
  197. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  198. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  199. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  200. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  201. #ifdef CONFIG_PM
  202. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  203. static int e1000_resume(struct pci_dev *pdev);
  204. #endif
  205. #ifdef CONFIG_NET_POLL_CONTROLLER
  206. /* for netdump / net console */
  207. static void e1000_netpoll (struct net_device *netdev);
  208. #endif
  209. static struct pci_driver e1000_driver = {
  210. .name = e1000_driver_name,
  211. .id_table = e1000_pci_tbl,
  212. .probe = e1000_probe,
  213. .remove = __devexit_p(e1000_remove),
  214. /* Power Managment Hooks */
  215. #ifdef CONFIG_PM
  216. .suspend = e1000_suspend,
  217. .resume = e1000_resume
  218. #endif
  219. };
  220. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  221. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  222. MODULE_LICENSE("GPL");
  223. MODULE_VERSION(DRV_VERSION);
  224. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  225. module_param(debug, int, 0);
  226. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  227. /**
  228. * e1000_init_module - Driver Registration Routine
  229. *
  230. * e1000_init_module is the first routine called when the driver is
  231. * loaded. All it does is register with the PCI subsystem.
  232. **/
  233. static int __init
  234. e1000_init_module(void)
  235. {
  236. int ret;
  237. printk(KERN_INFO "%s - version %s\n",
  238. e1000_driver_string, e1000_driver_version);
  239. printk(KERN_INFO "%s\n", e1000_copyright);
  240. ret = pci_module_init(&e1000_driver);
  241. return ret;
  242. }
  243. module_init(e1000_init_module);
  244. /**
  245. * e1000_exit_module - Driver Exit Cleanup Routine
  246. *
  247. * e1000_exit_module is called just before the driver is removed
  248. * from memory.
  249. **/
  250. static void __exit
  251. e1000_exit_module(void)
  252. {
  253. pci_unregister_driver(&e1000_driver);
  254. }
  255. module_exit(e1000_exit_module);
  256. /**
  257. * e1000_irq_disable - Mask off interrupt generation on the NIC
  258. * @adapter: board private structure
  259. **/
  260. static inline void
  261. e1000_irq_disable(struct e1000_adapter *adapter)
  262. {
  263. atomic_inc(&adapter->irq_sem);
  264. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  265. E1000_WRITE_FLUSH(&adapter->hw);
  266. synchronize_irq(adapter->pdev->irq);
  267. }
  268. /**
  269. * e1000_irq_enable - Enable default interrupt generation settings
  270. * @adapter: board private structure
  271. **/
  272. static inline void
  273. e1000_irq_enable(struct e1000_adapter *adapter)
  274. {
  275. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  276. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  277. E1000_WRITE_FLUSH(&adapter->hw);
  278. }
  279. }
  280. static void
  281. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  282. {
  283. struct net_device *netdev = adapter->netdev;
  284. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  285. uint16_t old_vid = adapter->mng_vlan_id;
  286. if (adapter->vlgrp) {
  287. if (!adapter->vlgrp->vlan_devices[vid]) {
  288. if (adapter->hw.mng_cookie.status &
  289. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  290. e1000_vlan_rx_add_vid(netdev, vid);
  291. adapter->mng_vlan_id = vid;
  292. } else
  293. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  294. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  295. (vid != old_vid) &&
  296. !adapter->vlgrp->vlan_devices[old_vid])
  297. e1000_vlan_rx_kill_vid(netdev, old_vid);
  298. } else
  299. adapter->mng_vlan_id = vid;
  300. }
  301. }
  302. /**
  303. * e1000_release_hw_control - release control of the h/w to f/w
  304. * @adapter: address of board private structure
  305. *
  306. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  307. * For ASF and Pass Through versions of f/w this means that the
  308. * driver is no longer loaded. For AMT version (only with 82573) i
  309. * of the f/w this means that the netowrk i/f is closed.
  310. *
  311. **/
  312. static inline void
  313. e1000_release_hw_control(struct e1000_adapter *adapter)
  314. {
  315. uint32_t ctrl_ext;
  316. uint32_t swsm;
  317. /* Let firmware taken over control of h/w */
  318. switch (adapter->hw.mac_type) {
  319. case e1000_82571:
  320. case e1000_82572:
  321. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  322. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  323. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  324. break;
  325. case e1000_82573:
  326. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  327. E1000_WRITE_REG(&adapter->hw, SWSM,
  328. swsm & ~E1000_SWSM_DRV_LOAD);
  329. default:
  330. break;
  331. }
  332. }
  333. /**
  334. * e1000_get_hw_control - get control of the h/w from f/w
  335. * @adapter: address of board private structure
  336. *
  337. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  338. * For ASF and Pass Through versions of f/w this means that
  339. * the driver is loaded. For AMT version (only with 82573)
  340. * of the f/w this means that the netowrk i/f is open.
  341. *
  342. **/
  343. static inline void
  344. e1000_get_hw_control(struct e1000_adapter *adapter)
  345. {
  346. uint32_t ctrl_ext;
  347. uint32_t swsm;
  348. /* Let firmware know the driver has taken over */
  349. switch (adapter->hw.mac_type) {
  350. case e1000_82571:
  351. case e1000_82572:
  352. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  353. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  354. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  355. break;
  356. case e1000_82573:
  357. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  358. E1000_WRITE_REG(&adapter->hw, SWSM,
  359. swsm | E1000_SWSM_DRV_LOAD);
  360. break;
  361. default:
  362. break;
  363. }
  364. }
  365. int
  366. e1000_up(struct e1000_adapter *adapter)
  367. {
  368. struct net_device *netdev = adapter->netdev;
  369. int i, err;
  370. /* hardware has been reset, we need to reload some things */
  371. /* Reset the PHY if it was previously powered down */
  372. if (adapter->hw.media_type == e1000_media_type_copper) {
  373. uint16_t mii_reg;
  374. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  375. if (mii_reg & MII_CR_POWER_DOWN)
  376. e1000_phy_reset(&adapter->hw);
  377. }
  378. e1000_set_multi(netdev);
  379. e1000_restore_vlan(adapter);
  380. e1000_configure_tx(adapter);
  381. e1000_setup_rctl(adapter);
  382. e1000_configure_rx(adapter);
  383. /* call E1000_DESC_UNUSED which always leaves
  384. * at least 1 descriptor unused to make sure
  385. * next_to_use != next_to_clean */
  386. for (i = 0; i < adapter->num_rx_queues; i++) {
  387. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  388. adapter->alloc_rx_buf(adapter, ring,
  389. E1000_DESC_UNUSED(ring));
  390. }
  391. #ifdef CONFIG_PCI_MSI
  392. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  393. adapter->have_msi = TRUE;
  394. if ((err = pci_enable_msi(adapter->pdev))) {
  395. DPRINTK(PROBE, ERR,
  396. "Unable to allocate MSI interrupt Error: %d\n", err);
  397. adapter->have_msi = FALSE;
  398. }
  399. }
  400. #endif
  401. if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
  402. SA_SHIRQ | SA_SAMPLE_RANDOM,
  403. netdev->name, netdev))) {
  404. DPRINTK(PROBE, ERR,
  405. "Unable to allocate interrupt Error: %d\n", err);
  406. return err;
  407. }
  408. adapter->tx_queue_len = netdev->tx_queue_len;
  409. mod_timer(&adapter->watchdog_timer, jiffies);
  410. #ifdef CONFIG_E1000_NAPI
  411. netif_poll_enable(netdev);
  412. #endif
  413. e1000_irq_enable(adapter);
  414. return 0;
  415. }
  416. void
  417. e1000_down(struct e1000_adapter *adapter)
  418. {
  419. struct net_device *netdev = adapter->netdev;
  420. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  421. e1000_check_mng_mode(&adapter->hw);
  422. e1000_irq_disable(adapter);
  423. free_irq(adapter->pdev->irq, netdev);
  424. #ifdef CONFIG_PCI_MSI
  425. if (adapter->hw.mac_type > e1000_82547_rev_2 &&
  426. adapter->have_msi == TRUE)
  427. pci_disable_msi(adapter->pdev);
  428. #endif
  429. del_timer_sync(&adapter->tx_fifo_stall_timer);
  430. del_timer_sync(&adapter->watchdog_timer);
  431. del_timer_sync(&adapter->phy_info_timer);
  432. #ifdef CONFIG_E1000_NAPI
  433. netif_poll_disable(netdev);
  434. #endif
  435. netdev->tx_queue_len = adapter->tx_queue_len;
  436. adapter->link_speed = 0;
  437. adapter->link_duplex = 0;
  438. netif_carrier_off(netdev);
  439. netif_stop_queue(netdev);
  440. e1000_reset(adapter);
  441. e1000_clean_all_tx_rings(adapter);
  442. e1000_clean_all_rx_rings(adapter);
  443. /* Power down the PHY so no link is implied when interface is down *
  444. * The PHY cannot be powered down if any of the following is TRUE *
  445. * (a) WoL is enabled
  446. * (b) AMT is active
  447. * (c) SoL/IDER session is active */
  448. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  449. adapter->hw.media_type == e1000_media_type_copper &&
  450. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  451. !mng_mode_enabled &&
  452. !e1000_check_phy_reset_block(&adapter->hw)) {
  453. uint16_t mii_reg;
  454. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  455. mii_reg |= MII_CR_POWER_DOWN;
  456. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  457. mdelay(1);
  458. }
  459. }
  460. void
  461. e1000_reset(struct e1000_adapter *adapter)
  462. {
  463. uint32_t pba, manc;
  464. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  465. /* Repartition Pba for greater than 9k mtu
  466. * To take effect CTRL.RST is required.
  467. */
  468. switch (adapter->hw.mac_type) {
  469. case e1000_82547:
  470. case e1000_82547_rev_2:
  471. pba = E1000_PBA_30K;
  472. break;
  473. case e1000_82571:
  474. case e1000_82572:
  475. case e1000_80003es2lan:
  476. pba = E1000_PBA_38K;
  477. break;
  478. case e1000_82573:
  479. pba = E1000_PBA_12K;
  480. break;
  481. default:
  482. pba = E1000_PBA_48K;
  483. break;
  484. }
  485. if ((adapter->hw.mac_type != e1000_82573) &&
  486. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  487. pba -= 8; /* allocate more FIFO for Tx */
  488. if (adapter->hw.mac_type == e1000_82547) {
  489. adapter->tx_fifo_head = 0;
  490. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  491. adapter->tx_fifo_size =
  492. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  493. atomic_set(&adapter->tx_fifo_stall, 0);
  494. }
  495. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  496. /* flow control settings */
  497. /* Set the FC high water mark to 90% of the FIFO size.
  498. * Required to clear last 3 LSB */
  499. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  500. adapter->hw.fc_high_water = fc_high_water_mark;
  501. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  502. if (adapter->hw.mac_type == e1000_80003es2lan)
  503. adapter->hw.fc_pause_time = 0xFFFF;
  504. else
  505. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  506. adapter->hw.fc_send_xon = 1;
  507. adapter->hw.fc = adapter->hw.original_fc;
  508. /* Allow time for pending master requests to run */
  509. e1000_reset_hw(&adapter->hw);
  510. if (adapter->hw.mac_type >= e1000_82544)
  511. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  512. if (e1000_init_hw(&adapter->hw))
  513. DPRINTK(PROBE, ERR, "Hardware Error\n");
  514. e1000_update_mng_vlan(adapter);
  515. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  516. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  517. e1000_reset_adaptive(&adapter->hw);
  518. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  519. if (adapter->en_mng_pt) {
  520. manc = E1000_READ_REG(&adapter->hw, MANC);
  521. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  522. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  523. }
  524. }
  525. /**
  526. * e1000_probe - Device Initialization Routine
  527. * @pdev: PCI device information struct
  528. * @ent: entry in e1000_pci_tbl
  529. *
  530. * Returns 0 on success, negative on failure
  531. *
  532. * e1000_probe initializes an adapter identified by a pci_dev structure.
  533. * The OS initialization, configuring of the adapter private structure,
  534. * and a hardware reset occur.
  535. **/
  536. static int __devinit
  537. e1000_probe(struct pci_dev *pdev,
  538. const struct pci_device_id *ent)
  539. {
  540. struct net_device *netdev;
  541. struct e1000_adapter *adapter;
  542. unsigned long mmio_start, mmio_len;
  543. static int cards_found = 0;
  544. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  545. int i, err, pci_using_dac;
  546. uint16_t eeprom_data;
  547. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  548. if ((err = pci_enable_device(pdev)))
  549. return err;
  550. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  551. pci_using_dac = 1;
  552. } else {
  553. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  554. E1000_ERR("No usable DMA configuration, aborting\n");
  555. return err;
  556. }
  557. pci_using_dac = 0;
  558. }
  559. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  560. return err;
  561. pci_set_master(pdev);
  562. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  563. if (!netdev) {
  564. err = -ENOMEM;
  565. goto err_alloc_etherdev;
  566. }
  567. SET_MODULE_OWNER(netdev);
  568. SET_NETDEV_DEV(netdev, &pdev->dev);
  569. pci_set_drvdata(pdev, netdev);
  570. adapter = netdev_priv(netdev);
  571. adapter->netdev = netdev;
  572. adapter->pdev = pdev;
  573. adapter->hw.back = adapter;
  574. adapter->msg_enable = (1 << debug) - 1;
  575. mmio_start = pci_resource_start(pdev, BAR_0);
  576. mmio_len = pci_resource_len(pdev, BAR_0);
  577. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  578. if (!adapter->hw.hw_addr) {
  579. err = -EIO;
  580. goto err_ioremap;
  581. }
  582. for (i = BAR_1; i <= BAR_5; i++) {
  583. if (pci_resource_len(pdev, i) == 0)
  584. continue;
  585. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  586. adapter->hw.io_base = pci_resource_start(pdev, i);
  587. break;
  588. }
  589. }
  590. netdev->open = &e1000_open;
  591. netdev->stop = &e1000_close;
  592. netdev->hard_start_xmit = &e1000_xmit_frame;
  593. netdev->get_stats = &e1000_get_stats;
  594. netdev->set_multicast_list = &e1000_set_multi;
  595. netdev->set_mac_address = &e1000_set_mac;
  596. netdev->change_mtu = &e1000_change_mtu;
  597. netdev->do_ioctl = &e1000_ioctl;
  598. e1000_set_ethtool_ops(netdev);
  599. netdev->tx_timeout = &e1000_tx_timeout;
  600. netdev->watchdog_timeo = 5 * HZ;
  601. #ifdef CONFIG_E1000_NAPI
  602. netdev->poll = &e1000_clean;
  603. netdev->weight = 64;
  604. #endif
  605. netdev->vlan_rx_register = e1000_vlan_rx_register;
  606. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  607. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  608. #ifdef CONFIG_NET_POLL_CONTROLLER
  609. netdev->poll_controller = e1000_netpoll;
  610. #endif
  611. strcpy(netdev->name, pci_name(pdev));
  612. netdev->mem_start = mmio_start;
  613. netdev->mem_end = mmio_start + mmio_len;
  614. netdev->base_addr = adapter->hw.io_base;
  615. adapter->bd_number = cards_found;
  616. /* setup the private structure */
  617. if ((err = e1000_sw_init(adapter)))
  618. goto err_sw_init;
  619. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  620. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  621. /* if ksp3, indicate if it's port a being setup */
  622. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  623. e1000_ksp3_port_a == 0)
  624. adapter->ksp3_port_a = 1;
  625. e1000_ksp3_port_a++;
  626. /* Reset for multiple KP3 adapters */
  627. if (e1000_ksp3_port_a == 4)
  628. e1000_ksp3_port_a = 0;
  629. if (adapter->hw.mac_type >= e1000_82543) {
  630. netdev->features = NETIF_F_SG |
  631. NETIF_F_HW_CSUM |
  632. NETIF_F_HW_VLAN_TX |
  633. NETIF_F_HW_VLAN_RX |
  634. NETIF_F_HW_VLAN_FILTER;
  635. }
  636. #ifdef NETIF_F_TSO
  637. if ((adapter->hw.mac_type >= e1000_82544) &&
  638. (adapter->hw.mac_type != e1000_82547))
  639. netdev->features |= NETIF_F_TSO;
  640. #ifdef NETIF_F_TSO_IPV6
  641. if (adapter->hw.mac_type > e1000_82547_rev_2)
  642. netdev->features |= NETIF_F_TSO_IPV6;
  643. #endif
  644. #endif
  645. if (pci_using_dac)
  646. netdev->features |= NETIF_F_HIGHDMA;
  647. /* hard_start_xmit is safe against parallel locking */
  648. netdev->features |= NETIF_F_LLTX;
  649. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  650. /* before reading the EEPROM, reset the controller to
  651. * put the device in a known good starting state */
  652. e1000_reset_hw(&adapter->hw);
  653. /* make sure the EEPROM is good */
  654. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  655. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  656. err = -EIO;
  657. goto err_eeprom;
  658. }
  659. /* copy the MAC address out of the EEPROM */
  660. if (e1000_read_mac_addr(&adapter->hw))
  661. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  662. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  663. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  664. if (!is_valid_ether_addr(netdev->perm_addr)) {
  665. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  666. err = -EIO;
  667. goto err_eeprom;
  668. }
  669. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  670. e1000_get_bus_info(&adapter->hw);
  671. init_timer(&adapter->tx_fifo_stall_timer);
  672. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  673. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  674. init_timer(&adapter->watchdog_timer);
  675. adapter->watchdog_timer.function = &e1000_watchdog;
  676. adapter->watchdog_timer.data = (unsigned long) adapter;
  677. INIT_WORK(&adapter->watchdog_task,
  678. (void (*)(void *))e1000_watchdog_task, adapter);
  679. init_timer(&adapter->phy_info_timer);
  680. adapter->phy_info_timer.function = &e1000_update_phy_info;
  681. adapter->phy_info_timer.data = (unsigned long) adapter;
  682. INIT_WORK(&adapter->reset_task,
  683. (void (*)(void *))e1000_reset_task, netdev);
  684. /* we're going to reset, so assume we have no link for now */
  685. netif_carrier_off(netdev);
  686. netif_stop_queue(netdev);
  687. e1000_check_options(adapter);
  688. /* Initial Wake on LAN setting
  689. * If APM wake is enabled in the EEPROM,
  690. * enable the ACPI Magic Packet filter
  691. */
  692. switch (adapter->hw.mac_type) {
  693. case e1000_82542_rev2_0:
  694. case e1000_82542_rev2_1:
  695. case e1000_82543:
  696. break;
  697. case e1000_82544:
  698. e1000_read_eeprom(&adapter->hw,
  699. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  700. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  701. break;
  702. case e1000_82546:
  703. case e1000_82546_rev_3:
  704. case e1000_82571:
  705. case e1000_80003es2lan:
  706. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  707. e1000_read_eeprom(&adapter->hw,
  708. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  709. break;
  710. }
  711. /* Fall Through */
  712. default:
  713. e1000_read_eeprom(&adapter->hw,
  714. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  715. break;
  716. }
  717. if (eeprom_data & eeprom_apme_mask)
  718. adapter->wol |= E1000_WUFC_MAG;
  719. /* print bus type/speed/width info */
  720. {
  721. struct e1000_hw *hw = &adapter->hw;
  722. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  723. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  724. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  725. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  726. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  727. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  728. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  729. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  730. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  731. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  732. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  733. "32-bit"));
  734. }
  735. for (i = 0; i < 6; i++)
  736. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  737. /* reset the hardware with the new settings */
  738. e1000_reset(adapter);
  739. /* If the controller is 82573 and f/w is AMT, do not set
  740. * DRV_LOAD until the interface is up. For all other cases,
  741. * let the f/w know that the h/w is now under the control
  742. * of the driver. */
  743. if (adapter->hw.mac_type != e1000_82573 ||
  744. !e1000_check_mng_mode(&adapter->hw))
  745. e1000_get_hw_control(adapter);
  746. strcpy(netdev->name, "eth%d");
  747. if ((err = register_netdev(netdev)))
  748. goto err_register;
  749. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  750. cards_found++;
  751. return 0;
  752. err_register:
  753. err_sw_init:
  754. err_eeprom:
  755. iounmap(adapter->hw.hw_addr);
  756. err_ioremap:
  757. free_netdev(netdev);
  758. err_alloc_etherdev:
  759. pci_release_regions(pdev);
  760. return err;
  761. }
  762. /**
  763. * e1000_remove - Device Removal Routine
  764. * @pdev: PCI device information struct
  765. *
  766. * e1000_remove is called by the PCI subsystem to alert the driver
  767. * that it should release a PCI device. The could be caused by a
  768. * Hot-Plug event, or because the driver is going to be removed from
  769. * memory.
  770. **/
  771. static void __devexit
  772. e1000_remove(struct pci_dev *pdev)
  773. {
  774. struct net_device *netdev = pci_get_drvdata(pdev);
  775. struct e1000_adapter *adapter = netdev_priv(netdev);
  776. uint32_t manc;
  777. #ifdef CONFIG_E1000_NAPI
  778. int i;
  779. #endif
  780. flush_scheduled_work();
  781. if (adapter->hw.mac_type >= e1000_82540 &&
  782. adapter->hw.media_type == e1000_media_type_copper) {
  783. manc = E1000_READ_REG(&adapter->hw, MANC);
  784. if (manc & E1000_MANC_SMBUS_EN) {
  785. manc |= E1000_MANC_ARP_EN;
  786. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  787. }
  788. }
  789. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  790. * would have already happened in close and is redundant. */
  791. e1000_release_hw_control(adapter);
  792. unregister_netdev(netdev);
  793. #ifdef CONFIG_E1000_NAPI
  794. for (i = 0; i < adapter->num_rx_queues; i++)
  795. dev_put(&adapter->polling_netdev[i]);
  796. #endif
  797. if (!e1000_check_phy_reset_block(&adapter->hw))
  798. e1000_phy_hw_reset(&adapter->hw);
  799. kfree(adapter->tx_ring);
  800. kfree(adapter->rx_ring);
  801. #ifdef CONFIG_E1000_NAPI
  802. kfree(adapter->polling_netdev);
  803. #endif
  804. iounmap(adapter->hw.hw_addr);
  805. pci_release_regions(pdev);
  806. free_netdev(netdev);
  807. pci_disable_device(pdev);
  808. }
  809. /**
  810. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  811. * @adapter: board private structure to initialize
  812. *
  813. * e1000_sw_init initializes the Adapter private data structure.
  814. * Fields are initialized based on PCI device information and
  815. * OS network device settings (MTU size).
  816. **/
  817. static int __devinit
  818. e1000_sw_init(struct e1000_adapter *adapter)
  819. {
  820. struct e1000_hw *hw = &adapter->hw;
  821. struct net_device *netdev = adapter->netdev;
  822. struct pci_dev *pdev = adapter->pdev;
  823. #ifdef CONFIG_E1000_NAPI
  824. int i;
  825. #endif
  826. /* PCI config space info */
  827. hw->vendor_id = pdev->vendor;
  828. hw->device_id = pdev->device;
  829. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  830. hw->subsystem_id = pdev->subsystem_device;
  831. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  832. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  833. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  834. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  835. hw->max_frame_size = netdev->mtu +
  836. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  837. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  838. /* identify the MAC */
  839. if (e1000_set_mac_type(hw)) {
  840. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  841. return -EIO;
  842. }
  843. /* initialize eeprom parameters */
  844. if (e1000_init_eeprom_params(hw)) {
  845. E1000_ERR("EEPROM initialization failed\n");
  846. return -EIO;
  847. }
  848. switch (hw->mac_type) {
  849. default:
  850. break;
  851. case e1000_82541:
  852. case e1000_82547:
  853. case e1000_82541_rev_2:
  854. case e1000_82547_rev_2:
  855. hw->phy_init_script = 1;
  856. break;
  857. }
  858. e1000_set_media_type(hw);
  859. hw->wait_autoneg_complete = FALSE;
  860. hw->tbi_compatibility_en = TRUE;
  861. hw->adaptive_ifs = TRUE;
  862. /* Copper options */
  863. if (hw->media_type == e1000_media_type_copper) {
  864. hw->mdix = AUTO_ALL_MODES;
  865. hw->disable_polarity_correction = FALSE;
  866. hw->master_slave = E1000_MASTER_SLAVE;
  867. }
  868. adapter->num_tx_queues = 1;
  869. adapter->num_rx_queues = 1;
  870. if (e1000_alloc_queues(adapter)) {
  871. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  872. return -ENOMEM;
  873. }
  874. #ifdef CONFIG_E1000_NAPI
  875. for (i = 0; i < adapter->num_rx_queues; i++) {
  876. adapter->polling_netdev[i].priv = adapter;
  877. adapter->polling_netdev[i].poll = &e1000_clean;
  878. adapter->polling_netdev[i].weight = 64;
  879. dev_hold(&adapter->polling_netdev[i]);
  880. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  881. }
  882. spin_lock_init(&adapter->tx_queue_lock);
  883. #endif
  884. atomic_set(&adapter->irq_sem, 1);
  885. spin_lock_init(&adapter->stats_lock);
  886. return 0;
  887. }
  888. /**
  889. * e1000_alloc_queues - Allocate memory for all rings
  890. * @adapter: board private structure to initialize
  891. *
  892. * We allocate one ring per queue at run-time since we don't know the
  893. * number of queues at compile-time. The polling_netdev array is
  894. * intended for Multiqueue, but should work fine with a single queue.
  895. **/
  896. static int __devinit
  897. e1000_alloc_queues(struct e1000_adapter *adapter)
  898. {
  899. int size;
  900. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  901. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  902. if (!adapter->tx_ring)
  903. return -ENOMEM;
  904. memset(adapter->tx_ring, 0, size);
  905. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  906. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  907. if (!adapter->rx_ring) {
  908. kfree(adapter->tx_ring);
  909. return -ENOMEM;
  910. }
  911. memset(adapter->rx_ring, 0, size);
  912. #ifdef CONFIG_E1000_NAPI
  913. size = sizeof(struct net_device) * adapter->num_rx_queues;
  914. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  915. if (!adapter->polling_netdev) {
  916. kfree(adapter->tx_ring);
  917. kfree(adapter->rx_ring);
  918. return -ENOMEM;
  919. }
  920. memset(adapter->polling_netdev, 0, size);
  921. #endif
  922. return E1000_SUCCESS;
  923. }
  924. /**
  925. * e1000_open - Called when a network interface is made active
  926. * @netdev: network interface device structure
  927. *
  928. * Returns 0 on success, negative value on failure
  929. *
  930. * The open entry point is called when a network interface is made
  931. * active by the system (IFF_UP). At this point all resources needed
  932. * for transmit and receive operations are allocated, the interrupt
  933. * handler is registered with the OS, the watchdog timer is started,
  934. * and the stack is notified that the interface is ready.
  935. **/
  936. static int
  937. e1000_open(struct net_device *netdev)
  938. {
  939. struct e1000_adapter *adapter = netdev_priv(netdev);
  940. int err;
  941. /* allocate transmit descriptors */
  942. if ((err = e1000_setup_all_tx_resources(adapter)))
  943. goto err_setup_tx;
  944. /* allocate receive descriptors */
  945. if ((err = e1000_setup_all_rx_resources(adapter)))
  946. goto err_setup_rx;
  947. if ((err = e1000_up(adapter)))
  948. goto err_up;
  949. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  950. if ((adapter->hw.mng_cookie.status &
  951. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  952. e1000_update_mng_vlan(adapter);
  953. }
  954. /* If AMT is enabled, let the firmware know that the network
  955. * interface is now open */
  956. if (adapter->hw.mac_type == e1000_82573 &&
  957. e1000_check_mng_mode(&adapter->hw))
  958. e1000_get_hw_control(adapter);
  959. return E1000_SUCCESS;
  960. err_up:
  961. e1000_free_all_rx_resources(adapter);
  962. err_setup_rx:
  963. e1000_free_all_tx_resources(adapter);
  964. err_setup_tx:
  965. e1000_reset(adapter);
  966. return err;
  967. }
  968. /**
  969. * e1000_close - Disables a network interface
  970. * @netdev: network interface device structure
  971. *
  972. * Returns 0, this is not allowed to fail
  973. *
  974. * The close entry point is called when an interface is de-activated
  975. * by the OS. The hardware is still under the drivers control, but
  976. * needs to be disabled. A global MAC reset is issued to stop the
  977. * hardware, and all transmit and receive resources are freed.
  978. **/
  979. static int
  980. e1000_close(struct net_device *netdev)
  981. {
  982. struct e1000_adapter *adapter = netdev_priv(netdev);
  983. e1000_down(adapter);
  984. e1000_free_all_tx_resources(adapter);
  985. e1000_free_all_rx_resources(adapter);
  986. if ((adapter->hw.mng_cookie.status &
  987. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  988. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  989. }
  990. /* If AMT is enabled, let the firmware know that the network
  991. * interface is now closed */
  992. if (adapter->hw.mac_type == e1000_82573 &&
  993. e1000_check_mng_mode(&adapter->hw))
  994. e1000_release_hw_control(adapter);
  995. return 0;
  996. }
  997. /**
  998. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  999. * @adapter: address of board private structure
  1000. * @start: address of beginning of memory
  1001. * @len: length of memory
  1002. **/
  1003. static inline boolean_t
  1004. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1005. void *start, unsigned long len)
  1006. {
  1007. unsigned long begin = (unsigned long) start;
  1008. unsigned long end = begin + len;
  1009. /* First rev 82545 and 82546 need to not allow any memory
  1010. * write location to cross 64k boundary due to errata 23 */
  1011. if (adapter->hw.mac_type == e1000_82545 ||
  1012. adapter->hw.mac_type == e1000_82546) {
  1013. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1014. }
  1015. return TRUE;
  1016. }
  1017. /**
  1018. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1019. * @adapter: board private structure
  1020. * @txdr: tx descriptor ring (for a specific queue) to setup
  1021. *
  1022. * Return 0 on success, negative on failure
  1023. **/
  1024. static int
  1025. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1026. struct e1000_tx_ring *txdr)
  1027. {
  1028. struct pci_dev *pdev = adapter->pdev;
  1029. int size;
  1030. size = sizeof(struct e1000_buffer) * txdr->count;
  1031. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1032. if (!txdr->buffer_info) {
  1033. DPRINTK(PROBE, ERR,
  1034. "Unable to allocate memory for the transmit descriptor ring\n");
  1035. return -ENOMEM;
  1036. }
  1037. memset(txdr->buffer_info, 0, size);
  1038. /* round up to nearest 4K */
  1039. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1040. E1000_ROUNDUP(txdr->size, 4096);
  1041. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1042. if (!txdr->desc) {
  1043. setup_tx_desc_die:
  1044. vfree(txdr->buffer_info);
  1045. DPRINTK(PROBE, ERR,
  1046. "Unable to allocate memory for the transmit descriptor ring\n");
  1047. return -ENOMEM;
  1048. }
  1049. /* Fix for errata 23, can't cross 64kB boundary */
  1050. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1051. void *olddesc = txdr->desc;
  1052. dma_addr_t olddma = txdr->dma;
  1053. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1054. "at %p\n", txdr->size, txdr->desc);
  1055. /* Try again, without freeing the previous */
  1056. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1057. /* Failed allocation, critical failure */
  1058. if (!txdr->desc) {
  1059. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1060. goto setup_tx_desc_die;
  1061. }
  1062. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1063. /* give up */
  1064. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1065. txdr->dma);
  1066. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1067. DPRINTK(PROBE, ERR,
  1068. "Unable to allocate aligned memory "
  1069. "for the transmit descriptor ring\n");
  1070. vfree(txdr->buffer_info);
  1071. return -ENOMEM;
  1072. } else {
  1073. /* Free old allocation, new allocation was successful */
  1074. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1075. }
  1076. }
  1077. memset(txdr->desc, 0, txdr->size);
  1078. txdr->next_to_use = 0;
  1079. txdr->next_to_clean = 0;
  1080. spin_lock_init(&txdr->tx_lock);
  1081. return 0;
  1082. }
  1083. /**
  1084. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1085. * (Descriptors) for all queues
  1086. * @adapter: board private structure
  1087. *
  1088. * If this function returns with an error, then it's possible one or
  1089. * more of the rings is populated (while the rest are not). It is the
  1090. * callers duty to clean those orphaned rings.
  1091. *
  1092. * Return 0 on success, negative on failure
  1093. **/
  1094. int
  1095. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1096. {
  1097. int i, err = 0;
  1098. for (i = 0; i < adapter->num_tx_queues; i++) {
  1099. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1100. if (err) {
  1101. DPRINTK(PROBE, ERR,
  1102. "Allocation for Tx Queue %u failed\n", i);
  1103. break;
  1104. }
  1105. }
  1106. return err;
  1107. }
  1108. /**
  1109. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1110. * @adapter: board private structure
  1111. *
  1112. * Configure the Tx unit of the MAC after a reset.
  1113. **/
  1114. static void
  1115. e1000_configure_tx(struct e1000_adapter *adapter)
  1116. {
  1117. uint64_t tdba;
  1118. struct e1000_hw *hw = &adapter->hw;
  1119. uint32_t tdlen, tctl, tipg, tarc;
  1120. uint32_t ipgr1, ipgr2;
  1121. /* Setup the HW Tx Head and Tail descriptor pointers */
  1122. switch (adapter->num_tx_queues) {
  1123. case 1:
  1124. default:
  1125. tdba = adapter->tx_ring[0].dma;
  1126. tdlen = adapter->tx_ring[0].count *
  1127. sizeof(struct e1000_tx_desc);
  1128. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1129. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1130. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1131. E1000_WRITE_REG(hw, TDH, 0);
  1132. E1000_WRITE_REG(hw, TDT, 0);
  1133. adapter->tx_ring[0].tdh = E1000_TDH;
  1134. adapter->tx_ring[0].tdt = E1000_TDT;
  1135. break;
  1136. }
  1137. /* Set the default values for the Tx Inter Packet Gap timer */
  1138. if (hw->media_type == e1000_media_type_fiber ||
  1139. hw->media_type == e1000_media_type_internal_serdes)
  1140. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1141. else
  1142. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1143. switch (hw->mac_type) {
  1144. case e1000_82542_rev2_0:
  1145. case e1000_82542_rev2_1:
  1146. tipg = DEFAULT_82542_TIPG_IPGT;
  1147. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1148. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1149. break;
  1150. case e1000_80003es2lan:
  1151. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1152. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1153. break;
  1154. default:
  1155. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1156. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1157. break;
  1158. }
  1159. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1160. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1161. E1000_WRITE_REG(hw, TIPG, tipg);
  1162. /* Set the Tx Interrupt Delay register */
  1163. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1164. if (hw->mac_type >= e1000_82540)
  1165. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1166. /* Program the Transmit Control Register */
  1167. tctl = E1000_READ_REG(hw, TCTL);
  1168. tctl &= ~E1000_TCTL_CT;
  1169. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1170. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1171. #ifdef DISABLE_MULR
  1172. /* disable Multiple Reads for debugging */
  1173. tctl &= ~E1000_TCTL_MULR;
  1174. #endif
  1175. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1176. tarc = E1000_READ_REG(hw, TARC0);
  1177. tarc |= ((1 << 25) | (1 << 21));
  1178. E1000_WRITE_REG(hw, TARC0, tarc);
  1179. tarc = E1000_READ_REG(hw, TARC1);
  1180. tarc |= (1 << 25);
  1181. if (tctl & E1000_TCTL_MULR)
  1182. tarc &= ~(1 << 28);
  1183. else
  1184. tarc |= (1 << 28);
  1185. E1000_WRITE_REG(hw, TARC1, tarc);
  1186. } else if (hw->mac_type == e1000_80003es2lan) {
  1187. tarc = E1000_READ_REG(hw, TARC0);
  1188. tarc |= 1;
  1189. if (hw->media_type == e1000_media_type_internal_serdes)
  1190. tarc |= (1 << 20);
  1191. E1000_WRITE_REG(hw, TARC0, tarc);
  1192. tarc = E1000_READ_REG(hw, TARC1);
  1193. tarc |= 1;
  1194. E1000_WRITE_REG(hw, TARC1, tarc);
  1195. }
  1196. e1000_config_collision_dist(hw);
  1197. /* Setup Transmit Descriptor Settings for eop descriptor */
  1198. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1199. E1000_TXD_CMD_IFCS;
  1200. if (hw->mac_type < e1000_82543)
  1201. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1202. else
  1203. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1204. /* Cache if we're 82544 running in PCI-X because we'll
  1205. * need this to apply a workaround later in the send path. */
  1206. if (hw->mac_type == e1000_82544 &&
  1207. hw->bus_type == e1000_bus_type_pcix)
  1208. adapter->pcix_82544 = 1;
  1209. E1000_WRITE_REG(hw, TCTL, tctl);
  1210. }
  1211. /**
  1212. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1213. * @adapter: board private structure
  1214. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1215. *
  1216. * Returns 0 on success, negative on failure
  1217. **/
  1218. static int
  1219. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1220. struct e1000_rx_ring *rxdr)
  1221. {
  1222. struct pci_dev *pdev = adapter->pdev;
  1223. int size, desc_len;
  1224. size = sizeof(struct e1000_buffer) * rxdr->count;
  1225. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1226. if (!rxdr->buffer_info) {
  1227. DPRINTK(PROBE, ERR,
  1228. "Unable to allocate memory for the receive descriptor ring\n");
  1229. return -ENOMEM;
  1230. }
  1231. memset(rxdr->buffer_info, 0, size);
  1232. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1233. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1234. if (!rxdr->ps_page) {
  1235. vfree(rxdr->buffer_info);
  1236. DPRINTK(PROBE, ERR,
  1237. "Unable to allocate memory for the receive descriptor ring\n");
  1238. return -ENOMEM;
  1239. }
  1240. memset(rxdr->ps_page, 0, size);
  1241. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1242. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1243. if (!rxdr->ps_page_dma) {
  1244. vfree(rxdr->buffer_info);
  1245. kfree(rxdr->ps_page);
  1246. DPRINTK(PROBE, ERR,
  1247. "Unable to allocate memory for the receive descriptor ring\n");
  1248. return -ENOMEM;
  1249. }
  1250. memset(rxdr->ps_page_dma, 0, size);
  1251. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1252. desc_len = sizeof(struct e1000_rx_desc);
  1253. else
  1254. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1255. /* Round up to nearest 4K */
  1256. rxdr->size = rxdr->count * desc_len;
  1257. E1000_ROUNDUP(rxdr->size, 4096);
  1258. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1259. if (!rxdr->desc) {
  1260. DPRINTK(PROBE, ERR,
  1261. "Unable to allocate memory for the receive descriptor ring\n");
  1262. setup_rx_desc_die:
  1263. vfree(rxdr->buffer_info);
  1264. kfree(rxdr->ps_page);
  1265. kfree(rxdr->ps_page_dma);
  1266. return -ENOMEM;
  1267. }
  1268. /* Fix for errata 23, can't cross 64kB boundary */
  1269. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1270. void *olddesc = rxdr->desc;
  1271. dma_addr_t olddma = rxdr->dma;
  1272. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1273. "at %p\n", rxdr->size, rxdr->desc);
  1274. /* Try again, without freeing the previous */
  1275. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1276. /* Failed allocation, critical failure */
  1277. if (!rxdr->desc) {
  1278. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1279. DPRINTK(PROBE, ERR,
  1280. "Unable to allocate memory "
  1281. "for the receive descriptor ring\n");
  1282. goto setup_rx_desc_die;
  1283. }
  1284. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1285. /* give up */
  1286. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1287. rxdr->dma);
  1288. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1289. DPRINTK(PROBE, ERR,
  1290. "Unable to allocate aligned memory "
  1291. "for the receive descriptor ring\n");
  1292. goto setup_rx_desc_die;
  1293. } else {
  1294. /* Free old allocation, new allocation was successful */
  1295. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1296. }
  1297. }
  1298. memset(rxdr->desc, 0, rxdr->size);
  1299. rxdr->next_to_clean = 0;
  1300. rxdr->next_to_use = 0;
  1301. return 0;
  1302. }
  1303. /**
  1304. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1305. * (Descriptors) for all queues
  1306. * @adapter: board private structure
  1307. *
  1308. * If this function returns with an error, then it's possible one or
  1309. * more of the rings is populated (while the rest are not). It is the
  1310. * callers duty to clean those orphaned rings.
  1311. *
  1312. * Return 0 on success, negative on failure
  1313. **/
  1314. int
  1315. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1316. {
  1317. int i, err = 0;
  1318. for (i = 0; i < adapter->num_rx_queues; i++) {
  1319. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1320. if (err) {
  1321. DPRINTK(PROBE, ERR,
  1322. "Allocation for Rx Queue %u failed\n", i);
  1323. break;
  1324. }
  1325. }
  1326. return err;
  1327. }
  1328. /**
  1329. * e1000_setup_rctl - configure the receive control registers
  1330. * @adapter: Board private structure
  1331. **/
  1332. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1333. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1334. static void
  1335. e1000_setup_rctl(struct e1000_adapter *adapter)
  1336. {
  1337. uint32_t rctl, rfctl;
  1338. uint32_t psrctl = 0;
  1339. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1340. uint32_t pages = 0;
  1341. #endif
  1342. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1343. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1344. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1345. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1346. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1347. if (adapter->hw.mac_type > e1000_82543)
  1348. rctl |= E1000_RCTL_SECRC;
  1349. if (adapter->hw.tbi_compatibility_on == 1)
  1350. rctl |= E1000_RCTL_SBP;
  1351. else
  1352. rctl &= ~E1000_RCTL_SBP;
  1353. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1354. rctl &= ~E1000_RCTL_LPE;
  1355. else
  1356. rctl |= E1000_RCTL_LPE;
  1357. /* Setup buffer sizes */
  1358. if (adapter->hw.mac_type >= e1000_82571) {
  1359. /* We can now specify buffers in 1K increments.
  1360. * BSIZE and BSEX are ignored in this case. */
  1361. rctl |= adapter->rx_buffer_len << 0x11;
  1362. } else {
  1363. rctl &= ~E1000_RCTL_SZ_4096;
  1364. rctl |= E1000_RCTL_BSEX;
  1365. switch (adapter->rx_buffer_len) {
  1366. case E1000_RXBUFFER_2048:
  1367. default:
  1368. rctl |= E1000_RCTL_SZ_2048;
  1369. rctl &= ~E1000_RCTL_BSEX;
  1370. break;
  1371. case E1000_RXBUFFER_4096:
  1372. rctl |= E1000_RCTL_SZ_4096;
  1373. break;
  1374. case E1000_RXBUFFER_8192:
  1375. rctl |= E1000_RCTL_SZ_8192;
  1376. break;
  1377. case E1000_RXBUFFER_16384:
  1378. rctl |= E1000_RCTL_SZ_16384;
  1379. break;
  1380. }
  1381. }
  1382. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1383. /* 82571 and greater support packet-split where the protocol
  1384. * header is placed in skb->data and the packet data is
  1385. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1386. * In the case of a non-split, skb->data is linearly filled,
  1387. * followed by the page buffers. Therefore, skb->data is
  1388. * sized to hold the largest protocol header.
  1389. */
  1390. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1391. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1392. PAGE_SIZE <= 16384)
  1393. adapter->rx_ps_pages = pages;
  1394. else
  1395. adapter->rx_ps_pages = 0;
  1396. #endif
  1397. if (adapter->rx_ps_pages) {
  1398. /* Configure extra packet-split registers */
  1399. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1400. rfctl |= E1000_RFCTL_EXTEN;
  1401. /* disable IPv6 packet split support */
  1402. rfctl |= E1000_RFCTL_IPV6_DIS;
  1403. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1404. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1405. psrctl |= adapter->rx_ps_bsize0 >>
  1406. E1000_PSRCTL_BSIZE0_SHIFT;
  1407. switch (adapter->rx_ps_pages) {
  1408. case 3:
  1409. psrctl |= PAGE_SIZE <<
  1410. E1000_PSRCTL_BSIZE3_SHIFT;
  1411. case 2:
  1412. psrctl |= PAGE_SIZE <<
  1413. E1000_PSRCTL_BSIZE2_SHIFT;
  1414. case 1:
  1415. psrctl |= PAGE_SIZE >>
  1416. E1000_PSRCTL_BSIZE1_SHIFT;
  1417. break;
  1418. }
  1419. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1420. }
  1421. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1422. }
  1423. /**
  1424. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1425. * @adapter: board private structure
  1426. *
  1427. * Configure the Rx unit of the MAC after a reset.
  1428. **/
  1429. static void
  1430. e1000_configure_rx(struct e1000_adapter *adapter)
  1431. {
  1432. uint64_t rdba;
  1433. struct e1000_hw *hw = &adapter->hw;
  1434. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1435. if (adapter->rx_ps_pages) {
  1436. /* this is a 32 byte descriptor */
  1437. rdlen = adapter->rx_ring[0].count *
  1438. sizeof(union e1000_rx_desc_packet_split);
  1439. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1440. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1441. } else {
  1442. rdlen = adapter->rx_ring[0].count *
  1443. sizeof(struct e1000_rx_desc);
  1444. adapter->clean_rx = e1000_clean_rx_irq;
  1445. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1446. }
  1447. /* disable receives while setting up the descriptors */
  1448. rctl = E1000_READ_REG(hw, RCTL);
  1449. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1450. /* set the Receive Delay Timer Register */
  1451. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1452. if (hw->mac_type >= e1000_82540) {
  1453. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1454. if (adapter->itr > 1)
  1455. E1000_WRITE_REG(hw, ITR,
  1456. 1000000000 / (adapter->itr * 256));
  1457. }
  1458. if (hw->mac_type >= e1000_82571) {
  1459. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1460. /* Reset delay timers after every interrupt */
  1461. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1462. #ifdef CONFIG_E1000_NAPI
  1463. /* Auto-Mask interrupts upon ICR read. */
  1464. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1465. #endif
  1466. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1467. E1000_WRITE_REG(hw, IAM, ~0);
  1468. E1000_WRITE_FLUSH(hw);
  1469. }
  1470. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1471. * the Base and Length of the Rx Descriptor Ring */
  1472. switch (adapter->num_rx_queues) {
  1473. case 1:
  1474. default:
  1475. rdba = adapter->rx_ring[0].dma;
  1476. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1477. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1478. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1479. E1000_WRITE_REG(hw, RDH, 0);
  1480. E1000_WRITE_REG(hw, RDT, 0);
  1481. adapter->rx_ring[0].rdh = E1000_RDH;
  1482. adapter->rx_ring[0].rdt = E1000_RDT;
  1483. break;
  1484. }
  1485. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1486. if (hw->mac_type >= e1000_82543) {
  1487. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1488. if (adapter->rx_csum == TRUE) {
  1489. rxcsum |= E1000_RXCSUM_TUOFL;
  1490. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1491. * Must be used in conjunction with packet-split. */
  1492. if ((hw->mac_type >= e1000_82571) &&
  1493. (adapter->rx_ps_pages)) {
  1494. rxcsum |= E1000_RXCSUM_IPPCSE;
  1495. }
  1496. } else {
  1497. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1498. /* don't need to clear IPPCSE as it defaults to 0 */
  1499. }
  1500. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1501. }
  1502. if (hw->mac_type == e1000_82573)
  1503. E1000_WRITE_REG(hw, ERT, 0x0100);
  1504. /* Enable Receives */
  1505. E1000_WRITE_REG(hw, RCTL, rctl);
  1506. }
  1507. /**
  1508. * e1000_free_tx_resources - Free Tx Resources per Queue
  1509. * @adapter: board private structure
  1510. * @tx_ring: Tx descriptor ring for a specific queue
  1511. *
  1512. * Free all transmit software resources
  1513. **/
  1514. static void
  1515. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1516. struct e1000_tx_ring *tx_ring)
  1517. {
  1518. struct pci_dev *pdev = adapter->pdev;
  1519. e1000_clean_tx_ring(adapter, tx_ring);
  1520. vfree(tx_ring->buffer_info);
  1521. tx_ring->buffer_info = NULL;
  1522. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1523. tx_ring->desc = NULL;
  1524. }
  1525. /**
  1526. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1527. * @adapter: board private structure
  1528. *
  1529. * Free all transmit software resources
  1530. **/
  1531. void
  1532. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1533. {
  1534. int i;
  1535. for (i = 0; i < adapter->num_tx_queues; i++)
  1536. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1537. }
  1538. static inline void
  1539. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1540. struct e1000_buffer *buffer_info)
  1541. {
  1542. if (buffer_info->dma) {
  1543. pci_unmap_page(adapter->pdev,
  1544. buffer_info->dma,
  1545. buffer_info->length,
  1546. PCI_DMA_TODEVICE);
  1547. }
  1548. if (buffer_info->skb)
  1549. dev_kfree_skb_any(buffer_info->skb);
  1550. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1551. }
  1552. /**
  1553. * e1000_clean_tx_ring - Free Tx Buffers
  1554. * @adapter: board private structure
  1555. * @tx_ring: ring to be cleaned
  1556. **/
  1557. static void
  1558. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1559. struct e1000_tx_ring *tx_ring)
  1560. {
  1561. struct e1000_buffer *buffer_info;
  1562. unsigned long size;
  1563. unsigned int i;
  1564. /* Free all the Tx ring sk_buffs */
  1565. for (i = 0; i < tx_ring->count; i++) {
  1566. buffer_info = &tx_ring->buffer_info[i];
  1567. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1568. }
  1569. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1570. memset(tx_ring->buffer_info, 0, size);
  1571. /* Zero out the descriptor ring */
  1572. memset(tx_ring->desc, 0, tx_ring->size);
  1573. tx_ring->next_to_use = 0;
  1574. tx_ring->next_to_clean = 0;
  1575. tx_ring->last_tx_tso = 0;
  1576. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1577. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1578. }
  1579. /**
  1580. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1581. * @adapter: board private structure
  1582. **/
  1583. static void
  1584. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1585. {
  1586. int i;
  1587. for (i = 0; i < adapter->num_tx_queues; i++)
  1588. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1589. }
  1590. /**
  1591. * e1000_free_rx_resources - Free Rx Resources
  1592. * @adapter: board private structure
  1593. * @rx_ring: ring to clean the resources from
  1594. *
  1595. * Free all receive software resources
  1596. **/
  1597. static void
  1598. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1599. struct e1000_rx_ring *rx_ring)
  1600. {
  1601. struct pci_dev *pdev = adapter->pdev;
  1602. e1000_clean_rx_ring(adapter, rx_ring);
  1603. vfree(rx_ring->buffer_info);
  1604. rx_ring->buffer_info = NULL;
  1605. kfree(rx_ring->ps_page);
  1606. rx_ring->ps_page = NULL;
  1607. kfree(rx_ring->ps_page_dma);
  1608. rx_ring->ps_page_dma = NULL;
  1609. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1610. rx_ring->desc = NULL;
  1611. }
  1612. /**
  1613. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1614. * @adapter: board private structure
  1615. *
  1616. * Free all receive software resources
  1617. **/
  1618. void
  1619. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1620. {
  1621. int i;
  1622. for (i = 0; i < adapter->num_rx_queues; i++)
  1623. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1624. }
  1625. /**
  1626. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1627. * @adapter: board private structure
  1628. * @rx_ring: ring to free buffers from
  1629. **/
  1630. static void
  1631. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1632. struct e1000_rx_ring *rx_ring)
  1633. {
  1634. struct e1000_buffer *buffer_info;
  1635. struct e1000_ps_page *ps_page;
  1636. struct e1000_ps_page_dma *ps_page_dma;
  1637. struct pci_dev *pdev = adapter->pdev;
  1638. unsigned long size;
  1639. unsigned int i, j;
  1640. /* Free all the Rx ring sk_buffs */
  1641. for (i = 0; i < rx_ring->count; i++) {
  1642. buffer_info = &rx_ring->buffer_info[i];
  1643. if (buffer_info->skb) {
  1644. pci_unmap_single(pdev,
  1645. buffer_info->dma,
  1646. buffer_info->length,
  1647. PCI_DMA_FROMDEVICE);
  1648. dev_kfree_skb(buffer_info->skb);
  1649. buffer_info->skb = NULL;
  1650. }
  1651. ps_page = &rx_ring->ps_page[i];
  1652. ps_page_dma = &rx_ring->ps_page_dma[i];
  1653. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1654. if (!ps_page->ps_page[j]) break;
  1655. pci_unmap_page(pdev,
  1656. ps_page_dma->ps_page_dma[j],
  1657. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1658. ps_page_dma->ps_page_dma[j] = 0;
  1659. put_page(ps_page->ps_page[j]);
  1660. ps_page->ps_page[j] = NULL;
  1661. }
  1662. }
  1663. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1664. memset(rx_ring->buffer_info, 0, size);
  1665. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1666. memset(rx_ring->ps_page, 0, size);
  1667. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1668. memset(rx_ring->ps_page_dma, 0, size);
  1669. /* Zero out the descriptor ring */
  1670. memset(rx_ring->desc, 0, rx_ring->size);
  1671. rx_ring->next_to_clean = 0;
  1672. rx_ring->next_to_use = 0;
  1673. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1674. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1675. }
  1676. /**
  1677. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1678. * @adapter: board private structure
  1679. **/
  1680. static void
  1681. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1682. {
  1683. int i;
  1684. for (i = 0; i < adapter->num_rx_queues; i++)
  1685. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1686. }
  1687. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1688. * and memory write and invalidate disabled for certain operations
  1689. */
  1690. static void
  1691. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1692. {
  1693. struct net_device *netdev = adapter->netdev;
  1694. uint32_t rctl;
  1695. e1000_pci_clear_mwi(&adapter->hw);
  1696. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1697. rctl |= E1000_RCTL_RST;
  1698. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1699. E1000_WRITE_FLUSH(&adapter->hw);
  1700. mdelay(5);
  1701. if (netif_running(netdev))
  1702. e1000_clean_all_rx_rings(adapter);
  1703. }
  1704. static void
  1705. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1706. {
  1707. struct net_device *netdev = adapter->netdev;
  1708. uint32_t rctl;
  1709. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1710. rctl &= ~E1000_RCTL_RST;
  1711. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1712. E1000_WRITE_FLUSH(&adapter->hw);
  1713. mdelay(5);
  1714. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1715. e1000_pci_set_mwi(&adapter->hw);
  1716. if (netif_running(netdev)) {
  1717. /* No need to loop, because 82542 supports only 1 queue */
  1718. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1719. e1000_configure_rx(adapter);
  1720. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1721. }
  1722. }
  1723. /**
  1724. * e1000_set_mac - Change the Ethernet Address of the NIC
  1725. * @netdev: network interface device structure
  1726. * @p: pointer to an address structure
  1727. *
  1728. * Returns 0 on success, negative on failure
  1729. **/
  1730. static int
  1731. e1000_set_mac(struct net_device *netdev, void *p)
  1732. {
  1733. struct e1000_adapter *adapter = netdev_priv(netdev);
  1734. struct sockaddr *addr = p;
  1735. if (!is_valid_ether_addr(addr->sa_data))
  1736. return -EADDRNOTAVAIL;
  1737. /* 82542 2.0 needs to be in reset to write receive address registers */
  1738. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1739. e1000_enter_82542_rst(adapter);
  1740. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1741. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1742. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1743. /* With 82571 controllers, LAA may be overwritten (with the default)
  1744. * due to controller reset from the other port. */
  1745. if (adapter->hw.mac_type == e1000_82571) {
  1746. /* activate the work around */
  1747. adapter->hw.laa_is_present = 1;
  1748. /* Hold a copy of the LAA in RAR[14] This is done so that
  1749. * between the time RAR[0] gets clobbered and the time it
  1750. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1751. * of the RARs and no incoming packets directed to this port
  1752. * are dropped. Eventaully the LAA will be in RAR[0] and
  1753. * RAR[14] */
  1754. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1755. E1000_RAR_ENTRIES - 1);
  1756. }
  1757. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1758. e1000_leave_82542_rst(adapter);
  1759. return 0;
  1760. }
  1761. /**
  1762. * e1000_set_multi - Multicast and Promiscuous mode set
  1763. * @netdev: network interface device structure
  1764. *
  1765. * The set_multi entry point is called whenever the multicast address
  1766. * list or the network interface flags are updated. This routine is
  1767. * responsible for configuring the hardware for proper multicast,
  1768. * promiscuous mode, and all-multi behavior.
  1769. **/
  1770. static void
  1771. e1000_set_multi(struct net_device *netdev)
  1772. {
  1773. struct e1000_adapter *adapter = netdev_priv(netdev);
  1774. struct e1000_hw *hw = &adapter->hw;
  1775. struct dev_mc_list *mc_ptr;
  1776. uint32_t rctl;
  1777. uint32_t hash_value;
  1778. int i, rar_entries = E1000_RAR_ENTRIES;
  1779. /* reserve RAR[14] for LAA over-write work-around */
  1780. if (adapter->hw.mac_type == e1000_82571)
  1781. rar_entries--;
  1782. /* Check for Promiscuous and All Multicast modes */
  1783. rctl = E1000_READ_REG(hw, RCTL);
  1784. if (netdev->flags & IFF_PROMISC) {
  1785. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1786. } else if (netdev->flags & IFF_ALLMULTI) {
  1787. rctl |= E1000_RCTL_MPE;
  1788. rctl &= ~E1000_RCTL_UPE;
  1789. } else {
  1790. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1791. }
  1792. E1000_WRITE_REG(hw, RCTL, rctl);
  1793. /* 82542 2.0 needs to be in reset to write receive address registers */
  1794. if (hw->mac_type == e1000_82542_rev2_0)
  1795. e1000_enter_82542_rst(adapter);
  1796. /* load the first 14 multicast address into the exact filters 1-14
  1797. * RAR 0 is used for the station MAC adddress
  1798. * if there are not 14 addresses, go ahead and clear the filters
  1799. * -- with 82571 controllers only 0-13 entries are filled here
  1800. */
  1801. mc_ptr = netdev->mc_list;
  1802. for (i = 1; i < rar_entries; i++) {
  1803. if (mc_ptr) {
  1804. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1805. mc_ptr = mc_ptr->next;
  1806. } else {
  1807. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1808. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1809. }
  1810. }
  1811. /* clear the old settings from the multicast hash table */
  1812. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1813. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1814. /* load any remaining addresses into the hash table */
  1815. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1816. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1817. e1000_mta_set(hw, hash_value);
  1818. }
  1819. if (hw->mac_type == e1000_82542_rev2_0)
  1820. e1000_leave_82542_rst(adapter);
  1821. }
  1822. /* Need to wait a few seconds after link up to get diagnostic information from
  1823. * the phy */
  1824. static void
  1825. e1000_update_phy_info(unsigned long data)
  1826. {
  1827. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1828. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1829. }
  1830. /**
  1831. * e1000_82547_tx_fifo_stall - Timer Call-back
  1832. * @data: pointer to adapter cast into an unsigned long
  1833. **/
  1834. static void
  1835. e1000_82547_tx_fifo_stall(unsigned long data)
  1836. {
  1837. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1838. struct net_device *netdev = adapter->netdev;
  1839. uint32_t tctl;
  1840. if (atomic_read(&adapter->tx_fifo_stall)) {
  1841. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1842. E1000_READ_REG(&adapter->hw, TDH)) &&
  1843. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1844. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1845. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1846. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1847. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1848. E1000_WRITE_REG(&adapter->hw, TCTL,
  1849. tctl & ~E1000_TCTL_EN);
  1850. E1000_WRITE_REG(&adapter->hw, TDFT,
  1851. adapter->tx_head_addr);
  1852. E1000_WRITE_REG(&adapter->hw, TDFH,
  1853. adapter->tx_head_addr);
  1854. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1855. adapter->tx_head_addr);
  1856. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1857. adapter->tx_head_addr);
  1858. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1859. E1000_WRITE_FLUSH(&adapter->hw);
  1860. adapter->tx_fifo_head = 0;
  1861. atomic_set(&adapter->tx_fifo_stall, 0);
  1862. netif_wake_queue(netdev);
  1863. } else {
  1864. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1865. }
  1866. }
  1867. }
  1868. /**
  1869. * e1000_watchdog - Timer Call-back
  1870. * @data: pointer to adapter cast into an unsigned long
  1871. **/
  1872. static void
  1873. e1000_watchdog(unsigned long data)
  1874. {
  1875. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1876. /* Do the rest outside of interrupt context */
  1877. schedule_work(&adapter->watchdog_task);
  1878. }
  1879. static void
  1880. e1000_watchdog_task(struct e1000_adapter *adapter)
  1881. {
  1882. struct net_device *netdev = adapter->netdev;
  1883. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1884. uint32_t link, tctl;
  1885. e1000_check_for_link(&adapter->hw);
  1886. if (adapter->hw.mac_type == e1000_82573) {
  1887. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1888. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1889. e1000_update_mng_vlan(adapter);
  1890. }
  1891. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1892. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1893. link = !adapter->hw.serdes_link_down;
  1894. else
  1895. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1896. if (link) {
  1897. if (!netif_carrier_ok(netdev)) {
  1898. e1000_get_speed_and_duplex(&adapter->hw,
  1899. &adapter->link_speed,
  1900. &adapter->link_duplex);
  1901. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1902. adapter->link_speed,
  1903. adapter->link_duplex == FULL_DUPLEX ?
  1904. "Full Duplex" : "Half Duplex");
  1905. /* tweak tx_queue_len according to speed/duplex
  1906. * and adjust the timeout factor */
  1907. netdev->tx_queue_len = adapter->tx_queue_len;
  1908. adapter->tx_timeout_factor = 1;
  1909. adapter->txb2b = 1;
  1910. switch (adapter->link_speed) {
  1911. case SPEED_10:
  1912. adapter->txb2b = 0;
  1913. netdev->tx_queue_len = 10;
  1914. adapter->tx_timeout_factor = 8;
  1915. break;
  1916. case SPEED_100:
  1917. adapter->txb2b = 0;
  1918. netdev->tx_queue_len = 100;
  1919. /* maybe add some timeout factor ? */
  1920. break;
  1921. }
  1922. if ((adapter->hw.mac_type == e1000_82571 ||
  1923. adapter->hw.mac_type == e1000_82572) &&
  1924. adapter->txb2b == 0) {
  1925. #define SPEED_MODE_BIT (1 << 21)
  1926. uint32_t tarc0;
  1927. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  1928. tarc0 &= ~SPEED_MODE_BIT;
  1929. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  1930. }
  1931. #ifdef NETIF_F_TSO
  1932. /* disable TSO for pcie and 10/100 speeds, to avoid
  1933. * some hardware issues */
  1934. if (!adapter->tso_force &&
  1935. adapter->hw.bus_type == e1000_bus_type_pci_express){
  1936. switch (adapter->link_speed) {
  1937. case SPEED_10:
  1938. case SPEED_100:
  1939. DPRINTK(PROBE,INFO,
  1940. "10/100 speed: disabling TSO\n");
  1941. netdev->features &= ~NETIF_F_TSO;
  1942. break;
  1943. case SPEED_1000:
  1944. netdev->features |= NETIF_F_TSO;
  1945. break;
  1946. default:
  1947. /* oops */
  1948. break;
  1949. }
  1950. }
  1951. #endif
  1952. /* enable transmits in the hardware, need to do this
  1953. * after setting TARC0 */
  1954. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1955. tctl |= E1000_TCTL_EN;
  1956. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1957. netif_carrier_on(netdev);
  1958. netif_wake_queue(netdev);
  1959. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1960. adapter->smartspeed = 0;
  1961. }
  1962. } else {
  1963. if (netif_carrier_ok(netdev)) {
  1964. adapter->link_speed = 0;
  1965. adapter->link_duplex = 0;
  1966. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1967. netif_carrier_off(netdev);
  1968. netif_stop_queue(netdev);
  1969. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1970. /* 80003ES2LAN workaround--
  1971. * For packet buffer work-around on link down event;
  1972. * disable receives in the ISR and
  1973. * reset device here in the watchdog
  1974. */
  1975. if (adapter->hw.mac_type == e1000_80003es2lan) {
  1976. /* reset device */
  1977. schedule_work(&adapter->reset_task);
  1978. }
  1979. }
  1980. e1000_smartspeed(adapter);
  1981. }
  1982. e1000_update_stats(adapter);
  1983. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1984. adapter->tpt_old = adapter->stats.tpt;
  1985. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1986. adapter->colc_old = adapter->stats.colc;
  1987. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1988. adapter->gorcl_old = adapter->stats.gorcl;
  1989. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  1990. adapter->gotcl_old = adapter->stats.gotcl;
  1991. e1000_update_adaptive(&adapter->hw);
  1992. if (!netif_carrier_ok(netdev)) {
  1993. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  1994. /* We've lost link, so the controller stops DMA,
  1995. * but we've got queued Tx work that's never going
  1996. * to get done, so reset controller to flush Tx.
  1997. * (Do the reset outside of interrupt context). */
  1998. adapter->tx_timeout_count++;
  1999. schedule_work(&adapter->reset_task);
  2000. }
  2001. }
  2002. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2003. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2004. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2005. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2006. * else is between 2000-8000. */
  2007. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2008. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2009. adapter->gotcl - adapter->gorcl :
  2010. adapter->gorcl - adapter->gotcl) / 10000;
  2011. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2012. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2013. }
  2014. /* Cause software interrupt to ensure rx ring is cleaned */
  2015. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2016. /* Force detection of hung controller every watchdog period */
  2017. adapter->detect_tx_hung = TRUE;
  2018. /* With 82571 controllers, LAA may be overwritten due to controller
  2019. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2020. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2021. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2022. /* Reset the timer */
  2023. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2024. }
  2025. #define E1000_TX_FLAGS_CSUM 0x00000001
  2026. #define E1000_TX_FLAGS_VLAN 0x00000002
  2027. #define E1000_TX_FLAGS_TSO 0x00000004
  2028. #define E1000_TX_FLAGS_IPV4 0x00000008
  2029. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2030. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2031. static inline int
  2032. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2033. struct sk_buff *skb)
  2034. {
  2035. #ifdef NETIF_F_TSO
  2036. struct e1000_context_desc *context_desc;
  2037. struct e1000_buffer *buffer_info;
  2038. unsigned int i;
  2039. uint32_t cmd_length = 0;
  2040. uint16_t ipcse = 0, tucse, mss;
  2041. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2042. int err;
  2043. if (skb_shinfo(skb)->tso_size) {
  2044. if (skb_header_cloned(skb)) {
  2045. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2046. if (err)
  2047. return err;
  2048. }
  2049. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2050. mss = skb_shinfo(skb)->tso_size;
  2051. if (skb->protocol == ntohs(ETH_P_IP)) {
  2052. skb->nh.iph->tot_len = 0;
  2053. skb->nh.iph->check = 0;
  2054. skb->h.th->check =
  2055. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2056. skb->nh.iph->daddr,
  2057. 0,
  2058. IPPROTO_TCP,
  2059. 0);
  2060. cmd_length = E1000_TXD_CMD_IP;
  2061. ipcse = skb->h.raw - skb->data - 1;
  2062. #ifdef NETIF_F_TSO_IPV6
  2063. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2064. skb->nh.ipv6h->payload_len = 0;
  2065. skb->h.th->check =
  2066. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2067. &skb->nh.ipv6h->daddr,
  2068. 0,
  2069. IPPROTO_TCP,
  2070. 0);
  2071. ipcse = 0;
  2072. #endif
  2073. }
  2074. ipcss = skb->nh.raw - skb->data;
  2075. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2076. tucss = skb->h.raw - skb->data;
  2077. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2078. tucse = 0;
  2079. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2080. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2081. i = tx_ring->next_to_use;
  2082. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2083. buffer_info = &tx_ring->buffer_info[i];
  2084. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2085. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2086. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2087. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2088. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2089. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2090. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2091. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2092. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2093. buffer_info->time_stamp = jiffies;
  2094. if (++i == tx_ring->count) i = 0;
  2095. tx_ring->next_to_use = i;
  2096. return TRUE;
  2097. }
  2098. #endif
  2099. return FALSE;
  2100. }
  2101. static inline boolean_t
  2102. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2103. struct sk_buff *skb)
  2104. {
  2105. struct e1000_context_desc *context_desc;
  2106. struct e1000_buffer *buffer_info;
  2107. unsigned int i;
  2108. uint8_t css;
  2109. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2110. css = skb->h.raw - skb->data;
  2111. i = tx_ring->next_to_use;
  2112. buffer_info = &tx_ring->buffer_info[i];
  2113. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2114. context_desc->upper_setup.tcp_fields.tucss = css;
  2115. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2116. context_desc->upper_setup.tcp_fields.tucse = 0;
  2117. context_desc->tcp_seg_setup.data = 0;
  2118. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2119. buffer_info->time_stamp = jiffies;
  2120. if (unlikely(++i == tx_ring->count)) i = 0;
  2121. tx_ring->next_to_use = i;
  2122. return TRUE;
  2123. }
  2124. return FALSE;
  2125. }
  2126. #define E1000_MAX_TXD_PWR 12
  2127. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2128. static inline int
  2129. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2130. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2131. unsigned int nr_frags, unsigned int mss)
  2132. {
  2133. struct e1000_buffer *buffer_info;
  2134. unsigned int len = skb->len;
  2135. unsigned int offset = 0, size, count = 0, i;
  2136. unsigned int f;
  2137. len -= skb->data_len;
  2138. i = tx_ring->next_to_use;
  2139. while (len) {
  2140. buffer_info = &tx_ring->buffer_info[i];
  2141. size = min(len, max_per_txd);
  2142. #ifdef NETIF_F_TSO
  2143. /* Workaround for Controller erratum --
  2144. * descriptor for non-tso packet in a linear SKB that follows a
  2145. * tso gets written back prematurely before the data is fully
  2146. * DMA'd to the controller */
  2147. if (!skb->data_len && tx_ring->last_tx_tso &&
  2148. !skb_shinfo(skb)->tso_size) {
  2149. tx_ring->last_tx_tso = 0;
  2150. size -= 4;
  2151. }
  2152. /* Workaround for premature desc write-backs
  2153. * in TSO mode. Append 4-byte sentinel desc */
  2154. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2155. size -= 4;
  2156. #endif
  2157. /* work-around for errata 10 and it applies
  2158. * to all controllers in PCI-X mode
  2159. * The fix is to make sure that the first descriptor of a
  2160. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2161. */
  2162. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2163. (size > 2015) && count == 0))
  2164. size = 2015;
  2165. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2166. * terminating buffers within evenly-aligned dwords. */
  2167. if (unlikely(adapter->pcix_82544 &&
  2168. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2169. size > 4))
  2170. size -= 4;
  2171. buffer_info->length = size;
  2172. buffer_info->dma =
  2173. pci_map_single(adapter->pdev,
  2174. skb->data + offset,
  2175. size,
  2176. PCI_DMA_TODEVICE);
  2177. buffer_info->time_stamp = jiffies;
  2178. len -= size;
  2179. offset += size;
  2180. count++;
  2181. if (unlikely(++i == tx_ring->count)) i = 0;
  2182. }
  2183. for (f = 0; f < nr_frags; f++) {
  2184. struct skb_frag_struct *frag;
  2185. frag = &skb_shinfo(skb)->frags[f];
  2186. len = frag->size;
  2187. offset = frag->page_offset;
  2188. while (len) {
  2189. buffer_info = &tx_ring->buffer_info[i];
  2190. size = min(len, max_per_txd);
  2191. #ifdef NETIF_F_TSO
  2192. /* Workaround for premature desc write-backs
  2193. * in TSO mode. Append 4-byte sentinel desc */
  2194. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2195. size -= 4;
  2196. #endif
  2197. /* Workaround for potential 82544 hang in PCI-X.
  2198. * Avoid terminating buffers within evenly-aligned
  2199. * dwords. */
  2200. if (unlikely(adapter->pcix_82544 &&
  2201. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2202. size > 4))
  2203. size -= 4;
  2204. buffer_info->length = size;
  2205. buffer_info->dma =
  2206. pci_map_page(adapter->pdev,
  2207. frag->page,
  2208. offset,
  2209. size,
  2210. PCI_DMA_TODEVICE);
  2211. buffer_info->time_stamp = jiffies;
  2212. len -= size;
  2213. offset += size;
  2214. count++;
  2215. if (unlikely(++i == tx_ring->count)) i = 0;
  2216. }
  2217. }
  2218. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2219. tx_ring->buffer_info[i].skb = skb;
  2220. tx_ring->buffer_info[first].next_to_watch = i;
  2221. return count;
  2222. }
  2223. static inline void
  2224. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2225. int tx_flags, int count)
  2226. {
  2227. struct e1000_tx_desc *tx_desc = NULL;
  2228. struct e1000_buffer *buffer_info;
  2229. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2230. unsigned int i;
  2231. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2232. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2233. E1000_TXD_CMD_TSE;
  2234. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2235. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2236. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2237. }
  2238. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2239. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2240. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2241. }
  2242. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2243. txd_lower |= E1000_TXD_CMD_VLE;
  2244. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2245. }
  2246. i = tx_ring->next_to_use;
  2247. while (count--) {
  2248. buffer_info = &tx_ring->buffer_info[i];
  2249. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2250. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2251. tx_desc->lower.data =
  2252. cpu_to_le32(txd_lower | buffer_info->length);
  2253. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2254. if (unlikely(++i == tx_ring->count)) i = 0;
  2255. }
  2256. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2257. /* Force memory writes to complete before letting h/w
  2258. * know there are new descriptors to fetch. (Only
  2259. * applicable for weak-ordered memory model archs,
  2260. * such as IA-64). */
  2261. wmb();
  2262. tx_ring->next_to_use = i;
  2263. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2264. }
  2265. /**
  2266. * 82547 workaround to avoid controller hang in half-duplex environment.
  2267. * The workaround is to avoid queuing a large packet that would span
  2268. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2269. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2270. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2271. * to the beginning of the Tx FIFO.
  2272. **/
  2273. #define E1000_FIFO_HDR 0x10
  2274. #define E1000_82547_PAD_LEN 0x3E0
  2275. static inline int
  2276. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2277. {
  2278. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2279. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2280. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2281. if (adapter->link_duplex != HALF_DUPLEX)
  2282. goto no_fifo_stall_required;
  2283. if (atomic_read(&adapter->tx_fifo_stall))
  2284. return 1;
  2285. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2286. atomic_set(&adapter->tx_fifo_stall, 1);
  2287. return 1;
  2288. }
  2289. no_fifo_stall_required:
  2290. adapter->tx_fifo_head += skb_fifo_len;
  2291. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2292. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2293. return 0;
  2294. }
  2295. #define MINIMUM_DHCP_PACKET_SIZE 282
  2296. static inline int
  2297. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2298. {
  2299. struct e1000_hw *hw = &adapter->hw;
  2300. uint16_t length, offset;
  2301. if (vlan_tx_tag_present(skb)) {
  2302. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2303. ( adapter->hw.mng_cookie.status &
  2304. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2305. return 0;
  2306. }
  2307. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2308. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2309. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2310. const struct iphdr *ip =
  2311. (struct iphdr *)((uint8_t *)skb->data+14);
  2312. if (IPPROTO_UDP == ip->protocol) {
  2313. struct udphdr *udp =
  2314. (struct udphdr *)((uint8_t *)ip +
  2315. (ip->ihl << 2));
  2316. if (ntohs(udp->dest) == 67) {
  2317. offset = (uint8_t *)udp + 8 - skb->data;
  2318. length = skb->len - offset;
  2319. return e1000_mng_write_dhcp_info(hw,
  2320. (uint8_t *)udp + 8,
  2321. length);
  2322. }
  2323. }
  2324. }
  2325. }
  2326. return 0;
  2327. }
  2328. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2329. static int
  2330. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2331. {
  2332. struct e1000_adapter *adapter = netdev_priv(netdev);
  2333. struct e1000_tx_ring *tx_ring;
  2334. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2335. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2336. unsigned int tx_flags = 0;
  2337. unsigned int len = skb->len;
  2338. unsigned long flags;
  2339. unsigned int nr_frags = 0;
  2340. unsigned int mss = 0;
  2341. int count = 0;
  2342. int tso;
  2343. unsigned int f;
  2344. len -= skb->data_len;
  2345. tx_ring = adapter->tx_ring;
  2346. if (unlikely(skb->len <= 0)) {
  2347. dev_kfree_skb_any(skb);
  2348. return NETDEV_TX_OK;
  2349. }
  2350. #ifdef NETIF_F_TSO
  2351. mss = skb_shinfo(skb)->tso_size;
  2352. /* The controller does a simple calculation to
  2353. * make sure there is enough room in the FIFO before
  2354. * initiating the DMA for each buffer. The calc is:
  2355. * 4 = ceil(buffer len/mss). To make sure we don't
  2356. * overrun the FIFO, adjust the max buffer len if mss
  2357. * drops. */
  2358. if (mss) {
  2359. uint8_t hdr_len;
  2360. max_per_txd = min(mss << 2, max_per_txd);
  2361. max_txd_pwr = fls(max_per_txd) - 1;
  2362. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2363. * points to just header, pull a few bytes of payload from
  2364. * frags into skb->data */
  2365. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2366. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2367. switch (adapter->hw.mac_type) {
  2368. unsigned int pull_size;
  2369. case e1000_82571:
  2370. case e1000_82572:
  2371. case e1000_82573:
  2372. pull_size = min((unsigned int)4, skb->data_len);
  2373. if (!__pskb_pull_tail(skb, pull_size)) {
  2374. printk(KERN_ERR
  2375. "__pskb_pull_tail failed.\n");
  2376. dev_kfree_skb_any(skb);
  2377. return NETDEV_TX_OK;
  2378. }
  2379. len = skb->len - skb->data_len;
  2380. break;
  2381. default:
  2382. /* do nothing */
  2383. break;
  2384. }
  2385. }
  2386. }
  2387. /* reserve a descriptor for the offload context */
  2388. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2389. count++;
  2390. count++;
  2391. #else
  2392. if (skb->ip_summed == CHECKSUM_HW)
  2393. count++;
  2394. #endif
  2395. #ifdef NETIF_F_TSO
  2396. /* Controller Erratum workaround */
  2397. if (!skb->data_len && tx_ring->last_tx_tso &&
  2398. !skb_shinfo(skb)->tso_size)
  2399. count++;
  2400. #endif
  2401. count += TXD_USE_COUNT(len, max_txd_pwr);
  2402. if (adapter->pcix_82544)
  2403. count++;
  2404. /* work-around for errata 10 and it applies to all controllers
  2405. * in PCI-X mode, so add one more descriptor to the count
  2406. */
  2407. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2408. (len > 2015)))
  2409. count++;
  2410. nr_frags = skb_shinfo(skb)->nr_frags;
  2411. for (f = 0; f < nr_frags; f++)
  2412. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2413. max_txd_pwr);
  2414. if (adapter->pcix_82544)
  2415. count += nr_frags;
  2416. if (adapter->hw.tx_pkt_filtering &&
  2417. (adapter->hw.mac_type == e1000_82573))
  2418. e1000_transfer_dhcp_info(adapter, skb);
  2419. local_irq_save(flags);
  2420. if (!spin_trylock(&tx_ring->tx_lock)) {
  2421. /* Collision - tell upper layer to requeue */
  2422. local_irq_restore(flags);
  2423. return NETDEV_TX_LOCKED;
  2424. }
  2425. /* need: count + 2 desc gap to keep tail from touching
  2426. * head, otherwise try next time */
  2427. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2428. netif_stop_queue(netdev);
  2429. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2430. return NETDEV_TX_BUSY;
  2431. }
  2432. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2433. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2434. netif_stop_queue(netdev);
  2435. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2436. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2437. return NETDEV_TX_BUSY;
  2438. }
  2439. }
  2440. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2441. tx_flags |= E1000_TX_FLAGS_VLAN;
  2442. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2443. }
  2444. first = tx_ring->next_to_use;
  2445. tso = e1000_tso(adapter, tx_ring, skb);
  2446. if (tso < 0) {
  2447. dev_kfree_skb_any(skb);
  2448. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2449. return NETDEV_TX_OK;
  2450. }
  2451. if (likely(tso)) {
  2452. tx_ring->last_tx_tso = 1;
  2453. tx_flags |= E1000_TX_FLAGS_TSO;
  2454. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2455. tx_flags |= E1000_TX_FLAGS_CSUM;
  2456. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2457. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2458. * no longer assume, we must. */
  2459. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2460. tx_flags |= E1000_TX_FLAGS_IPV4;
  2461. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2462. e1000_tx_map(adapter, tx_ring, skb, first,
  2463. max_per_txd, nr_frags, mss));
  2464. netdev->trans_start = jiffies;
  2465. /* Make sure there is space in the ring for the next send. */
  2466. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2467. netif_stop_queue(netdev);
  2468. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2469. return NETDEV_TX_OK;
  2470. }
  2471. /**
  2472. * e1000_tx_timeout - Respond to a Tx Hang
  2473. * @netdev: network interface device structure
  2474. **/
  2475. static void
  2476. e1000_tx_timeout(struct net_device *netdev)
  2477. {
  2478. struct e1000_adapter *adapter = netdev_priv(netdev);
  2479. /* Do the reset outside of interrupt context */
  2480. adapter->tx_timeout_count++;
  2481. schedule_work(&adapter->reset_task);
  2482. }
  2483. static void
  2484. e1000_reset_task(struct net_device *netdev)
  2485. {
  2486. struct e1000_adapter *adapter = netdev_priv(netdev);
  2487. e1000_down(adapter);
  2488. e1000_up(adapter);
  2489. }
  2490. /**
  2491. * e1000_get_stats - Get System Network Statistics
  2492. * @netdev: network interface device structure
  2493. *
  2494. * Returns the address of the device statistics structure.
  2495. * The statistics are actually updated from the timer callback.
  2496. **/
  2497. static struct net_device_stats *
  2498. e1000_get_stats(struct net_device *netdev)
  2499. {
  2500. struct e1000_adapter *adapter = netdev_priv(netdev);
  2501. /* only return the current stats */
  2502. return &adapter->net_stats;
  2503. }
  2504. /**
  2505. * e1000_change_mtu - Change the Maximum Transfer Unit
  2506. * @netdev: network interface device structure
  2507. * @new_mtu: new value for maximum frame size
  2508. *
  2509. * Returns 0 on success, negative on failure
  2510. **/
  2511. static int
  2512. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2513. {
  2514. struct e1000_adapter *adapter = netdev_priv(netdev);
  2515. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2516. uint16_t eeprom_data = 0;
  2517. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2518. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2519. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2520. return -EINVAL;
  2521. }
  2522. /* Adapter-specific max frame size limits. */
  2523. switch (adapter->hw.mac_type) {
  2524. case e1000_82542_rev2_0:
  2525. case e1000_82542_rev2_1:
  2526. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2527. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2528. return -EINVAL;
  2529. }
  2530. break;
  2531. case e1000_82573:
  2532. /* only enable jumbo frames if ASPM is disabled completely
  2533. * this means both bits must be zero in 0x1A bits 3:2 */
  2534. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2535. &eeprom_data);
  2536. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2537. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2538. DPRINTK(PROBE, ERR,
  2539. "Jumbo Frames not supported.\n");
  2540. return -EINVAL;
  2541. }
  2542. break;
  2543. }
  2544. /* fall through to get support */
  2545. case e1000_82571:
  2546. case e1000_82572:
  2547. case e1000_80003es2lan:
  2548. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2549. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2550. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2551. return -EINVAL;
  2552. }
  2553. break;
  2554. default:
  2555. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2556. break;
  2557. }
  2558. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2559. adapter->rx_buffer_len = max_frame;
  2560. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2561. } else {
  2562. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2563. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2564. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2565. "on 82542\n");
  2566. return -EINVAL;
  2567. } else {
  2568. if(max_frame <= E1000_RXBUFFER_2048)
  2569. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2570. else if(max_frame <= E1000_RXBUFFER_4096)
  2571. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2572. else if(max_frame <= E1000_RXBUFFER_8192)
  2573. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2574. else if(max_frame <= E1000_RXBUFFER_16384)
  2575. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2576. }
  2577. }
  2578. netdev->mtu = new_mtu;
  2579. if (netif_running(netdev)) {
  2580. e1000_down(adapter);
  2581. e1000_up(adapter);
  2582. }
  2583. adapter->hw.max_frame_size = max_frame;
  2584. return 0;
  2585. }
  2586. /**
  2587. * e1000_update_stats - Update the board statistics counters
  2588. * @adapter: board private structure
  2589. **/
  2590. void
  2591. e1000_update_stats(struct e1000_adapter *adapter)
  2592. {
  2593. struct e1000_hw *hw = &adapter->hw;
  2594. unsigned long flags;
  2595. uint16_t phy_tmp;
  2596. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2597. spin_lock_irqsave(&adapter->stats_lock, flags);
  2598. /* these counters are modified from e1000_adjust_tbi_stats,
  2599. * called from the interrupt context, so they must only
  2600. * be written while holding adapter->stats_lock
  2601. */
  2602. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2603. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2604. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2605. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2606. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2607. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2608. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2609. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2610. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2611. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2612. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2613. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2614. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2615. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2616. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2617. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2618. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2619. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2620. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2621. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2622. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2623. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2624. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2625. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2626. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2627. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2628. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2629. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2630. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2631. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2632. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2633. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2634. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2635. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2636. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2637. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2638. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2639. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2640. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2641. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2642. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2643. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2644. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2645. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2646. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2647. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2648. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2649. /* used for adaptive IFS */
  2650. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2651. adapter->stats.tpt += hw->tx_packet_delta;
  2652. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2653. adapter->stats.colc += hw->collision_delta;
  2654. if (hw->mac_type >= e1000_82543) {
  2655. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2656. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2657. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2658. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2659. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2660. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2661. }
  2662. if (hw->mac_type > e1000_82547_rev_2) {
  2663. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2664. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2665. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2666. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2667. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2668. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2669. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2670. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2671. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2672. }
  2673. /* Fill out the OS statistics structure */
  2674. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2675. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2676. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2677. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2678. adapter->net_stats.multicast = adapter->stats.mprc;
  2679. adapter->net_stats.collisions = adapter->stats.colc;
  2680. /* Rx Errors */
  2681. /* RLEC on some newer hardware can be incorrect so build
  2682. * our own version based on RUC and ROC */
  2683. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2684. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2685. adapter->stats.ruc + adapter->stats.roc +
  2686. adapter->stats.cexterr;
  2687. adapter->net_stats.rx_dropped = 0;
  2688. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2689. adapter->stats.roc;
  2690. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2691. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2692. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2693. /* Tx Errors */
  2694. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2695. adapter->stats.latecol;
  2696. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2697. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2698. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2699. /* Tx Dropped needs to be maintained elsewhere */
  2700. /* Phy Stats */
  2701. if (hw->media_type == e1000_media_type_copper) {
  2702. if ((adapter->link_speed == SPEED_1000) &&
  2703. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2704. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2705. adapter->phy_stats.idle_errors += phy_tmp;
  2706. }
  2707. if ((hw->mac_type <= e1000_82546) &&
  2708. (hw->phy_type == e1000_phy_m88) &&
  2709. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2710. adapter->phy_stats.receive_errors += phy_tmp;
  2711. }
  2712. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2713. }
  2714. /**
  2715. * e1000_intr - Interrupt Handler
  2716. * @irq: interrupt number
  2717. * @data: pointer to a network interface device structure
  2718. * @pt_regs: CPU registers structure
  2719. **/
  2720. static irqreturn_t
  2721. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2722. {
  2723. struct net_device *netdev = data;
  2724. struct e1000_adapter *adapter = netdev_priv(netdev);
  2725. struct e1000_hw *hw = &adapter->hw;
  2726. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2727. #ifndef CONFIG_E1000_NAPI
  2728. int i;
  2729. #else
  2730. /* Interrupt Auto-Mask...upon reading ICR,
  2731. * interrupts are masked. No need for the
  2732. * IMC write, but it does mean we should
  2733. * account for it ASAP. */
  2734. if (likely(hw->mac_type >= e1000_82571))
  2735. atomic_inc(&adapter->irq_sem);
  2736. #endif
  2737. if (unlikely(!icr)) {
  2738. #ifdef CONFIG_E1000_NAPI
  2739. if (hw->mac_type >= e1000_82571)
  2740. e1000_irq_enable(adapter);
  2741. #endif
  2742. return IRQ_NONE; /* Not our interrupt */
  2743. }
  2744. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2745. hw->get_link_status = 1;
  2746. /* 80003ES2LAN workaround--
  2747. * For packet buffer work-around on link down event;
  2748. * disable receives here in the ISR and
  2749. * reset adapter in watchdog
  2750. */
  2751. if (netif_carrier_ok(netdev) &&
  2752. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2753. /* disable receives */
  2754. rctl = E1000_READ_REG(hw, RCTL);
  2755. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2756. }
  2757. mod_timer(&adapter->watchdog_timer, jiffies);
  2758. }
  2759. #ifdef CONFIG_E1000_NAPI
  2760. if (unlikely(hw->mac_type < e1000_82571)) {
  2761. atomic_inc(&adapter->irq_sem);
  2762. E1000_WRITE_REG(hw, IMC, ~0);
  2763. E1000_WRITE_FLUSH(hw);
  2764. }
  2765. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2766. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2767. else
  2768. e1000_irq_enable(adapter);
  2769. #else
  2770. /* Writing IMC and IMS is needed for 82547.
  2771. * Due to Hub Link bus being occupied, an interrupt
  2772. * de-assertion message is not able to be sent.
  2773. * When an interrupt assertion message is generated later,
  2774. * two messages are re-ordered and sent out.
  2775. * That causes APIC to think 82547 is in de-assertion
  2776. * state, while 82547 is in assertion state, resulting
  2777. * in dead lock. Writing IMC forces 82547 into
  2778. * de-assertion state.
  2779. */
  2780. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2781. atomic_inc(&adapter->irq_sem);
  2782. E1000_WRITE_REG(hw, IMC, ~0);
  2783. }
  2784. for (i = 0; i < E1000_MAX_INTR; i++)
  2785. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2786. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2787. break;
  2788. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2789. e1000_irq_enable(adapter);
  2790. #endif
  2791. return IRQ_HANDLED;
  2792. }
  2793. #ifdef CONFIG_E1000_NAPI
  2794. /**
  2795. * e1000_clean - NAPI Rx polling callback
  2796. * @adapter: board private structure
  2797. **/
  2798. static int
  2799. e1000_clean(struct net_device *poll_dev, int *budget)
  2800. {
  2801. struct e1000_adapter *adapter;
  2802. int work_to_do = min(*budget, poll_dev->quota);
  2803. int tx_cleaned = 0, i = 0, work_done = 0;
  2804. /* Must NOT use netdev_priv macro here. */
  2805. adapter = poll_dev->priv;
  2806. /* Keep link state information with original netdev */
  2807. if (!netif_carrier_ok(adapter->netdev))
  2808. goto quit_polling;
  2809. while (poll_dev != &adapter->polling_netdev[i]) {
  2810. i++;
  2811. BUG_ON(i == adapter->num_rx_queues);
  2812. }
  2813. if (likely(adapter->num_tx_queues == 1)) {
  2814. /* e1000_clean is called per-cpu. This lock protects
  2815. * tx_ring[0] from being cleaned by multiple cpus
  2816. * simultaneously. A failure obtaining the lock means
  2817. * tx_ring[0] is currently being cleaned anyway. */
  2818. if (spin_trylock(&adapter->tx_queue_lock)) {
  2819. tx_cleaned = e1000_clean_tx_irq(adapter,
  2820. &adapter->tx_ring[0]);
  2821. spin_unlock(&adapter->tx_queue_lock);
  2822. }
  2823. } else
  2824. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2825. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2826. &work_done, work_to_do);
  2827. *budget -= work_done;
  2828. poll_dev->quota -= work_done;
  2829. /* If no Tx and not enough Rx work done, exit the polling mode */
  2830. if ((!tx_cleaned && (work_done == 0)) ||
  2831. !netif_running(adapter->netdev)) {
  2832. quit_polling:
  2833. netif_rx_complete(poll_dev);
  2834. e1000_irq_enable(adapter);
  2835. return 0;
  2836. }
  2837. return 1;
  2838. }
  2839. #endif
  2840. /**
  2841. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2842. * @adapter: board private structure
  2843. **/
  2844. static boolean_t
  2845. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2846. struct e1000_tx_ring *tx_ring)
  2847. {
  2848. struct net_device *netdev = adapter->netdev;
  2849. struct e1000_tx_desc *tx_desc, *eop_desc;
  2850. struct e1000_buffer *buffer_info;
  2851. unsigned int i, eop;
  2852. #ifdef CONFIG_E1000_NAPI
  2853. unsigned int count = 0;
  2854. #endif
  2855. boolean_t cleaned = FALSE;
  2856. i = tx_ring->next_to_clean;
  2857. eop = tx_ring->buffer_info[i].next_to_watch;
  2858. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2859. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2860. for (cleaned = FALSE; !cleaned; ) {
  2861. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2862. buffer_info = &tx_ring->buffer_info[i];
  2863. cleaned = (i == eop);
  2864. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2865. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2866. if (unlikely(++i == tx_ring->count)) i = 0;
  2867. }
  2868. eop = tx_ring->buffer_info[i].next_to_watch;
  2869. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2870. #ifdef CONFIG_E1000_NAPI
  2871. #define E1000_TX_WEIGHT 64
  2872. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2873. if (count++ == E1000_TX_WEIGHT) break;
  2874. #endif
  2875. }
  2876. tx_ring->next_to_clean = i;
  2877. spin_lock(&tx_ring->tx_lock);
  2878. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2879. netif_carrier_ok(netdev)))
  2880. netif_wake_queue(netdev);
  2881. spin_unlock(&tx_ring->tx_lock);
  2882. if (adapter->detect_tx_hung) {
  2883. /* Detect a transmit hang in hardware, this serializes the
  2884. * check with the clearing of time_stamp and movement of i */
  2885. adapter->detect_tx_hung = FALSE;
  2886. if (tx_ring->buffer_info[eop].dma &&
  2887. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2888. (adapter->tx_timeout_factor * HZ))
  2889. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2890. E1000_STATUS_TXOFF)) {
  2891. /* detected Tx unit hang */
  2892. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2893. " Tx Queue <%lu>\n"
  2894. " TDH <%x>\n"
  2895. " TDT <%x>\n"
  2896. " next_to_use <%x>\n"
  2897. " next_to_clean <%x>\n"
  2898. "buffer_info[next_to_clean]\n"
  2899. " time_stamp <%lx>\n"
  2900. " next_to_watch <%x>\n"
  2901. " jiffies <%lx>\n"
  2902. " next_to_watch.status <%x>\n",
  2903. (unsigned long)((tx_ring - adapter->tx_ring) /
  2904. sizeof(struct e1000_tx_ring)),
  2905. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2906. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2907. tx_ring->next_to_use,
  2908. tx_ring->next_to_clean,
  2909. tx_ring->buffer_info[eop].time_stamp,
  2910. eop,
  2911. jiffies,
  2912. eop_desc->upper.fields.status);
  2913. netif_stop_queue(netdev);
  2914. }
  2915. }
  2916. return cleaned;
  2917. }
  2918. /**
  2919. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2920. * @adapter: board private structure
  2921. * @status_err: receive descriptor status and error fields
  2922. * @csum: receive descriptor csum field
  2923. * @sk_buff: socket buffer with received data
  2924. **/
  2925. static inline void
  2926. e1000_rx_checksum(struct e1000_adapter *adapter,
  2927. uint32_t status_err, uint32_t csum,
  2928. struct sk_buff *skb)
  2929. {
  2930. uint16_t status = (uint16_t)status_err;
  2931. uint8_t errors = (uint8_t)(status_err >> 24);
  2932. skb->ip_summed = CHECKSUM_NONE;
  2933. /* 82543 or newer only */
  2934. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2935. /* Ignore Checksum bit is set */
  2936. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2937. /* TCP/UDP checksum error bit is set */
  2938. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2939. /* let the stack verify checksum errors */
  2940. adapter->hw_csum_err++;
  2941. return;
  2942. }
  2943. /* TCP/UDP Checksum has not been calculated */
  2944. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  2945. if (!(status & E1000_RXD_STAT_TCPCS))
  2946. return;
  2947. } else {
  2948. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2949. return;
  2950. }
  2951. /* It must be a TCP or UDP packet with a valid checksum */
  2952. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2953. /* TCP checksum is good */
  2954. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2955. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2956. /* IP fragment with UDP payload */
  2957. /* Hardware complements the payload checksum, so we undo it
  2958. * and then put the value in host order for further stack use.
  2959. */
  2960. csum = ntohl(csum ^ 0xFFFF);
  2961. skb->csum = csum;
  2962. skb->ip_summed = CHECKSUM_HW;
  2963. }
  2964. adapter->hw_csum_good++;
  2965. }
  2966. /**
  2967. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2968. * @adapter: board private structure
  2969. **/
  2970. static boolean_t
  2971. #ifdef CONFIG_E1000_NAPI
  2972. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2973. struct e1000_rx_ring *rx_ring,
  2974. int *work_done, int work_to_do)
  2975. #else
  2976. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2977. struct e1000_rx_ring *rx_ring)
  2978. #endif
  2979. {
  2980. struct net_device *netdev = adapter->netdev;
  2981. struct pci_dev *pdev = adapter->pdev;
  2982. struct e1000_rx_desc *rx_desc, *next_rxd;
  2983. struct e1000_buffer *buffer_info, *next_buffer;
  2984. unsigned long flags;
  2985. uint32_t length;
  2986. uint8_t last_byte;
  2987. unsigned int i;
  2988. int cleaned_count = 0;
  2989. boolean_t cleaned = FALSE;
  2990. i = rx_ring->next_to_clean;
  2991. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2992. buffer_info = &rx_ring->buffer_info[i];
  2993. while (rx_desc->status & E1000_RXD_STAT_DD) {
  2994. struct sk_buff *skb, *next_skb;
  2995. u8 status;
  2996. #ifdef CONFIG_E1000_NAPI
  2997. if (*work_done >= work_to_do)
  2998. break;
  2999. (*work_done)++;
  3000. #endif
  3001. status = rx_desc->status;
  3002. skb = buffer_info->skb;
  3003. buffer_info->skb = NULL;
  3004. prefetch(skb->data - NET_IP_ALIGN);
  3005. if (++i == rx_ring->count) i = 0;
  3006. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3007. prefetch(next_rxd);
  3008. next_buffer = &rx_ring->buffer_info[i];
  3009. next_skb = next_buffer->skb;
  3010. prefetch(next_skb->data - NET_IP_ALIGN);
  3011. cleaned = TRUE;
  3012. cleaned_count++;
  3013. pci_unmap_single(pdev,
  3014. buffer_info->dma,
  3015. buffer_info->length,
  3016. PCI_DMA_FROMDEVICE);
  3017. length = le16_to_cpu(rx_desc->length);
  3018. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3019. /* All receives must fit into a single buffer */
  3020. E1000_DBG("%s: Receive packet consumed multiple"
  3021. " buffers\n", netdev->name);
  3022. dev_kfree_skb_irq(skb);
  3023. goto next_desc;
  3024. }
  3025. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3026. last_byte = *(skb->data + length - 1);
  3027. if (TBI_ACCEPT(&adapter->hw, status,
  3028. rx_desc->errors, length, last_byte)) {
  3029. spin_lock_irqsave(&adapter->stats_lock, flags);
  3030. e1000_tbi_adjust_stats(&adapter->hw,
  3031. &adapter->stats,
  3032. length, skb->data);
  3033. spin_unlock_irqrestore(&adapter->stats_lock,
  3034. flags);
  3035. length--;
  3036. } else {
  3037. dev_kfree_skb_irq(skb);
  3038. goto next_desc;
  3039. }
  3040. }
  3041. /* code added for copybreak, this should improve
  3042. * performance for small packets with large amounts
  3043. * of reassembly being done in the stack */
  3044. #define E1000_CB_LENGTH 256
  3045. if (length < E1000_CB_LENGTH) {
  3046. struct sk_buff *new_skb =
  3047. dev_alloc_skb(length + NET_IP_ALIGN);
  3048. if (new_skb) {
  3049. skb_reserve(new_skb, NET_IP_ALIGN);
  3050. new_skb->dev = netdev;
  3051. memcpy(new_skb->data - NET_IP_ALIGN,
  3052. skb->data - NET_IP_ALIGN,
  3053. length + NET_IP_ALIGN);
  3054. /* save the skb in buffer_info as good */
  3055. buffer_info->skb = skb;
  3056. skb = new_skb;
  3057. skb_put(skb, length);
  3058. }
  3059. } else
  3060. skb_put(skb, length);
  3061. /* end copybreak code */
  3062. /* Receive Checksum Offload */
  3063. e1000_rx_checksum(adapter,
  3064. (uint32_t)(status) |
  3065. ((uint32_t)(rx_desc->errors) << 24),
  3066. le16_to_cpu(rx_desc->csum), skb);
  3067. skb->protocol = eth_type_trans(skb, netdev);
  3068. #ifdef CONFIG_E1000_NAPI
  3069. if (unlikely(adapter->vlgrp &&
  3070. (status & E1000_RXD_STAT_VP))) {
  3071. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3072. le16_to_cpu(rx_desc->special) &
  3073. E1000_RXD_SPC_VLAN_MASK);
  3074. } else {
  3075. netif_receive_skb(skb);
  3076. }
  3077. #else /* CONFIG_E1000_NAPI */
  3078. if (unlikely(adapter->vlgrp &&
  3079. (status & E1000_RXD_STAT_VP))) {
  3080. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3081. le16_to_cpu(rx_desc->special) &
  3082. E1000_RXD_SPC_VLAN_MASK);
  3083. } else {
  3084. netif_rx(skb);
  3085. }
  3086. #endif /* CONFIG_E1000_NAPI */
  3087. netdev->last_rx = jiffies;
  3088. next_desc:
  3089. rx_desc->status = 0;
  3090. /* return some buffers to hardware, one at a time is too slow */
  3091. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3092. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3093. cleaned_count = 0;
  3094. }
  3095. /* use prefetched values */
  3096. rx_desc = next_rxd;
  3097. buffer_info = next_buffer;
  3098. }
  3099. rx_ring->next_to_clean = i;
  3100. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3101. if (cleaned_count)
  3102. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3103. return cleaned;
  3104. }
  3105. /**
  3106. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3107. * @adapter: board private structure
  3108. **/
  3109. static boolean_t
  3110. #ifdef CONFIG_E1000_NAPI
  3111. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3112. struct e1000_rx_ring *rx_ring,
  3113. int *work_done, int work_to_do)
  3114. #else
  3115. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3116. struct e1000_rx_ring *rx_ring)
  3117. #endif
  3118. {
  3119. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3120. struct net_device *netdev = adapter->netdev;
  3121. struct pci_dev *pdev = adapter->pdev;
  3122. struct e1000_buffer *buffer_info, *next_buffer;
  3123. struct e1000_ps_page *ps_page;
  3124. struct e1000_ps_page_dma *ps_page_dma;
  3125. struct sk_buff *skb, *next_skb;
  3126. unsigned int i, j;
  3127. uint32_t length, staterr;
  3128. int cleaned_count = 0;
  3129. boolean_t cleaned = FALSE;
  3130. i = rx_ring->next_to_clean;
  3131. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3132. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3133. while (staterr & E1000_RXD_STAT_DD) {
  3134. buffer_info = &rx_ring->buffer_info[i];
  3135. ps_page = &rx_ring->ps_page[i];
  3136. ps_page_dma = &rx_ring->ps_page_dma[i];
  3137. #ifdef CONFIG_E1000_NAPI
  3138. if (unlikely(*work_done >= work_to_do))
  3139. break;
  3140. (*work_done)++;
  3141. #endif
  3142. skb = buffer_info->skb;
  3143. /* in the packet split case this is header only */
  3144. prefetch(skb->data - NET_IP_ALIGN);
  3145. if (++i == rx_ring->count) i = 0;
  3146. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3147. prefetch(next_rxd);
  3148. next_buffer = &rx_ring->buffer_info[i];
  3149. next_skb = next_buffer->skb;
  3150. prefetch(next_skb->data - NET_IP_ALIGN);
  3151. cleaned = TRUE;
  3152. cleaned_count++;
  3153. pci_unmap_single(pdev, buffer_info->dma,
  3154. buffer_info->length,
  3155. PCI_DMA_FROMDEVICE);
  3156. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3157. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3158. " the full packet\n", netdev->name);
  3159. dev_kfree_skb_irq(skb);
  3160. goto next_desc;
  3161. }
  3162. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3163. dev_kfree_skb_irq(skb);
  3164. goto next_desc;
  3165. }
  3166. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3167. if (unlikely(!length)) {
  3168. E1000_DBG("%s: Last part of the packet spanning"
  3169. " multiple descriptors\n", netdev->name);
  3170. dev_kfree_skb_irq(skb);
  3171. goto next_desc;
  3172. }
  3173. /* Good Receive */
  3174. skb_put(skb, length);
  3175. {
  3176. /* this looks ugly, but it seems compiler issues make it
  3177. more efficient than reusing j */
  3178. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3179. /* page alloc/put takes too long and effects small packet
  3180. * throughput, so unsplit small packets and save the alloc/put*/
  3181. if (l1 && ((length + l1) < E1000_CB_LENGTH)) {
  3182. u8 *vaddr;
  3183. /* there is no documentation about how to call
  3184. * kmap_atomic, so we can't hold the mapping
  3185. * very long */
  3186. pci_dma_sync_single_for_cpu(pdev,
  3187. ps_page_dma->ps_page_dma[0],
  3188. PAGE_SIZE,
  3189. PCI_DMA_FROMDEVICE);
  3190. vaddr = kmap_atomic(ps_page->ps_page[0],
  3191. KM_SKB_DATA_SOFTIRQ);
  3192. memcpy(skb->tail, vaddr, l1);
  3193. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3194. pci_dma_sync_single_for_device(pdev,
  3195. ps_page_dma->ps_page_dma[0],
  3196. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3197. skb_put(skb, l1);
  3198. length += l1;
  3199. goto copydone;
  3200. } /* if */
  3201. }
  3202. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3203. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3204. break;
  3205. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3206. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3207. ps_page_dma->ps_page_dma[j] = 0;
  3208. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3209. length);
  3210. ps_page->ps_page[j] = NULL;
  3211. skb->len += length;
  3212. skb->data_len += length;
  3213. }
  3214. copydone:
  3215. e1000_rx_checksum(adapter, staterr,
  3216. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3217. skb->protocol = eth_type_trans(skb, netdev);
  3218. if (likely(rx_desc->wb.upper.header_status &
  3219. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3220. adapter->rx_hdr_split++;
  3221. #ifdef CONFIG_E1000_NAPI
  3222. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3223. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3224. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3225. E1000_RXD_SPC_VLAN_MASK);
  3226. } else {
  3227. netif_receive_skb(skb);
  3228. }
  3229. #else /* CONFIG_E1000_NAPI */
  3230. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3231. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3232. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3233. E1000_RXD_SPC_VLAN_MASK);
  3234. } else {
  3235. netif_rx(skb);
  3236. }
  3237. #endif /* CONFIG_E1000_NAPI */
  3238. netdev->last_rx = jiffies;
  3239. next_desc:
  3240. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3241. buffer_info->skb = NULL;
  3242. /* return some buffers to hardware, one at a time is too slow */
  3243. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3244. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3245. cleaned_count = 0;
  3246. }
  3247. /* use prefetched values */
  3248. rx_desc = next_rxd;
  3249. buffer_info = next_buffer;
  3250. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3251. }
  3252. rx_ring->next_to_clean = i;
  3253. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3254. if (cleaned_count)
  3255. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3256. return cleaned;
  3257. }
  3258. /**
  3259. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3260. * @adapter: address of board private structure
  3261. **/
  3262. static void
  3263. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3264. struct e1000_rx_ring *rx_ring,
  3265. int cleaned_count)
  3266. {
  3267. struct net_device *netdev = adapter->netdev;
  3268. struct pci_dev *pdev = adapter->pdev;
  3269. struct e1000_rx_desc *rx_desc;
  3270. struct e1000_buffer *buffer_info;
  3271. struct sk_buff *skb;
  3272. unsigned int i;
  3273. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3274. i = rx_ring->next_to_use;
  3275. buffer_info = &rx_ring->buffer_info[i];
  3276. while (cleaned_count--) {
  3277. if (!(skb = buffer_info->skb))
  3278. skb = dev_alloc_skb(bufsz);
  3279. else {
  3280. skb_trim(skb, 0);
  3281. goto map_skb;
  3282. }
  3283. if (unlikely(!skb)) {
  3284. /* Better luck next round */
  3285. adapter->alloc_rx_buff_failed++;
  3286. break;
  3287. }
  3288. /* Fix for errata 23, can't cross 64kB boundary */
  3289. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3290. struct sk_buff *oldskb = skb;
  3291. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3292. "at %p\n", bufsz, skb->data);
  3293. /* Try again, without freeing the previous */
  3294. skb = dev_alloc_skb(bufsz);
  3295. /* Failed allocation, critical failure */
  3296. if (!skb) {
  3297. dev_kfree_skb(oldskb);
  3298. break;
  3299. }
  3300. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3301. /* give up */
  3302. dev_kfree_skb(skb);
  3303. dev_kfree_skb(oldskb);
  3304. break; /* while !buffer_info->skb */
  3305. } else {
  3306. /* Use new allocation */
  3307. dev_kfree_skb(oldskb);
  3308. }
  3309. }
  3310. /* Make buffer alignment 2 beyond a 16 byte boundary
  3311. * this will result in a 16 byte aligned IP header after
  3312. * the 14 byte MAC header is removed
  3313. */
  3314. skb_reserve(skb, NET_IP_ALIGN);
  3315. skb->dev = netdev;
  3316. buffer_info->skb = skb;
  3317. buffer_info->length = adapter->rx_buffer_len;
  3318. map_skb:
  3319. buffer_info->dma = pci_map_single(pdev,
  3320. skb->data,
  3321. adapter->rx_buffer_len,
  3322. PCI_DMA_FROMDEVICE);
  3323. /* Fix for errata 23, can't cross 64kB boundary */
  3324. if (!e1000_check_64k_bound(adapter,
  3325. (void *)(unsigned long)buffer_info->dma,
  3326. adapter->rx_buffer_len)) {
  3327. DPRINTK(RX_ERR, ERR,
  3328. "dma align check failed: %u bytes at %p\n",
  3329. adapter->rx_buffer_len,
  3330. (void *)(unsigned long)buffer_info->dma);
  3331. dev_kfree_skb(skb);
  3332. buffer_info->skb = NULL;
  3333. pci_unmap_single(pdev, buffer_info->dma,
  3334. adapter->rx_buffer_len,
  3335. PCI_DMA_FROMDEVICE);
  3336. break; /* while !buffer_info->skb */
  3337. }
  3338. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3339. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3340. if (unlikely(++i == rx_ring->count))
  3341. i = 0;
  3342. buffer_info = &rx_ring->buffer_info[i];
  3343. }
  3344. if (likely(rx_ring->next_to_use != i)) {
  3345. rx_ring->next_to_use = i;
  3346. if (unlikely(i-- == 0))
  3347. i = (rx_ring->count - 1);
  3348. /* Force memory writes to complete before letting h/w
  3349. * know there are new descriptors to fetch. (Only
  3350. * applicable for weak-ordered memory model archs,
  3351. * such as IA-64). */
  3352. wmb();
  3353. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3354. }
  3355. }
  3356. /**
  3357. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3358. * @adapter: address of board private structure
  3359. **/
  3360. static void
  3361. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3362. struct e1000_rx_ring *rx_ring,
  3363. int cleaned_count)
  3364. {
  3365. struct net_device *netdev = adapter->netdev;
  3366. struct pci_dev *pdev = adapter->pdev;
  3367. union e1000_rx_desc_packet_split *rx_desc;
  3368. struct e1000_buffer *buffer_info;
  3369. struct e1000_ps_page *ps_page;
  3370. struct e1000_ps_page_dma *ps_page_dma;
  3371. struct sk_buff *skb;
  3372. unsigned int i, j;
  3373. i = rx_ring->next_to_use;
  3374. buffer_info = &rx_ring->buffer_info[i];
  3375. ps_page = &rx_ring->ps_page[i];
  3376. ps_page_dma = &rx_ring->ps_page_dma[i];
  3377. while (cleaned_count--) {
  3378. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3379. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3380. if (j < adapter->rx_ps_pages) {
  3381. if (likely(!ps_page->ps_page[j])) {
  3382. ps_page->ps_page[j] =
  3383. alloc_page(GFP_ATOMIC);
  3384. if (unlikely(!ps_page->ps_page[j])) {
  3385. adapter->alloc_rx_buff_failed++;
  3386. goto no_buffers;
  3387. }
  3388. ps_page_dma->ps_page_dma[j] =
  3389. pci_map_page(pdev,
  3390. ps_page->ps_page[j],
  3391. 0, PAGE_SIZE,
  3392. PCI_DMA_FROMDEVICE);
  3393. }
  3394. /* Refresh the desc even if buffer_addrs didn't
  3395. * change because each write-back erases
  3396. * this info.
  3397. */
  3398. rx_desc->read.buffer_addr[j+1] =
  3399. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3400. } else
  3401. rx_desc->read.buffer_addr[j+1] = ~0;
  3402. }
  3403. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3404. if (unlikely(!skb)) {
  3405. adapter->alloc_rx_buff_failed++;
  3406. break;
  3407. }
  3408. /* Make buffer alignment 2 beyond a 16 byte boundary
  3409. * this will result in a 16 byte aligned IP header after
  3410. * the 14 byte MAC header is removed
  3411. */
  3412. skb_reserve(skb, NET_IP_ALIGN);
  3413. skb->dev = netdev;
  3414. buffer_info->skb = skb;
  3415. buffer_info->length = adapter->rx_ps_bsize0;
  3416. buffer_info->dma = pci_map_single(pdev, skb->data,
  3417. adapter->rx_ps_bsize0,
  3418. PCI_DMA_FROMDEVICE);
  3419. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3420. if (unlikely(++i == rx_ring->count)) i = 0;
  3421. buffer_info = &rx_ring->buffer_info[i];
  3422. ps_page = &rx_ring->ps_page[i];
  3423. ps_page_dma = &rx_ring->ps_page_dma[i];
  3424. }
  3425. no_buffers:
  3426. if (likely(rx_ring->next_to_use != i)) {
  3427. rx_ring->next_to_use = i;
  3428. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3429. /* Force memory writes to complete before letting h/w
  3430. * know there are new descriptors to fetch. (Only
  3431. * applicable for weak-ordered memory model archs,
  3432. * such as IA-64). */
  3433. wmb();
  3434. /* Hardware increments by 16 bytes, but packet split
  3435. * descriptors are 32 bytes...so we increment tail
  3436. * twice as much.
  3437. */
  3438. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3439. }
  3440. }
  3441. /**
  3442. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3443. * @adapter:
  3444. **/
  3445. static void
  3446. e1000_smartspeed(struct e1000_adapter *adapter)
  3447. {
  3448. uint16_t phy_status;
  3449. uint16_t phy_ctrl;
  3450. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3451. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3452. return;
  3453. if (adapter->smartspeed == 0) {
  3454. /* If Master/Slave config fault is asserted twice,
  3455. * we assume back-to-back */
  3456. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3457. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3458. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3459. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3460. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3461. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3462. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3463. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3464. phy_ctrl);
  3465. adapter->smartspeed++;
  3466. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3467. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3468. &phy_ctrl)) {
  3469. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3470. MII_CR_RESTART_AUTO_NEG);
  3471. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3472. phy_ctrl);
  3473. }
  3474. }
  3475. return;
  3476. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3477. /* If still no link, perhaps using 2/3 pair cable */
  3478. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3479. phy_ctrl |= CR_1000T_MS_ENABLE;
  3480. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3481. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3482. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3483. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3484. MII_CR_RESTART_AUTO_NEG);
  3485. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3486. }
  3487. }
  3488. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3489. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3490. adapter->smartspeed = 0;
  3491. }
  3492. /**
  3493. * e1000_ioctl -
  3494. * @netdev:
  3495. * @ifreq:
  3496. * @cmd:
  3497. **/
  3498. static int
  3499. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3500. {
  3501. switch (cmd) {
  3502. case SIOCGMIIPHY:
  3503. case SIOCGMIIREG:
  3504. case SIOCSMIIREG:
  3505. return e1000_mii_ioctl(netdev, ifr, cmd);
  3506. default:
  3507. return -EOPNOTSUPP;
  3508. }
  3509. }
  3510. /**
  3511. * e1000_mii_ioctl -
  3512. * @netdev:
  3513. * @ifreq:
  3514. * @cmd:
  3515. **/
  3516. static int
  3517. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3518. {
  3519. struct e1000_adapter *adapter = netdev_priv(netdev);
  3520. struct mii_ioctl_data *data = if_mii(ifr);
  3521. int retval;
  3522. uint16_t mii_reg;
  3523. uint16_t spddplx;
  3524. unsigned long flags;
  3525. if (adapter->hw.media_type != e1000_media_type_copper)
  3526. return -EOPNOTSUPP;
  3527. switch (cmd) {
  3528. case SIOCGMIIPHY:
  3529. data->phy_id = adapter->hw.phy_addr;
  3530. break;
  3531. case SIOCGMIIREG:
  3532. if (!capable(CAP_NET_ADMIN))
  3533. return -EPERM;
  3534. spin_lock_irqsave(&adapter->stats_lock, flags);
  3535. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3536. &data->val_out)) {
  3537. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3538. return -EIO;
  3539. }
  3540. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3541. break;
  3542. case SIOCSMIIREG:
  3543. if (!capable(CAP_NET_ADMIN))
  3544. return -EPERM;
  3545. if (data->reg_num & ~(0x1F))
  3546. return -EFAULT;
  3547. mii_reg = data->val_in;
  3548. spin_lock_irqsave(&adapter->stats_lock, flags);
  3549. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3550. mii_reg)) {
  3551. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3552. return -EIO;
  3553. }
  3554. if (adapter->hw.phy_type == e1000_media_type_copper) {
  3555. switch (data->reg_num) {
  3556. case PHY_CTRL:
  3557. if (mii_reg & MII_CR_POWER_DOWN)
  3558. break;
  3559. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3560. adapter->hw.autoneg = 1;
  3561. adapter->hw.autoneg_advertised = 0x2F;
  3562. } else {
  3563. if (mii_reg & 0x40)
  3564. spddplx = SPEED_1000;
  3565. else if (mii_reg & 0x2000)
  3566. spddplx = SPEED_100;
  3567. else
  3568. spddplx = SPEED_10;
  3569. spddplx += (mii_reg & 0x100)
  3570. ? DUPLEX_FULL :
  3571. DUPLEX_HALF;
  3572. retval = e1000_set_spd_dplx(adapter,
  3573. spddplx);
  3574. if (retval) {
  3575. spin_unlock_irqrestore(
  3576. &adapter->stats_lock,
  3577. flags);
  3578. return retval;
  3579. }
  3580. }
  3581. if (netif_running(adapter->netdev)) {
  3582. e1000_down(adapter);
  3583. e1000_up(adapter);
  3584. } else
  3585. e1000_reset(adapter);
  3586. break;
  3587. case M88E1000_PHY_SPEC_CTRL:
  3588. case M88E1000_EXT_PHY_SPEC_CTRL:
  3589. if (e1000_phy_reset(&adapter->hw)) {
  3590. spin_unlock_irqrestore(
  3591. &adapter->stats_lock, flags);
  3592. return -EIO;
  3593. }
  3594. break;
  3595. }
  3596. } else {
  3597. switch (data->reg_num) {
  3598. case PHY_CTRL:
  3599. if (mii_reg & MII_CR_POWER_DOWN)
  3600. break;
  3601. if (netif_running(adapter->netdev)) {
  3602. e1000_down(adapter);
  3603. e1000_up(adapter);
  3604. } else
  3605. e1000_reset(adapter);
  3606. break;
  3607. }
  3608. }
  3609. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3610. break;
  3611. default:
  3612. return -EOPNOTSUPP;
  3613. }
  3614. return E1000_SUCCESS;
  3615. }
  3616. void
  3617. e1000_pci_set_mwi(struct e1000_hw *hw)
  3618. {
  3619. struct e1000_adapter *adapter = hw->back;
  3620. int ret_val = pci_set_mwi(adapter->pdev);
  3621. if (ret_val)
  3622. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3623. }
  3624. void
  3625. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3626. {
  3627. struct e1000_adapter *adapter = hw->back;
  3628. pci_clear_mwi(adapter->pdev);
  3629. }
  3630. void
  3631. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3632. {
  3633. struct e1000_adapter *adapter = hw->back;
  3634. pci_read_config_word(adapter->pdev, reg, value);
  3635. }
  3636. void
  3637. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3638. {
  3639. struct e1000_adapter *adapter = hw->back;
  3640. pci_write_config_word(adapter->pdev, reg, *value);
  3641. }
  3642. uint32_t
  3643. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3644. {
  3645. return inl(port);
  3646. }
  3647. void
  3648. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3649. {
  3650. outl(value, port);
  3651. }
  3652. static void
  3653. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3654. {
  3655. struct e1000_adapter *adapter = netdev_priv(netdev);
  3656. uint32_t ctrl, rctl;
  3657. e1000_irq_disable(adapter);
  3658. adapter->vlgrp = grp;
  3659. if (grp) {
  3660. /* enable VLAN tag insert/strip */
  3661. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3662. ctrl |= E1000_CTRL_VME;
  3663. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3664. /* enable VLAN receive filtering */
  3665. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3666. rctl |= E1000_RCTL_VFE;
  3667. rctl &= ~E1000_RCTL_CFIEN;
  3668. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3669. e1000_update_mng_vlan(adapter);
  3670. } else {
  3671. /* disable VLAN tag insert/strip */
  3672. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3673. ctrl &= ~E1000_CTRL_VME;
  3674. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3675. /* disable VLAN filtering */
  3676. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3677. rctl &= ~E1000_RCTL_VFE;
  3678. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3679. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3680. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3681. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3682. }
  3683. }
  3684. e1000_irq_enable(adapter);
  3685. }
  3686. static void
  3687. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3688. {
  3689. struct e1000_adapter *adapter = netdev_priv(netdev);
  3690. uint32_t vfta, index;
  3691. if ((adapter->hw.mng_cookie.status &
  3692. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3693. (vid == adapter->mng_vlan_id))
  3694. return;
  3695. /* add VID to filter table */
  3696. index = (vid >> 5) & 0x7F;
  3697. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3698. vfta |= (1 << (vid & 0x1F));
  3699. e1000_write_vfta(&adapter->hw, index, vfta);
  3700. }
  3701. static void
  3702. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3703. {
  3704. struct e1000_adapter *adapter = netdev_priv(netdev);
  3705. uint32_t vfta, index;
  3706. e1000_irq_disable(adapter);
  3707. if (adapter->vlgrp)
  3708. adapter->vlgrp->vlan_devices[vid] = NULL;
  3709. e1000_irq_enable(adapter);
  3710. if ((adapter->hw.mng_cookie.status &
  3711. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3712. (vid == adapter->mng_vlan_id)) {
  3713. /* release control to f/w */
  3714. e1000_release_hw_control(adapter);
  3715. return;
  3716. }
  3717. /* remove VID from filter table */
  3718. index = (vid >> 5) & 0x7F;
  3719. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3720. vfta &= ~(1 << (vid & 0x1F));
  3721. e1000_write_vfta(&adapter->hw, index, vfta);
  3722. }
  3723. static void
  3724. e1000_restore_vlan(struct e1000_adapter *adapter)
  3725. {
  3726. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3727. if (adapter->vlgrp) {
  3728. uint16_t vid;
  3729. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3730. if (!adapter->vlgrp->vlan_devices[vid])
  3731. continue;
  3732. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3733. }
  3734. }
  3735. }
  3736. int
  3737. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3738. {
  3739. adapter->hw.autoneg = 0;
  3740. /* Fiber NICs only allow 1000 gbps Full duplex */
  3741. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3742. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3743. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3744. return -EINVAL;
  3745. }
  3746. switch (spddplx) {
  3747. case SPEED_10 + DUPLEX_HALF:
  3748. adapter->hw.forced_speed_duplex = e1000_10_half;
  3749. break;
  3750. case SPEED_10 + DUPLEX_FULL:
  3751. adapter->hw.forced_speed_duplex = e1000_10_full;
  3752. break;
  3753. case SPEED_100 + DUPLEX_HALF:
  3754. adapter->hw.forced_speed_duplex = e1000_100_half;
  3755. break;
  3756. case SPEED_100 + DUPLEX_FULL:
  3757. adapter->hw.forced_speed_duplex = e1000_100_full;
  3758. break;
  3759. case SPEED_1000 + DUPLEX_FULL:
  3760. adapter->hw.autoneg = 1;
  3761. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3762. break;
  3763. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3764. default:
  3765. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3766. return -EINVAL;
  3767. }
  3768. return 0;
  3769. }
  3770. #ifdef CONFIG_PM
  3771. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3772. * bus we're on (PCI(X) vs. PCI-E)
  3773. */
  3774. #define PCIE_CONFIG_SPACE_LEN 256
  3775. #define PCI_CONFIG_SPACE_LEN 64
  3776. static int
  3777. e1000_pci_save_state(struct e1000_adapter *adapter)
  3778. {
  3779. struct pci_dev *dev = adapter->pdev;
  3780. int size;
  3781. int i;
  3782. if (adapter->hw.mac_type >= e1000_82571)
  3783. size = PCIE_CONFIG_SPACE_LEN;
  3784. else
  3785. size = PCI_CONFIG_SPACE_LEN;
  3786. WARN_ON(adapter->config_space != NULL);
  3787. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3788. if (!adapter->config_space) {
  3789. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3790. return -ENOMEM;
  3791. }
  3792. for (i = 0; i < (size / 4); i++)
  3793. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3794. return 0;
  3795. }
  3796. static void
  3797. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3798. {
  3799. struct pci_dev *dev = adapter->pdev;
  3800. int size;
  3801. int i;
  3802. if (adapter->config_space == NULL)
  3803. return;
  3804. if (adapter->hw.mac_type >= e1000_82571)
  3805. size = PCIE_CONFIG_SPACE_LEN;
  3806. else
  3807. size = PCI_CONFIG_SPACE_LEN;
  3808. for (i = 0; i < (size / 4); i++)
  3809. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3810. kfree(adapter->config_space);
  3811. adapter->config_space = NULL;
  3812. return;
  3813. }
  3814. #endif /* CONFIG_PM */
  3815. static int
  3816. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3817. {
  3818. struct net_device *netdev = pci_get_drvdata(pdev);
  3819. struct e1000_adapter *adapter = netdev_priv(netdev);
  3820. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3821. uint32_t wufc = adapter->wol;
  3822. int retval = 0;
  3823. netif_device_detach(netdev);
  3824. if (netif_running(netdev))
  3825. e1000_down(adapter);
  3826. #ifdef CONFIG_PM
  3827. /* Implement our own version of pci_save_state(pdev) because pci-
  3828. * express adapters have 256-byte config spaces. */
  3829. retval = e1000_pci_save_state(adapter);
  3830. if (retval)
  3831. return retval;
  3832. #endif
  3833. status = E1000_READ_REG(&adapter->hw, STATUS);
  3834. if (status & E1000_STATUS_LU)
  3835. wufc &= ~E1000_WUFC_LNKC;
  3836. if (wufc) {
  3837. e1000_setup_rctl(adapter);
  3838. e1000_set_multi(netdev);
  3839. /* turn on all-multi mode if wake on multicast is enabled */
  3840. if (adapter->wol & E1000_WUFC_MC) {
  3841. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3842. rctl |= E1000_RCTL_MPE;
  3843. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3844. }
  3845. if (adapter->hw.mac_type >= e1000_82540) {
  3846. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3847. /* advertise wake from D3Cold */
  3848. #define E1000_CTRL_ADVD3WUC 0x00100000
  3849. /* phy power management enable */
  3850. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3851. ctrl |= E1000_CTRL_ADVD3WUC |
  3852. E1000_CTRL_EN_PHY_PWR_MGMT;
  3853. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3854. }
  3855. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3856. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3857. /* keep the laser running in D3 */
  3858. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3859. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3860. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3861. }
  3862. /* Allow time for pending master requests to run */
  3863. e1000_disable_pciex_master(&adapter->hw);
  3864. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3865. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3866. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3867. if (retval)
  3868. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3869. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3870. if (retval)
  3871. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3872. } else {
  3873. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3874. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3875. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3876. if (retval)
  3877. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3878. retval = pci_enable_wake(pdev, PCI_D3cold, 0);
  3879. if (retval)
  3880. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3881. }
  3882. if (adapter->hw.mac_type >= e1000_82540 &&
  3883. adapter->hw.media_type == e1000_media_type_copper) {
  3884. manc = E1000_READ_REG(&adapter->hw, MANC);
  3885. if (manc & E1000_MANC_SMBUS_EN) {
  3886. manc |= E1000_MANC_ARP_EN;
  3887. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3888. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3889. if (retval)
  3890. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3891. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3892. if (retval)
  3893. DPRINTK(PROBE, ERR,
  3894. "Error enabling D3 cold wake\n");
  3895. }
  3896. }
  3897. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3898. * would have already happened in close and is redundant. */
  3899. e1000_release_hw_control(adapter);
  3900. pci_disable_device(pdev);
  3901. retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3902. if (retval)
  3903. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3904. return 0;
  3905. }
  3906. #ifdef CONFIG_PM
  3907. static int
  3908. e1000_resume(struct pci_dev *pdev)
  3909. {
  3910. struct net_device *netdev = pci_get_drvdata(pdev);
  3911. struct e1000_adapter *adapter = netdev_priv(netdev);
  3912. int retval;
  3913. uint32_t manc, ret_val;
  3914. retval = pci_set_power_state(pdev, PCI_D0);
  3915. if (retval)
  3916. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3917. e1000_pci_restore_state(adapter);
  3918. ret_val = pci_enable_device(pdev);
  3919. pci_set_master(pdev);
  3920. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3921. if (retval)
  3922. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3923. retval = pci_enable_wake(pdev, PCI_D3cold, 0);
  3924. if (retval)
  3925. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3926. e1000_reset(adapter);
  3927. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3928. if (netif_running(netdev))
  3929. e1000_up(adapter);
  3930. netif_device_attach(netdev);
  3931. if (adapter->hw.mac_type >= e1000_82540 &&
  3932. adapter->hw.media_type == e1000_media_type_copper) {
  3933. manc = E1000_READ_REG(&adapter->hw, MANC);
  3934. manc &= ~(E1000_MANC_ARP_EN);
  3935. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3936. }
  3937. /* If the controller is 82573 and f/w is AMT, do not set
  3938. * DRV_LOAD until the interface is up. For all other cases,
  3939. * let the f/w know that the h/w is now under the control
  3940. * of the driver. */
  3941. if (adapter->hw.mac_type != e1000_82573 ||
  3942. !e1000_check_mng_mode(&adapter->hw))
  3943. e1000_get_hw_control(adapter);
  3944. return 0;
  3945. }
  3946. #endif
  3947. #ifdef CONFIG_NET_POLL_CONTROLLER
  3948. /*
  3949. * Polling 'interrupt' - used by things like netconsole to send skbs
  3950. * without having to re-enable interrupts. It's not called while
  3951. * the interrupt routine is executing.
  3952. */
  3953. static void
  3954. e1000_netpoll(struct net_device *netdev)
  3955. {
  3956. struct e1000_adapter *adapter = netdev_priv(netdev);
  3957. disable_irq(adapter->pdev->irq);
  3958. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3959. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3960. #ifndef CONFIG_E1000_NAPI
  3961. adapter->clean_rx(adapter, adapter->rx_ring);
  3962. #endif
  3963. enable_irq(adapter->pdev->irq);
  3964. }
  3965. #endif
  3966. /* e1000_main.c */