declance.c 32 KB

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  1. /*
  2. * Lance ethernet driver for the MIPS processor based
  3. * DECstation family
  4. *
  5. *
  6. * adopted from sunlance.c by Richard van den Berg
  7. *
  8. * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
  9. *
  10. * additional sources:
  11. * - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
  12. * Revision 1.2
  13. *
  14. * History:
  15. *
  16. * v0.001: The kernel accepts the code and it shows the hardware address.
  17. *
  18. * v0.002: Removed most sparc stuff, left only some module and dma stuff.
  19. *
  20. * v0.003: Enhanced base address calculation from proposals by
  21. * Harald Koerfgen and Thomas Riemer.
  22. *
  23. * v0.004: lance-regs is pointing at the right addresses, added prom
  24. * check. First start of address mapping and DMA.
  25. *
  26. * v0.005: started to play around with LANCE-DMA. This driver will not
  27. * work for non IOASIC lances. HK
  28. *
  29. * v0.006: added pointer arrays to lance_private and setup routine for
  30. * them in dec_lance_init. HK
  31. *
  32. * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to
  33. * access the init block. This looks like one (short) word at a
  34. * time, but the smallest amount the IOASIC can transfer is a
  35. * (long) word. So we have a 2-2 padding here. Changed
  36. * lance_init_block accordingly. The 16-16 padding for the buffers
  37. * seems to be correct. HK
  38. *
  39. * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer
  40. *
  41. * v0.009: Module support fixes, multiple interfaces support, various
  42. * bits. macro
  43. */
  44. #include <linux/config.h>
  45. #include <linux/crc32.h>
  46. #include <linux/delay.h>
  47. #include <linux/errno.h>
  48. #include <linux/if_ether.h>
  49. #include <linux/init.h>
  50. #include <linux/kernel.h>
  51. #include <linux/module.h>
  52. #include <linux/netdevice.h>
  53. #include <linux/etherdevice.h>
  54. #include <linux/spinlock.h>
  55. #include <linux/stddef.h>
  56. #include <linux/string.h>
  57. #include <asm/addrspace.h>
  58. #include <asm/system.h>
  59. #include <asm/dec/interrupts.h>
  60. #include <asm/dec/ioasic.h>
  61. #include <asm/dec/ioasic_addrs.h>
  62. #include <asm/dec/kn01.h>
  63. #include <asm/dec/machtype.h>
  64. #include <asm/dec/system.h>
  65. #include <asm/dec/tc.h>
  66. static char version[] __devinitdata =
  67. "declance.c: v0.009 by Linux MIPS DECstation task force\n";
  68. MODULE_AUTHOR("Linux MIPS DECstation task force");
  69. MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver");
  70. MODULE_LICENSE("GPL");
  71. /*
  72. * card types
  73. */
  74. #define ASIC_LANCE 1
  75. #define PMAD_LANCE 2
  76. #define PMAX_LANCE 3
  77. #define LE_CSR0 0
  78. #define LE_CSR1 1
  79. #define LE_CSR2 2
  80. #define LE_CSR3 3
  81. #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
  82. #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
  83. #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
  84. #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
  85. #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
  86. #define LE_C0_MERR 0x0800 /* ME: Memory error */
  87. #define LE_C0_RINT 0x0400 /* Received interrupt */
  88. #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
  89. #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
  90. #define LE_C0_INTR 0x0080 /* Interrupt or error */
  91. #define LE_C0_INEA 0x0040 /* Interrupt enable */
  92. #define LE_C0_RXON 0x0020 /* Receiver on */
  93. #define LE_C0_TXON 0x0010 /* Transmitter on */
  94. #define LE_C0_TDMD 0x0008 /* Transmitter demand */
  95. #define LE_C0_STOP 0x0004 /* Stop the card */
  96. #define LE_C0_STRT 0x0002 /* Start the card */
  97. #define LE_C0_INIT 0x0001 /* Init the card */
  98. #define LE_C3_BSWP 0x4 /* SWAP */
  99. #define LE_C3_ACON 0x2 /* ALE Control */
  100. #define LE_C3_BCON 0x1 /* Byte control */
  101. /* Receive message descriptor 1 */
  102. #define LE_R1_OWN 0x80 /* Who owns the entry */
  103. #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
  104. #define LE_R1_FRA 0x20 /* FRA: Frame error */
  105. #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
  106. #define LE_R1_CRC 0x08 /* CRC error */
  107. #define LE_R1_BUF 0x04 /* BUF: Buffer error */
  108. #define LE_R1_SOP 0x02 /* Start of packet */
  109. #define LE_R1_EOP 0x01 /* End of packet */
  110. #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
  111. #define LE_T1_OWN 0x80 /* Lance owns the packet */
  112. #define LE_T1_ERR 0x40 /* Error summary */
  113. #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
  114. #define LE_T1_EONE 0x08 /* Error: one retry needed */
  115. #define LE_T1_EDEF 0x04 /* Error: deferred */
  116. #define LE_T1_SOP 0x02 /* Start of packet */
  117. #define LE_T1_EOP 0x01 /* End of packet */
  118. #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
  119. #define LE_T3_BUF 0x8000 /* Buffer error */
  120. #define LE_T3_UFL 0x4000 /* Error underflow */
  121. #define LE_T3_LCOL 0x1000 /* Error late collision */
  122. #define LE_T3_CLOS 0x0800 /* Error carrier loss */
  123. #define LE_T3_RTY 0x0400 /* Error retry */
  124. #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
  125. /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
  126. #ifndef LANCE_LOG_TX_BUFFERS
  127. #define LANCE_LOG_TX_BUFFERS 4
  128. #define LANCE_LOG_RX_BUFFERS 4
  129. #endif
  130. #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
  131. #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
  132. #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
  133. #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
  134. #define PKT_BUF_SZ 1536
  135. #define RX_BUFF_SIZE PKT_BUF_SZ
  136. #define TX_BUFF_SIZE PKT_BUF_SZ
  137. #undef TEST_HITS
  138. #define ZERO 0
  139. /* The DS2000/3000 have a linear 64 KB buffer.
  140. * The PMAD-AA has 128 kb buffer on-board.
  141. *
  142. * The IOASIC LANCE devices use a shared memory region. This region as seen
  143. * from the CPU is (max) 128 KB long and has to be on an 128 KB boundary.
  144. * The LANCE sees this as a 64 KB long continuous memory region.
  145. *
  146. * The LANCE's DMA address is used as an index in this buffer and DMA takes
  147. * place in bursts of eight 16-Bit words which are packed into four 32-Bit words
  148. * by the IOASIC. This leads to a strange padding: 16 bytes of valid data followed
  149. * by a 16 byte gap :-(.
  150. */
  151. struct lance_rx_desc {
  152. unsigned short rmd0; /* low address of packet */
  153. short gap0;
  154. unsigned char rmd1_hadr; /* high address of packet */
  155. unsigned char rmd1_bits; /* descriptor bits */
  156. short gap1;
  157. short length; /* 2s complement (negative!)
  158. of buffer length */
  159. short gap2;
  160. unsigned short mblength; /* actual number of bytes received */
  161. short gap3;
  162. };
  163. struct lance_tx_desc {
  164. unsigned short tmd0; /* low address of packet */
  165. short gap0;
  166. unsigned char tmd1_hadr; /* high address of packet */
  167. unsigned char tmd1_bits; /* descriptor bits */
  168. short gap1;
  169. short length; /* 2s complement (negative!)
  170. of buffer length */
  171. short gap2;
  172. unsigned short misc;
  173. short gap3;
  174. };
  175. /* First part of the LANCE initialization block, described in databook. */
  176. struct lance_init_block {
  177. unsigned short mode; /* pre-set mode (reg. 15) */
  178. short gap0;
  179. unsigned char phys_addr[12]; /* physical ethernet address
  180. only 0, 1, 4, 5, 8, 9 are valid
  181. 2, 3, 6, 7, 10, 11 are gaps */
  182. unsigned short filter[8]; /* multicast filter
  183. only 0, 2, 4, 6 are valid
  184. 1, 3, 5, 7 are gaps */
  185. /* Receive and transmit ring base, along with extra bits. */
  186. unsigned short rx_ptr; /* receive descriptor addr */
  187. short gap1;
  188. unsigned short rx_len; /* receive len and high addr */
  189. short gap2;
  190. unsigned short tx_ptr; /* transmit descriptor addr */
  191. short gap3;
  192. unsigned short tx_len; /* transmit len and high addr */
  193. short gap4;
  194. short gap5[8];
  195. /* The buffer descriptors */
  196. struct lance_rx_desc brx_ring[RX_RING_SIZE];
  197. struct lance_tx_desc btx_ring[TX_RING_SIZE];
  198. };
  199. #define BUF_OFFSET_CPU sizeof(struct lance_init_block)
  200. #define BUF_OFFSET_LNC (sizeof(struct lance_init_block)>>1)
  201. #define libdesc_offset(rt, elem) \
  202. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
  203. /*
  204. * This works *only* for the ring descriptors
  205. */
  206. #define LANCE_ADDR(x) (CPHYSADDR(x) >> 1)
  207. struct lance_private {
  208. struct net_device *next;
  209. int type;
  210. int slot;
  211. int dma_irq;
  212. volatile struct lance_regs *ll;
  213. volatile struct lance_init_block *init_block;
  214. spinlock_t lock;
  215. int rx_new, tx_new;
  216. int rx_old, tx_old;
  217. struct net_device_stats stats;
  218. unsigned short busmaster_regval;
  219. struct timer_list multicast_timer;
  220. /* Pointers to the ring buffers as seen from the CPU */
  221. char *rx_buf_ptr_cpu[RX_RING_SIZE];
  222. char *tx_buf_ptr_cpu[TX_RING_SIZE];
  223. /* Pointers to the ring buffers as seen from the LANCE */
  224. char *rx_buf_ptr_lnc[RX_RING_SIZE];
  225. char *tx_buf_ptr_lnc[TX_RING_SIZE];
  226. };
  227. #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
  228. lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
  229. lp->tx_old - lp->tx_new-1)
  230. /* The lance control ports are at an absolute address, machine and tc-slot
  231. * dependent.
  232. * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
  233. * so we have to give the structure an extra member making rap pointing
  234. * at the right address
  235. */
  236. struct lance_regs {
  237. volatile unsigned short rdp; /* register data port */
  238. unsigned short pad;
  239. volatile unsigned short rap; /* register address port */
  240. };
  241. int dec_lance_debug = 2;
  242. static struct net_device *root_lance_dev;
  243. static inline void writereg(volatile unsigned short *regptr, short value)
  244. {
  245. *regptr = value;
  246. iob();
  247. }
  248. /* Load the CSR registers */
  249. static void load_csrs(struct lance_private *lp)
  250. {
  251. volatile struct lance_regs *ll = lp->ll;
  252. int leptr;
  253. /* The address space as seen from the LANCE
  254. * begins at address 0. HK
  255. */
  256. leptr = 0;
  257. writereg(&ll->rap, LE_CSR1);
  258. writereg(&ll->rdp, (leptr & 0xFFFF));
  259. writereg(&ll->rap, LE_CSR2);
  260. writereg(&ll->rdp, leptr >> 16);
  261. writereg(&ll->rap, LE_CSR3);
  262. writereg(&ll->rdp, lp->busmaster_regval);
  263. /* Point back to csr0 */
  264. writereg(&ll->rap, LE_CSR0);
  265. }
  266. /*
  267. * Our specialized copy routines
  268. *
  269. */
  270. void cp_to_buf(const int type, void *to, const void *from, int len)
  271. {
  272. unsigned short *tp, *fp, clen;
  273. unsigned char *rtp, *rfp;
  274. if (type == PMAX_LANCE) {
  275. clen = len >> 1;
  276. tp = (unsigned short *) to;
  277. fp = (unsigned short *) from;
  278. while (clen--) {
  279. *tp++ = *fp++;
  280. tp++;
  281. }
  282. clen = len & 1;
  283. rtp = (unsigned char *) tp;
  284. rfp = (unsigned char *) fp;
  285. while (clen--) {
  286. *rtp++ = *rfp++;
  287. }
  288. } else {
  289. /*
  290. * copy 16 Byte chunks
  291. */
  292. clen = len >> 4;
  293. tp = (unsigned short *) to;
  294. fp = (unsigned short *) from;
  295. while (clen--) {
  296. *tp++ = *fp++;
  297. *tp++ = *fp++;
  298. *tp++ = *fp++;
  299. *tp++ = *fp++;
  300. *tp++ = *fp++;
  301. *tp++ = *fp++;
  302. *tp++ = *fp++;
  303. *tp++ = *fp++;
  304. tp += 8;
  305. }
  306. /*
  307. * do the rest, if any.
  308. */
  309. clen = len & 15;
  310. rtp = (unsigned char *) tp;
  311. rfp = (unsigned char *) fp;
  312. while (clen--) {
  313. *rtp++ = *rfp++;
  314. }
  315. }
  316. iob();
  317. }
  318. void cp_from_buf(const int type, void *to, const void *from, int len)
  319. {
  320. unsigned short *tp, *fp, clen;
  321. unsigned char *rtp, *rfp;
  322. if (type == PMAX_LANCE) {
  323. clen = len >> 1;
  324. tp = (unsigned short *) to;
  325. fp = (unsigned short *) from;
  326. while (clen--) {
  327. *tp++ = *fp++;
  328. fp++;
  329. }
  330. clen = len & 1;
  331. rtp = (unsigned char *) tp;
  332. rfp = (unsigned char *) fp;
  333. while (clen--) {
  334. *rtp++ = *rfp++;
  335. }
  336. } else {
  337. /*
  338. * copy 16 Byte chunks
  339. */
  340. clen = len >> 4;
  341. tp = (unsigned short *) to;
  342. fp = (unsigned short *) from;
  343. while (clen--) {
  344. *tp++ = *fp++;
  345. *tp++ = *fp++;
  346. *tp++ = *fp++;
  347. *tp++ = *fp++;
  348. *tp++ = *fp++;
  349. *tp++ = *fp++;
  350. *tp++ = *fp++;
  351. *tp++ = *fp++;
  352. fp += 8;
  353. }
  354. /*
  355. * do the rest, if any.
  356. */
  357. clen = len & 15;
  358. rtp = (unsigned char *) tp;
  359. rfp = (unsigned char *) fp;
  360. while (clen--) {
  361. *rtp++ = *rfp++;
  362. }
  363. }
  364. }
  365. /* Setup the Lance Rx and Tx rings */
  366. static void lance_init_ring(struct net_device *dev)
  367. {
  368. struct lance_private *lp = netdev_priv(dev);
  369. volatile struct lance_init_block *ib;
  370. int leptr;
  371. int i;
  372. ib = (struct lance_init_block *) (dev->mem_start);
  373. /* Lock out other processes while setting up hardware */
  374. netif_stop_queue(dev);
  375. lp->rx_new = lp->tx_new = 0;
  376. lp->rx_old = lp->tx_old = 0;
  377. /* Copy the ethernet address to the lance init block.
  378. * XXX bit 0 of the physical address registers has to be zero
  379. */
  380. ib->phys_addr[0] = dev->dev_addr[0];
  381. ib->phys_addr[1] = dev->dev_addr[1];
  382. ib->phys_addr[4] = dev->dev_addr[2];
  383. ib->phys_addr[5] = dev->dev_addr[3];
  384. ib->phys_addr[8] = dev->dev_addr[4];
  385. ib->phys_addr[9] = dev->dev_addr[5];
  386. /* Setup the initialization block */
  387. /* Setup rx descriptor pointer */
  388. leptr = LANCE_ADDR(libdesc_offset(brx_ring, 0));
  389. ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
  390. ib->rx_ptr = leptr;
  391. if (ZERO)
  392. printk("RX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(brx_ring, 0));
  393. /* Setup tx descriptor pointer */
  394. leptr = LANCE_ADDR(libdesc_offset(btx_ring, 0));
  395. ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
  396. ib->tx_ptr = leptr;
  397. if (ZERO)
  398. printk("TX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(btx_ring, 0));
  399. if (ZERO)
  400. printk("TX rings:\n");
  401. /* Setup the Tx ring entries */
  402. for (i = 0; i < TX_RING_SIZE; i++) {
  403. leptr = (int) lp->tx_buf_ptr_lnc[i];
  404. ib->btx_ring[i].tmd0 = leptr;
  405. ib->btx_ring[i].tmd1_hadr = leptr >> 16;
  406. ib->btx_ring[i].tmd1_bits = 0;
  407. ib->btx_ring[i].length = 0xf000; /* The ones required by tmd2 */
  408. ib->btx_ring[i].misc = 0;
  409. if (i < 3 && ZERO)
  410. printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->tx_buf_ptr_cpu[i]);
  411. }
  412. /* Setup the Rx ring entries */
  413. if (ZERO)
  414. printk("RX rings:\n");
  415. for (i = 0; i < RX_RING_SIZE; i++) {
  416. leptr = (int) lp->rx_buf_ptr_lnc[i];
  417. ib->brx_ring[i].rmd0 = leptr;
  418. ib->brx_ring[i].rmd1_hadr = leptr >> 16;
  419. ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
  420. ib->brx_ring[i].length = -RX_BUFF_SIZE | 0xf000;
  421. ib->brx_ring[i].mblength = 0;
  422. if (i < 3 && ZERO)
  423. printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->rx_buf_ptr_cpu[i]);
  424. }
  425. iob();
  426. }
  427. static int init_restart_lance(struct lance_private *lp)
  428. {
  429. volatile struct lance_regs *ll = lp->ll;
  430. int i;
  431. writereg(&ll->rap, LE_CSR0);
  432. writereg(&ll->rdp, LE_C0_INIT);
  433. /* Wait for the lance to complete initialization */
  434. for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
  435. udelay(10);
  436. }
  437. if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
  438. printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
  439. return -1;
  440. }
  441. if ((ll->rdp & LE_C0_ERR)) {
  442. printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
  443. return -1;
  444. }
  445. writereg(&ll->rdp, LE_C0_IDON);
  446. writereg(&ll->rdp, LE_C0_STRT);
  447. writereg(&ll->rdp, LE_C0_INEA);
  448. return 0;
  449. }
  450. static int lance_rx(struct net_device *dev)
  451. {
  452. struct lance_private *lp = netdev_priv(dev);
  453. volatile struct lance_init_block *ib;
  454. volatile struct lance_rx_desc *rd = 0;
  455. unsigned char bits;
  456. int len = 0;
  457. struct sk_buff *skb = 0;
  458. ib = (struct lance_init_block *) (dev->mem_start);
  459. #ifdef TEST_HITS
  460. {
  461. int i;
  462. printk("[");
  463. for (i = 0; i < RX_RING_SIZE; i++) {
  464. if (i == lp->rx_new)
  465. printk("%s", ib->brx_ring[i].rmd1_bits &
  466. LE_R1_OWN ? "_" : "X");
  467. else
  468. printk("%s", ib->brx_ring[i].rmd1_bits &
  469. LE_R1_OWN ? "." : "1");
  470. }
  471. printk("]");
  472. }
  473. #endif
  474. for (rd = &ib->brx_ring[lp->rx_new];
  475. !((bits = rd->rmd1_bits) & LE_R1_OWN);
  476. rd = &ib->brx_ring[lp->rx_new]) {
  477. /* We got an incomplete frame? */
  478. if ((bits & LE_R1_POK) != LE_R1_POK) {
  479. lp->stats.rx_over_errors++;
  480. lp->stats.rx_errors++;
  481. } else if (bits & LE_R1_ERR) {
  482. /* Count only the end frame as a rx error,
  483. * not the beginning
  484. */
  485. if (bits & LE_R1_BUF)
  486. lp->stats.rx_fifo_errors++;
  487. if (bits & LE_R1_CRC)
  488. lp->stats.rx_crc_errors++;
  489. if (bits & LE_R1_OFL)
  490. lp->stats.rx_over_errors++;
  491. if (bits & LE_R1_FRA)
  492. lp->stats.rx_frame_errors++;
  493. if (bits & LE_R1_EOP)
  494. lp->stats.rx_errors++;
  495. } else {
  496. len = (rd->mblength & 0xfff) - 4;
  497. skb = dev_alloc_skb(len + 2);
  498. if (skb == 0) {
  499. printk("%s: Memory squeeze, deferring packet.\n",
  500. dev->name);
  501. lp->stats.rx_dropped++;
  502. rd->mblength = 0;
  503. rd->rmd1_bits = LE_R1_OWN;
  504. lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
  505. return 0;
  506. }
  507. lp->stats.rx_bytes += len;
  508. skb->dev = dev;
  509. skb_reserve(skb, 2); /* 16 byte align */
  510. skb_put(skb, len); /* make room */
  511. cp_from_buf(lp->type, skb->data,
  512. (char *)lp->rx_buf_ptr_cpu[lp->rx_new],
  513. len);
  514. skb->protocol = eth_type_trans(skb, dev);
  515. netif_rx(skb);
  516. dev->last_rx = jiffies;
  517. lp->stats.rx_packets++;
  518. }
  519. /* Return the packet to the pool */
  520. rd->mblength = 0;
  521. rd->length = -RX_BUFF_SIZE | 0xf000;
  522. rd->rmd1_bits = LE_R1_OWN;
  523. lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
  524. }
  525. return 0;
  526. }
  527. static void lance_tx(struct net_device *dev)
  528. {
  529. struct lance_private *lp = netdev_priv(dev);
  530. volatile struct lance_init_block *ib;
  531. volatile struct lance_regs *ll = lp->ll;
  532. volatile struct lance_tx_desc *td;
  533. int i, j;
  534. int status;
  535. ib = (struct lance_init_block *) (dev->mem_start);
  536. j = lp->tx_old;
  537. spin_lock(&lp->lock);
  538. for (i = j; i != lp->tx_new; i = j) {
  539. td = &ib->btx_ring[i];
  540. /* If we hit a packet not owned by us, stop */
  541. if (td->tmd1_bits & LE_T1_OWN)
  542. break;
  543. if (td->tmd1_bits & LE_T1_ERR) {
  544. status = td->misc;
  545. lp->stats.tx_errors++;
  546. if (status & LE_T3_RTY)
  547. lp->stats.tx_aborted_errors++;
  548. if (status & LE_T3_LCOL)
  549. lp->stats.tx_window_errors++;
  550. if (status & LE_T3_CLOS) {
  551. lp->stats.tx_carrier_errors++;
  552. printk("%s: Carrier Lost\n", dev->name);
  553. /* Stop the lance */
  554. writereg(&ll->rap, LE_CSR0);
  555. writereg(&ll->rdp, LE_C0_STOP);
  556. lance_init_ring(dev);
  557. load_csrs(lp);
  558. init_restart_lance(lp);
  559. goto out;
  560. }
  561. /* Buffer errors and underflows turn off the
  562. * transmitter, restart the adapter.
  563. */
  564. if (status & (LE_T3_BUF | LE_T3_UFL)) {
  565. lp->stats.tx_fifo_errors++;
  566. printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  567. dev->name);
  568. /* Stop the lance */
  569. writereg(&ll->rap, LE_CSR0);
  570. writereg(&ll->rdp, LE_C0_STOP);
  571. lance_init_ring(dev);
  572. load_csrs(lp);
  573. init_restart_lance(lp);
  574. goto out;
  575. }
  576. } else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
  577. /*
  578. * So we don't count the packet more than once.
  579. */
  580. td->tmd1_bits &= ~(LE_T1_POK);
  581. /* One collision before packet was sent. */
  582. if (td->tmd1_bits & LE_T1_EONE)
  583. lp->stats.collisions++;
  584. /* More than one collision, be optimistic. */
  585. if (td->tmd1_bits & LE_T1_EMORE)
  586. lp->stats.collisions += 2;
  587. lp->stats.tx_packets++;
  588. }
  589. j = (j + 1) & TX_RING_MOD_MASK;
  590. }
  591. lp->tx_old = j;
  592. out:
  593. if (netif_queue_stopped(dev) &&
  594. TX_BUFFS_AVAIL > 0)
  595. netif_wake_queue(dev);
  596. spin_unlock(&lp->lock);
  597. }
  598. static irqreturn_t lance_dma_merr_int(const int irq, void *dev_id,
  599. struct pt_regs *regs)
  600. {
  601. struct net_device *dev = (struct net_device *) dev_id;
  602. printk("%s: DMA error\n", dev->name);
  603. return IRQ_HANDLED;
  604. }
  605. static irqreturn_t
  606. lance_interrupt(const int irq, void *dev_id, struct pt_regs *regs)
  607. {
  608. struct net_device *dev = (struct net_device *) dev_id;
  609. struct lance_private *lp = netdev_priv(dev);
  610. volatile struct lance_regs *ll = lp->ll;
  611. int csr0;
  612. writereg(&ll->rap, LE_CSR0);
  613. csr0 = ll->rdp;
  614. /* Acknowledge all the interrupt sources ASAP */
  615. writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
  616. if ((csr0 & LE_C0_ERR)) {
  617. /* Clear the error condition */
  618. writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
  619. LE_C0_CERR | LE_C0_MERR);
  620. }
  621. if (csr0 & LE_C0_RINT)
  622. lance_rx(dev);
  623. if (csr0 & LE_C0_TINT)
  624. lance_tx(dev);
  625. if (csr0 & LE_C0_BABL)
  626. lp->stats.tx_errors++;
  627. if (csr0 & LE_C0_MISS)
  628. lp->stats.rx_errors++;
  629. if (csr0 & LE_C0_MERR) {
  630. printk("%s: Memory error, status %04x\n", dev->name, csr0);
  631. writereg(&ll->rdp, LE_C0_STOP);
  632. lance_init_ring(dev);
  633. load_csrs(lp);
  634. init_restart_lance(lp);
  635. netif_wake_queue(dev);
  636. }
  637. writereg(&ll->rdp, LE_C0_INEA);
  638. writereg(&ll->rdp, LE_C0_INEA);
  639. return IRQ_HANDLED;
  640. }
  641. struct net_device *last_dev = 0;
  642. static int lance_open(struct net_device *dev)
  643. {
  644. volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
  645. struct lance_private *lp = netdev_priv(dev);
  646. volatile struct lance_regs *ll = lp->ll;
  647. int status = 0;
  648. last_dev = dev;
  649. /* Stop the Lance */
  650. writereg(&ll->rap, LE_CSR0);
  651. writereg(&ll->rdp, LE_C0_STOP);
  652. /* Set mode and clear multicast filter only at device open,
  653. * so that lance_init_ring() called at any error will not
  654. * forget multicast filters.
  655. *
  656. * BTW it is common bug in all lance drivers! --ANK
  657. */
  658. ib->mode = 0;
  659. ib->filter [0] = 0;
  660. ib->filter [2] = 0;
  661. ib->filter [4] = 0;
  662. ib->filter [6] = 0;
  663. lance_init_ring(dev);
  664. load_csrs(lp);
  665. netif_start_queue(dev);
  666. /* Associate IRQ with lance_interrupt */
  667. if (request_irq(dev->irq, &lance_interrupt, 0, "lance", dev)) {
  668. printk("%s: Can't get IRQ %d\n", dev->name, dev->irq);
  669. return -EAGAIN;
  670. }
  671. if (lp->dma_irq >= 0) {
  672. unsigned long flags;
  673. if (request_irq(lp->dma_irq, &lance_dma_merr_int, 0,
  674. "lance error", dev)) {
  675. free_irq(dev->irq, dev);
  676. printk("%s: Can't get DMA IRQ %d\n", dev->name,
  677. lp->dma_irq);
  678. return -EAGAIN;
  679. }
  680. spin_lock_irqsave(&ioasic_ssr_lock, flags);
  681. fast_mb();
  682. /* Enable I/O ASIC LANCE DMA. */
  683. ioasic_write(IO_REG_SSR,
  684. ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN);
  685. fast_mb();
  686. spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
  687. }
  688. status = init_restart_lance(lp);
  689. return status;
  690. }
  691. static int lance_close(struct net_device *dev)
  692. {
  693. struct lance_private *lp = netdev_priv(dev);
  694. volatile struct lance_regs *ll = lp->ll;
  695. netif_stop_queue(dev);
  696. del_timer_sync(&lp->multicast_timer);
  697. /* Stop the card */
  698. writereg(&ll->rap, LE_CSR0);
  699. writereg(&ll->rdp, LE_C0_STOP);
  700. if (lp->dma_irq >= 0) {
  701. unsigned long flags;
  702. spin_lock_irqsave(&ioasic_ssr_lock, flags);
  703. fast_mb();
  704. /* Disable I/O ASIC LANCE DMA. */
  705. ioasic_write(IO_REG_SSR,
  706. ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN);
  707. fast_iob();
  708. spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
  709. free_irq(lp->dma_irq, dev);
  710. }
  711. free_irq(dev->irq, dev);
  712. return 0;
  713. }
  714. static inline int lance_reset(struct net_device *dev)
  715. {
  716. struct lance_private *lp = netdev_priv(dev);
  717. volatile struct lance_regs *ll = lp->ll;
  718. int status;
  719. /* Stop the lance */
  720. writereg(&ll->rap, LE_CSR0);
  721. writereg(&ll->rdp, LE_C0_STOP);
  722. lance_init_ring(dev);
  723. load_csrs(lp);
  724. dev->trans_start = jiffies;
  725. status = init_restart_lance(lp);
  726. return status;
  727. }
  728. static void lance_tx_timeout(struct net_device *dev)
  729. {
  730. struct lance_private *lp = netdev_priv(dev);
  731. volatile struct lance_regs *ll = lp->ll;
  732. printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
  733. dev->name, ll->rdp);
  734. lance_reset(dev);
  735. netif_wake_queue(dev);
  736. }
  737. static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
  738. {
  739. struct lance_private *lp = netdev_priv(dev);
  740. volatile struct lance_regs *ll = lp->ll;
  741. volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
  742. int entry, skblen, len;
  743. skblen = skb->len;
  744. len = skblen;
  745. if (len < ETH_ZLEN) {
  746. skb = skb_padto(skb, ETH_ZLEN);
  747. if (skb == NULL)
  748. return 0;
  749. len = ETH_ZLEN;
  750. }
  751. lp->stats.tx_bytes += len;
  752. entry = lp->tx_new & TX_RING_MOD_MASK;
  753. ib->btx_ring[entry].length = (-len);
  754. ib->btx_ring[entry].misc = 0;
  755. cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data,
  756. skblen);
  757. /* Clear the slack of the packet, do I need this? */
  758. /* For a firewall it's a good idea - AC */
  759. /*
  760. if (len != skblen)
  761. memset ((char *) &ib->tx_buf [entry][skblen], 0, (len - skblen) << 1);
  762. */
  763. /* Now, give the packet to the lance */
  764. ib->btx_ring[entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
  765. lp->tx_new = (lp->tx_new + 1) & TX_RING_MOD_MASK;
  766. if (TX_BUFFS_AVAIL <= 0)
  767. netif_stop_queue(dev);
  768. /* Kick the lance: transmit now */
  769. writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
  770. spin_unlock_irq(&lp->lock);
  771. dev->trans_start = jiffies;
  772. dev_kfree_skb(skb);
  773. return 0;
  774. }
  775. static struct net_device_stats *lance_get_stats(struct net_device *dev)
  776. {
  777. struct lance_private *lp = netdev_priv(dev);
  778. return &lp->stats;
  779. }
  780. static void lance_load_multicast(struct net_device *dev)
  781. {
  782. volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
  783. volatile u16 *mcast_table = (u16 *) & ib->filter;
  784. struct dev_mc_list *dmi = dev->mc_list;
  785. char *addrs;
  786. int i;
  787. u32 crc;
  788. /* set all multicast bits */
  789. if (dev->flags & IFF_ALLMULTI) {
  790. ib->filter[0] = 0xffff;
  791. ib->filter[2] = 0xffff;
  792. ib->filter[4] = 0xffff;
  793. ib->filter[6] = 0xffff;
  794. return;
  795. }
  796. /* clear the multicast filter */
  797. ib->filter[0] = 0;
  798. ib->filter[2] = 0;
  799. ib->filter[4] = 0;
  800. ib->filter[6] = 0;
  801. /* Add addresses */
  802. for (i = 0; i < dev->mc_count; i++) {
  803. addrs = dmi->dmi_addr;
  804. dmi = dmi->next;
  805. /* multicast address? */
  806. if (!(*addrs & 1))
  807. continue;
  808. crc = ether_crc_le(ETH_ALEN, addrs);
  809. crc = crc >> 26;
  810. mcast_table[2 * (crc >> 4)] |= 1 << (crc & 0xf);
  811. }
  812. return;
  813. }
  814. static void lance_set_multicast(struct net_device *dev)
  815. {
  816. struct lance_private *lp = netdev_priv(dev);
  817. volatile struct lance_init_block *ib;
  818. volatile struct lance_regs *ll = lp->ll;
  819. ib = (struct lance_init_block *) (dev->mem_start);
  820. if (!netif_running(dev))
  821. return;
  822. if (lp->tx_old != lp->tx_new) {
  823. mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100);
  824. netif_wake_queue(dev);
  825. return;
  826. }
  827. netif_stop_queue(dev);
  828. writereg(&ll->rap, LE_CSR0);
  829. writereg(&ll->rdp, LE_C0_STOP);
  830. lance_init_ring(dev);
  831. if (dev->flags & IFF_PROMISC) {
  832. ib->mode |= LE_MO_PROM;
  833. } else {
  834. ib->mode &= ~LE_MO_PROM;
  835. lance_load_multicast(dev);
  836. }
  837. load_csrs(lp);
  838. init_restart_lance(lp);
  839. netif_wake_queue(dev);
  840. }
  841. static void lance_set_multicast_retry(unsigned long _opaque)
  842. {
  843. struct net_device *dev = (struct net_device *) _opaque;
  844. lance_set_multicast(dev);
  845. }
  846. static int __init dec_lance_init(const int type, const int slot)
  847. {
  848. static unsigned version_printed;
  849. static const char fmt[] = "declance%d";
  850. char name[10];
  851. struct net_device *dev;
  852. struct lance_private *lp;
  853. volatile struct lance_regs *ll;
  854. int i, ret;
  855. unsigned long esar_base;
  856. unsigned char *esar;
  857. if (dec_lance_debug && version_printed++ == 0)
  858. printk(version);
  859. i = 0;
  860. dev = root_lance_dev;
  861. while (dev) {
  862. i++;
  863. lp = (struct lance_private *)dev->priv;
  864. dev = lp->next;
  865. }
  866. snprintf(name, sizeof(name), fmt, i);
  867. dev = alloc_etherdev(sizeof(struct lance_private));
  868. if (!dev) {
  869. printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n",
  870. name);
  871. ret = -ENOMEM;
  872. goto err_out;
  873. }
  874. /*
  875. * alloc_etherdev ensures the data structures used by the LANCE
  876. * are aligned.
  877. */
  878. lp = netdev_priv(dev);
  879. spin_lock_init(&lp->lock);
  880. lp->type = type;
  881. lp->slot = slot;
  882. switch (type) {
  883. #ifdef CONFIG_TC
  884. case ASIC_LANCE:
  885. dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE);
  886. /* buffer space for the on-board LANCE shared memory */
  887. /*
  888. * FIXME: ugly hack!
  889. */
  890. dev->mem_start = CKSEG1ADDR(0x00020000);
  891. dev->mem_end = dev->mem_start + 0x00020000;
  892. dev->irq = dec_interrupt[DEC_IRQ_LANCE];
  893. esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR);
  894. /* Workaround crash with booting KN04 2.1k from Disk */
  895. memset((void *)dev->mem_start, 0,
  896. dev->mem_end - dev->mem_start);
  897. /*
  898. * setup the pointer arrays, this sucks [tm] :-(
  899. */
  900. for (i = 0; i < RX_RING_SIZE; i++) {
  901. lp->rx_buf_ptr_cpu[i] =
  902. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  903. 2 * i * RX_BUFF_SIZE);
  904. lp->rx_buf_ptr_lnc[i] =
  905. (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
  906. }
  907. for (i = 0; i < TX_RING_SIZE; i++) {
  908. lp->tx_buf_ptr_cpu[i] =
  909. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  910. 2 * RX_RING_SIZE * RX_BUFF_SIZE +
  911. 2 * i * TX_BUFF_SIZE);
  912. lp->tx_buf_ptr_lnc[i] =
  913. (char *)(BUF_OFFSET_LNC +
  914. RX_RING_SIZE * RX_BUFF_SIZE +
  915. i * TX_BUFF_SIZE);
  916. }
  917. /* Setup I/O ASIC LANCE DMA. */
  918. lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR];
  919. ioasic_write(IO_REG_LANCE_DMA_P,
  920. CPHYSADDR(dev->mem_start) << 3);
  921. break;
  922. case PMAD_LANCE:
  923. claim_tc_card(slot);
  924. dev->mem_start = CKSEG1ADDR(get_tc_base_addr(slot));
  925. dev->base_addr = dev->mem_start + 0x100000;
  926. dev->irq = get_tc_irq_nr(slot);
  927. esar_base = dev->mem_start + 0x1c0002;
  928. lp->dma_irq = -1;
  929. for (i = 0; i < RX_RING_SIZE; i++) {
  930. lp->rx_buf_ptr_cpu[i] =
  931. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  932. i * RX_BUFF_SIZE);
  933. lp->rx_buf_ptr_lnc[i] =
  934. (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
  935. }
  936. for (i = 0; i < TX_RING_SIZE; i++) {
  937. lp->tx_buf_ptr_cpu[i] =
  938. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  939. RX_RING_SIZE * RX_BUFF_SIZE +
  940. i * TX_BUFF_SIZE);
  941. lp->tx_buf_ptr_lnc[i] =
  942. (char *)(BUF_OFFSET_LNC +
  943. RX_RING_SIZE * RX_BUFF_SIZE +
  944. i * TX_BUFF_SIZE);
  945. }
  946. break;
  947. #endif
  948. case PMAX_LANCE:
  949. dev->irq = dec_interrupt[DEC_IRQ_LANCE];
  950. dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE);
  951. dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM);
  952. esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1);
  953. lp->dma_irq = -1;
  954. /*
  955. * setup the pointer arrays, this sucks [tm] :-(
  956. */
  957. for (i = 0; i < RX_RING_SIZE; i++) {
  958. lp->rx_buf_ptr_cpu[i] =
  959. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  960. 2 * i * RX_BUFF_SIZE);
  961. lp->rx_buf_ptr_lnc[i] =
  962. (char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
  963. }
  964. for (i = 0; i < TX_RING_SIZE; i++) {
  965. lp->tx_buf_ptr_cpu[i] =
  966. (char *)(dev->mem_start + BUF_OFFSET_CPU +
  967. 2 * RX_RING_SIZE * RX_BUFF_SIZE +
  968. 2 * i * TX_BUFF_SIZE);
  969. lp->tx_buf_ptr_lnc[i] =
  970. (char *)(BUF_OFFSET_LNC +
  971. RX_RING_SIZE * RX_BUFF_SIZE +
  972. i * TX_BUFF_SIZE);
  973. }
  974. break;
  975. default:
  976. printk(KERN_ERR "%s: declance_init called with unknown type\n",
  977. name);
  978. ret = -ENODEV;
  979. goto err_out_free_dev;
  980. }
  981. ll = (struct lance_regs *) dev->base_addr;
  982. esar = (unsigned char *) esar_base;
  983. /* prom checks */
  984. /* First, check for test pattern */
  985. if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
  986. esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
  987. printk(KERN_ERR
  988. "%s: Ethernet station address prom not found!\n",
  989. name);
  990. ret = -ENODEV;
  991. goto err_out_free_dev;
  992. }
  993. /* Check the prom contents */
  994. for (i = 0; i < 8; i++) {
  995. if (esar[i * 4] != esar[0x3c - i * 4] &&
  996. esar[i * 4] != esar[0x40 + i * 4] &&
  997. esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
  998. printk(KERN_ERR "%s: Something is wrong with the "
  999. "ethernet station address prom!\n", name);
  1000. ret = -ENODEV;
  1001. goto err_out_free_dev;
  1002. }
  1003. }
  1004. /* Copy the ethernet address to the device structure, later to the
  1005. * lance initialization block so the lance gets it every time it's
  1006. * (re)initialized.
  1007. */
  1008. switch (type) {
  1009. case ASIC_LANCE:
  1010. printk("%s: IOASIC onboard LANCE, addr = ", name);
  1011. break;
  1012. case PMAD_LANCE:
  1013. printk("%s: PMAD-AA, addr = ", name);
  1014. break;
  1015. case PMAX_LANCE:
  1016. printk("%s: PMAX onboard LANCE, addr = ", name);
  1017. break;
  1018. }
  1019. for (i = 0; i < 6; i++) {
  1020. dev->dev_addr[i] = esar[i * 4];
  1021. printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':');
  1022. }
  1023. printk(" irq = %d\n", dev->irq);
  1024. dev->open = &lance_open;
  1025. dev->stop = &lance_close;
  1026. dev->hard_start_xmit = &lance_start_xmit;
  1027. dev->tx_timeout = &lance_tx_timeout;
  1028. dev->watchdog_timeo = 5*HZ;
  1029. dev->get_stats = &lance_get_stats;
  1030. dev->set_multicast_list = &lance_set_multicast;
  1031. /* lp->ll is the location of the registers for lance card */
  1032. lp->ll = ll;
  1033. /* busmaster_regval (CSR3) should be zero according to the PMAD-AA
  1034. * specification.
  1035. */
  1036. lp->busmaster_regval = 0;
  1037. dev->dma = 0;
  1038. /* We cannot sleep if the chip is busy during a
  1039. * multicast list update event, because such events
  1040. * can occur from interrupts (ex. IPv6). So we
  1041. * use a timer to try again later when necessary. -DaveM
  1042. */
  1043. init_timer(&lp->multicast_timer);
  1044. lp->multicast_timer.data = (unsigned long) dev;
  1045. lp->multicast_timer.function = &lance_set_multicast_retry;
  1046. ret = register_netdev(dev);
  1047. if (ret) {
  1048. printk(KERN_ERR
  1049. "%s: Unable to register netdev, aborting.\n", name);
  1050. goto err_out_free_dev;
  1051. }
  1052. lp->next = root_lance_dev;
  1053. root_lance_dev = dev;
  1054. printk("%s: registered as %s.\n", name, dev->name);
  1055. return 0;
  1056. err_out_free_dev:
  1057. kfree(dev);
  1058. err_out:
  1059. return ret;
  1060. }
  1061. /* Find all the lance cards on the system and initialize them */
  1062. static int __init dec_lance_probe(void)
  1063. {
  1064. int count = 0;
  1065. /* Scan slots for PMAD-AA cards first. */
  1066. #ifdef CONFIG_TC
  1067. if (TURBOCHANNEL) {
  1068. int slot;
  1069. while ((slot = search_tc_card("PMAD-AA")) >= 0) {
  1070. if (dec_lance_init(PMAD_LANCE, slot) < 0)
  1071. break;
  1072. count++;
  1073. }
  1074. }
  1075. #endif
  1076. /* Then handle onboard devices. */
  1077. if (dec_interrupt[DEC_IRQ_LANCE] >= 0) {
  1078. if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) {
  1079. #ifdef CONFIG_TC
  1080. if (dec_lance_init(ASIC_LANCE, -1) >= 0)
  1081. count++;
  1082. #endif
  1083. } else if (!TURBOCHANNEL) {
  1084. if (dec_lance_init(PMAX_LANCE, -1) >= 0)
  1085. count++;
  1086. }
  1087. }
  1088. return (count > 0) ? 0 : -ENODEV;
  1089. }
  1090. static void __exit dec_lance_cleanup(void)
  1091. {
  1092. while (root_lance_dev) {
  1093. struct net_device *dev = root_lance_dev;
  1094. struct lance_private *lp = netdev_priv(dev);
  1095. unregister_netdev(dev);
  1096. #ifdef CONFIG_TC
  1097. if (lp->slot >= 0)
  1098. release_tc_card(lp->slot);
  1099. #endif
  1100. root_lance_dev = lp->next;
  1101. free_netdev(dev);
  1102. }
  1103. }
  1104. module_init(dec_lance_probe);
  1105. module_exit(dec_lance_cleanup);