common.h 10 KB

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  1. /*****************************************************************************
  2. * *
  3. * File: common.h *
  4. * $Revision: 1.21 $ *
  5. * $Date: 2005/06/22 00:43:25 $ *
  6. * Description: *
  7. * part of the Chelsio 10Gb Ethernet Driver. *
  8. * *
  9. * This program is free software; you can redistribute it and/or modify *
  10. * it under the terms of the GNU General Public License, version 2, as *
  11. * published by the Free Software Foundation. *
  12. * *
  13. * You should have received a copy of the GNU General Public License along *
  14. * with this program; if not, write to the Free Software Foundation, Inc., *
  15. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  16. * *
  17. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED *
  18. * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF *
  19. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
  20. * *
  21. * http://www.chelsio.com *
  22. * *
  23. * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
  24. * All rights reserved. *
  25. * *
  26. * Maintainers: maintainers@chelsio.com *
  27. * *
  28. * Authors: Dimitrios Michailidis <dm@chelsio.com> *
  29. * Tina Yang <tainay@chelsio.com> *
  30. * Felix Marti <felix@chelsio.com> *
  31. * Scott Bardone <sbardone@chelsio.com> *
  32. * Kurt Ottaway <kottaway@chelsio.com> *
  33. * Frank DiMambro <frank@chelsio.com> *
  34. * *
  35. * History: *
  36. * *
  37. ****************************************************************************/
  38. #ifndef _CXGB_COMMON_H_
  39. #define _CXGB_COMMON_H_
  40. #include <linux/config.h>
  41. #include <linux/module.h>
  42. #include <linux/netdevice.h>
  43. #include <linux/types.h>
  44. #include <linux/delay.h>
  45. #include <linux/pci.h>
  46. #include <linux/ethtool.h>
  47. #include <linux/mii.h>
  48. #include <linux/crc32.h>
  49. #include <linux/init.h>
  50. #include <asm/io.h>
  51. #include <linux/pci_ids.h>
  52. #define DRV_DESCRIPTION "Chelsio 10Gb Ethernet Driver"
  53. #define DRV_NAME "cxgb"
  54. #define DRV_VERSION "2.1.1"
  55. #define PFX DRV_NAME ": "
  56. #define CH_ERR(fmt, ...) printk(KERN_ERR PFX fmt, ## __VA_ARGS__)
  57. #define CH_WARN(fmt, ...) printk(KERN_WARNING PFX fmt, ## __VA_ARGS__)
  58. #define CH_ALERT(fmt, ...) printk(KERN_ALERT PFX fmt, ## __VA_ARGS__)
  59. #define CH_DEVICE(devid, ssid, idx) \
  60. { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, ssid, 0, 0, idx }
  61. #define SUPPORTED_PAUSE (1 << 13)
  62. #define SUPPORTED_LOOPBACK (1 << 15)
  63. #define ADVERTISED_PAUSE (1 << 13)
  64. #define ADVERTISED_ASYM_PAUSE (1 << 14)
  65. typedef struct adapter adapter_t;
  66. void t1_elmer0_ext_intr(adapter_t *adapter);
  67. void t1_link_changed(adapter_t *adapter, int port_id, int link_status,
  68. int speed, int duplex, int fc);
  69. struct t1_rx_mode {
  70. struct net_device *dev;
  71. u32 idx;
  72. struct dev_mc_list *list;
  73. };
  74. #define t1_rx_mode_promisc(rm) (rm->dev->flags & IFF_PROMISC)
  75. #define t1_rx_mode_allmulti(rm) (rm->dev->flags & IFF_ALLMULTI)
  76. #define t1_rx_mode_mc_cnt(rm) (rm->dev->mc_count)
  77. static inline u8 *t1_get_next_mcaddr(struct t1_rx_mode *rm)
  78. {
  79. u8 *addr = NULL;
  80. if (rm->idx++ < rm->dev->mc_count) {
  81. addr = rm->list->dmi_addr;
  82. rm->list = rm->list->next;
  83. }
  84. return addr;
  85. }
  86. #define MAX_NPORTS 4
  87. #define SPEED_INVALID 0xffff
  88. #define DUPLEX_INVALID 0xff
  89. enum {
  90. CHBT_BOARD_N110,
  91. CHBT_BOARD_N210
  92. };
  93. enum {
  94. CHBT_TERM_T1,
  95. CHBT_TERM_T2
  96. };
  97. enum {
  98. CHBT_MAC_PM3393,
  99. };
  100. enum {
  101. CHBT_PHY_88X2010,
  102. };
  103. enum {
  104. PAUSE_RX = 1 << 0,
  105. PAUSE_TX = 1 << 1,
  106. PAUSE_AUTONEG = 1 << 2
  107. };
  108. /* Revisions of T1 chip */
  109. enum {
  110. TERM_T1A = 0,
  111. TERM_T1B = 1,
  112. TERM_T2 = 3
  113. };
  114. struct sge_params {
  115. unsigned int cmdQ_size[2];
  116. unsigned int freelQ_size[2];
  117. unsigned int large_buf_capacity;
  118. unsigned int rx_coalesce_usecs;
  119. unsigned int last_rx_coalesce_raw;
  120. unsigned int default_rx_coalesce_usecs;
  121. unsigned int sample_interval_usecs;
  122. unsigned int coalesce_enable;
  123. unsigned int polling;
  124. };
  125. struct chelsio_pci_params {
  126. unsigned short speed;
  127. unsigned char width;
  128. unsigned char is_pcix;
  129. };
  130. struct adapter_params {
  131. struct sge_params sge;
  132. struct chelsio_pci_params pci;
  133. const struct board_info *brd_info;
  134. unsigned int nports; /* # of ethernet ports */
  135. unsigned int stats_update_period;
  136. unsigned short chip_revision;
  137. unsigned char chip_version;
  138. };
  139. struct link_config {
  140. unsigned int supported; /* link capabilities */
  141. unsigned int advertising; /* advertised capabilities */
  142. unsigned short requested_speed; /* speed user has requested */
  143. unsigned short speed; /* actual link speed */
  144. unsigned char requested_duplex; /* duplex user has requested */
  145. unsigned char duplex; /* actual link duplex */
  146. unsigned char requested_fc; /* flow control user has requested */
  147. unsigned char fc; /* actual link flow control */
  148. unsigned char autoneg; /* autonegotiating? */
  149. };
  150. struct cmac;
  151. struct cphy;
  152. struct port_info {
  153. struct net_device *dev;
  154. struct cmac *mac;
  155. struct cphy *phy;
  156. struct link_config link_config;
  157. struct net_device_stats netstats;
  158. };
  159. struct sge;
  160. struct peespi;
  161. struct adapter {
  162. u8 __iomem *regs;
  163. struct pci_dev *pdev;
  164. unsigned long registered_device_map;
  165. unsigned long open_device_map;
  166. unsigned long flags;
  167. const char *name;
  168. int msg_enable;
  169. u32 mmio_len;
  170. struct work_struct ext_intr_handler_task;
  171. struct adapter_params params;
  172. struct vlan_group *vlan_grp;
  173. /* Terminator modules. */
  174. struct sge *sge;
  175. struct peespi *espi;
  176. struct port_info port[MAX_NPORTS];
  177. struct work_struct stats_update_task;
  178. struct timer_list stats_update_timer;
  179. struct semaphore mib_mutex;
  180. spinlock_t tpi_lock;
  181. spinlock_t work_lock;
  182. /* guards async operations */
  183. spinlock_t async_lock ____cacheline_aligned;
  184. u32 slow_intr_mask;
  185. };
  186. enum { /* adapter flags */
  187. FULL_INIT_DONE = 1 << 0,
  188. TSO_CAPABLE = 1 << 2,
  189. TCP_CSUM_CAPABLE = 1 << 3,
  190. UDP_CSUM_CAPABLE = 1 << 4,
  191. VLAN_ACCEL_CAPABLE = 1 << 5,
  192. RX_CSUM_ENABLED = 1 << 6,
  193. };
  194. struct mdio_ops;
  195. struct gmac;
  196. struct gphy;
  197. struct board_info {
  198. unsigned char board;
  199. unsigned char port_number;
  200. unsigned long caps;
  201. unsigned char chip_term;
  202. unsigned char chip_mac;
  203. unsigned char chip_phy;
  204. unsigned int clock_core;
  205. unsigned int clock_mc3;
  206. unsigned int clock_mc4;
  207. unsigned int espi_nports;
  208. unsigned int clock_cspi;
  209. unsigned int clock_elmer0;
  210. unsigned char mdio_mdien;
  211. unsigned char mdio_mdiinv;
  212. unsigned char mdio_mdc;
  213. unsigned char mdio_phybaseaddr;
  214. struct gmac *gmac;
  215. struct gphy *gphy;
  216. struct mdio_ops *mdio_ops;
  217. const char *desc;
  218. };
  219. extern struct pci_device_id t1_pci_tbl[];
  220. static inline int adapter_matches_type(const adapter_t *adapter,
  221. int version, int revision)
  222. {
  223. return adapter->params.chip_version == version &&
  224. adapter->params.chip_revision == revision;
  225. }
  226. #define t1_is_T1B(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1B)
  227. #define is_T2(adap) adapter_matches_type(adap, CHBT_TERM_T2, TERM_T2)
  228. /* Returns true if an adapter supports VLAN acceleration and TSO */
  229. static inline int vlan_tso_capable(const adapter_t *adapter)
  230. {
  231. return !t1_is_T1B(adapter);
  232. }
  233. #define for_each_port(adapter, iter) \
  234. for (iter = 0; iter < (adapter)->params.nports; ++iter)
  235. #define board_info(adapter) ((adapter)->params.brd_info)
  236. #define is_10G(adapter) (board_info(adapter)->caps & SUPPORTED_10000baseT_Full)
  237. static inline unsigned int core_ticks_per_usec(const adapter_t *adap)
  238. {
  239. return board_info(adap)->clock_core / 1000000;
  240. }
  241. extern int t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
  242. extern int t1_tpi_read(adapter_t *adapter, u32 addr, u32 *value);
  243. extern void t1_interrupts_enable(adapter_t *adapter);
  244. extern void t1_interrupts_disable(adapter_t *adapter);
  245. extern void t1_interrupts_clear(adapter_t *adapter);
  246. extern int elmer0_ext_intr_handler(adapter_t *adapter);
  247. extern int t1_slow_intr_handler(adapter_t *adapter);
  248. extern int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
  249. extern const struct board_info *t1_get_board_info(unsigned int board_id);
  250. extern const struct board_info *t1_get_board_info_from_ids(unsigned int devid,
  251. unsigned short ssid);
  252. extern int t1_seeprom_read(adapter_t *adapter, u32 addr, u32 *data);
  253. extern int t1_get_board_rev(adapter_t *adapter, const struct board_info *bi,
  254. struct adapter_params *p);
  255. extern int t1_init_hw_modules(adapter_t *adapter);
  256. extern int t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi);
  257. extern void t1_free_sw_modules(adapter_t *adapter);
  258. extern void t1_fatal_err(adapter_t *adapter);
  259. extern void t1_tp_set_udp_checksum_offload(adapter_t *adapter, int enable);
  260. extern void t1_tp_set_tcp_checksum_offload(adapter_t *adapter, int enable);
  261. extern void t1_tp_set_ip_checksum_offload(adapter_t *adapter, int enable);
  262. #endif /* _CXGB_COMMON_H_ */