3c501.h 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293
  1. /*
  2. * Index to functions.
  3. */
  4. static int el1_probe1(struct net_device *dev, int ioaddr);
  5. static int el_open(struct net_device *dev);
  6. static void el_timeout(struct net_device *dev);
  7. static int el_start_xmit(struct sk_buff *skb, struct net_device *dev);
  8. static irqreturn_t el_interrupt(int irq, void *dev_id, struct pt_regs *regs);
  9. static void el_receive(struct net_device *dev);
  10. static void el_reset(struct net_device *dev);
  11. static int el1_close(struct net_device *dev);
  12. static struct net_device_stats *el1_get_stats(struct net_device *dev);
  13. static void set_multicast_list(struct net_device *dev);
  14. static struct ethtool_ops netdev_ethtool_ops;
  15. #define EL1_IO_EXTENT 16
  16. #ifndef EL_DEBUG
  17. #define EL_DEBUG 0 /* use 0 for production, 1 for devel., >2 for debug */
  18. #endif /* Anything above 5 is wordy death! */
  19. #define debug el_debug
  20. static int el_debug = EL_DEBUG;
  21. /*
  22. * Board-specific info in dev->priv.
  23. */
  24. struct net_local
  25. {
  26. struct net_device_stats stats;
  27. int tx_pkt_start; /* The length of the current Tx packet. */
  28. int collisions; /* Tx collisions this packet */
  29. int loading; /* Spot buffer load collisions */
  30. int txing; /* True if card is in TX mode */
  31. spinlock_t lock; /* Serializing lock */
  32. };
  33. #define RX_STATUS (ioaddr + 0x06)
  34. #define RX_CMD RX_STATUS
  35. #define TX_STATUS (ioaddr + 0x07)
  36. #define TX_CMD TX_STATUS
  37. #define GP_LOW (ioaddr + 0x08)
  38. #define GP_HIGH (ioaddr + 0x09)
  39. #define RX_BUF_CLR (ioaddr + 0x0A)
  40. #define RX_LOW (ioaddr + 0x0A)
  41. #define RX_HIGH (ioaddr + 0x0B)
  42. #define SAPROM (ioaddr + 0x0C)
  43. #define AX_STATUS (ioaddr + 0x0E)
  44. #define AX_CMD AX_STATUS
  45. #define DATAPORT (ioaddr + 0x0F)
  46. #define TX_RDY 0x08 /* In TX_STATUS */
  47. #define EL1_DATAPTR 0x08
  48. #define EL1_RXPTR 0x0A
  49. #define EL1_SAPROM 0x0C
  50. #define EL1_DATAPORT 0x0f
  51. /*
  52. * Writes to the ax command register.
  53. */
  54. #define AX_OFF 0x00 /* Irq off, buffer access on */
  55. #define AX_SYS 0x40 /* Load the buffer */
  56. #define AX_XMIT 0x44 /* Transmit a packet */
  57. #define AX_RX 0x48 /* Receive a packet */
  58. #define AX_LOOP 0x0C /* Loopback mode */
  59. #define AX_RESET 0x80
  60. /*
  61. * Normal receive mode written to RX_STATUS. We must intr on short packets
  62. * to avoid bogus rx lockups.
  63. */
  64. #define RX_NORM 0xA8 /* 0x68 == all addrs, 0xA8 only to me. */
  65. #define RX_PROM 0x68 /* Senior Prom, uhmm promiscuous mode. */
  66. #define RX_MULT 0xE8 /* Accept multicast packets. */
  67. #define TX_NORM 0x0A /* Interrupt on everything that might hang the chip */
  68. /*
  69. * TX_STATUS register.
  70. */
  71. #define TX_COLLISION 0x02
  72. #define TX_16COLLISIONS 0x04
  73. #define TX_READY 0x08
  74. #define RX_RUNT 0x08
  75. #define RX_MISSED 0x01 /* Missed a packet due to 3c501 braindamage. */
  76. #define RX_GOOD 0x30 /* Good packet 0x20, or simple overflow 0x10. */