pci.c 9.1 KB

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  1. /*
  2. * linux/drivers/mtd/maps/pci.c
  3. *
  4. * Copyright (C) 2001 Russell King, All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * $Id: pci.c,v 1.14 2005/11/17 08:20:27 dwmw2 Exp $
  11. *
  12. * Generic PCI memory map driver. We support the following boards:
  13. * - Intel IQ80310 ATU.
  14. * - Intel EBSA285 (blank rom programming mode). Tested working 27/09/2001
  15. */
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/pci.h>
  19. #include <linux/init.h>
  20. #include <linux/slab.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/map.h>
  23. #include <linux/mtd/partitions.h>
  24. struct map_pci_info;
  25. struct mtd_pci_info {
  26. int (*init)(struct pci_dev *dev, struct map_pci_info *map);
  27. void (*exit)(struct pci_dev *dev, struct map_pci_info *map);
  28. unsigned long (*translate)(struct map_pci_info *map, unsigned long ofs);
  29. const char *map_name;
  30. };
  31. struct map_pci_info {
  32. struct map_info map;
  33. void __iomem *base;
  34. void (*exit)(struct pci_dev *dev, struct map_pci_info *map);
  35. unsigned long (*translate)(struct map_pci_info *map, unsigned long ofs);
  36. struct pci_dev *dev;
  37. };
  38. static map_word mtd_pci_read8(struct map_info *_map, unsigned long ofs)
  39. {
  40. struct map_pci_info *map = (struct map_pci_info *)_map;
  41. map_word val;
  42. val.x[0]= readb(map->base + map->translate(map, ofs));
  43. // printk("read8 : %08lx => %02x\n", ofs, val.x[0]);
  44. return val;
  45. }
  46. #if 0
  47. static map_word mtd_pci_read16(struct map_info *_map, unsigned long ofs)
  48. {
  49. struct map_pci_info *map = (struct map_pci_info *)_map;
  50. map_word val;
  51. val.x[0] = readw(map->base + map->translate(map, ofs));
  52. // printk("read16: %08lx => %04x\n", ofs, val.x[0]);
  53. return val;
  54. }
  55. #endif
  56. static map_word mtd_pci_read32(struct map_info *_map, unsigned long ofs)
  57. {
  58. struct map_pci_info *map = (struct map_pci_info *)_map;
  59. map_word val;
  60. val.x[0] = readl(map->base + map->translate(map, ofs));
  61. // printk("read32: %08lx => %08x\n", ofs, val.x[0]);
  62. return val;
  63. }
  64. static void mtd_pci_copyfrom(struct map_info *_map, void *to, unsigned long from, ssize_t len)
  65. {
  66. struct map_pci_info *map = (struct map_pci_info *)_map;
  67. memcpy_fromio(to, map->base + map->translate(map, from), len);
  68. }
  69. static void mtd_pci_write8(struct map_info *_map, map_word val, unsigned long ofs)
  70. {
  71. struct map_pci_info *map = (struct map_pci_info *)_map;
  72. // printk("write8 : %08lx <= %02x\n", ofs, val.x[0]);
  73. writeb(val.x[0], map->base + map->translate(map, ofs));
  74. }
  75. #if 0
  76. static void mtd_pci_write16(struct map_info *_map, map_word val, unsigned long ofs)
  77. {
  78. struct map_pci_info *map = (struct map_pci_info *)_map;
  79. // printk("write16: %08lx <= %04x\n", ofs, val.x[0]);
  80. writew(val.x[0], map->base + map->translate(map, ofs));
  81. }
  82. #endif
  83. static void mtd_pci_write32(struct map_info *_map, map_word val, unsigned long ofs)
  84. {
  85. struct map_pci_info *map = (struct map_pci_info *)_map;
  86. // printk("write32: %08lx <= %08x\n", ofs, val.x[0]);
  87. writel(val.x[0], map->base + map->translate(map, ofs));
  88. }
  89. static void mtd_pci_copyto(struct map_info *_map, unsigned long to, const void *from, ssize_t len)
  90. {
  91. struct map_pci_info *map = (struct map_pci_info *)_map;
  92. memcpy_toio(map->base + map->translate(map, to), from, len);
  93. }
  94. static const struct map_info mtd_pci_map = {
  95. .phys = NO_XIP,
  96. .copy_from = mtd_pci_copyfrom,
  97. .copy_to = mtd_pci_copyto,
  98. };
  99. /*
  100. * Intel IOP80310 Flash driver
  101. */
  102. static int
  103. intel_iq80310_init(struct pci_dev *dev, struct map_pci_info *map)
  104. {
  105. u32 win_base;
  106. map->map.bankwidth = 1;
  107. map->map.read = mtd_pci_read8,
  108. map->map.write = mtd_pci_write8,
  109. map->map.size = 0x00800000;
  110. map->base = ioremap_nocache(pci_resource_start(dev, 0),
  111. pci_resource_len(dev, 0));
  112. if (!map->base)
  113. return -ENOMEM;
  114. /*
  115. * We want to base the memory window at Xscale
  116. * bus address 0, not 0x1000.
  117. */
  118. pci_read_config_dword(dev, 0x44, &win_base);
  119. pci_write_config_dword(dev, 0x44, 0);
  120. map->map.map_priv_2 = win_base;
  121. return 0;
  122. }
  123. static void
  124. intel_iq80310_exit(struct pci_dev *dev, struct map_pci_info *map)
  125. {
  126. if (map->base)
  127. iounmap(map->base);
  128. pci_write_config_dword(dev, 0x44, map->map.map_priv_2);
  129. }
  130. static unsigned long
  131. intel_iq80310_translate(struct map_pci_info *map, unsigned long ofs)
  132. {
  133. unsigned long page_addr = ofs & 0x00400000;
  134. /*
  135. * This mundges the flash location so we avoid
  136. * the first 80 bytes (they appear to read nonsense).
  137. */
  138. if (page_addr) {
  139. writel(0x00000008, map->base + 0x1558);
  140. writel(0x00000000, map->base + 0x1550);
  141. } else {
  142. writel(0x00000007, map->base + 0x1558);
  143. writel(0x00800000, map->base + 0x1550);
  144. ofs += 0x00800000;
  145. }
  146. return ofs;
  147. }
  148. static struct mtd_pci_info intel_iq80310_info = {
  149. .init = intel_iq80310_init,
  150. .exit = intel_iq80310_exit,
  151. .translate = intel_iq80310_translate,
  152. .map_name = "cfi_probe",
  153. };
  154. /*
  155. * Intel DC21285 driver
  156. */
  157. static int
  158. intel_dc21285_init(struct pci_dev *dev, struct map_pci_info *map)
  159. {
  160. unsigned long base, len;
  161. base = pci_resource_start(dev, PCI_ROM_RESOURCE);
  162. len = pci_resource_len(dev, PCI_ROM_RESOURCE);
  163. if (!len || !base) {
  164. /*
  165. * No ROM resource
  166. */
  167. base = pci_resource_start(dev, 2);
  168. len = pci_resource_len(dev, 2);
  169. /*
  170. * We need to re-allocate PCI BAR2 address range to the
  171. * PCI ROM BAR, and disable PCI BAR2.
  172. */
  173. } else {
  174. /*
  175. * Hmm, if an address was allocated to the ROM resource, but
  176. * not enabled, should we be allocating a new resource for it
  177. * or simply enabling it?
  178. */
  179. if (!(pci_resource_flags(dev, PCI_ROM_RESOURCE) &
  180. IORESOURCE_ROM_ENABLE)) {
  181. u32 val;
  182. pci_resource_flags(dev, PCI_ROM_RESOURCE) |= IORESOURCE_ROM_ENABLE;
  183. pci_read_config_dword(dev, PCI_ROM_ADDRESS, &val);
  184. val |= PCI_ROM_ADDRESS_ENABLE;
  185. pci_write_config_dword(dev, PCI_ROM_ADDRESS, val);
  186. printk("%s: enabling expansion ROM\n", pci_name(dev));
  187. }
  188. }
  189. if (!len || !base)
  190. return -ENXIO;
  191. map->map.bankwidth = 4;
  192. map->map.read = mtd_pci_read32,
  193. map->map.write = mtd_pci_write32,
  194. map->map.size = len;
  195. map->base = ioremap_nocache(base, len);
  196. if (!map->base)
  197. return -ENOMEM;
  198. return 0;
  199. }
  200. static void
  201. intel_dc21285_exit(struct pci_dev *dev, struct map_pci_info *map)
  202. {
  203. u32 val;
  204. if (map->base)
  205. iounmap(map->base);
  206. /*
  207. * We need to undo the PCI BAR2/PCI ROM BAR address alteration.
  208. */
  209. pci_resource_flags(dev, PCI_ROM_RESOURCE) &= ~IORESOURCE_ROM_ENABLE;
  210. pci_read_config_dword(dev, PCI_ROM_ADDRESS, &val);
  211. val &= ~PCI_ROM_ADDRESS_ENABLE;
  212. pci_write_config_dword(dev, PCI_ROM_ADDRESS, val);
  213. }
  214. static unsigned long
  215. intel_dc21285_translate(struct map_pci_info *map, unsigned long ofs)
  216. {
  217. return ofs & 0x00ffffc0 ? ofs : (ofs ^ (1 << 5));
  218. }
  219. static struct mtd_pci_info intel_dc21285_info = {
  220. .init = intel_dc21285_init,
  221. .exit = intel_dc21285_exit,
  222. .translate = intel_dc21285_translate,
  223. .map_name = "jedec_probe",
  224. };
  225. /*
  226. * PCI device ID table
  227. */
  228. static struct pci_device_id mtd_pci_ids[] = {
  229. {
  230. .vendor = PCI_VENDOR_ID_INTEL,
  231. .device = 0x530d,
  232. .subvendor = PCI_ANY_ID,
  233. .subdevice = PCI_ANY_ID,
  234. .class = PCI_CLASS_MEMORY_OTHER << 8,
  235. .class_mask = 0xffff00,
  236. .driver_data = (unsigned long)&intel_iq80310_info,
  237. },
  238. {
  239. .vendor = PCI_VENDOR_ID_DEC,
  240. .device = PCI_DEVICE_ID_DEC_21285,
  241. .subvendor = 0, /* DC21285 defaults to 0 on reset */
  242. .subdevice = 0, /* DC21285 defaults to 0 on reset */
  243. .driver_data = (unsigned long)&intel_dc21285_info,
  244. },
  245. { 0, }
  246. };
  247. /*
  248. * Generic code follows.
  249. */
  250. static int __devinit
  251. mtd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
  252. {
  253. struct mtd_pci_info *info = (struct mtd_pci_info *)id->driver_data;
  254. struct map_pci_info *map = NULL;
  255. struct mtd_info *mtd = NULL;
  256. int err;
  257. err = pci_enable_device(dev);
  258. if (err)
  259. goto out;
  260. err = pci_request_regions(dev, "pci mtd");
  261. if (err)
  262. goto out;
  263. map = kmalloc(sizeof(*map), GFP_KERNEL);
  264. err = -ENOMEM;
  265. if (!map)
  266. goto release;
  267. map->map = mtd_pci_map;
  268. map->map.name = pci_name(dev);
  269. map->dev = dev;
  270. map->exit = info->exit;
  271. map->translate = info->translate;
  272. err = info->init(dev, map);
  273. if (err)
  274. goto release;
  275. /* tsk - do_map_probe should take const char * */
  276. mtd = do_map_probe((char *)info->map_name, &map->map);
  277. err = -ENODEV;
  278. if (!mtd)
  279. goto release;
  280. mtd->owner = THIS_MODULE;
  281. add_mtd_device(mtd);
  282. pci_set_drvdata(dev, mtd);
  283. return 0;
  284. release:
  285. if (map) {
  286. map->exit(dev, map);
  287. kfree(map);
  288. }
  289. pci_release_regions(dev);
  290. out:
  291. return err;
  292. }
  293. static void __devexit
  294. mtd_pci_remove(struct pci_dev *dev)
  295. {
  296. struct mtd_info *mtd = pci_get_drvdata(dev);
  297. struct map_pci_info *map = mtd->priv;
  298. del_mtd_device(mtd);
  299. map_destroy(mtd);
  300. map->exit(dev, map);
  301. kfree(map);
  302. pci_set_drvdata(dev, NULL);
  303. pci_release_regions(dev);
  304. }
  305. static struct pci_driver mtd_pci_driver = {
  306. .name = "MTD PCI",
  307. .probe = mtd_pci_probe,
  308. .remove = __devexit_p(mtd_pci_remove),
  309. .id_table = mtd_pci_ids,
  310. };
  311. static int __init mtd_pci_maps_init(void)
  312. {
  313. return pci_register_driver(&mtd_pci_driver);
  314. }
  315. static void __exit mtd_pci_maps_exit(void)
  316. {
  317. pci_unregister_driver(&mtd_pci_driver);
  318. }
  319. module_init(mtd_pci_maps_init);
  320. module_exit(mtd_pci_maps_exit);
  321. MODULE_LICENSE("GPL");
  322. MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
  323. MODULE_DESCRIPTION("Generic PCI map driver");
  324. MODULE_DEVICE_TABLE(pci, mtd_pci_ids);