pmc551.c 29 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842
  1. /*
  2. * $Id: pmc551.c,v 1.32 2005/11/07 11:14:25 gleixner Exp $
  3. *
  4. * PMC551 PCI Mezzanine Ram Device
  5. *
  6. * Author:
  7. * Mark Ferrell <mferrell@mvista.com>
  8. * Copyright 1999,2000 Nortel Networks
  9. *
  10. * License:
  11. * As part of this driver was derived from the slram.c driver it
  12. * falls under the same license, which is GNU General Public
  13. * License v2
  14. *
  15. * Description:
  16. * This driver is intended to support the PMC551 PCI Ram device
  17. * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
  18. * cPCI embedded systems. The device contains a single SROM
  19. * that initially programs the V370PDC chipset onboard the
  20. * device, and various banks of DRAM/SDRAM onboard. This driver
  21. * implements this PCI Ram device as an MTD (Memory Technology
  22. * Device) so that it can be used to hold a file system, or for
  23. * added swap space in embedded systems. Since the memory on
  24. * this board isn't as fast as main memory we do not try to hook
  25. * it into main memory as that would simply reduce performance
  26. * on the system. Using it as a block device allows us to use
  27. * it as high speed swap or for a high speed disk device of some
  28. * sort. Which becomes very useful on diskless systems in the
  29. * embedded market I might add.
  30. *
  31. * Notes:
  32. * Due to what I assume is more buggy SROM, the 64M PMC551 I
  33. * have available claims that all 4 of it's DRAM banks have 64M
  34. * of ram configured (making a grand total of 256M onboard).
  35. * This is slightly annoying since the BAR0 size reflects the
  36. * aperture size, not the dram size, and the V370PDC supplies no
  37. * other method for memory size discovery. This problem is
  38. * mostly only relevant when compiled as a module, as the
  39. * unloading of the module with an aperture size smaller then
  40. * the ram will cause the driver to detect the onboard memory
  41. * size to be equal to the aperture size when the module is
  42. * reloaded. Soooo, to help, the module supports an msize
  43. * option to allow the specification of the onboard memory, and
  44. * an asize option, to allow the specification of the aperture
  45. * size. The aperture must be equal to or less then the memory
  46. * size, the driver will correct this if you screw it up. This
  47. * problem is not relevant for compiled in drivers as compiled
  48. * in drivers only init once.
  49. *
  50. * Credits:
  51. * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
  52. * initial example code of how to initialize this device and for
  53. * help with questions I had concerning operation of the device.
  54. *
  55. * Most of the MTD code for this driver was originally written
  56. * for the slram.o module in the MTD drivers package which
  57. * allows the mapping of system memory into an MTD device.
  58. * Since the PMC551 memory module is accessed in the same
  59. * fashion as system memory, the slram.c code became a very nice
  60. * fit to the needs of this driver. All we added was PCI
  61. * detection/initialization to the driver and automatically figure
  62. * out the size via the PCI detection.o, later changes by Corey
  63. * Minyard set up the card to utilize a 1M sliding apature.
  64. *
  65. * Corey Minyard <minyard@nortelnetworks.com>
  66. * * Modified driver to utilize a sliding aperture instead of
  67. * mapping all memory into kernel space which turned out to
  68. * be very wasteful.
  69. * * Located a bug in the SROM's initialization sequence that
  70. * made the memory unusable, added a fix to code to touch up
  71. * the DRAM some.
  72. *
  73. * Bugs/FIXME's:
  74. * * MUST fix the init function to not spin on a register
  75. * waiting for it to set .. this does not safely handle busted
  76. * devices that never reset the register correctly which will
  77. * cause the system to hang w/ a reboot being the only chance at
  78. * recover. [sort of fixed, could be better]
  79. * * Add I2C handling of the SROM so we can read the SROM's information
  80. * about the aperture size. This should always accurately reflect the
  81. * onboard memory size.
  82. * * Comb the init routine. It's still a bit cludgy on a few things.
  83. */
  84. #include <linux/config.h>
  85. #include <linux/kernel.h>
  86. #include <linux/module.h>
  87. #include <asm/uaccess.h>
  88. #include <linux/types.h>
  89. #include <linux/sched.h>
  90. #include <linux/init.h>
  91. #include <linux/ptrace.h>
  92. #include <linux/slab.h>
  93. #include <linux/string.h>
  94. #include <linux/timer.h>
  95. #include <linux/major.h>
  96. #include <linux/fs.h>
  97. #include <linux/ioctl.h>
  98. #include <asm/io.h>
  99. #include <asm/system.h>
  100. #include <linux/pci.h>
  101. #ifndef CONFIG_PCI
  102. #error Enable PCI in your kernel config
  103. #endif
  104. #include <linux/mtd/mtd.h>
  105. #include <linux/mtd/pmc551.h>
  106. #include <linux/mtd/compatmac.h>
  107. static struct mtd_info *pmc551list;
  108. static int pmc551_erase (struct mtd_info *mtd, struct erase_info *instr)
  109. {
  110. struct mypriv *priv = mtd->priv;
  111. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  112. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  113. unsigned long end;
  114. u_char *ptr;
  115. size_t retlen;
  116. #ifdef CONFIG_MTD_PMC551_DEBUG
  117. printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr, (long)instr->len);
  118. #endif
  119. end = instr->addr + instr->len - 1;
  120. /* Is it past the end? */
  121. if ( end > mtd->size ) {
  122. #ifdef CONFIG_MTD_PMC551_DEBUG
  123. printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n", (long)end, (long)mtd->size);
  124. #endif
  125. return -EINVAL;
  126. }
  127. eoff_hi = end & ~(priv->asize - 1);
  128. soff_hi = instr->addr & ~(priv->asize - 1);
  129. eoff_lo = end & (priv->asize - 1);
  130. soff_lo = instr->addr & (priv->asize - 1);
  131. pmc551_point (mtd, instr->addr, instr->len, &retlen, &ptr);
  132. if ( soff_hi == eoff_hi || mtd->size == priv->asize) {
  133. /* The whole thing fits within one access, so just one shot
  134. will do it. */
  135. memset(ptr, 0xff, instr->len);
  136. } else {
  137. /* We have to do multiple writes to get all the data
  138. written. */
  139. while (soff_hi != eoff_hi) {
  140. #ifdef CONFIG_MTD_PMC551_DEBUG
  141. printk( KERN_DEBUG "pmc551_erase() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  142. #endif
  143. memset(ptr, 0xff, priv->asize);
  144. if (soff_hi + priv->asize >= mtd->size) {
  145. goto out;
  146. }
  147. soff_hi += priv->asize;
  148. pmc551_point (mtd,(priv->base_map0|soff_hi),
  149. priv->asize, &retlen, &ptr);
  150. }
  151. memset (ptr, 0xff, eoff_lo);
  152. }
  153. out:
  154. instr->state = MTD_ERASE_DONE;
  155. #ifdef CONFIG_MTD_PMC551_DEBUG
  156. printk(KERN_DEBUG "pmc551_erase() done\n");
  157. #endif
  158. mtd_erase_callback(instr);
  159. return 0;
  160. }
  161. static int pmc551_point (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf)
  162. {
  163. struct mypriv *priv = mtd->priv;
  164. u32 soff_hi;
  165. u32 soff_lo;
  166. #ifdef CONFIG_MTD_PMC551_DEBUG
  167. printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
  168. #endif
  169. if (from + len > mtd->size) {
  170. #ifdef CONFIG_MTD_PMC551_DEBUG
  171. printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n", (long)from+len, (long)mtd->size);
  172. #endif
  173. return -EINVAL;
  174. }
  175. soff_hi = from & ~(priv->asize - 1);
  176. soff_lo = from & (priv->asize - 1);
  177. /* Cheap hack optimization */
  178. if( priv->curr_map0 != from ) {
  179. pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0,
  180. (priv->base_map0 | soff_hi) );
  181. priv->curr_map0 = soff_hi;
  182. }
  183. *mtdbuf = priv->start + soff_lo;
  184. *retlen = len;
  185. return 0;
  186. }
  187. static void pmc551_unpoint (struct mtd_info *mtd, u_char *addr, loff_t from, size_t len)
  188. {
  189. #ifdef CONFIG_MTD_PMC551_DEBUG
  190. printk(KERN_DEBUG "pmc551_unpoint()\n");
  191. #endif
  192. }
  193. static int pmc551_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
  194. {
  195. struct mypriv *priv = mtd->priv;
  196. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  197. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  198. unsigned long end;
  199. u_char *ptr;
  200. u_char *copyto = buf;
  201. #ifdef CONFIG_MTD_PMC551_DEBUG
  202. printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n", (long)from, (long)len, (long)priv->asize);
  203. #endif
  204. end = from + len - 1;
  205. /* Is it past the end? */
  206. if (end > mtd->size) {
  207. #ifdef CONFIG_MTD_PMC551_DEBUG
  208. printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n", (long) end, (long)mtd->size);
  209. #endif
  210. return -EINVAL;
  211. }
  212. soff_hi = from & ~(priv->asize - 1);
  213. eoff_hi = end & ~(priv->asize - 1);
  214. soff_lo = from & (priv->asize - 1);
  215. eoff_lo = end & (priv->asize - 1);
  216. pmc551_point (mtd, from, len, retlen, &ptr);
  217. if (soff_hi == eoff_hi) {
  218. /* The whole thing fits within one access, so just one shot
  219. will do it. */
  220. memcpy(copyto, ptr, len);
  221. copyto += len;
  222. } else {
  223. /* We have to do multiple writes to get all the data
  224. written. */
  225. while (soff_hi != eoff_hi) {
  226. #ifdef CONFIG_MTD_PMC551_DEBUG
  227. printk( KERN_DEBUG "pmc551_read() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  228. #endif
  229. memcpy(copyto, ptr, priv->asize);
  230. copyto += priv->asize;
  231. if (soff_hi + priv->asize >= mtd->size) {
  232. goto out;
  233. }
  234. soff_hi += priv->asize;
  235. pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr);
  236. }
  237. memcpy(copyto, ptr, eoff_lo);
  238. copyto += eoff_lo;
  239. }
  240. out:
  241. #ifdef CONFIG_MTD_PMC551_DEBUG
  242. printk(KERN_DEBUG "pmc551_read() done\n");
  243. #endif
  244. *retlen = copyto - buf;
  245. return 0;
  246. }
  247. static int pmc551_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
  248. {
  249. struct mypriv *priv = mtd->priv;
  250. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  251. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  252. unsigned long end;
  253. u_char *ptr;
  254. const u_char *copyfrom = buf;
  255. #ifdef CONFIG_MTD_PMC551_DEBUG
  256. printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n", (long)to, (long)len, (long)priv->asize);
  257. #endif
  258. end = to + len - 1;
  259. /* Is it past the end? or did the u32 wrap? */
  260. if (end > mtd->size ) {
  261. #ifdef CONFIG_MTD_PMC551_DEBUG
  262. printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, size: %ld, to: %ld)\n", (long) end, (long)mtd->size, (long)to);
  263. #endif
  264. return -EINVAL;
  265. }
  266. soff_hi = to & ~(priv->asize - 1);
  267. eoff_hi = end & ~(priv->asize - 1);
  268. soff_lo = to & (priv->asize - 1);
  269. eoff_lo = end & (priv->asize - 1);
  270. pmc551_point (mtd, to, len, retlen, &ptr);
  271. if (soff_hi == eoff_hi) {
  272. /* The whole thing fits within one access, so just one shot
  273. will do it. */
  274. memcpy(ptr, copyfrom, len);
  275. copyfrom += len;
  276. } else {
  277. /* We have to do multiple writes to get all the data
  278. written. */
  279. while (soff_hi != eoff_hi) {
  280. #ifdef CONFIG_MTD_PMC551_DEBUG
  281. printk( KERN_DEBUG "pmc551_write() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  282. #endif
  283. memcpy(ptr, copyfrom, priv->asize);
  284. copyfrom += priv->asize;
  285. if (soff_hi >= mtd->size) {
  286. goto out;
  287. }
  288. soff_hi += priv->asize;
  289. pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr);
  290. }
  291. memcpy(ptr, copyfrom, eoff_lo);
  292. copyfrom += eoff_lo;
  293. }
  294. out:
  295. #ifdef CONFIG_MTD_PMC551_DEBUG
  296. printk(KERN_DEBUG "pmc551_write() done\n");
  297. #endif
  298. *retlen = copyfrom - buf;
  299. return 0;
  300. }
  301. /*
  302. * Fixup routines for the V370PDC
  303. * PCI device ID 0x020011b0
  304. *
  305. * This function basicly kick starts the DRAM oboard the card and gets it
  306. * ready to be used. Before this is done the device reads VERY erratic, so
  307. * much that it can crash the Linux 2.2.x series kernels when a user cat's
  308. * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
  309. * register. FIXME: stop spinning on registers .. must implement a timeout
  310. * mechanism
  311. * returns the size of the memory region found.
  312. */
  313. static u32 fixup_pmc551 (struct pci_dev *dev)
  314. {
  315. #ifdef CONFIG_MTD_PMC551_BUGFIX
  316. u32 dram_data;
  317. #endif
  318. u32 size, dcmd, cfg, dtmp;
  319. u16 cmd, tmp, i;
  320. u8 bcmd, counter;
  321. /* Sanity Check */
  322. if(!dev) {
  323. return -ENODEV;
  324. }
  325. /*
  326. * Attempt to reset the card
  327. * FIXME: Stop Spinning registers
  328. */
  329. counter=0;
  330. /* unlock registers */
  331. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5 );
  332. /* read in old data */
  333. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd );
  334. /* bang the reset line up and down for a few */
  335. for(i=0;i<10;i++) {
  336. counter=0;
  337. bcmd &= ~0x80;
  338. while(counter++ < 100) {
  339. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  340. }
  341. counter=0;
  342. bcmd |= 0x80;
  343. while(counter++ < 100) {
  344. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  345. }
  346. }
  347. bcmd |= (0x40|0x20);
  348. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  349. /*
  350. * Take care and turn off the memory on the device while we
  351. * tweak the configurations
  352. */
  353. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  354. tmp = cmd & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY);
  355. pci_write_config_word(dev, PCI_COMMAND, tmp);
  356. /*
  357. * Disable existing aperture before probing memory size
  358. */
  359. pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
  360. dtmp=(dcmd|PMC551_PCI_MEM_MAP_ENABLE|PMC551_PCI_MEM_MAP_REG_EN);
  361. pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
  362. /*
  363. * Grab old BAR0 config so that we can figure out memory size
  364. * This is another bit of kludge going on. The reason for the
  365. * redundancy is I am hoping to retain the original configuration
  366. * previously assigned to the card by the BIOS or some previous
  367. * fixup routine in the kernel. So we read the old config into cfg,
  368. * then write all 1's to the memory space, read back the result into
  369. * "size", and then write back all the old config.
  370. */
  371. pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &cfg );
  372. #ifndef CONFIG_MTD_PMC551_BUGFIX
  373. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, ~0 );
  374. pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &size );
  375. size = (size&PCI_BASE_ADDRESS_MEM_MASK);
  376. size &= ~(size-1);
  377. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  378. #else
  379. /*
  380. * Get the size of the memory by reading all the DRAM size values
  381. * and adding them up.
  382. *
  383. * KLUDGE ALERT: the boards we are using have invalid column and
  384. * row mux values. We fix them here, but this will break other
  385. * memory configurations.
  386. */
  387. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
  388. size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
  389. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  390. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  391. pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
  392. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
  393. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  394. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  395. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  396. pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
  397. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
  398. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  399. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  400. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  401. pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
  402. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
  403. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  404. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  405. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  406. pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
  407. /*
  408. * Oops .. something went wrong
  409. */
  410. if( (size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
  411. return -ENODEV;
  412. }
  413. #endif /* CONFIG_MTD_PMC551_BUGFIX */
  414. if ((cfg&PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
  415. return -ENODEV;
  416. }
  417. /*
  418. * Precharge Dram
  419. */
  420. pci_write_config_word( dev, PMC551_SDRAM_MA, 0x0400 );
  421. pci_write_config_word( dev, PMC551_SDRAM_CMD, 0x00bf );
  422. /*
  423. * Wait until command has gone through
  424. * FIXME: register spinning issue
  425. */
  426. do { pci_read_config_word( dev, PMC551_SDRAM_CMD, &cmd );
  427. if(counter++ > 100)break;
  428. } while ( (PCI_COMMAND_IO) & cmd );
  429. /*
  430. * Turn on auto refresh
  431. * The loop is taken directly from Ramix's example code. I assume that
  432. * this must be held high for some duration of time, but I can find no
  433. * documentation refrencing the reasons why.
  434. */
  435. for ( i = 1; i<=8 ; i++) {
  436. pci_write_config_word (dev, PMC551_SDRAM_CMD, 0x0df);
  437. /*
  438. * Make certain command has gone through
  439. * FIXME: register spinning issue
  440. */
  441. counter=0;
  442. do { pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  443. if(counter++ > 100)break;
  444. } while ( (PCI_COMMAND_IO) & cmd );
  445. }
  446. pci_write_config_word ( dev, PMC551_SDRAM_MA, 0x0020);
  447. pci_write_config_word ( dev, PMC551_SDRAM_CMD, 0x0ff);
  448. /*
  449. * Wait until command completes
  450. * FIXME: register spinning issue
  451. */
  452. counter=0;
  453. do { pci_read_config_word ( dev, PMC551_SDRAM_CMD, &cmd);
  454. if(counter++ > 100)break;
  455. } while ( (PCI_COMMAND_IO) & cmd );
  456. pci_read_config_dword ( dev, PMC551_DRAM_CFG, &dcmd);
  457. dcmd |= 0x02000000;
  458. pci_write_config_dword ( dev, PMC551_DRAM_CFG, dcmd);
  459. /*
  460. * Check to make certain fast back-to-back, if not
  461. * then set it so
  462. */
  463. pci_read_config_word( dev, PCI_STATUS, &cmd);
  464. if((cmd&PCI_COMMAND_FAST_BACK) == 0) {
  465. cmd |= PCI_COMMAND_FAST_BACK;
  466. pci_write_config_word( dev, PCI_STATUS, cmd);
  467. }
  468. /*
  469. * Check to make certain the DEVSEL is set correctly, this device
  470. * has a tendancy to assert DEVSEL and TRDY when a write is performed
  471. * to the memory when memory is read-only
  472. */
  473. if((cmd&PCI_STATUS_DEVSEL_MASK) != 0x0) {
  474. cmd &= ~PCI_STATUS_DEVSEL_MASK;
  475. pci_write_config_word( dev, PCI_STATUS, cmd );
  476. }
  477. /*
  478. * Set to be prefetchable and put everything back based on old cfg.
  479. * it's possible that the reset of the V370PDC nuked the original
  480. * setup
  481. */
  482. /*
  483. cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
  484. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  485. */
  486. /*
  487. * Turn PCI memory and I/O bus access back on
  488. */
  489. pci_write_config_word( dev, PCI_COMMAND,
  490. PCI_COMMAND_MEMORY | PCI_COMMAND_IO );
  491. #ifdef CONFIG_MTD_PMC551_DEBUG
  492. /*
  493. * Some screen fun
  494. */
  495. printk(KERN_DEBUG "pmc551: %d%c (0x%x) of %sprefetchable memory at 0x%lx\n",
  496. (size<1024)?size:(size<1048576)?size>>10:size>>20,
  497. (size<1024)?'B':(size<1048576)?'K':'M',
  498. size, ((dcmd&(0x1<<3)) == 0)?"non-":"",
  499. (dev->resource[0].start)&PCI_BASE_ADDRESS_MEM_MASK );
  500. /*
  501. * Check to see the state of the memory
  502. */
  503. pci_read_config_dword( dev, PMC551_DRAM_BLK0, &dcmd );
  504. printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
  505. "pmc551: DRAM_BLK0 Size: %d at %d\n"
  506. "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
  507. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  508. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  509. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  510. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  511. pci_read_config_dword( dev, PMC551_DRAM_BLK1, &dcmd );
  512. printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
  513. "pmc551: DRAM_BLK1 Size: %d at %d\n"
  514. "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
  515. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  516. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  517. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  518. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  519. pci_read_config_dword( dev, PMC551_DRAM_BLK2, &dcmd );
  520. printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
  521. "pmc551: DRAM_BLK2 Size: %d at %d\n"
  522. "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
  523. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  524. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  525. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  526. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  527. pci_read_config_dword( dev, PMC551_DRAM_BLK3, &dcmd );
  528. printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
  529. "pmc551: DRAM_BLK3 Size: %d at %d\n"
  530. "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
  531. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  532. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  533. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  534. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  535. pci_read_config_word( dev, PCI_COMMAND, &cmd );
  536. printk( KERN_DEBUG "pmc551: Memory Access %s\n",
  537. (((0x1<<1)&cmd) == 0)?"off":"on" );
  538. printk( KERN_DEBUG "pmc551: I/O Access %s\n",
  539. (((0x1<<0)&cmd) == 0)?"off":"on" );
  540. pci_read_config_word( dev, PCI_STATUS, &cmd );
  541. printk( KERN_DEBUG "pmc551: Devsel %s\n",
  542. ((PCI_STATUS_DEVSEL_MASK&cmd)==0x000)?"Fast":
  543. ((PCI_STATUS_DEVSEL_MASK&cmd)==0x200)?"Medium":
  544. ((PCI_STATUS_DEVSEL_MASK&cmd)==0x400)?"Slow":"Invalid" );
  545. printk( KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
  546. ((PCI_COMMAND_FAST_BACK&cmd) == 0)?"Not ":"" );
  547. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd );
  548. printk( KERN_DEBUG "pmc551: EEPROM is under %s control\n"
  549. "pmc551: System Control Register is %slocked to PCI access\n"
  550. "pmc551: System Control Register is %slocked to EEPROM access\n",
  551. (bcmd&0x1)?"software":"hardware",
  552. (bcmd&0x20)?"":"un", (bcmd&0x40)?"":"un");
  553. #endif
  554. return size;
  555. }
  556. /*
  557. * Kernel version specific module stuffages
  558. */
  559. MODULE_LICENSE("GPL");
  560. MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
  561. MODULE_DESCRIPTION(PMC551_VERSION);
  562. /*
  563. * Stuff these outside the ifdef so as to not bust compiled in driver support
  564. */
  565. static int msize=0;
  566. #if defined(CONFIG_MTD_PMC551_APERTURE_SIZE)
  567. static int asize=CONFIG_MTD_PMC551_APERTURE_SIZE
  568. #else
  569. static int asize=0;
  570. #endif
  571. module_param(msize, int, 0);
  572. MODULE_PARM_DESC(msize, "memory size in Megabytes [1 - 1024]");
  573. module_param(asize, int, 0);
  574. MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
  575. /*
  576. * PMC551 Card Initialization
  577. */
  578. static int __init init_pmc551(void)
  579. {
  580. struct pci_dev *PCI_Device = NULL;
  581. struct mypriv *priv;
  582. int count, found=0;
  583. struct mtd_info *mtd;
  584. u32 length = 0;
  585. if(msize) {
  586. msize = (1 << (ffs(msize) - 1))<<20;
  587. if (msize > (1<<30)) {
  588. printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n", msize);
  589. return -EINVAL;
  590. }
  591. }
  592. if(asize) {
  593. asize = (1 << (ffs(asize) - 1))<<20;
  594. if (asize > (1<<30) ) {
  595. printk(KERN_NOTICE "pmc551: Invalid aperture size [%d]\n", asize);
  596. return -EINVAL;
  597. }
  598. }
  599. printk(KERN_INFO PMC551_VERSION);
  600. /*
  601. * PCU-bus chipset probe.
  602. */
  603. for( count = 0; count < MAX_MTD_DEVICES; count++ ) {
  604. if ((PCI_Device = pci_find_device(PCI_VENDOR_ID_V3_SEMI,
  605. PCI_DEVICE_ID_V3_SEMI_V370PDC,
  606. PCI_Device ) ) == NULL) {
  607. break;
  608. }
  609. printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%lX\n",
  610. PCI_Device->resource[0].start);
  611. /*
  612. * The PMC551 device acts VERY weird if you don't init it
  613. * first. i.e. it will not correctly report devsel. If for
  614. * some reason the sdram is in a wrote-protected state the
  615. * device will DEVSEL when it is written to causing problems
  616. * with the oldproc.c driver in
  617. * some kernels (2.2.*)
  618. */
  619. if((length = fixup_pmc551(PCI_Device)) <= 0) {
  620. printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
  621. break;
  622. }
  623. /*
  624. * This is needed until the driver is capable of reading the
  625. * onboard I2C SROM to discover the "real" memory size.
  626. */
  627. if(msize) {
  628. length = msize;
  629. printk(KERN_NOTICE "pmc551: Using specified memory size 0x%x\n", length);
  630. } else {
  631. msize = length;
  632. }
  633. mtd = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
  634. if (!mtd) {
  635. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n");
  636. break;
  637. }
  638. memset(mtd, 0, sizeof(struct mtd_info));
  639. priv = kmalloc (sizeof(struct mypriv), GFP_KERNEL);
  640. if (!priv) {
  641. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n");
  642. kfree(mtd);
  643. break;
  644. }
  645. memset(priv, 0, sizeof(*priv));
  646. mtd->priv = priv;
  647. priv->dev = PCI_Device;
  648. if(asize > length) {
  649. printk(KERN_NOTICE "pmc551: reducing aperture size to fit %dM\n",length>>20);
  650. priv->asize = asize = length;
  651. } else if (asize == 0 || asize == length) {
  652. printk(KERN_NOTICE "pmc551: Using existing aperture size %dM\n", length>>20);
  653. priv->asize = asize = length;
  654. } else {
  655. printk(KERN_NOTICE "pmc551: Using specified aperture size %dM\n", asize>>20);
  656. priv->asize = asize;
  657. }
  658. priv->start = ioremap(((PCI_Device->resource[0].start)
  659. & PCI_BASE_ADDRESS_MEM_MASK),
  660. priv->asize);
  661. if (!priv->start) {
  662. printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
  663. kfree(mtd->priv);
  664. kfree(mtd);
  665. break;
  666. }
  667. #ifdef CONFIG_MTD_PMC551_DEBUG
  668. printk( KERN_DEBUG "pmc551: setting aperture to %d\n",
  669. ffs(priv->asize>>20)-1);
  670. #endif
  671. priv->base_map0 = ( PMC551_PCI_MEM_MAP_REG_EN
  672. | PMC551_PCI_MEM_MAP_ENABLE
  673. | (ffs(priv->asize>>20)-1)<<4 );
  674. priv->curr_map0 = priv->base_map0;
  675. pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0,
  676. priv->curr_map0 );
  677. #ifdef CONFIG_MTD_PMC551_DEBUG
  678. printk( KERN_DEBUG "pmc551: aperture set to %d\n",
  679. (priv->base_map0 & 0xF0)>>4 );
  680. #endif
  681. mtd->size = msize;
  682. mtd->flags = MTD_CAP_RAM;
  683. mtd->erase = pmc551_erase;
  684. mtd->read = pmc551_read;
  685. mtd->write = pmc551_write;
  686. mtd->point = pmc551_point;
  687. mtd->unpoint = pmc551_unpoint;
  688. mtd->type = MTD_RAM;
  689. mtd->name = "PMC551 RAM board";
  690. mtd->erasesize = 0x10000;
  691. mtd->owner = THIS_MODULE;
  692. if (add_mtd_device(mtd)) {
  693. printk(KERN_NOTICE "pmc551: Failed to register new device\n");
  694. iounmap(priv->start);
  695. kfree(mtd->priv);
  696. kfree(mtd);
  697. break;
  698. }
  699. printk(KERN_NOTICE "Registered pmc551 memory device.\n");
  700. printk(KERN_NOTICE "Mapped %dM of memory from 0x%p to 0x%p\n",
  701. priv->asize>>20,
  702. priv->start,
  703. priv->start + priv->asize);
  704. printk(KERN_NOTICE "Total memory is %d%c\n",
  705. (length<1024)?length:
  706. (length<1048576)?length>>10:length>>20,
  707. (length<1024)?'B':(length<1048576)?'K':'M');
  708. priv->nextpmc551 = pmc551list;
  709. pmc551list = mtd;
  710. found++;
  711. }
  712. if( !pmc551list ) {
  713. printk(KERN_NOTICE "pmc551: not detected\n");
  714. return -ENODEV;
  715. } else {
  716. printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
  717. return 0;
  718. }
  719. }
  720. /*
  721. * PMC551 Card Cleanup
  722. */
  723. static void __exit cleanup_pmc551(void)
  724. {
  725. int found=0;
  726. struct mtd_info *mtd;
  727. struct mypriv *priv;
  728. while((mtd=pmc551list)) {
  729. priv = mtd->priv;
  730. pmc551list = priv->nextpmc551;
  731. if(priv->start) {
  732. printk (KERN_DEBUG "pmc551: unmapping %dM starting at 0x%p\n",
  733. priv->asize>>20, priv->start);
  734. iounmap (priv->start);
  735. }
  736. kfree (mtd->priv);
  737. del_mtd_device (mtd);
  738. kfree (mtd);
  739. found++;
  740. }
  741. printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
  742. }
  743. module_init(init_pmc551);
  744. module_exit(cleanup_pmc551);