mtd_dataflash.c 17 KB

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  1. /*
  2. * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
  3. *
  4. * Largely derived from at91_dataflash.c:
  5. * Copyright (C) 2003-2005 SAN People (Pty) Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/config.h>
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/slab.h>
  16. #include <linux/delay.h>
  17. #include <linux/device.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/spi/flash.h>
  20. #include <linux/mtd/mtd.h>
  21. #include <linux/mtd/partitions.h>
  22. /*
  23. * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
  24. * each chip, which may be used for double buffered I/O; but this driver
  25. * doesn't (yet) use these for any kind of i/o overlap or prefetching.
  26. *
  27. * Sometimes DataFlash is packaged in MMC-format cards, although the
  28. * MMC stack can't use SPI (yet), or distinguish between MMC and DataFlash
  29. * protocols during enumeration.
  30. */
  31. #define CONFIG_DATAFLASH_WRITE_VERIFY
  32. /* reads can bypass the buffers */
  33. #define OP_READ_CONTINUOUS 0xE8
  34. #define OP_READ_PAGE 0xD2
  35. /* group B requests can run even while status reports "busy" */
  36. #define OP_READ_STATUS 0xD7 /* group B */
  37. /* move data between host and buffer */
  38. #define OP_READ_BUFFER1 0xD4 /* group B */
  39. #define OP_READ_BUFFER2 0xD6 /* group B */
  40. #define OP_WRITE_BUFFER1 0x84 /* group B */
  41. #define OP_WRITE_BUFFER2 0x87 /* group B */
  42. /* erasing flash */
  43. #define OP_ERASE_PAGE 0x81
  44. #define OP_ERASE_BLOCK 0x50
  45. /* move data between buffer and flash */
  46. #define OP_TRANSFER_BUF1 0x53
  47. #define OP_TRANSFER_BUF2 0x55
  48. #define OP_MREAD_BUFFER1 0xD4
  49. #define OP_MREAD_BUFFER2 0xD6
  50. #define OP_MWERASE_BUFFER1 0x83
  51. #define OP_MWERASE_BUFFER2 0x86
  52. #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
  53. #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
  54. /* write to buffer, then write-erase to flash */
  55. #define OP_PROGRAM_VIA_BUF1 0x82
  56. #define OP_PROGRAM_VIA_BUF2 0x85
  57. /* compare buffer to flash */
  58. #define OP_COMPARE_BUF1 0x60
  59. #define OP_COMPARE_BUF2 0x61
  60. /* read flash to buffer, then write-erase to flash */
  61. #define OP_REWRITE_VIA_BUF1 0x58
  62. #define OP_REWRITE_VIA_BUF2 0x59
  63. /* newer chips report JEDEC manufacturer and device IDs; chip
  64. * serial number and OTP bits; and per-sector writeprotect.
  65. */
  66. #define OP_READ_ID 0x9F
  67. #define OP_READ_SECURITY 0x77
  68. #define OP_WRITE_SECURITY 0x9A /* OTP bits */
  69. struct dataflash {
  70. u8 command[4];
  71. char name[24];
  72. unsigned partitioned:1;
  73. unsigned short page_offset; /* offset in flash address */
  74. unsigned int page_size; /* of bytes per page */
  75. struct semaphore lock;
  76. struct spi_device *spi;
  77. struct mtd_info mtd;
  78. };
  79. #ifdef CONFIG_MTD_PARTITIONS
  80. #define mtd_has_partitions() (1)
  81. #else
  82. #define mtd_has_partitions() (0)
  83. #endif
  84. /* ......................................................................... */
  85. /*
  86. * Return the status of the DataFlash device.
  87. */
  88. static inline int dataflash_status(struct spi_device *spi)
  89. {
  90. /* NOTE: at45db321c over 25 MHz wants to write
  91. * a dummy byte after the opcode...
  92. */
  93. return spi_w8r8(spi, OP_READ_STATUS);
  94. }
  95. /*
  96. * Poll the DataFlash device until it is READY.
  97. * This usually takes 5-20 msec or so; more for sector erase.
  98. */
  99. static int dataflash_waitready(struct spi_device *spi)
  100. {
  101. int status;
  102. for (;;) {
  103. status = dataflash_status(spi);
  104. if (status < 0) {
  105. DEBUG(MTD_DEBUG_LEVEL1, "%s: status %d?\n",
  106. spi->dev.bus_id, status);
  107. status = 0;
  108. }
  109. if (status & (1 << 7)) /* RDY/nBSY */
  110. return status;
  111. msleep(3);
  112. }
  113. }
  114. /* ......................................................................... */
  115. /*
  116. * Erase pages of flash.
  117. */
  118. static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
  119. {
  120. struct dataflash *priv = (struct dataflash *)mtd->priv;
  121. struct spi_device *spi = priv->spi;
  122. struct spi_transfer x = { .tx_dma = 0, };
  123. struct spi_message msg;
  124. unsigned blocksize = priv->page_size << 3;
  125. u8 *command;
  126. DEBUG(MTD_DEBUG_LEVEL2, "%s: erase addr=0x%x len 0x%x\n",
  127. spi->dev.bus_id,
  128. instr->addr, instr->len);
  129. /* Sanity checks */
  130. if ((instr->addr + instr->len) > mtd->size
  131. || (instr->len % priv->page_size) != 0
  132. || (instr->addr % priv->page_size) != 0)
  133. return -EINVAL;
  134. spi_message_init(&msg);
  135. x.tx_buf = command = priv->command;
  136. x.len = 4;
  137. spi_message_add_tail(&x, &msg);
  138. down(&priv->lock);
  139. while (instr->len > 0) {
  140. unsigned int pageaddr;
  141. int status;
  142. int do_block;
  143. /* Calculate flash page address; use block erase (for speed) if
  144. * we're at a block boundary and need to erase the whole block.
  145. */
  146. pageaddr = instr->addr / priv->page_size;
  147. do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
  148. pageaddr = pageaddr << priv->page_offset;
  149. command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
  150. command[1] = (u8)(pageaddr >> 16);
  151. command[2] = (u8)(pageaddr >> 8);
  152. command[3] = 0;
  153. DEBUG(MTD_DEBUG_LEVEL3, "ERASE %s: (%x) %x %x %x [%i]\n",
  154. do_block ? "block" : "page",
  155. command[0], command[1], command[2], command[3],
  156. pageaddr);
  157. status = spi_sync(spi, &msg);
  158. (void) dataflash_waitready(spi);
  159. if (status < 0) {
  160. printk(KERN_ERR "%s: erase %x, err %d\n",
  161. spi->dev.bus_id, pageaddr, status);
  162. /* REVISIT: can retry instr->retries times; or
  163. * giveup and instr->fail_addr = instr->addr;
  164. */
  165. continue;
  166. }
  167. if (do_block) {
  168. instr->addr += blocksize;
  169. instr->len -= blocksize;
  170. } else {
  171. instr->addr += priv->page_size;
  172. instr->len -= priv->page_size;
  173. }
  174. }
  175. up(&priv->lock);
  176. /* Inform MTD subsystem that erase is complete */
  177. instr->state = MTD_ERASE_DONE;
  178. mtd_erase_callback(instr);
  179. return 0;
  180. }
  181. /*
  182. * Read from the DataFlash device.
  183. * from : Start offset in flash device
  184. * len : Amount to read
  185. * retlen : About of data actually read
  186. * buf : Buffer containing the data
  187. */
  188. static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
  189. size_t *retlen, u_char *buf)
  190. {
  191. struct dataflash *priv = (struct dataflash *)mtd->priv;
  192. struct spi_transfer x[2] = { { .tx_dma = 0, }, };
  193. struct spi_message msg;
  194. unsigned int addr;
  195. u8 *command;
  196. int status;
  197. DEBUG(MTD_DEBUG_LEVEL2, "%s: read 0x%x..0x%x\n",
  198. priv->spi->dev.bus_id, (unsigned)from, (unsigned)(from + len));
  199. *retlen = 0;
  200. /* Sanity checks */
  201. if (!len)
  202. return 0;
  203. if (from + len > mtd->size)
  204. return -EINVAL;
  205. /* Calculate flash page/byte address */
  206. addr = (((unsigned)from / priv->page_size) << priv->page_offset)
  207. + ((unsigned)from % priv->page_size);
  208. command = priv->command;
  209. DEBUG(MTD_DEBUG_LEVEL3, "READ: (%x) %x %x %x\n",
  210. command[0], command[1], command[2], command[3]);
  211. spi_message_init(&msg);
  212. x[0].tx_buf = command;
  213. x[0].len = 8;
  214. spi_message_add_tail(&x[0], &msg);
  215. x[1].rx_buf = buf;
  216. x[1].len = len;
  217. spi_message_add_tail(&x[1], &msg);
  218. down(&priv->lock);
  219. /* Continuous read, max clock = f(car) which may be less than
  220. * the peak rate available. Some chips support commands with
  221. * fewer "don't care" bytes. Both buffers stay unchanged.
  222. */
  223. command[0] = OP_READ_CONTINUOUS;
  224. command[1] = (u8)(addr >> 16);
  225. command[2] = (u8)(addr >> 8);
  226. command[3] = (u8)(addr >> 0);
  227. /* plus 4 "don't care" bytes */
  228. status = spi_sync(priv->spi, &msg);
  229. up(&priv->lock);
  230. if (status >= 0) {
  231. *retlen = msg.actual_length - 8;
  232. status = 0;
  233. } else
  234. DEBUG(MTD_DEBUG_LEVEL1, "%s: read %x..%x --> %d\n",
  235. priv->spi->dev.bus_id,
  236. (unsigned)from, (unsigned)(from + len),
  237. status);
  238. return status;
  239. }
  240. /*
  241. * Write to the DataFlash device.
  242. * to : Start offset in flash device
  243. * len : Amount to write
  244. * retlen : Amount of data actually written
  245. * buf : Buffer containing the data
  246. */
  247. static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
  248. size_t * retlen, const u_char * buf)
  249. {
  250. struct dataflash *priv = (struct dataflash *)mtd->priv;
  251. struct spi_device *spi = priv->spi;
  252. struct spi_transfer x[2] = { { .tx_dma = 0, }, };
  253. struct spi_message msg;
  254. unsigned int pageaddr, addr, offset, writelen;
  255. size_t remaining = len;
  256. u_char *writebuf = (u_char *) buf;
  257. int status = -EINVAL;
  258. u8 *command;
  259. DEBUG(MTD_DEBUG_LEVEL2, "%s: write 0x%x..0x%x\n",
  260. spi->dev.bus_id, (unsigned)to, (unsigned)(to + len));
  261. *retlen = 0;
  262. /* Sanity checks */
  263. if (!len)
  264. return 0;
  265. if ((to + len) > mtd->size)
  266. return -EINVAL;
  267. spi_message_init(&msg);
  268. x[0].tx_buf = command = priv->command;
  269. x[0].len = 4;
  270. spi_message_add_tail(&x[0], &msg);
  271. pageaddr = ((unsigned)to / priv->page_size);
  272. offset = ((unsigned)to % priv->page_size);
  273. if (offset + len > priv->page_size)
  274. writelen = priv->page_size - offset;
  275. else
  276. writelen = len;
  277. down(&priv->lock);
  278. while (remaining > 0) {
  279. DEBUG(MTD_DEBUG_LEVEL3, "write @ %i:%i len=%i\n",
  280. pageaddr, offset, writelen);
  281. /* REVISIT:
  282. * (a) each page in a sector must be rewritten at least
  283. * once every 10K sibling erase/program operations.
  284. * (b) for pages that are already erased, we could
  285. * use WRITE+MWRITE not PROGRAM for ~30% speedup.
  286. * (c) WRITE to buffer could be done while waiting for
  287. * a previous MWRITE/MWERASE to complete ...
  288. * (d) error handling here seems to be mostly missing.
  289. *
  290. * Two persistent bits per page, plus a per-sector counter,
  291. * could support (a) and (b) ... we might consider using
  292. * the second half of sector zero, which is just one block,
  293. * to track that state. (On AT91, that sector should also
  294. * support boot-from-DataFlash.)
  295. */
  296. addr = pageaddr << priv->page_offset;
  297. /* (1) Maybe transfer partial page to Buffer1 */
  298. if (writelen != priv->page_size) {
  299. command[0] = OP_TRANSFER_BUF1;
  300. command[1] = (addr & 0x00FF0000) >> 16;
  301. command[2] = (addr & 0x0000FF00) >> 8;
  302. command[3] = 0;
  303. DEBUG(MTD_DEBUG_LEVEL3, "TRANSFER: (%x) %x %x %x\n",
  304. command[0], command[1], command[2], command[3]);
  305. status = spi_sync(spi, &msg);
  306. if (status < 0)
  307. DEBUG(MTD_DEBUG_LEVEL1, "%s: xfer %u -> %d \n",
  308. spi->dev.bus_id, addr, status);
  309. (void) dataflash_waitready(priv->spi);
  310. }
  311. /* (2) Program full page via Buffer1 */
  312. addr += offset;
  313. command[0] = OP_PROGRAM_VIA_BUF1;
  314. command[1] = (addr & 0x00FF0000) >> 16;
  315. command[2] = (addr & 0x0000FF00) >> 8;
  316. command[3] = (addr & 0x000000FF);
  317. DEBUG(MTD_DEBUG_LEVEL3, "PROGRAM: (%x) %x %x %x\n",
  318. command[0], command[1], command[2], command[3]);
  319. x[1].tx_buf = writebuf;
  320. x[1].len = writelen;
  321. spi_message_add_tail(x + 1, &msg);
  322. status = spi_sync(spi, &msg);
  323. spi_transfer_del(x + 1);
  324. if (status < 0)
  325. DEBUG(MTD_DEBUG_LEVEL1, "%s: pgm %u/%u -> %d \n",
  326. spi->dev.bus_id, addr, writelen, status);
  327. (void) dataflash_waitready(priv->spi);
  328. #ifdef CONFIG_DATAFLASH_WRITE_VERIFY
  329. /* (3) Compare to Buffer1 */
  330. addr = pageaddr << priv->page_offset;
  331. command[0] = OP_COMPARE_BUF1;
  332. command[1] = (addr & 0x00FF0000) >> 16;
  333. command[2] = (addr & 0x0000FF00) >> 8;
  334. command[3] = 0;
  335. DEBUG(MTD_DEBUG_LEVEL3, "COMPARE: (%x) %x %x %x\n",
  336. command[0], command[1], command[2], command[3]);
  337. status = spi_sync(spi, &msg);
  338. if (status < 0)
  339. DEBUG(MTD_DEBUG_LEVEL1, "%s: compare %u -> %d \n",
  340. spi->dev.bus_id, addr, status);
  341. status = dataflash_waitready(priv->spi);
  342. /* Check result of the compare operation */
  343. if ((status & (1 << 6)) == 1) {
  344. printk(KERN_ERR "%s: compare page %u, err %d\n",
  345. spi->dev.bus_id, pageaddr, status);
  346. remaining = 0;
  347. status = -EIO;
  348. break;
  349. } else
  350. status = 0;
  351. #endif /* CONFIG_DATAFLASH_WRITE_VERIFY */
  352. remaining = remaining - writelen;
  353. pageaddr++;
  354. offset = 0;
  355. writebuf += writelen;
  356. *retlen += writelen;
  357. if (remaining > priv->page_size)
  358. writelen = priv->page_size;
  359. else
  360. writelen = remaining;
  361. }
  362. up(&priv->lock);
  363. return status;
  364. }
  365. /* ......................................................................... */
  366. /*
  367. * Register DataFlash device with MTD subsystem.
  368. */
  369. static int __devinit
  370. add_dataflash(struct spi_device *spi, char *name,
  371. int nr_pages, int pagesize, int pageoffset)
  372. {
  373. struct dataflash *priv;
  374. struct mtd_info *device;
  375. struct flash_platform_data *pdata = spi->dev.platform_data;
  376. priv = (struct dataflash *) kzalloc(sizeof *priv, GFP_KERNEL);
  377. if (!priv)
  378. return -ENOMEM;
  379. init_MUTEX(&priv->lock);
  380. priv->spi = spi;
  381. priv->page_size = pagesize;
  382. priv->page_offset = pageoffset;
  383. /* name must be usable with cmdlinepart */
  384. sprintf(priv->name, "spi%d.%d-%s",
  385. spi->master->bus_num, spi->chip_select,
  386. name);
  387. device = &priv->mtd;
  388. device->name = (pdata && pdata->name) ? pdata->name : priv->name;
  389. device->size = nr_pages * pagesize;
  390. device->erasesize = pagesize;
  391. device->owner = THIS_MODULE;
  392. device->type = MTD_DATAFLASH;
  393. device->flags = MTD_CAP_NORFLASH;
  394. device->erase = dataflash_erase;
  395. device->read = dataflash_read;
  396. device->write = dataflash_write;
  397. device->priv = priv;
  398. dev_info(&spi->dev, "%s (%d KBytes)\n", name, device->size/1024);
  399. dev_set_drvdata(&spi->dev, priv);
  400. if (mtd_has_partitions()) {
  401. struct mtd_partition *parts;
  402. int nr_parts = 0;
  403. #ifdef CONFIG_MTD_CMDLINE_PARTS
  404. static const char *part_probes[] = { "cmdlinepart", NULL, };
  405. nr_parts = parse_mtd_partitions(device, part_probes, &parts, 0);
  406. #endif
  407. if (nr_parts <= 0 && pdata && pdata->parts) {
  408. parts = pdata->parts;
  409. nr_parts = pdata->nr_parts;
  410. }
  411. if (nr_parts > 0) {
  412. priv->partitioned = 1;
  413. return add_mtd_partitions(device, parts, nr_parts);
  414. }
  415. } else if (pdata && pdata->nr_parts)
  416. dev_warn(&spi->dev, "ignoring %d default partitions on %s\n",
  417. pdata->nr_parts, device->name);
  418. return add_mtd_device(device) == 1 ? -ENODEV : 0;
  419. }
  420. /*
  421. * Detect and initialize DataFlash device:
  422. *
  423. * Device Density ID code #Pages PageSize Offset
  424. * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
  425. * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1025 264 9
  426. * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
  427. * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
  428. * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
  429. * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
  430. * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
  431. * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
  432. */
  433. static int __devinit dataflash_probe(struct spi_device *spi)
  434. {
  435. int status;
  436. status = dataflash_status(spi);
  437. if (status <= 0 || status == 0xff) {
  438. DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n",
  439. spi->dev.bus_id, status);
  440. if (status == 0xff)
  441. status = -ENODEV;
  442. return status;
  443. }
  444. /* if there's a device there, assume it's dataflash.
  445. * board setup should have set spi->max_speed_max to
  446. * match f(car) for continuous reads, mode 0 or 3.
  447. */
  448. switch (status & 0x3c) {
  449. case 0x0c: /* 0 0 1 1 x x */
  450. status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
  451. break;
  452. case 0x14: /* 0 1 0 1 x x */
  453. status = add_dataflash(spi, "AT45DB021B", 1025, 264, 9);
  454. break;
  455. case 0x1c: /* 0 1 1 1 x x */
  456. status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
  457. break;
  458. case 0x24: /* 1 0 0 1 x x */
  459. status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
  460. break;
  461. case 0x2c: /* 1 0 1 1 x x */
  462. status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
  463. break;
  464. case 0x34: /* 1 1 0 1 x x */
  465. status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
  466. break;
  467. case 0x38: /* 1 1 1 x x x */
  468. case 0x3c:
  469. status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
  470. break;
  471. /* obsolete AT45DB1282 not (yet?) supported */
  472. default:
  473. DEBUG(MTD_DEBUG_LEVEL1, "%s: unsupported device (%x)\n",
  474. spi->dev.bus_id, status & 0x3c);
  475. status = -ENODEV;
  476. }
  477. if (status < 0)
  478. DEBUG(MTD_DEBUG_LEVEL1, "%s: add_dataflash --> %d\n",
  479. spi->dev.bus_id, status);
  480. return status;
  481. }
  482. static int __devexit dataflash_remove(struct spi_device *spi)
  483. {
  484. struct dataflash *flash = dev_get_drvdata(&spi->dev);
  485. int status;
  486. DEBUG(MTD_DEBUG_LEVEL1, "%s: remove\n", spi->dev.bus_id);
  487. if (mtd_has_partitions() && flash->partitioned)
  488. status = del_mtd_partitions(&flash->mtd);
  489. else
  490. status = del_mtd_device(&flash->mtd);
  491. if (status == 0)
  492. kfree(flash);
  493. return status;
  494. }
  495. static struct spi_driver dataflash_driver = {
  496. .driver = {
  497. .name = "mtd_dataflash",
  498. .bus = &spi_bus_type,
  499. .owner = THIS_MODULE,
  500. },
  501. .probe = dataflash_probe,
  502. .remove = __devexit_p(dataflash_remove),
  503. /* FIXME: investigate suspend and resume... */
  504. };
  505. static int __init dataflash_init(void)
  506. {
  507. return spi_register_driver(&dataflash_driver);
  508. }
  509. module_init(dataflash_init);
  510. static void __exit dataflash_exit(void)
  511. {
  512. spi_unregister_driver(&dataflash_driver);
  513. }
  514. module_exit(dataflash_exit);
  515. MODULE_LICENSE("GPL");
  516. MODULE_AUTHOR("Andrew Victor, David Brownell");
  517. MODULE_DESCRIPTION("MTD DataFlash driver");