Kconfig 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290
  1. # drivers/mtd/chips/Kconfig
  2. # $Id: Kconfig,v 1.18 2005/11/07 11:14:22 gleixner Exp $
  3. menu "RAM/ROM/Flash chip drivers"
  4. depends on MTD!=n
  5. config MTD_CFI
  6. tristate "Detect flash chips by Common Flash Interface (CFI) probe"
  7. depends on MTD
  8. select MTD_GEN_PROBE
  9. help
  10. The Common Flash Interface specification was developed by Intel,
  11. AMD and other flash manufactures that provides a universal method
  12. for probing the capabilities of flash devices. If you wish to
  13. support any device that is CFI-compliant, you need to enable this
  14. option. Visit <http://www.amd.com/products/nvd/overview/cfi.html>
  15. for more information on CFI.
  16. config MTD_JEDECPROBE
  17. tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
  18. depends on MTD
  19. select MTD_GEN_PROBE
  20. help
  21. This option enables JEDEC-style probing of flash chips which are not
  22. compatible with the Common Flash Interface, but will use the common
  23. CFI-targetted flash drivers for any chips which are identified which
  24. are in fact compatible in all but the probe method. This actually
  25. covers most AMD/Fujitsu-compatible chips and also non-CFI
  26. Intel chips.
  27. config MTD_GEN_PROBE
  28. tristate
  29. select OBSOLETE_INTERMODULE
  30. config MTD_CFI_ADV_OPTIONS
  31. bool "Flash chip driver advanced configuration options"
  32. depends on MTD_GEN_PROBE
  33. help
  34. If you need to specify a specific endianness for access to flash
  35. chips, or if you wish to reduce the size of the kernel by including
  36. support for only specific arrangements of flash chips, say 'Y'. This
  37. option does not directly affect the code, but will enable other
  38. configuration options which allow you to do so.
  39. If unsure, say 'N'.
  40. choice
  41. prompt "Flash cmd/query data swapping"
  42. depends on MTD_CFI_ADV_OPTIONS
  43. default MTD_CFI_NOSWAP
  44. config MTD_CFI_NOSWAP
  45. bool "NO"
  46. ---help---
  47. This option defines the way in which the CPU attempts to arrange
  48. data bits when writing the 'magic' commands to the chips. Saying
  49. 'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't
  50. enabled, means that the CPU will not do any swapping; the chips
  51. are expected to be wired to the CPU in 'host-endian' form.
  52. Specific arrangements are possible with the BIG_ENDIAN_BYTE and
  53. LITTLE_ENDIAN_BYTE, if the bytes are reversed.
  54. If you have a LART, on which the data (and address) lines were
  55. connected in a fashion which ensured that the nets were as short
  56. as possible, resulting in a bit-shuffling which seems utterly
  57. random to the untrained eye, you need the LART_ENDIAN_BYTE option.
  58. Yes, there really exists something sicker than PDP-endian :)
  59. config MTD_CFI_BE_BYTE_SWAP
  60. bool "BIG_ENDIAN_BYTE"
  61. config MTD_CFI_LE_BYTE_SWAP
  62. bool "LITTLE_ENDIAN_BYTE"
  63. endchoice
  64. config MTD_CFI_GEOMETRY
  65. bool "Specific CFI Flash geometry selection"
  66. depends on MTD_CFI_ADV_OPTIONS
  67. help
  68. This option does not affect the code directly, but will enable
  69. some other configuration options which would allow you to reduce
  70. the size of the kernel by including support for only certain
  71. arrangements of CFI chips. If unsure, say 'N' and all options
  72. which are supported by the current code will be enabled.
  73. config MTD_MAP_BANK_WIDTH_1
  74. bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
  75. default y
  76. help
  77. If you wish to support CFI devices on a physical bus which is
  78. 8 bits wide, say 'Y'.
  79. config MTD_MAP_BANK_WIDTH_2
  80. bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
  81. default y
  82. help
  83. If you wish to support CFI devices on a physical bus which is
  84. 16 bits wide, say 'Y'.
  85. config MTD_MAP_BANK_WIDTH_4
  86. bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
  87. default y
  88. help
  89. If you wish to support CFI devices on a physical bus which is
  90. 32 bits wide, say 'Y'.
  91. config MTD_MAP_BANK_WIDTH_8
  92. bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY
  93. default n
  94. help
  95. If you wish to support CFI devices on a physical bus which is
  96. 64 bits wide, say 'Y'.
  97. config MTD_MAP_BANK_WIDTH_16
  98. bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY
  99. default n
  100. help
  101. If you wish to support CFI devices on a physical bus which is
  102. 128 bits wide, say 'Y'.
  103. config MTD_MAP_BANK_WIDTH_32
  104. bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY
  105. default n
  106. help
  107. If you wish to support CFI devices on a physical bus which is
  108. 256 bits wide, say 'Y'.
  109. config MTD_CFI_I1
  110. bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
  111. default y
  112. help
  113. If your flash chips are not interleaved - i.e. you only have one
  114. flash chip addressed by each bus cycle, then say 'Y'.
  115. config MTD_CFI_I2
  116. bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
  117. default y
  118. help
  119. If your flash chips are interleaved in pairs - i.e. you have two
  120. flash chips addressed by each bus cycle, then say 'Y'.
  121. config MTD_CFI_I4
  122. bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
  123. default n
  124. help
  125. If your flash chips are interleaved in fours - i.e. you have four
  126. flash chips addressed by each bus cycle, then say 'Y'.
  127. config MTD_CFI_I8
  128. bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
  129. default n
  130. help
  131. If your flash chips are interleaved in eights - i.e. you have eight
  132. flash chips addressed by each bus cycle, then say 'Y'.
  133. config MTD_OTP
  134. bool "Protection Registers aka one-time programmable (OTP) bits"
  135. depends on MTD_CFI_ADV_OPTIONS
  136. default n
  137. help
  138. This enables support for reading, writing and locking so called
  139. "Protection Registers" present on some flash chips.
  140. A subset of them are pre-programmed at the factory with a
  141. unique set of values. The rest is user-programmable.
  142. The user-programmable Protection Registers contain one-time
  143. programmable (OTP) bits; when programmed, register bits cannot be
  144. erased. Each Protection Register can be accessed multiple times to
  145. program individual bits, as long as the register remains unlocked.
  146. Each Protection Register has an associated Lock Register bit. When a
  147. Lock Register bit is programmed, the associated Protection Register
  148. can only be read; it can no longer be programmed. Additionally,
  149. because the Lock Register bits themselves are OTP, when programmed,
  150. Lock Register bits cannot be erased. Therefore, when a Protection
  151. Register is locked, it cannot be unlocked.
  152. This feature should therefore be used with extreme care. Any mistake
  153. in the programming of OTP bits will waste them.
  154. config MTD_CFI_INTELEXT
  155. tristate "Support for Intel/Sharp flash chips"
  156. depends on MTD_GEN_PROBE
  157. select MTD_CFI_UTIL
  158. help
  159. The Common Flash Interface defines a number of different command
  160. sets which a CFI-compliant chip may claim to implement. This code
  161. provides support for one of those command sets, used on Intel
  162. StrataFlash and other parts.
  163. config MTD_CFI_AMDSTD
  164. tristate "Support for AMD/Fujitsu flash chips"
  165. depends on MTD_GEN_PROBE
  166. select MTD_CFI_UTIL
  167. help
  168. The Common Flash Interface defines a number of different command
  169. sets which a CFI-compliant chip may claim to implement. This code
  170. provides support for one of those command sets, used on chips
  171. including the AMD Am29LV320.
  172. config MTD_CFI_STAA
  173. tristate "Support for ST (Advanced Architecture) flash chips"
  174. depends on MTD_GEN_PROBE
  175. select MTD_CFI_UTIL
  176. help
  177. The Common Flash Interface defines a number of different command
  178. sets which a CFI-compliant chip may claim to implement. This code
  179. provides support for one of those command sets.
  180. config MTD_CFI_UTIL
  181. tristate
  182. config MTD_RAM
  183. tristate "Support for RAM chips in bus mapping"
  184. depends on MTD
  185. help
  186. This option enables basic support for RAM chips accessed through
  187. a bus mapping driver.
  188. config MTD_ROM
  189. tristate "Support for ROM chips in bus mapping"
  190. depends on MTD
  191. help
  192. This option enables basic support for ROM chips accessed through
  193. a bus mapping driver.
  194. config MTD_ABSENT
  195. tristate "Support for absent chips in bus mapping"
  196. depends on MTD
  197. help
  198. This option enables support for a dummy probing driver used to
  199. allocated placeholder MTD devices on systems that have socketed
  200. or removable media. Use of this driver as a fallback chip probe
  201. preserves the expected registration order of MTD device nodes on
  202. the system regardless of media presence. Device nodes created
  203. with this driver will return -ENODEV upon access.
  204. config MTD_OBSOLETE_CHIPS
  205. depends on MTD
  206. bool "Older (theoretically obsoleted now) drivers for non-CFI chips"
  207. help
  208. This option does not enable any code directly, but will allow you to
  209. select some other chip drivers which are now considered obsolete,
  210. because the generic CONFIG_JEDECPROBE code above should now detect
  211. the chips which are supported by these drivers, and allow the generic
  212. CFI-compatible drivers to drive the chips. Say 'N' here unless you have
  213. already tried the CONFIG_JEDECPROBE method and reported its failure
  214. to the MTD mailing list at <linux-mtd@lists.infradead.org>
  215. config MTD_AMDSTD
  216. tristate "AMD compatible flash chip support (non-CFI)"
  217. depends on MTD && MTD_OBSOLETE_CHIPS && BROKEN
  218. help
  219. This option enables support for flash chips using AMD-compatible
  220. commands, including some which are not CFI-compatible and hence
  221. cannot be used with the CONFIG_MTD_CFI_AMDSTD option.
  222. It also works on AMD compatible chips that do conform to CFI.
  223. config MTD_SHARP
  224. tristate "pre-CFI Sharp chip support"
  225. depends on MTD && MTD_OBSOLETE_CHIPS
  226. help
  227. This option enables support for flash chips using Sharp-compatible
  228. commands, including some which are not CFI-compatible and hence
  229. cannot be used with the CONFIG_MTD_CFI_INTELxxx options.
  230. config MTD_JEDEC
  231. tristate "JEDEC device support"
  232. depends on MTD && MTD_OBSOLETE_CHIPS && BROKEN
  233. help
  234. Enable older older JEDEC flash interface devices for self
  235. programming flash. It is commonly used in older AMD chips. It is
  236. only called JEDEC because the JEDEC association
  237. <http://www.jedec.org/> distributes the identification codes for the
  238. chips.
  239. config MTD_XIP
  240. bool "XIP aware MTD support"
  241. depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && EXPERIMENTAL && ARCH_MTD_XIP
  242. default y if XIP_KERNEL
  243. help
  244. This allows MTD support to work with flash memory which is also
  245. used for XIP purposes. If you're not sure what this is all about
  246. then say N.
  247. endmenu