mmci.h 4.7 KB

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  1. /*
  2. * linux/drivers/mmc/mmci.h - ARM PrimeCell MMCI PL180/1 driver
  3. *
  4. * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #define MMCIPOWER 0x000
  11. #define MCI_PWR_OFF 0x00
  12. #define MCI_PWR_UP 0x02
  13. #define MCI_PWR_ON 0x03
  14. #define MCI_OD (1 << 6)
  15. #define MCI_ROD (1 << 7)
  16. #define MMCICLOCK 0x004
  17. #define MCI_CLK_ENABLE (1 << 8)
  18. #define MCI_CLK_PWRSAVE (1 << 9)
  19. #define MCI_CLK_BYPASS (1 << 10)
  20. #define MMCIARGUMENT 0x008
  21. #define MMCICOMMAND 0x00c
  22. #define MCI_CPSM_RESPONSE (1 << 6)
  23. #define MCI_CPSM_LONGRSP (1 << 7)
  24. #define MCI_CPSM_INTERRUPT (1 << 8)
  25. #define MCI_CPSM_PENDING (1 << 9)
  26. #define MCI_CPSM_ENABLE (1 << 10)
  27. #define MMCIRESPCMD 0x010
  28. #define MMCIRESPONSE0 0x014
  29. #define MMCIRESPONSE1 0x018
  30. #define MMCIRESPONSE2 0x01c
  31. #define MMCIRESPONSE3 0x020
  32. #define MMCIDATATIMER 0x024
  33. #define MMCIDATALENGTH 0x028
  34. #define MMCIDATACTRL 0x02c
  35. #define MCI_DPSM_ENABLE (1 << 0)
  36. #define MCI_DPSM_DIRECTION (1 << 1)
  37. #define MCI_DPSM_MODE (1 << 2)
  38. #define MCI_DPSM_DMAENABLE (1 << 3)
  39. #define MMCIDATACNT 0x030
  40. #define MMCISTATUS 0x034
  41. #define MCI_CMDCRCFAIL (1 << 0)
  42. #define MCI_DATACRCFAIL (1 << 1)
  43. #define MCI_CMDTIMEOUT (1 << 2)
  44. #define MCI_DATATIMEOUT (1 << 3)
  45. #define MCI_TXUNDERRUN (1 << 4)
  46. #define MCI_RXOVERRUN (1 << 5)
  47. #define MCI_CMDRESPEND (1 << 6)
  48. #define MCI_CMDSENT (1 << 7)
  49. #define MCI_DATAEND (1 << 8)
  50. #define MCI_DATABLOCKEND (1 << 10)
  51. #define MCI_CMDACTIVE (1 << 11)
  52. #define MCI_TXACTIVE (1 << 12)
  53. #define MCI_RXACTIVE (1 << 13)
  54. #define MCI_TXFIFOHALFEMPTY (1 << 14)
  55. #define MCI_RXFIFOHALFFULL (1 << 15)
  56. #define MCI_TXFIFOFULL (1 << 16)
  57. #define MCI_RXFIFOFULL (1 << 17)
  58. #define MCI_TXFIFOEMPTY (1 << 18)
  59. #define MCI_RXFIFOEMPTY (1 << 19)
  60. #define MCI_TXDATAAVLBL (1 << 20)
  61. #define MCI_RXDATAAVLBL (1 << 21)
  62. #define MMCICLEAR 0x038
  63. #define MCI_CMDCRCFAILCLR (1 << 0)
  64. #define MCI_DATACRCFAILCLR (1 << 1)
  65. #define MCI_CMDTIMEOUTCLR (1 << 2)
  66. #define MCI_DATATIMEOUTCLR (1 << 3)
  67. #define MCI_TXUNDERRUNCLR (1 << 4)
  68. #define MCI_RXOVERRUNCLR (1 << 5)
  69. #define MCI_CMDRESPENDCLR (1 << 6)
  70. #define MCI_CMDSENTCLR (1 << 7)
  71. #define MCI_DATAENDCLR (1 << 8)
  72. #define MCI_DATABLOCKENDCLR (1 << 10)
  73. #define MMCIMASK0 0x03c
  74. #define MCI_CMDCRCFAILMASK (1 << 0)
  75. #define MCI_DATACRCFAILMASK (1 << 1)
  76. #define MCI_CMDTIMEOUTMASK (1 << 2)
  77. #define MCI_DATATIMEOUTMASK (1 << 3)
  78. #define MCI_TXUNDERRUNMASK (1 << 4)
  79. #define MCI_RXOVERRUNMASK (1 << 5)
  80. #define MCI_CMDRESPENDMASK (1 << 6)
  81. #define MCI_CMDSENTMASK (1 << 7)
  82. #define MCI_DATAENDMASK (1 << 8)
  83. #define MCI_DATABLOCKENDMASK (1 << 10)
  84. #define MCI_CMDACTIVEMASK (1 << 11)
  85. #define MCI_TXACTIVEMASK (1 << 12)
  86. #define MCI_RXACTIVEMASK (1 << 13)
  87. #define MCI_TXFIFOHALFEMPTYMASK (1 << 14)
  88. #define MCI_RXFIFOHALFFULLMASK (1 << 15)
  89. #define MCI_TXFIFOFULLMASK (1 << 16)
  90. #define MCI_RXFIFOFULLMASK (1 << 17)
  91. #define MCI_TXFIFOEMPTYMASK (1 << 18)
  92. #define MCI_RXFIFOEMPTYMASK (1 << 19)
  93. #define MCI_TXDATAAVLBLMASK (1 << 20)
  94. #define MCI_RXDATAAVLBLMASK (1 << 21)
  95. #define MMCIMASK1 0x040
  96. #define MMCIFIFOCNT 0x048
  97. #define MMCIFIFO 0x080 /* to 0x0bc */
  98. #define MCI_IRQENABLE \
  99. (MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK| \
  100. MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \
  101. MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_DATABLOCKENDMASK)
  102. /*
  103. * The size of the FIFO in bytes.
  104. */
  105. #define MCI_FIFOSIZE (16*4)
  106. #define MCI_FIFOHALFSIZE (MCI_FIFOSIZE / 2)
  107. #define NR_SG 16
  108. struct clk;
  109. struct mmci_host {
  110. void __iomem *base;
  111. struct mmc_request *mrq;
  112. struct mmc_command *cmd;
  113. struct mmc_data *data;
  114. struct mmc_host *mmc;
  115. struct clk *clk;
  116. unsigned int data_xfered;
  117. spinlock_t lock;
  118. unsigned int mclk;
  119. unsigned int cclk;
  120. u32 pwr;
  121. struct mmc_platform_data *plat;
  122. struct timer_list timer;
  123. unsigned int oldstat;
  124. unsigned int sg_len;
  125. /* pio stuff */
  126. struct scatterlist *sg_ptr;
  127. unsigned int sg_off;
  128. unsigned int size;
  129. };
  130. static inline void mmci_init_sg(struct mmci_host *host, struct mmc_data *data)
  131. {
  132. /*
  133. * Ideally, we want the higher levels to pass us a scatter list.
  134. */
  135. host->sg_len = data->sg_len;
  136. host->sg_ptr = data->sg;
  137. host->sg_off = 0;
  138. }
  139. static inline int mmci_next_sg(struct mmci_host *host)
  140. {
  141. host->sg_ptr++;
  142. host->sg_off = 0;
  143. return --host->sg_len;
  144. }
  145. static inline char *mmci_kmap_atomic(struct mmci_host *host, unsigned long *flags)
  146. {
  147. struct scatterlist *sg = host->sg_ptr;
  148. local_irq_save(*flags);
  149. return kmap_atomic(sg->page, KM_BIO_SRC_IRQ) + sg->offset;
  150. }
  151. static inline void mmci_kunmap_atomic(struct mmci_host *host, void *buffer, unsigned long *flags)
  152. {
  153. kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
  154. local_irq_restore(*flags);
  155. }