stradis.c 64 KB

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  1. /*
  2. * stradis.c - stradis 4:2:2 mpeg decoder driver
  3. *
  4. * Stradis 4:2:2 MPEG-2 Decoder Driver
  5. * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/errno.h>
  24. #include <linux/fs.h>
  25. #include <linux/kernel.h>
  26. #include <linux/major.h>
  27. #include <linux/slab.h>
  28. #include <linux/mm.h>
  29. #include <linux/init.h>
  30. #include <linux/poll.h>
  31. #include <linux/pci.h>
  32. #include <linux/signal.h>
  33. #include <asm/io.h>
  34. #include <linux/ioport.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/page.h>
  37. #include <linux/sched.h>
  38. #include <asm/types.h>
  39. #include <linux/types.h>
  40. #include <linux/interrupt.h>
  41. #include <asm/uaccess.h>
  42. #include <linux/vmalloc.h>
  43. #include <linux/videodev.h>
  44. #include "saa7146.h"
  45. #include "saa7146reg.h"
  46. #include "ibmmpeg2.h"
  47. #include "saa7121.h"
  48. #include "cs8420.h"
  49. #define DEBUG(x) /* debug driver */
  50. #undef IDEBUG /* debug irq handler */
  51. #undef MDEBUG /* debug memory management */
  52. #define SAA7146_MAX 6
  53. static struct saa7146 saa7146s[SAA7146_MAX];
  54. static int saa_num = 0; /* number of SAA7146s in use */
  55. static int video_nr = -1;
  56. module_param(video_nr, int, 0);
  57. MODULE_LICENSE("GPL");
  58. #define nDebNormal 0x00480000
  59. #define nDebNoInc 0x00480000
  60. #define nDebVideo 0xd0480000
  61. #define nDebAudio 0xd0400000
  62. #define nDebDMA 0x02c80000
  63. #define oDebNormal 0x13c80000
  64. #define oDebNoInc 0x13c80000
  65. #define oDebVideo 0xd1080000
  66. #define oDebAudio 0xd1080000
  67. #define oDebDMA 0x03080000
  68. #define NewCard (saa->boardcfg[3])
  69. #define ChipControl (saa->boardcfg[1])
  70. #define NTSCFirstActive (saa->boardcfg[4])
  71. #define PALFirstActive (saa->boardcfg[5])
  72. #define NTSCLastActive (saa->boardcfg[54])
  73. #define PALLastActive (saa->boardcfg[55])
  74. #define Have2MB (saa->boardcfg[18] & 0x40)
  75. #define HaveCS8420 (saa->boardcfg[18] & 0x04)
  76. #define IBMMPEGCD20 (saa->boardcfg[18] & 0x20)
  77. #define HaveCS3310 (saa->boardcfg[18] & 0x01)
  78. #define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31])
  79. #define HaveCS4341 (saa->boardcfg[40] == 2)
  80. #define SDIType (saa->boardcfg[27])
  81. #define CurrentMode (saa->boardcfg[2])
  82. #define debNormal (NewCard ? nDebNormal : oDebNormal)
  83. #define debNoInc (NewCard ? nDebNoInc : oDebNoInc)
  84. #define debVideo (NewCard ? nDebVideo : oDebVideo)
  85. #define debAudio (NewCard ? nDebAudio : oDebAudio)
  86. #define debDMA (NewCard ? nDebDMA : oDebDMA)
  87. #ifdef USE_RESCUE_EEPROM_SDM275
  88. static unsigned char rescue_eeprom[64] = {
  89. 0x00, 0x01, 0x04, 0x13, 0x26, 0x0f, 0x10, 0x00, 0x00, 0x00, 0x43, 0x63,
  90. 0x22, 0x01, 0x29, 0x15, 0x73, 0x00, 0x1f, 'd', 'e', 'c', 'x', 'l',
  91. 'd', 'v', 'a', 0x02, 0x00, 0x01, 0x00, 0xcc, 0xa4, 0x63, 0x09, 0xe2,
  92. 0x10, 0x00, 0x0a, 0x00, 0x02, 0x02, 'd', 'e', 'c', 'x', 'l', 'a',
  93. 0x00, 0x00, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  94. 0x00, 0x00, 0x00, 0x00,
  95. };
  96. #endif
  97. /* ----------------------------------------------------------------------- */
  98. /* Hardware I2C functions */
  99. static void I2CWipe(struct saa7146 *saa)
  100. {
  101. int i;
  102. /* set i2c to ~=100kHz, abort transfer, clear busy */
  103. saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS);
  104. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  105. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  106. /* wait for i2c registers to be programmed */
  107. for (i = 0; i < 1000 &&
  108. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  109. schedule();
  110. saawrite(0x600, SAA7146_I2C_STATUS);
  111. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  112. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  113. /* wait for i2c registers to be programmed */
  114. for (i = 0; i < 1000 &&
  115. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  116. schedule();
  117. saawrite(0x600, SAA7146_I2C_STATUS);
  118. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  119. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  120. /* wait for i2c registers to be programmed */
  121. for (i = 0; i < 1000 &&
  122. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  123. schedule();
  124. }
  125. /* read I2C */
  126. static int I2CRead(struct saa7146 *saa, unsigned char addr,
  127. unsigned char subaddr, int dosub)
  128. {
  129. int i;
  130. if (saaread(SAA7146_I2C_STATUS) & 0x3c)
  131. I2CWipe(saa);
  132. for (i = 0;
  133. i < 1000 && (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY);
  134. i++)
  135. schedule();
  136. if (i == 1000)
  137. I2CWipe(saa);
  138. if (dosub)
  139. saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) |
  140. ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER);
  141. else
  142. saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) |
  143. 0xf1, SAA7146_I2C_TRANSFER);
  144. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  145. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  146. /* wait for i2c registers to be programmed */
  147. for (i = 0; i < 1000 &&
  148. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  149. schedule();
  150. /* wait for valid data */
  151. for (i = 0; i < 1000 &&
  152. (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
  153. schedule();
  154. if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR)
  155. return -1;
  156. if (i == 1000)
  157. printk("i2c setup read timeout\n");
  158. saawrite(0x41, SAA7146_I2C_TRANSFER);
  159. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  160. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  161. /* wait for i2c registers to be programmed */
  162. for (i = 0; i < 1000 &&
  163. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  164. schedule();
  165. /* wait for valid data */
  166. for (i = 0; i < 1000 &&
  167. (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++)
  168. schedule();
  169. if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR)
  170. return -1;
  171. if (i == 1000)
  172. printk("i2c read timeout\n");
  173. return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff);
  174. }
  175. /* set both to write both bytes, reset it to write only b1 */
  176. static int I2CWrite(struct saa7146 *saa, unsigned char addr, unsigned char b1,
  177. unsigned char b2, int both)
  178. {
  179. int i;
  180. u32 data;
  181. if (saaread(SAA7146_I2C_STATUS) & 0x3c)
  182. I2CWipe(saa);
  183. for (i = 0; i < 1000 &&
  184. (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
  185. schedule();
  186. if (i == 1000)
  187. I2CWipe(saa);
  188. data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16);
  189. if (both)
  190. data |= ((b2 & 0xff) << 8) | 0xe5;
  191. else
  192. data |= 0xd1;
  193. saawrite(data, SAA7146_I2C_TRANSFER);
  194. saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C,
  195. SAA7146_MC2);
  196. return 0;
  197. }
  198. static void attach_inform(struct saa7146 *saa, int id)
  199. {
  200. int i;
  201. DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr,
  202. id));
  203. if (id == 0xa0) { /* we have rev2 or later board, fill in info */
  204. for (i = 0; i < 64; i++)
  205. saa->boardcfg[i] = I2CRead(saa, 0xa0, i, 1);
  206. #ifdef USE_RESCUE_EEPROM_SDM275
  207. if (saa->boardcfg[0] != 0) {
  208. printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE "
  209. "BEEN IGNORED\n", saa->nr);
  210. for (i = 0; i < 64; i++)
  211. saa->boardcfg[i] = rescue_eeprom[i];
  212. }
  213. #endif
  214. printk("stradis%d: config =", saa->nr);
  215. for (i = 0; i < 51; i++) {
  216. printk(" %02x", saa->boardcfg[i]);
  217. }
  218. printk("\n");
  219. }
  220. }
  221. static void I2CBusScan(struct saa7146 *saa)
  222. {
  223. int i;
  224. for (i = 0; i < 0xff; i += 2)
  225. if ((I2CRead(saa, i, 0, 0)) >= 0)
  226. attach_inform(saa, i);
  227. }
  228. static int debiwait_maxwait = 0;
  229. static int wait_for_debi_done(struct saa7146 *saa)
  230. {
  231. int i;
  232. /* wait for registers to be programmed */
  233. for (i = 0; i < 100000 &&
  234. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++)
  235. saaread(SAA7146_MC2);
  236. /* wait for transfer to complete */
  237. for (i = 0; i < 500000 &&
  238. (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++)
  239. saaread(SAA7146_MC2);
  240. if (i > debiwait_maxwait)
  241. printk("wait-for-debi-done maxwait: %d\n",
  242. debiwait_maxwait = i);
  243. if (i == 500000)
  244. return -1;
  245. return 0;
  246. }
  247. static int debiwrite(struct saa7146 *saa, u32 config, int addr,
  248. u32 val, int count)
  249. {
  250. u32 cmd;
  251. if (count <= 0 || count > 32764)
  252. return -1;
  253. if (wait_for_debi_done(saa) < 0)
  254. return -1;
  255. saawrite(config, SAA7146_DEBI_CONFIG);
  256. if (count <= 4) /* immediate transfer */
  257. saawrite(val, SAA7146_DEBI_AD);
  258. else /* block transfer */
  259. saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
  260. saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND);
  261. saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
  262. SAA7146_MC2);
  263. return 0;
  264. }
  265. static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count)
  266. {
  267. u32 result = 0;
  268. if (count > 32764 || count <= 0)
  269. return 0;
  270. if (wait_for_debi_done(saa) < 0)
  271. return 0;
  272. saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
  273. saawrite((count << 17) | 0x10000 | (addr & 0xffff),
  274. SAA7146_DEBI_COMMAND);
  275. saawrite(config, SAA7146_DEBI_CONFIG);
  276. saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
  277. SAA7146_MC2);
  278. if (count > 4) /* not an immediate transfer */
  279. return count;
  280. wait_for_debi_done(saa);
  281. result = saaread(SAA7146_DEBI_AD);
  282. if (count == 1)
  283. result &= 0xff;
  284. if (count == 2)
  285. result &= 0xffff;
  286. if (count == 3)
  287. result &= 0xffffff;
  288. return result;
  289. }
  290. static void do_irq_send_data(struct saa7146 *saa)
  291. {
  292. int split, audbytes, vidbytes;
  293. saawrite(SAA7146_PSR_PIN1, SAA7146_IER);
  294. /* if special feature mode in effect, disable audio sending */
  295. if (saa->playmode != VID_PLAY_NORMAL)
  296. saa->audtail = saa->audhead = 0;
  297. if (saa->audhead <= saa->audtail)
  298. audbytes = saa->audtail - saa->audhead;
  299. else
  300. audbytes = 65536 - (saa->audhead - saa->audtail);
  301. if (saa->vidhead <= saa->vidtail)
  302. vidbytes = saa->vidtail - saa->vidhead;
  303. else
  304. vidbytes = 524288 - (saa->vidhead - saa->vidtail);
  305. if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) {
  306. saawrite(0, SAA7146_IER);
  307. return;
  308. }
  309. /* if at least 1 block audio waiting and audio fifo isn't full */
  310. if (audbytes >= 2048 && (debiread(saa, debNormal, IBM_MP2_AUD_FIFO, 2)
  311. & 0xff) < 60) {
  312. if (saa->audhead > saa->audtail)
  313. split = 65536 - saa->audhead;
  314. else
  315. split = 0;
  316. audbytes = 2048;
  317. if (split > 0 && split < 2048) {
  318. memcpy(saa->dmadebi, saa->audbuf + saa->audhead, split);
  319. saa->audhead = 0;
  320. audbytes -= split;
  321. } else
  322. split = 0;
  323. memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead,
  324. audbytes);
  325. saa->audhead += audbytes;
  326. saa->audhead &= 0xffff;
  327. debiwrite(saa, debAudio, (NewCard ? IBM_MP2_AUD_FIFO :
  328. IBM_MP2_AUD_FIFOW), 0, 2048);
  329. wake_up_interruptible(&saa->audq);
  330. /* if at least 1 block video waiting and video fifo isn't full */
  331. } else if (vidbytes >= 30720 && (debiread(saa, debNormal,
  332. IBM_MP2_FIFO, 2)) < 16384) {
  333. if (saa->vidhead > saa->vidtail)
  334. split = 524288 - saa->vidhead;
  335. else
  336. split = 0;
  337. vidbytes = 30720;
  338. if (split > 0 && split < 30720) {
  339. memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead, split);
  340. saa->vidhead = 0;
  341. vidbytes -= split;
  342. } else
  343. split = 0;
  344. memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead,
  345. vidbytes);
  346. saa->vidhead += vidbytes;
  347. saa->vidhead &= 0x7ffff;
  348. debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO :
  349. IBM_MP2_FIFOW), 0, 30720);
  350. wake_up_interruptible(&saa->vidq);
  351. }
  352. saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER);
  353. }
  354. static void send_osd_data(struct saa7146 *saa)
  355. {
  356. int size = saa->osdtail - saa->osdhead;
  357. if (size > 30720)
  358. size = 30720;
  359. /* ensure some multiple of 8 bytes is transferred */
  360. size = 8 * ((size + 8) >> 3);
  361. if (size) {
  362. debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR,
  363. (saa->osdhead >> 3), 2);
  364. memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size);
  365. saa->osdhead += size;
  366. /* block transfer of next 8 bytes to ~32k bytes */
  367. debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size);
  368. }
  369. if (saa->osdhead >= saa->osdtail) {
  370. saa->osdhead = saa->osdtail = 0;
  371. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  372. }
  373. }
  374. static irqreturn_t saa7146_irq(int irq, void *dev_id, struct pt_regs *regs)
  375. {
  376. struct saa7146 *saa = dev_id;
  377. u32 stat, astat;
  378. int count;
  379. int handled = 0;
  380. count = 0;
  381. while (1) {
  382. /* get/clear interrupt status bits */
  383. stat = saaread(SAA7146_ISR);
  384. astat = stat & saaread(SAA7146_IER);
  385. if (!astat)
  386. break;
  387. handled = 1;
  388. saawrite(astat, SAA7146_ISR);
  389. if (astat & SAA7146_PSR_DEBI_S) {
  390. do_irq_send_data(saa);
  391. }
  392. if (astat & SAA7146_PSR_PIN1) {
  393. int istat;
  394. /* the following read will trigger DEBI_S */
  395. istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  396. if (istat & 1) {
  397. saawrite(0, SAA7146_IER);
  398. send_osd_data(saa);
  399. saawrite(SAA7146_PSR_DEBI_S |
  400. SAA7146_PSR_PIN1, SAA7146_IER);
  401. }
  402. if (istat & 0x20) { /* Video Start */
  403. saa->vidinfo.frame_count++;
  404. }
  405. if (istat & 0x400) { /* Picture Start */
  406. /* update temporal reference */
  407. }
  408. if (istat & 0x200) { /* Picture Resolution Change */
  409. /* read new resolution */
  410. }
  411. if (istat & 0x100) { /* New User Data found */
  412. /* read new user data */
  413. }
  414. if (istat & 0x1000) { /* new GOP/SMPTE */
  415. /* read new SMPTE */
  416. }
  417. if (istat & 0x8000) { /* Sequence Start Code */
  418. /* reset frame counter, load sizes */
  419. saa->vidinfo.frame_count = 0;
  420. saa->vidinfo.h_size = 704;
  421. saa->vidinfo.v_size = 480;
  422. #if 0
  423. if (saa->endmarkhead != saa->endmarktail) {
  424. saa->audhead =
  425. saa->endmark[saa->endmarkhead];
  426. saa->endmarkhead++;
  427. if (saa->endmarkhead >= MAX_MARKS)
  428. saa->endmarkhead = 0;
  429. }
  430. #endif
  431. }
  432. if (istat & 0x4000) { /* Sequence Error Code */
  433. if (saa->endmarkhead != saa->endmarktail) {
  434. saa->audhead =
  435. saa->endmark[saa->endmarkhead];
  436. saa->endmarkhead++;
  437. if (saa->endmarkhead >= MAX_MARKS)
  438. saa->endmarkhead = 0;
  439. }
  440. }
  441. }
  442. #ifdef IDEBUG
  443. if (astat & SAA7146_PSR_PPEF) {
  444. IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr));
  445. }
  446. if (astat & SAA7146_PSR_PABO) {
  447. IDEBUG(printk("stradis%d irq: PABO\n", saa->nr));
  448. }
  449. if (astat & SAA7146_PSR_PPED) {
  450. IDEBUG(printk("stradis%d irq: PPED\n", saa->nr));
  451. }
  452. if (astat & SAA7146_PSR_RPS_I1) {
  453. IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr));
  454. }
  455. if (astat & SAA7146_PSR_RPS_I0) {
  456. IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr));
  457. }
  458. if (astat & SAA7146_PSR_RPS_LATE1) {
  459. IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr));
  460. }
  461. if (astat & SAA7146_PSR_RPS_LATE0) {
  462. IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr));
  463. }
  464. if (astat & SAA7146_PSR_RPS_E1) {
  465. IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr));
  466. }
  467. if (astat & SAA7146_PSR_RPS_E0) {
  468. IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr));
  469. }
  470. if (astat & SAA7146_PSR_RPS_TO1) {
  471. IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr));
  472. }
  473. if (astat & SAA7146_PSR_RPS_TO0) {
  474. IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr));
  475. }
  476. if (astat & SAA7146_PSR_UPLD) {
  477. IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr));
  478. }
  479. if (astat & SAA7146_PSR_DEBI_E) {
  480. IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr));
  481. }
  482. if (astat & SAA7146_PSR_I2C_S) {
  483. IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr));
  484. }
  485. if (astat & SAA7146_PSR_I2C_E) {
  486. IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr));
  487. }
  488. if (astat & SAA7146_PSR_A2_IN) {
  489. IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr));
  490. }
  491. if (astat & SAA7146_PSR_A2_OUT) {
  492. IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr));
  493. }
  494. if (astat & SAA7146_PSR_A1_IN) {
  495. IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr));
  496. }
  497. if (astat & SAA7146_PSR_A1_OUT) {
  498. IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr));
  499. }
  500. if (astat & SAA7146_PSR_AFOU) {
  501. IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr));
  502. }
  503. if (astat & SAA7146_PSR_V_PE) {
  504. IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr));
  505. }
  506. if (astat & SAA7146_PSR_VFOU) {
  507. IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr));
  508. }
  509. if (astat & SAA7146_PSR_FIDA) {
  510. IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr));
  511. }
  512. if (astat & SAA7146_PSR_FIDB) {
  513. IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr));
  514. }
  515. if (astat & SAA7146_PSR_PIN3) {
  516. IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr));
  517. }
  518. if (astat & SAA7146_PSR_PIN2) {
  519. IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr));
  520. }
  521. if (astat & SAA7146_PSR_PIN0) {
  522. IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr));
  523. }
  524. if (astat & SAA7146_PSR_ECS) {
  525. IDEBUG(printk("stradis%d irq: ECS\n", saa->nr));
  526. }
  527. if (astat & SAA7146_PSR_EC3S) {
  528. IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr));
  529. }
  530. if (astat & SAA7146_PSR_EC0S) {
  531. IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr));
  532. }
  533. #endif
  534. count++;
  535. if (count > 15)
  536. printk(KERN_WARNING "stradis%d: irq loop %d\n",
  537. saa->nr, count);
  538. if (count > 20) {
  539. saawrite(0, SAA7146_IER);
  540. printk(KERN_ERR
  541. "stradis%d: IRQ loop cleared\n", saa->nr);
  542. }
  543. }
  544. return IRQ_RETVAL(handled);
  545. }
  546. static int ibm_send_command(struct saa7146 *saa,
  547. int command, int data, int chain)
  548. {
  549. int i;
  550. if (chain)
  551. debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1)| 1,2);
  552. else
  553. debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2);
  554. debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2);
  555. debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2);
  556. for (i = 0; i < 100 &&
  557. (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++)
  558. schedule();
  559. if (i == 100)
  560. return -1;
  561. return 0;
  562. }
  563. static void cs4341_setlevel(struct saa7146 *saa, int left, int right)
  564. {
  565. I2CWrite(saa, 0x22, 0x03, left > 94 ? 94 : left, 2);
  566. I2CWrite(saa, 0x22, 0x04, right > 94 ? 94 : right, 2);
  567. }
  568. static void initialize_cs4341(struct saa7146 *saa)
  569. {
  570. int i;
  571. for (i = 0; i < 200; i++) {
  572. /* auto mute off, power on, no de-emphasis */
  573. /* I2S data up to 24-bit 64xFs internal SCLK */
  574. I2CWrite(saa, 0x22, 0x01, 0x11, 2);
  575. /* ATAPI mixer settings */
  576. I2CWrite(saa, 0x22, 0x02, 0x49, 2);
  577. /* attenuation left 3db */
  578. I2CWrite(saa, 0x22, 0x03, 0x00, 2);
  579. /* attenuation right 3db */
  580. I2CWrite(saa, 0x22, 0x04, 0x00, 2);
  581. I2CWrite(saa, 0x22, 0x01, 0x10, 2);
  582. if (I2CRead(saa, 0x22, 0x02, 1) == 0x49)
  583. break;
  584. schedule();
  585. }
  586. printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i);
  587. return;
  588. }
  589. static void initialize_cs8420(struct saa7146 *saa, int pro)
  590. {
  591. int i;
  592. u8 *sequence;
  593. if (pro)
  594. sequence = mode8420pro;
  595. else
  596. sequence = mode8420con;
  597. for (i = 0; i < INIT8420LEN; i++)
  598. I2CWrite(saa, 0x20, init8420[i * 2], init8420[i * 2 + 1], 2);
  599. for (i = 0; i < MODE8420LEN; i++)
  600. I2CWrite(saa, 0x20, sequence[i * 2], sequence[i * 2 + 1], 2);
  601. printk("stradis%d: CS8420 initialized\n", saa->nr);
  602. }
  603. static void initialize_saa7121(struct saa7146 *saa, int dopal)
  604. {
  605. int i, mod;
  606. u8 *sequence;
  607. if (dopal)
  608. sequence = init7121pal;
  609. else
  610. sequence = init7121ntsc;
  611. mod = saaread(SAA7146_PSR) & 0x08;
  612. /* initialize PAL/NTSC video encoder */
  613. for (i = 0; i < INIT7121LEN; i++) {
  614. if (NewCard) { /* handle new card encoder differences */
  615. if (sequence[i * 2] == 0x3a)
  616. I2CWrite(saa, 0x88, 0x3a, 0x13, 2);
  617. else if (sequence[i * 2] == 0x6b)
  618. I2CWrite(saa, 0x88, 0x6b, 0x20, 2);
  619. else if (sequence[i * 2] == 0x6c)
  620. I2CWrite(saa, 0x88, 0x6c,
  621. dopal ? 0x09 : 0xf5, 2);
  622. else if (sequence[i * 2] == 0x6d)
  623. I2CWrite(saa, 0x88, 0x6d,
  624. dopal ? 0x20 : 0x00, 2);
  625. else if (sequence[i * 2] == 0x7a)
  626. I2CWrite(saa, 0x88, 0x7a,
  627. dopal ? (PALFirstActive - 1) :
  628. (NTSCFirstActive - 4), 2);
  629. else if (sequence[i * 2] == 0x7b)
  630. I2CWrite(saa, 0x88, 0x7b,
  631. dopal ? PALLastActive :
  632. NTSCLastActive, 2);
  633. else
  634. I2CWrite(saa, 0x88, sequence[i * 2],
  635. sequence[i * 2 + 1], 2);
  636. } else {
  637. if (sequence[i * 2] == 0x6b && mod)
  638. I2CWrite(saa, 0x88, 0x6b,
  639. (sequence[i * 2 + 1] ^ 0x09), 2);
  640. else if (sequence[i * 2] == 0x7a)
  641. I2CWrite(saa, 0x88, 0x7a,
  642. dopal ? (PALFirstActive - 1) :
  643. (NTSCFirstActive - 4), 2);
  644. else if (sequence[i * 2] == 0x7b)
  645. I2CWrite(saa, 0x88, 0x7b,
  646. dopal ? PALLastActive :
  647. NTSCLastActive, 2);
  648. else
  649. I2CWrite(saa, 0x88, sequence[i * 2],
  650. sequence[i * 2 + 1], 2);
  651. }
  652. }
  653. }
  654. static void set_genlock_offset(struct saa7146 *saa, int noffset)
  655. {
  656. int nCode;
  657. int PixelsPerLine = 858;
  658. if (CurrentMode == VIDEO_MODE_PAL)
  659. PixelsPerLine = 864;
  660. if (noffset > 500)
  661. noffset = 500;
  662. else if (noffset < -500)
  663. noffset = -500;
  664. nCode = noffset + 0x100;
  665. if (nCode == 1)
  666. nCode = 0x401;
  667. else if (nCode < 1)
  668. nCode = 0x400 + PixelsPerLine + nCode;
  669. debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2);
  670. }
  671. static void set_out_format(struct saa7146 *saa, int mode)
  672. {
  673. initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1));
  674. saa->boardcfg[2] = mode;
  675. /* do not adjust analog video parameters here, use saa7121 init */
  676. /* you will affect the SDI output on the new card */
  677. if (mode == VIDEO_MODE_PAL) { /* PAL */
  678. debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2);
  679. mdelay(50);
  680. saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1);
  681. if (NewCard) {
  682. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 0xe100, 2);
  683. mdelay(50);
  684. }
  685. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  686. NewCard ? 0xe500 : 0x6500, 2);
  687. debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
  688. (1 << 8) |
  689. (NewCard ? PALFirstActive : PALFirstActive - 6), 2);
  690. } else { /* NTSC */
  691. debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2);
  692. mdelay(50);
  693. saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1);
  694. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  695. NewCard ? 0xe100 : 0x6100, 2);
  696. debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
  697. (1 << 8) |
  698. (NewCard ? NTSCFirstActive : NTSCFirstActive - 6), 2);
  699. }
  700. }
  701. /* Intialize bitmangler to map from a byte value to the mangled word that
  702. * must be output to program the Xilinx part through the DEBI port.
  703. * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0
  704. * transfer FPGA code, init IBM chip, transfer IBM microcode
  705. * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0
  706. */
  707. static u16 bitmangler[256];
  708. static int initialize_fpga(struct video_code *bitdata)
  709. {
  710. int i, num, startindex, failure = 0, loadtwo, loadfile = 0;
  711. u16 *dmabuf;
  712. u8 *newdma;
  713. struct saa7146 *saa;
  714. /* verify fpga code */
  715. for (startindex = 0; startindex < bitdata->datasize; startindex++)
  716. if (bitdata->data[startindex] == 255)
  717. break;
  718. if (startindex == bitdata->datasize) {
  719. printk(KERN_INFO "stradis: bad fpga code\n");
  720. return -1;
  721. }
  722. /* initialize all detected cards */
  723. for (num = 0; num < saa_num; num++) {
  724. saa = &saa7146s[num];
  725. if (saa->boardcfg[0] > 20)
  726. continue; /* card was programmed */
  727. loadtwo = (saa->boardcfg[18] & 0x10);
  728. if (!NewCard) /* we have an old board */
  729. for (i = 0; i < 256; i++)
  730. bitmangler[i] = ((i & 0x01) << 15) |
  731. ((i & 0x02) << 6) | ((i & 0x04) << 4) |
  732. ((i & 0x08) << 9) | ((i & 0x10) << 7) |
  733. ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
  734. ((i & 0x80) >> 7);
  735. else /* else we have a new board */
  736. for (i = 0; i < 256; i++)
  737. bitmangler[i] = ((i & 0x01) << 7) |
  738. ((i & 0x02) << 5) | ((i & 0x04) << 3) |
  739. ((i & 0x08) << 1) | ((i & 0x10) >> 1) |
  740. ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
  741. ((i & 0x80) >> 7);
  742. dmabuf = (u16 *) saa->dmadebi;
  743. newdma = (u8 *) saa->dmadebi;
  744. if (NewCard) { /* SDM2xxx */
  745. if (!strncmp(bitdata->loadwhat, "decoder2", 8))
  746. continue; /* fpga not for this card */
  747. if (!strncmp(&saa->boardcfg[42], bitdata->loadwhat, 8))
  748. loadfile = 1;
  749. else if (loadtwo && !strncmp(&saa->boardcfg[19],
  750. bitdata->loadwhat, 8))
  751. loadfile = 2;
  752. else if (!saa->boardcfg[42] && !strncmp("decxl",
  753. bitdata->loadwhat, 8))
  754. loadfile = 1; /* special */
  755. else
  756. continue; /* fpga not for this card */
  757. if (loadfile != 1 && loadfile != 2)
  758. continue; /* skip to next card */
  759. if (saa->boardcfg[0] && loadfile == 1)
  760. continue; /* skip to next card */
  761. if (saa->boardcfg[0] != 1 && loadfile == 2)
  762. continue; /* skip to next card */
  763. saa->boardcfg[0]++; /* mark fpga handled */
  764. printk("stradis%d: loading %s\n", saa->nr,
  765. bitdata->loadwhat);
  766. if (loadtwo && loadfile == 2)
  767. goto send_fpga_stuff;
  768. /* turn on the Audio interface to set PROG low */
  769. saawrite(0x00400040, SAA7146_GPIO_CTRL);
  770. saaread(SAA7146_PSR); /* ensure posted write */
  771. /* wait for everyone to reset */
  772. mdelay(10);
  773. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  774. } else { /* original card */
  775. if (strncmp(bitdata->loadwhat, "decoder2", 8))
  776. continue; /* fpga not for this card */
  777. /* Pull the Xilinx PROG signal WS3 low */
  778. saawrite(0x02000200, SAA7146_MC1);
  779. /* Turn on the Audio interface so can set PROG low */
  780. saawrite(0x000000c0, SAA7146_ACON1);
  781. /* Pull the Xilinx INIT signal (GPIO2) low */
  782. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  783. /* Make sure everybody resets */
  784. saaread(SAA7146_PSR); /* ensure posted write */
  785. mdelay(10);
  786. /* Release the Xilinx PROG signal */
  787. saawrite(0x00000000, SAA7146_ACON1);
  788. /* Turn off the Audio interface */
  789. saawrite(0x02000000, SAA7146_MC1);
  790. }
  791. /* Release Xilinx INIT signal (WS2) */
  792. saawrite(0x00000000, SAA7146_GPIO_CTRL);
  793. /* Wait for the INIT to go High */
  794. for (i = 0;
  795. i < 10000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2);
  796. i++)
  797. schedule();
  798. if (i == 1000) {
  799. printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr);
  800. return -1;
  801. }
  802. send_fpga_stuff:
  803. if (NewCard) {
  804. for (i = startindex; i < bitdata->datasize; i++)
  805. newdma[i - startindex] =
  806. bitmangler[bitdata->data[i]];
  807. debiwrite(saa, 0x01420000, 0, 0,
  808. ((bitdata->datasize - startindex) + 5));
  809. if (loadtwo && loadfile == 1) {
  810. printk("stradis%d: awaiting 2nd FPGA bitfile\n",
  811. saa->nr);
  812. continue; /* skip to next card */
  813. }
  814. } else {
  815. for (i = startindex; i < bitdata->datasize; i++)
  816. dmabuf[i - startindex] =
  817. bitmangler[bitdata->data[i]];
  818. debiwrite(saa, 0x014a0000, 0, 0,
  819. ((bitdata->datasize - startindex) + 5) * 2);
  820. }
  821. for (i = 0;
  822. i < 1000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2);
  823. i++)
  824. schedule();
  825. if (i == 1000) {
  826. printk(KERN_INFO "stradis%d: FPGA load failed\n",
  827. saa->nr);
  828. failure++;
  829. continue;
  830. }
  831. if (!NewCard) {
  832. /* Pull the Xilinx INIT signal (GPIO2) low */
  833. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  834. saaread(SAA7146_PSR); /* ensure posted write */
  835. mdelay(2);
  836. saawrite(0x00000000, SAA7146_GPIO_CTRL);
  837. mdelay(2);
  838. }
  839. printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr);
  840. saa->boardcfg[0] = 26; /* mark fpga programmed */
  841. /* set VXCO to its lowest frequency */
  842. debiwrite(saa, debNormal, XILINX_PWM, 0, 2);
  843. if (NewCard) {
  844. /* mute CS3310 */
  845. if (HaveCS3310)
  846. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
  847. 0, 2);
  848. /* set VXCO to PWM mode, release reset, blank on */
  849. debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2);
  850. mdelay(10);
  851. /* unmute CS3310 */
  852. if (HaveCS3310)
  853. debiwrite(saa, debNormal, XILINX_CTL0,
  854. 0x2020, 2);
  855. }
  856. /* set source Black */
  857. debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
  858. saa->boardcfg[4] = 22; /* set NTSC First Active Line */
  859. saa->boardcfg[5] = 23; /* set PAL First Active Line */
  860. saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */
  861. saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */
  862. set_out_format(saa, VIDEO_MODE_NTSC);
  863. mdelay(50);
  864. /* begin IBM chip init */
  865. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
  866. saaread(SAA7146_PSR); /* wait for reset */
  867. mdelay(5);
  868. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
  869. debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
  870. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2);
  871. debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2);
  872. debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
  873. if (NewCard) {
  874. mdelay(5);
  875. /* set i2s rate converter to 48KHz */
  876. debiwrite(saa, debNormal, 0x80c0, 6, 2);
  877. /* we must init CS8420 first since rev b pulls i2s */
  878. /* master clock low and CS4341 needs i2s master to */
  879. /* run the i2c port. */
  880. if (HaveCS8420)
  881. /* 0=consumer, 1=pro */
  882. initialize_cs8420(saa, 0);
  883. mdelay(5);
  884. if (HaveCS4341)
  885. initialize_cs4341(saa);
  886. }
  887. debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
  888. debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
  889. debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
  890. debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
  891. if (NewCard)
  892. set_genlock_offset(saa, 0);
  893. debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
  894. #if 0
  895. /* enable genlock */
  896. debiwrite(saa, debNormal, XILINX_CTL0, 0x8000, 2);
  897. #else
  898. /* disable genlock */
  899. debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2);
  900. #endif
  901. }
  902. return failure;
  903. }
  904. static int do_ibm_reset(struct saa7146 *saa)
  905. {
  906. /* failure if decoder not previously programmed */
  907. if (saa->boardcfg[0] < 37)
  908. return -EIO;
  909. /* mute CS3310 */
  910. if (HaveCS3310)
  911. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2);
  912. /* disable interrupts */
  913. saawrite(0, SAA7146_IER);
  914. saa->audhead = saa->audtail = 0;
  915. saa->vidhead = saa->vidtail = 0;
  916. /* tristate debi bus, disable debi transfers */
  917. saawrite(0x00880000, SAA7146_MC1);
  918. /* ensure posted write */
  919. saaread(SAA7146_MC1);
  920. mdelay(50);
  921. /* re-enable debi transfers */
  922. saawrite(0x00880088, SAA7146_MC1);
  923. /* set source Black */
  924. debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
  925. /* begin IBM chip init */
  926. set_out_format(saa, CurrentMode);
  927. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
  928. saaread(SAA7146_PSR); /* wait for reset */
  929. mdelay(5);
  930. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
  931. debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
  932. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  933. debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
  934. if (NewCard) {
  935. mdelay(5);
  936. /* set i2s rate converter to 48KHz */
  937. debiwrite(saa, debNormal, 0x80c0, 6, 2);
  938. /* we must init CS8420 first since rev b pulls i2s */
  939. /* master clock low and CS4341 needs i2s master to */
  940. /* run the i2c port. */
  941. if (HaveCS8420)
  942. /* 0=consumer, 1=pro */
  943. initialize_cs8420(saa, 1);
  944. mdelay(5);
  945. if (HaveCS4341)
  946. initialize_cs4341(saa);
  947. }
  948. debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
  949. debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
  950. debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
  951. debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
  952. if (NewCard)
  953. set_genlock_offset(saa, 0);
  954. debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
  955. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
  956. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
  957. if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
  958. (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) {
  959. printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr);
  960. }
  961. if (HaveCS3310) {
  962. int i = CS3310MaxLvl;
  963. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i << 8)| i),2);
  964. }
  965. /* start video decoder */
  966. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  967. /* 256k vid, 3520 bytes aud */
  968. debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2);
  969. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
  970. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  971. /* enable buffer threshold irq */
  972. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  973. /* clear pending interrupts */
  974. debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  975. debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
  976. return 0;
  977. }
  978. /* load the decoder microcode */
  979. static int initialize_ibmmpeg2(struct video_code *microcode)
  980. {
  981. int i, num;
  982. struct saa7146 *saa;
  983. for (num = 0; num < saa_num; num++) {
  984. saa = &saa7146s[num];
  985. /* check that FPGA is loaded */
  986. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2);
  987. i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2);
  988. if (i != 0xa55a) {
  989. printk(KERN_INFO "stradis%d: %04x != 0xa55a\n",
  990. saa->nr, i);
  991. #if 0
  992. return -1;
  993. #endif
  994. }
  995. if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) {
  996. if (saa->boardcfg[0] > 27)
  997. continue; /* skip to next card */
  998. /* load video control store */
  999. saa->boardcfg[1] = 0x13; /* no-sync default */
  1000. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
  1001. debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
  1002. for (i = 0; i < microcode->datasize / 2; i++)
  1003. debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA,
  1004. (microcode->data[i * 2] << 8) |
  1005. microcode->data[i * 2 + 1], 2);
  1006. debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
  1007. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
  1008. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1009. ChipControl, 2);
  1010. saa->boardcfg[0] = 28;
  1011. }
  1012. if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) {
  1013. if (saa->boardcfg[0] > 35)
  1014. continue; /* skip to next card */
  1015. /* load audio control store */
  1016. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
  1017. debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
  1018. for (i = 0; i < microcode->datasize; i++)
  1019. debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA,
  1020. microcode->data[i], 1);
  1021. debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
  1022. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
  1023. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
  1024. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
  1025. if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
  1026. 0xe000, 1)) {
  1027. printk(KERN_ERR "stradis%d: IBM config "
  1028. "failed\n", saa->nr);
  1029. return -1;
  1030. }
  1031. /* set PWM to center value */
  1032. if (NewCard) {
  1033. debiwrite(saa, debNormal, XILINX_PWM,
  1034. saa->boardcfg[14] +
  1035. (saa->boardcfg[13] << 8), 2);
  1036. } else
  1037. debiwrite(saa, debNormal, XILINX_PWM, 0x46, 2);
  1038. if (HaveCS3310) {
  1039. i = CS3310MaxLvl;
  1040. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
  1041. (i << 8) | i, 2);
  1042. }
  1043. printk(KERN_INFO "stradis%d: IBM MPEGCD%d Inited\n",
  1044. saa->nr, 18 + (debiread(saa, debNormal,
  1045. IBM_MP2_CHIP_CONTROL, 2) >> 12));
  1046. /* start video decoder */
  1047. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1048. ChipControl, 2);
  1049. debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037,
  1050. 2); /* 256k vid, 3520 bytes aud */
  1051. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
  1052. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1053. /* enable buffer threshold irq */
  1054. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  1055. debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  1056. /* enable gpio irq */
  1057. saawrite(0x00002000, SAA7146_GPIO_CTRL);
  1058. /* enable decoder output to HPS */
  1059. debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
  1060. saa->boardcfg[0] = 37;
  1061. }
  1062. }
  1063. return 0;
  1064. }
  1065. static u32 palette2fmt[] = { /* some of these YUV translations are wrong */
  1066. 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000,
  1067. 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000,
  1068. 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000
  1069. };
  1070. static int bpp2fmt[4] = {
  1071. VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24,
  1072. VIDEO_PALETTE_RGB32
  1073. };
  1074. /* I wish I could find a formula to calculate these... */
  1075. static u32 h_prescale[64] = {
  1076. 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808,
  1077. 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460,
  1078. 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f,
  1079. 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000,
  1080. 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000,
  1081. 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000,
  1082. 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000,
  1083. 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000,
  1084. 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000,
  1085. 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000,
  1086. 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000,
  1087. };
  1088. static u32 v_gain[64] = {
  1089. 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff,
  1090. 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff,
  1091. 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1092. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1093. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1094. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1095. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1096. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1097. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1098. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1099. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1100. };
  1101. static void saa7146_set_winsize(struct saa7146 *saa)
  1102. {
  1103. u32 format;
  1104. int offset, yacl, ysci;
  1105. saa->win.color_fmt = format =
  1106. (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] :
  1107. palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]];
  1108. offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl;
  1109. saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1);
  1110. saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1);
  1111. saawrite(saa->win.bpl * 2, SAA7146_PITCH1);
  1112. saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight,
  1113. SAA7146_PROT_ADDR1);
  1114. saawrite(0, SAA7146_PAGE1);
  1115. saawrite(format | 0x60, SAA7146_CLIP_FORMAT_CTRL);
  1116. offset = (704 / (saa->win.width - 1)) & 0x3f;
  1117. saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE);
  1118. offset = (720896 / saa->win.width) / (offset + 1);
  1119. saawrite((offset << 12) | 0x0c, SAA7146_HPS_H_SCALE);
  1120. if (CurrentMode == VIDEO_MODE_NTSC) {
  1121. yacl = /*(480 / saa->win.height - 1) & 0x3f */ 0;
  1122. ysci = 1024 - (saa->win.height * 1024 / 480);
  1123. } else {
  1124. yacl = /*(576 / saa->win.height - 1) & 0x3f */ 0;
  1125. ysci = 1024 - (saa->win.height * 1024 / 576);
  1126. }
  1127. saawrite((1 << 31) | (ysci << 21) | (yacl << 15), SAA7146_HPS_V_SCALE);
  1128. saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN);
  1129. saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V |
  1130. SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 |
  1131. SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H), SAA7146_MC2);
  1132. }
  1133. /* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area
  1134. * bitmap is fixed width, 128 bytes (1024 pixels represented)
  1135. * arranged most-sigificant-bit-left in 32-bit words
  1136. * based on saa7146 clipping hardware, it swaps bytes if LE
  1137. * much of this makes up for egcs brain damage -- so if you
  1138. * are wondering "why did he do this?" it is because the C
  1139. * was adjusted to generate the optimal asm output without
  1140. * writing non-portable __asm__ directives.
  1141. */
  1142. static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h)
  1143. {
  1144. register int startword, endword;
  1145. register u32 bitsleft, bitsright;
  1146. u32 *temp;
  1147. if (x < 0) {
  1148. w += x;
  1149. x = 0;
  1150. }
  1151. if (y < 0) {
  1152. h += y;
  1153. y = 0;
  1154. }
  1155. if (w <= 0 || h <= 0 || x > 1023 || y > 639)
  1156. return; /* throw away bad clips */
  1157. if (x + w > 1024)
  1158. w = 1024 - x;
  1159. if (y + h > 640)
  1160. h = 640 - y;
  1161. startword = (x >> 5);
  1162. endword = ((x + w) >> 5);
  1163. bitsleft = (0xffffffff >> (x & 31));
  1164. bitsright = (0xffffffff << (~((x + w) - (endword << 5))));
  1165. temp = &clipmap[(y << 5) + startword];
  1166. w = endword - startword;
  1167. if (!w) {
  1168. bitsleft |= bitsright;
  1169. for (y = 0; y < h; y++) {
  1170. *temp |= bitsleft;
  1171. temp += 32;
  1172. }
  1173. } else {
  1174. for (y = 0; y < h; y++) {
  1175. *temp++ |= bitsleft;
  1176. for (x = 1; x < w; x++)
  1177. *temp++ = 0xffffffff;
  1178. *temp |= bitsright;
  1179. temp += (32 - w);
  1180. }
  1181. }
  1182. }
  1183. static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr)
  1184. {
  1185. int i, width, height;
  1186. u32 *clipmap;
  1187. clipmap = saa->dmavid2;
  1188. if ((width = saa->win.width) > 1023)
  1189. width = 1023; /* sanity check */
  1190. if ((height = saa->win.height) > 640)
  1191. height = 639; /* sanity check */
  1192. if (ncr > 0) { /* rectangles pased */
  1193. /* convert rectangular clips to a bitmap */
  1194. memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */
  1195. for (i = 0; i < ncr; i++)
  1196. clip_draw_rectangle(clipmap, cr[i].x, cr[i].y,
  1197. cr[i].width, cr[i].height);
  1198. }
  1199. /* clip against viewing window AND screen
  1200. so we do not have to rely on the user program
  1201. */
  1202. clip_draw_rectangle(clipmap, (saa->win.x + width > saa->win.swidth) ?
  1203. (saa->win.swidth - saa->win.x) : width, 0, 1024, 768);
  1204. clip_draw_rectangle(clipmap, 0,
  1205. (saa->win.y + height > saa->win.sheight) ?
  1206. (saa->win.sheight - saa->win.y) : height, 1024, 768);
  1207. if (saa->win.x < 0)
  1208. clip_draw_rectangle(clipmap, 0, 0, -saa->win.x, 768);
  1209. if (saa->win.y < 0)
  1210. clip_draw_rectangle(clipmap, 0, 0, 1024, -saa->win.y);
  1211. }
  1212. static int saa_ioctl(struct inode *inode, struct file *file,
  1213. unsigned int cmd, unsigned long argl)
  1214. {
  1215. struct saa7146 *saa = file->private_data;
  1216. void __user *arg = (void __user *)argl;
  1217. switch (cmd) {
  1218. case VIDIOCGCAP:
  1219. {
  1220. struct video_capability b;
  1221. strcpy(b.name, saa->video_dev.name);
  1222. b.type = VID_TYPE_CAPTURE | VID_TYPE_OVERLAY |
  1223. VID_TYPE_CLIPPING | VID_TYPE_FRAMERAM |
  1224. VID_TYPE_SCALES;
  1225. b.channels = 1;
  1226. b.audios = 1;
  1227. b.maxwidth = 768;
  1228. b.maxheight = 576;
  1229. b.minwidth = 32;
  1230. b.minheight = 32;
  1231. if (copy_to_user(arg, &b, sizeof(b)))
  1232. return -EFAULT;
  1233. return 0;
  1234. }
  1235. case VIDIOCGPICT:
  1236. {
  1237. struct video_picture p = saa->picture;
  1238. if (saa->win.depth == 8)
  1239. p.palette = VIDEO_PALETTE_HI240;
  1240. if (saa->win.depth == 15)
  1241. p.palette = VIDEO_PALETTE_RGB555;
  1242. if (saa->win.depth == 16)
  1243. p.palette = VIDEO_PALETTE_RGB565;
  1244. if (saa->win.depth == 24)
  1245. p.palette = VIDEO_PALETTE_RGB24;
  1246. if (saa->win.depth == 32)
  1247. p.palette = VIDEO_PALETTE_RGB32;
  1248. if (copy_to_user(arg, &p, sizeof(p)))
  1249. return -EFAULT;
  1250. return 0;
  1251. }
  1252. case VIDIOCSPICT:
  1253. {
  1254. struct video_picture p;
  1255. u32 format;
  1256. if (copy_from_user(&p, arg, sizeof(p)))
  1257. return -EFAULT;
  1258. if (p.palette < sizeof(palette2fmt) / sizeof(u32)) {
  1259. format = palette2fmt[p.palette];
  1260. saa->win.color_fmt = format;
  1261. saawrite(format | 0x60,
  1262. SAA7146_CLIP_FORMAT_CTRL);
  1263. }
  1264. saawrite(((p.brightness & 0xff00) << 16) |
  1265. ((p.contrast & 0xfe00) << 7) |
  1266. ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL);
  1267. saa->picture = p;
  1268. /* upload changed registers */
  1269. saawrite(((SAA7146_MC2_UPLD_HPS_H |
  1270. SAA7146_MC2_UPLD_HPS_V) << 16) |
  1271. SAA7146_MC2_UPLD_HPS_H |
  1272. SAA7146_MC2_UPLD_HPS_V, SAA7146_MC2);
  1273. return 0;
  1274. }
  1275. case VIDIOCSWIN:
  1276. {
  1277. struct video_window vw;
  1278. struct video_clip *vcp = NULL;
  1279. if (copy_from_user(&vw, arg, sizeof(vw)))
  1280. return -EFAULT;
  1281. /* stop capture */
  1282. if (vw.flags || vw.width < 16 || vw.height < 16) {
  1283. saawrite((SAA7146_MC1_TR_E_1 << 16),
  1284. SAA7146_MC1);
  1285. return -EINVAL;
  1286. }
  1287. /* 32-bit align start and adjust width */
  1288. if (saa->win.bpp < 4) {
  1289. int i = vw.x;
  1290. vw.x = (vw.x + 3) & ~3;
  1291. i = vw.x - i;
  1292. vw.width -= i;
  1293. }
  1294. saa->win.x = vw.x;
  1295. saa->win.y = vw.y;
  1296. saa->win.width = vw.width;
  1297. if (saa->win.width > 768)
  1298. saa->win.width = 768;
  1299. saa->win.height = vw.height;
  1300. if (CurrentMode == VIDEO_MODE_NTSC) {
  1301. if (saa->win.height > 480)
  1302. saa->win.height = 480;
  1303. } else {
  1304. if (saa->win.height > 576)
  1305. saa->win.height = 576;
  1306. }
  1307. /* stop capture */
  1308. saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
  1309. saa7146_set_winsize(saa);
  1310. /*
  1311. * Do any clips.
  1312. */
  1313. if (vw.clipcount < 0) {
  1314. if (copy_from_user(saa->dmavid2, vw.clips,
  1315. VIDEO_CLIPMAP_SIZE))
  1316. return -EFAULT;
  1317. } else if (vw.clipcount > 16384) {
  1318. return -EINVAL;
  1319. } else if (vw.clipcount > 0) {
  1320. vcp = vmalloc(sizeof(struct video_clip) *
  1321. vw.clipcount);
  1322. if (vcp == NULL)
  1323. return -ENOMEM;
  1324. if (copy_from_user(vcp, vw.clips,
  1325. sizeof(struct video_clip) *
  1326. vw.clipcount)) {
  1327. vfree(vcp);
  1328. return -EFAULT;
  1329. }
  1330. } else /* nothing clipped */
  1331. memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE);
  1332. make_clip_tab(saa, vcp, vw.clipcount);
  1333. if (vw.clipcount > 0)
  1334. vfree(vcp);
  1335. /* start capture & clip dma if we have an address */
  1336. if ((saa->cap & 3) && saa->win.vidadr != 0)
  1337. saawrite(((SAA7146_MC1_TR_E_1 |
  1338. SAA7146_MC1_TR_E_2) << 16) | 0xffff,
  1339. SAA7146_MC1);
  1340. return 0;
  1341. }
  1342. case VIDIOCGWIN:
  1343. {
  1344. struct video_window vw;
  1345. vw.x = saa->win.x;
  1346. vw.y = saa->win.y;
  1347. vw.width = saa->win.width;
  1348. vw.height = saa->win.height;
  1349. vw.chromakey = 0;
  1350. vw.flags = 0;
  1351. if (copy_to_user(arg, &vw, sizeof(vw)))
  1352. return -EFAULT;
  1353. return 0;
  1354. }
  1355. case VIDIOCCAPTURE:
  1356. {
  1357. int v;
  1358. if (copy_from_user(&v, arg, sizeof(v)))
  1359. return -EFAULT;
  1360. if (v == 0) {
  1361. saa->cap &= ~1;
  1362. saawrite((SAA7146_MC1_TR_E_1 << 16),
  1363. SAA7146_MC1);
  1364. } else {
  1365. if (saa->win.vidadr == 0 || saa->win.width == 0
  1366. || saa->win.height == 0)
  1367. return -EINVAL;
  1368. saa->cap |= 1;
  1369. saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff,
  1370. SAA7146_MC1);
  1371. }
  1372. return 0;
  1373. }
  1374. case VIDIOCGFBUF:
  1375. {
  1376. struct video_buffer v;
  1377. v.base = (void *)saa->win.vidadr;
  1378. v.height = saa->win.sheight;
  1379. v.width = saa->win.swidth;
  1380. v.depth = saa->win.depth;
  1381. v.bytesperline = saa->win.bpl;
  1382. if (copy_to_user(arg, &v, sizeof(v)))
  1383. return -EFAULT;
  1384. return 0;
  1385. }
  1386. case VIDIOCSFBUF:
  1387. {
  1388. struct video_buffer v;
  1389. if (!capable(CAP_SYS_ADMIN))
  1390. return -EPERM;
  1391. if (copy_from_user(&v, arg, sizeof(v)))
  1392. return -EFAULT;
  1393. if (v.depth != 8 && v.depth != 15 && v.depth != 16 &&
  1394. v.depth != 24 && v.depth != 32 && v.width > 16 &&
  1395. v.height > 16 && v.bytesperline > 16)
  1396. return -EINVAL;
  1397. if (v.base)
  1398. saa->win.vidadr = (unsigned long)v.base;
  1399. saa->win.sheight = v.height;
  1400. saa->win.swidth = v.width;
  1401. saa->win.bpp = ((v.depth + 7) & 0x38) / 8;
  1402. saa->win.depth = v.depth;
  1403. saa->win.bpl = v.bytesperline;
  1404. DEBUG(printk("Display at %p is %d by %d, bytedepth %d, "
  1405. "bpl %d\n", v.base, v.width, v.height,
  1406. saa->win.bpp, saa->win.bpl));
  1407. saa7146_set_winsize(saa);
  1408. return 0;
  1409. }
  1410. case VIDIOCKEY:
  1411. {
  1412. /* Will be handled higher up .. */
  1413. return 0;
  1414. }
  1415. case VIDIOCGAUDIO:
  1416. {
  1417. struct video_audio v;
  1418. v = saa->audio_dev;
  1419. v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE);
  1420. v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME;
  1421. strcpy(v.name, "MPEG");
  1422. v.mode = VIDEO_SOUND_STEREO;
  1423. if (copy_to_user(arg, &v, sizeof(v)))
  1424. return -EFAULT;
  1425. return 0;
  1426. }
  1427. case VIDIOCSAUDIO:
  1428. {
  1429. struct video_audio v;
  1430. int i;
  1431. if (copy_from_user(&v, arg, sizeof(v)))
  1432. return -EFAULT;
  1433. i = (~(v.volume >> 8)) & 0xff;
  1434. if (!HaveCS4341) {
  1435. if (v.flags & VIDEO_AUDIO_MUTE)
  1436. debiwrite(saa, debNormal,
  1437. IBM_MP2_FRNT_ATTEN, 0xffff, 2);
  1438. if (!(v.flags & VIDEO_AUDIO_MUTE))
  1439. debiwrite(saa, debNormal,
  1440. IBM_MP2_FRNT_ATTEN, 0x0000, 2);
  1441. if (v.flags & VIDEO_AUDIO_VOLUME)
  1442. debiwrite(saa, debNormal,
  1443. IBM_MP2_FRNT_ATTEN,
  1444. (i << 8) | i, 2);
  1445. } else {
  1446. if (v.flags & VIDEO_AUDIO_MUTE)
  1447. cs4341_setlevel(saa, 0xff, 0xff);
  1448. if (!(v.flags & VIDEO_AUDIO_MUTE))
  1449. cs4341_setlevel(saa, 0, 0);
  1450. if (v.flags & VIDEO_AUDIO_VOLUME)
  1451. cs4341_setlevel(saa, i, i);
  1452. }
  1453. saa->audio_dev = v;
  1454. return 0;
  1455. }
  1456. case VIDIOCGUNIT:
  1457. {
  1458. struct video_unit vu;
  1459. vu.video = saa->video_dev.minor;
  1460. vu.vbi = VIDEO_NO_UNIT;
  1461. vu.radio = VIDEO_NO_UNIT;
  1462. vu.audio = VIDEO_NO_UNIT;
  1463. vu.teletext = VIDEO_NO_UNIT;
  1464. if (copy_to_user(arg, &vu, sizeof(vu)))
  1465. return -EFAULT;
  1466. return 0;
  1467. }
  1468. case VIDIOCSPLAYMODE:
  1469. {
  1470. struct video_play_mode pmode;
  1471. if (copy_from_user((void *)&pmode, arg,
  1472. sizeof(struct video_play_mode)))
  1473. return -EFAULT;
  1474. switch (pmode.mode) {
  1475. case VID_PLAY_VID_OUT_MODE:
  1476. if (pmode.p1 != VIDEO_MODE_NTSC &&
  1477. pmode.p1 != VIDEO_MODE_PAL)
  1478. return -EINVAL;
  1479. set_out_format(saa, pmode.p1);
  1480. return 0;
  1481. case VID_PLAY_GENLOCK:
  1482. debiwrite(saa, debNormal, XILINX_CTL0,
  1483. pmode.p1 ? 0x8000 : 0x8080, 2);
  1484. if (NewCard)
  1485. set_genlock_offset(saa, pmode.p2);
  1486. return 0;
  1487. case VID_PLAY_NORMAL:
  1488. debiwrite(saa, debNormal,
  1489. IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1490. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1491. saa->playmode = pmode.mode;
  1492. return 0;
  1493. case VID_PLAY_PAUSE:
  1494. /* IBM removed the PAUSE command */
  1495. /* they say use SINGLE_FRAME now */
  1496. case VID_PLAY_SINGLE_FRAME:
  1497. ibm_send_command(saa, IBM_MP2_SINGLE_FRAME,0,0);
  1498. if (saa->playmode == pmode.mode) {
  1499. debiwrite(saa, debNormal,
  1500. IBM_MP2_CHIP_CONTROL,
  1501. ChipControl, 2);
  1502. }
  1503. saa->playmode = pmode.mode;
  1504. return 0;
  1505. case VID_PLAY_FAST_FORWARD:
  1506. ibm_send_command(saa, IBM_MP2_FAST_FORWARD,0,0);
  1507. saa->playmode = pmode.mode;
  1508. return 0;
  1509. case VID_PLAY_SLOW_MOTION:
  1510. ibm_send_command(saa, IBM_MP2_SLOW_MOTION,
  1511. pmode.p1, 0);
  1512. saa->playmode = pmode.mode;
  1513. return 0;
  1514. case VID_PLAY_IMMEDIATE_NORMAL:
  1515. /* ensure transfers resume */
  1516. debiwrite(saa, debNormal,
  1517. IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1518. ibm_send_command(saa, IBM_MP2_IMED_NORM_PLAY,
  1519. 0, 0);
  1520. saa->playmode = VID_PLAY_NORMAL;
  1521. return 0;
  1522. case VID_PLAY_SWITCH_CHANNELS:
  1523. saa->audhead = saa->audtail = 0;
  1524. saa->vidhead = saa->vidtail = 0;
  1525. ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,1);
  1526. ibm_send_command(saa, IBM_MP2_RESET_AUD_RATE,
  1527. 0, 1);
  1528. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1529. 0, 2);
  1530. ibm_send_command(saa, IBM_MP2_CHANNEL_SWITCH,
  1531. 0, 1);
  1532. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1533. ChipControl, 2);
  1534. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1535. saa->playmode = VID_PLAY_NORMAL;
  1536. return 0;
  1537. case VID_PLAY_FREEZE_FRAME:
  1538. ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,0);
  1539. saa->playmode = pmode.mode;
  1540. return 0;
  1541. case VID_PLAY_STILL_MODE:
  1542. ibm_send_command(saa, IBM_MP2_SET_STILL_MODE,
  1543. 0, 0);
  1544. saa->playmode = pmode.mode;
  1545. return 0;
  1546. case VID_PLAY_MASTER_MODE:
  1547. if (pmode.p1 == VID_PLAY_MASTER_NONE)
  1548. saa->boardcfg[1] = 0x13;
  1549. else if (pmode.p1 == VID_PLAY_MASTER_VIDEO)
  1550. saa->boardcfg[1] = 0x23;
  1551. else if (pmode.p1 == VID_PLAY_MASTER_AUDIO)
  1552. saa->boardcfg[1] = 0x43;
  1553. else
  1554. return -EINVAL;
  1555. debiwrite(saa, debNormal,
  1556. IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1557. return 0;
  1558. case VID_PLAY_ACTIVE_SCANLINES:
  1559. if (CurrentMode == VIDEO_MODE_PAL) {
  1560. if (pmode.p1 < 1 || pmode.p2 > 625)
  1561. return -EINVAL;
  1562. saa->boardcfg[5] = pmode.p1;
  1563. saa->boardcfg[55] = (pmode.p1 +
  1564. (pmode.p2 / 2) - 1) & 0xff;
  1565. } else {
  1566. if (pmode.p1 < 4 || pmode.p2 > 525)
  1567. return -EINVAL;
  1568. saa->boardcfg[4] = pmode.p1;
  1569. saa->boardcfg[54] = (pmode.p1 +
  1570. (pmode.p2 / 2) - 4) & 0xff;
  1571. }
  1572. set_out_format(saa, CurrentMode);
  1573. case VID_PLAY_RESET:
  1574. return do_ibm_reset(saa);
  1575. case VID_PLAY_END_MARK:
  1576. if (saa->endmarktail < saa->endmarkhead) {
  1577. if (saa->endmarkhead -
  1578. saa->endmarktail < 2)
  1579. return -ENOSPC;
  1580. } else if (saa->endmarkhead <=saa->endmarktail){
  1581. if (saa->endmarktail - saa->endmarkhead
  1582. > (MAX_MARKS - 2))
  1583. return -ENOSPC;
  1584. } else
  1585. return -ENOSPC;
  1586. saa->endmark[saa->endmarktail] = saa->audtail;
  1587. saa->endmarktail++;
  1588. if (saa->endmarktail >= MAX_MARKS)
  1589. saa->endmarktail = 0;
  1590. }
  1591. return -EINVAL;
  1592. }
  1593. case VIDIOCSWRITEMODE:
  1594. {
  1595. int mode;
  1596. if (copy_from_user((void *)&mode, arg, sizeof(int)))
  1597. return -EFAULT;
  1598. if (mode == VID_WRITE_MPEG_AUD ||
  1599. mode == VID_WRITE_MPEG_VID ||
  1600. mode == VID_WRITE_CC ||
  1601. mode == VID_WRITE_TTX ||
  1602. mode == VID_WRITE_OSD) {
  1603. saa->writemode = mode;
  1604. return 0;
  1605. }
  1606. return -EINVAL;
  1607. }
  1608. case VIDIOCSMICROCODE:
  1609. {
  1610. struct video_code ucode;
  1611. __u8 *udata;
  1612. int i;
  1613. if (copy_from_user(&ucode, arg, sizeof(ucode)))
  1614. return -EFAULT;
  1615. if (ucode.datasize > 65536 || ucode.datasize < 1024 ||
  1616. strncmp(ucode.loadwhat, "dec", 3))
  1617. return -EINVAL;
  1618. if ((udata = vmalloc(ucode.datasize)) == NULL)
  1619. return -ENOMEM;
  1620. if (copy_from_user(udata, ucode.data, ucode.datasize)) {
  1621. vfree(udata);
  1622. return -EFAULT;
  1623. }
  1624. ucode.data = udata;
  1625. if (!strncmp(ucode.loadwhat, "decoder.aud", 11) ||
  1626. !strncmp(ucode.loadwhat, "decoder.vid", 11))
  1627. i = initialize_ibmmpeg2(&ucode);
  1628. else
  1629. i = initialize_fpga(&ucode);
  1630. vfree(udata);
  1631. if (i)
  1632. return -EINVAL;
  1633. return 0;
  1634. }
  1635. case VIDIOCGCHAN: /* this makes xawtv happy */
  1636. {
  1637. struct video_channel v;
  1638. if (copy_from_user(&v, arg, sizeof(v)))
  1639. return -EFAULT;
  1640. v.flags = VIDEO_VC_AUDIO;
  1641. v.tuners = 0;
  1642. v.type = VID_TYPE_MPEG_DECODER;
  1643. v.norm = CurrentMode;
  1644. strcpy(v.name, "MPEG2");
  1645. if (copy_to_user(arg, &v, sizeof(v)))
  1646. return -EFAULT;
  1647. return 0;
  1648. }
  1649. case VIDIOCSCHAN: /* this makes xawtv happy */
  1650. {
  1651. struct video_channel v;
  1652. if (copy_from_user(&v, arg, sizeof(v)))
  1653. return -EFAULT;
  1654. /* do nothing */
  1655. return 0;
  1656. }
  1657. default:
  1658. return -ENOIOCTLCMD;
  1659. }
  1660. return 0;
  1661. }
  1662. static int saa_mmap(struct file *file, struct vm_area_struct *vma)
  1663. {
  1664. struct saa7146 *saa = file->private_data;
  1665. printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr);
  1666. return -EINVAL;
  1667. }
  1668. static ssize_t saa_read(struct file *file, char __user * buf,
  1669. size_t count, loff_t * ppos)
  1670. {
  1671. return -EINVAL;
  1672. }
  1673. static ssize_t saa_write(struct file *file, const char __user * buf,
  1674. size_t count, loff_t * ppos)
  1675. {
  1676. struct saa7146 *saa = file->private_data;
  1677. unsigned long todo = count;
  1678. int blocksize, split;
  1679. unsigned long flags;
  1680. while (todo > 0) {
  1681. if (saa->writemode == VID_WRITE_MPEG_AUD) {
  1682. spin_lock_irqsave(&saa->lock, flags);
  1683. if (saa->audhead <= saa->audtail)
  1684. blocksize = 65536 -
  1685. (saa->audtail - saa->audhead);
  1686. else
  1687. blocksize = saa->audhead - saa->audtail;
  1688. spin_unlock_irqrestore(&saa->lock, flags);
  1689. if (blocksize < 16384) {
  1690. saawrite(SAA7146_PSR_DEBI_S |
  1691. SAA7146_PSR_PIN1, SAA7146_IER);
  1692. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1693. /* wait for buffer space to open */
  1694. interruptible_sleep_on(&saa->audq);
  1695. }
  1696. spin_lock_irqsave(&saa->lock, flags);
  1697. if (saa->audhead <= saa->audtail) {
  1698. blocksize = 65536 -
  1699. (saa->audtail - saa->audhead);
  1700. split = 65536 - saa->audtail;
  1701. } else {
  1702. blocksize = saa->audhead - saa->audtail;
  1703. split = 65536;
  1704. }
  1705. spin_unlock_irqrestore(&saa->lock, flags);
  1706. blocksize--;
  1707. if (blocksize > todo)
  1708. blocksize = todo;
  1709. /* double check that we really have space */
  1710. if (!blocksize)
  1711. return -ENOSPC;
  1712. if (split < blocksize) {
  1713. if (copy_from_user(saa->audbuf +
  1714. saa->audtail, buf, split))
  1715. return -EFAULT;
  1716. buf += split;
  1717. todo -= split;
  1718. blocksize -= split;
  1719. saa->audtail = 0;
  1720. }
  1721. if (copy_from_user(saa->audbuf + saa->audtail, buf,
  1722. blocksize))
  1723. return -EFAULT;
  1724. saa->audtail += blocksize;
  1725. todo -= blocksize;
  1726. buf += blocksize;
  1727. saa->audtail &= 0xffff;
  1728. } else if (saa->writemode == VID_WRITE_MPEG_VID) {
  1729. spin_lock_irqsave(&saa->lock, flags);
  1730. if (saa->vidhead <= saa->vidtail)
  1731. blocksize = 524288 -
  1732. (saa->vidtail - saa->vidhead);
  1733. else
  1734. blocksize = saa->vidhead - saa->vidtail;
  1735. spin_unlock_irqrestore(&saa->lock, flags);
  1736. if (blocksize < 65536) {
  1737. saawrite(SAA7146_PSR_DEBI_S |
  1738. SAA7146_PSR_PIN1, SAA7146_IER);
  1739. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1740. /* wait for buffer space to open */
  1741. interruptible_sleep_on(&saa->vidq);
  1742. }
  1743. spin_lock_irqsave(&saa->lock, flags);
  1744. if (saa->vidhead <= saa->vidtail) {
  1745. blocksize = 524288 -
  1746. (saa->vidtail - saa->vidhead);
  1747. split = 524288 - saa->vidtail;
  1748. } else {
  1749. blocksize = saa->vidhead - saa->vidtail;
  1750. split = 524288;
  1751. }
  1752. spin_unlock_irqrestore(&saa->lock, flags);
  1753. blocksize--;
  1754. if (blocksize > todo)
  1755. blocksize = todo;
  1756. /* double check that we really have space */
  1757. if (!blocksize)
  1758. return -ENOSPC;
  1759. if (split < blocksize) {
  1760. if (copy_from_user(saa->vidbuf +
  1761. saa->vidtail, buf, split))
  1762. return -EFAULT;
  1763. buf += split;
  1764. todo -= split;
  1765. blocksize -= split;
  1766. saa->vidtail = 0;
  1767. }
  1768. if (copy_from_user(saa->vidbuf + saa->vidtail, buf,
  1769. blocksize))
  1770. return -EFAULT;
  1771. saa->vidtail += blocksize;
  1772. todo -= blocksize;
  1773. buf += blocksize;
  1774. saa->vidtail &= 0x7ffff;
  1775. } else if (saa->writemode == VID_WRITE_OSD) {
  1776. if (count > 131072)
  1777. return -ENOSPC;
  1778. if (copy_from_user(saa->osdbuf, buf, count))
  1779. return -EFAULT;
  1780. buf += count;
  1781. saa->osdhead = 0;
  1782. saa->osdtail = count;
  1783. debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2);
  1784. debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2);
  1785. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2);
  1786. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  1787. debiread(saa, debNormal,
  1788. IBM_MP2_DISP_MODE, 2) | 1, 2);
  1789. /* trigger osd data transfer */
  1790. saawrite(SAA7146_PSR_DEBI_S |
  1791. SAA7146_PSR_PIN1, SAA7146_IER);
  1792. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1793. }
  1794. }
  1795. return count;
  1796. }
  1797. static int saa_open(struct inode *inode, struct file *file)
  1798. {
  1799. struct video_device *vdev = video_devdata(file);
  1800. struct saa7146 *saa = container_of(vdev, struct saa7146, video_dev);
  1801. file->private_data = saa;
  1802. saa->user++;
  1803. if (saa->user > 1)
  1804. return 0; /* device open already, don't reset */
  1805. saa->writemode = VID_WRITE_MPEG_VID; /* default to video */
  1806. return 0;
  1807. }
  1808. static int saa_release(struct inode *inode, struct file *file)
  1809. {
  1810. struct saa7146 *saa = file->private_data;
  1811. saa->user--;
  1812. if (saa->user > 0) /* still someone using device */
  1813. return 0;
  1814. saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */
  1815. return 0;
  1816. }
  1817. static struct file_operations saa_fops = {
  1818. .owner = THIS_MODULE,
  1819. .open = saa_open,
  1820. .release = saa_release,
  1821. .ioctl = saa_ioctl,
  1822. .compat_ioctl = v4l_compat_ioctl32,
  1823. .read = saa_read,
  1824. .llseek = no_llseek,
  1825. .write = saa_write,
  1826. .mmap = saa_mmap,
  1827. };
  1828. /* template for video_device-structure */
  1829. static struct video_device saa_template = {
  1830. .name = "SAA7146A",
  1831. .type = VID_TYPE_CAPTURE | VID_TYPE_OVERLAY,
  1832. .hardware = VID_HARDWARE_SAA7146,
  1833. .fops = &saa_fops,
  1834. .minor = -1,
  1835. };
  1836. static int __devinit configure_saa7146(struct pci_dev *pdev, int num)
  1837. {
  1838. int retval;
  1839. struct saa7146 *saa = pci_get_drvdata(pdev);
  1840. saa->endmarkhead = saa->endmarktail = 0;
  1841. saa->win.x = saa->win.y = 0;
  1842. saa->win.width = saa->win.cropwidth = 720;
  1843. saa->win.height = saa->win.cropheight = 480;
  1844. saa->win.cropx = saa->win.cropy = 0;
  1845. saa->win.bpp = 2;
  1846. saa->win.depth = 16;
  1847. saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565];
  1848. saa->win.bpl = 1024 * saa->win.bpp;
  1849. saa->win.swidth = 1024;
  1850. saa->win.sheight = 768;
  1851. saa->picture.brightness = 32768;
  1852. saa->picture.contrast = 38768;
  1853. saa->picture.colour = 32768;
  1854. saa->cap = 0;
  1855. saa->nr = num;
  1856. saa->playmode = VID_PLAY_NORMAL;
  1857. memset(saa->boardcfg, 0, 64); /* clear board config area */
  1858. saa->saa7146_mem = NULL;
  1859. saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in =
  1860. saa->dmaa1out = saa->dmaa2in = saa->dmaa2out =
  1861. saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in =
  1862. saa->pagea1out = saa->pagea2in = saa->pagea2out =
  1863. saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 =
  1864. saa->pageRPS2 = NULL;
  1865. saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL;
  1866. saa->audhead = saa->vidtail = 0;
  1867. init_waitqueue_head(&saa->i2cq);
  1868. init_waitqueue_head(&saa->audq);
  1869. init_waitqueue_head(&saa->debiq);
  1870. init_waitqueue_head(&saa->vidq);
  1871. spin_lock_init(&saa->lock);
  1872. retval = pci_enable_device(pdev);
  1873. if (retval) {
  1874. dev_err(&pdev->dev, "%d: pci_enable_device failed!\n", num);
  1875. goto err;
  1876. }
  1877. saa->id = pdev->device;
  1878. saa->irq = pdev->irq;
  1879. saa->video_dev.minor = -1;
  1880. saa->saa7146_adr = pci_resource_start(pdev, 0);
  1881. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &saa->revision);
  1882. saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200);
  1883. if (saa->saa7146_mem == NULL) {
  1884. dev_err(&pdev->dev, "%d: ioremap failed!\n", num);
  1885. retval = -EIO;
  1886. goto err;
  1887. }
  1888. memcpy(&saa->video_dev, &saa_template, sizeof(saa_template));
  1889. saawrite(0, SAA7146_IER); /* turn off all interrupts */
  1890. retval = request_irq(saa->irq, saa7146_irq, SA_SHIRQ | SA_INTERRUPT,
  1891. "stradis", saa);
  1892. if (retval == -EINVAL)
  1893. dev_err(&pdev->dev, "%d: Bad irq number or handler\n", num);
  1894. else if (retval == -EBUSY)
  1895. dev_err(&pdev->dev, "%d: IRQ %ld busy, change your PnP config "
  1896. "in BIOS\n", num, saa->irq);
  1897. if (retval < 0)
  1898. goto errio;
  1899. pci_set_master(pdev);
  1900. retval = video_register_device(&saa->video_dev, VFL_TYPE_GRABBER,
  1901. video_nr);
  1902. if (retval < 0) {
  1903. dev_err(&pdev->dev, "%d: error in registering video device!\n",
  1904. num);
  1905. goto errio;
  1906. }
  1907. return 0;
  1908. errio:
  1909. iounmap(saa->saa7146_mem);
  1910. err:
  1911. return retval;
  1912. }
  1913. static int __devinit init_saa7146(struct pci_dev *pdev)
  1914. {
  1915. struct saa7146 *saa = pci_get_drvdata(pdev);
  1916. saa->user = 0;
  1917. /* reset the saa7146 */
  1918. saawrite(0xffff0000, SAA7146_MC1);
  1919. mdelay(5);
  1920. /* enable debi and i2c transfers and pins */
  1921. saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C |
  1922. SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1);
  1923. /* ensure proper state of chip */
  1924. saawrite(0x00000000, SAA7146_PAGE1);
  1925. saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1);
  1926. saawrite(0x00000000, SAA7146_PAGE2);
  1927. saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2);
  1928. saawrite(0x00000000, SAA7146_DD1_INIT);
  1929. saawrite(0x00000000, SAA7146_DD1_STREAM_B);
  1930. saawrite(0x00000000, SAA7146_DD1_STREAM_A);
  1931. saawrite(0x00000000, SAA7146_BRS_CTRL);
  1932. saawrite(0x80400040, SAA7146_BCS_CTRL);
  1933. saawrite(0x0000e000 /*| (1<<29) */ , SAA7146_HPS_CTRL);
  1934. saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL);
  1935. saawrite(0x00000000, SAA7146_ACON1);
  1936. saawrite(0x00000000, SAA7146_ACON2);
  1937. saawrite(0x00000600, SAA7146_I2C_STATUS);
  1938. saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A |
  1939. SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H |
  1940. SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 |
  1941. SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff,
  1942. SAA7146_MC2);
  1943. /* setup arbitration control registers */
  1944. saawrite(0x1412121a, SAA7146_PCI_BT_V1);
  1945. /* allocate 32k dma buffer + 4k for page table */
  1946. if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) {
  1947. dev_err(&pdev->dev, "%d: debi kmalloc failed\n", saa->nr);
  1948. goto err;
  1949. }
  1950. #if 0
  1951. saa->pagedebi = saa->dmadebi + 32768; /* top 4k is for mmu */
  1952. saawrite(virt_to_bus(saa->pagedebi) /*|0x800 */ , SAA7146_DEBI_PAGE);
  1953. for (i = 0; i < 12; i++) /* setup mmu page table */
  1954. saa->pagedebi[i] = virt_to_bus((saa->dmadebi + i * 4096));
  1955. #endif
  1956. saa->audhead = saa->vidhead = saa->osdhead = 0;
  1957. saa->audtail = saa->vidtail = saa->osdtail = 0;
  1958. if (saa->vidbuf == NULL && (saa->vidbuf = vmalloc(524288)) == NULL) {
  1959. dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
  1960. goto err;
  1961. }
  1962. if (saa->audbuf == NULL && (saa->audbuf = vmalloc(65536)) == NULL) {
  1963. dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
  1964. goto errfree;
  1965. }
  1966. if (saa->osdbuf == NULL && (saa->osdbuf = vmalloc(131072)) == NULL) {
  1967. dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
  1968. goto errfree;
  1969. }
  1970. /* allocate 81920 byte buffer for clipping */
  1971. if ((saa->dmavid2 = kzalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) {
  1972. dev_err(&pdev->dev, "%d: clip kmalloc failed\n", saa->nr);
  1973. goto errfree;
  1974. }
  1975. /* setup clipping registers */
  1976. saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2);
  1977. saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2);
  1978. saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE,
  1979. SAA7146_PROT_ADDR2);
  1980. saawrite(256, SAA7146_PITCH2);
  1981. saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */
  1982. saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2,
  1983. SAA7146_MC2);
  1984. I2CBusScan(saa);
  1985. return 0;
  1986. errfree:
  1987. vfree(saa->osdbuf);
  1988. vfree(saa->audbuf);
  1989. vfree(saa->vidbuf);
  1990. saa->audbuf = saa->osdbuf = saa->vidbuf = NULL;
  1991. err:
  1992. return -ENOMEM;
  1993. }
  1994. static void stradis_release_saa(struct pci_dev *pdev)
  1995. {
  1996. u8 command;
  1997. struct saa7146 *saa = pci_get_drvdata(pdev);
  1998. /* turn off all capturing, DMA and IRQs */
  1999. saawrite(0xffff0000, SAA7146_MC1); /* reset chip */
  2000. saawrite(0, SAA7146_MC2);
  2001. saawrite(0, SAA7146_IER);
  2002. saawrite(0xffffffffUL, SAA7146_ISR);
  2003. /* disable PCI bus-mastering */
  2004. pci_read_config_byte(pdev, PCI_COMMAND, &command);
  2005. command &= ~PCI_COMMAND_MASTER;
  2006. pci_write_config_byte(pdev, PCI_COMMAND, command);
  2007. /* unmap and free memory */
  2008. saa->audhead = saa->audtail = saa->osdhead = 0;
  2009. saa->vidhead = saa->vidtail = saa->osdtail = 0;
  2010. vfree(saa->vidbuf);
  2011. vfree(saa->audbuf);
  2012. vfree(saa->osdbuf);
  2013. kfree(saa->dmavid2);
  2014. saa->audbuf = saa->vidbuf = saa->osdbuf = NULL;
  2015. saa->dmavid2 = NULL;
  2016. kfree(saa->dmadebi);
  2017. kfree(saa->dmavid1);
  2018. kfree(saa->dmavid3);
  2019. kfree(saa->dmaa1in);
  2020. kfree(saa->dmaa1out);
  2021. kfree(saa->dmaa2in);
  2022. kfree(saa->dmaa2out);
  2023. kfree(saa->dmaRPS1);
  2024. kfree(saa->dmaRPS2);
  2025. free_irq(saa->irq, saa);
  2026. if (saa->saa7146_mem)
  2027. iounmap(saa->saa7146_mem);
  2028. if (saa->video_dev.minor != -1)
  2029. video_unregister_device(&saa->video_dev);
  2030. }
  2031. static int __devinit stradis_probe(struct pci_dev *pdev,
  2032. const struct pci_device_id *ent)
  2033. {
  2034. int retval = -EINVAL;
  2035. if (saa_num >= SAA7146_MAX)
  2036. goto err;
  2037. if (!pdev->subsystem_vendor)
  2038. dev_info(&pdev->dev, "%d: rev1 decoder\n", saa_num);
  2039. else
  2040. dev_info(&pdev->dev, "%d: SDM2xx found\n", saa_num);
  2041. pci_set_drvdata(pdev, &saa7146s[saa_num]);
  2042. retval = configure_saa7146(pdev, saa_num);
  2043. if (retval) {
  2044. dev_err(&pdev->dev, "%d: error in configuring\n", saa_num);
  2045. goto err;
  2046. }
  2047. if (init_saa7146(pdev) < 0) {
  2048. dev_err(&pdev->dev, "%d: error in initialization\n", saa_num);
  2049. retval = -EIO;
  2050. goto errrel;
  2051. }
  2052. saa_num++;
  2053. return 0;
  2054. errrel:
  2055. stradis_release_saa(pdev);
  2056. err:
  2057. return retval;
  2058. }
  2059. static void __devexit stradis_remove(struct pci_dev *pdev)
  2060. {
  2061. stradis_release_saa(pdev);
  2062. }
  2063. static struct pci_device_id stradis_pci_tbl[] = {
  2064. { PCI_DEVICE(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146) },
  2065. { 0 }
  2066. };
  2067. MODULE_DEVICE_TABLE(pci, stradis_pci_tbl);
  2068. static struct pci_driver stradis_driver = {
  2069. .name = "stradis",
  2070. .id_table = stradis_pci_tbl,
  2071. .probe = stradis_probe,
  2072. .remove = __devexit_p(stradis_remove)
  2073. };
  2074. int __init stradis_init(void)
  2075. {
  2076. int retval;
  2077. saa_num = 0;
  2078. retval = pci_register_driver(&stradis_driver);
  2079. if (retval)
  2080. printk(KERN_ERR "stradis: Unable to register pci driver.\n");
  2081. return retval;
  2082. }
  2083. void __exit stradis_exit(void)
  2084. {
  2085. pci_unregister_driver(&stradis_driver);
  2086. printk(KERN_INFO "stradis: module cleanup complete\n");
  2087. }
  2088. module_init(stradis_init);
  2089. module_exit(stradis_exit);