saa7114.c 31 KB

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  1. /*
  2. * saa7114 - Philips SAA7114H video decoder driver version 0.0.1
  3. *
  4. * Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com>
  5. *
  6. * Based on saa7111 driver by Dave Perks
  7. *
  8. * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
  9. *
  10. * Slight changes for video timing and attachment output by
  11. * Wolfgang Scherr <scherr@net4you.net>
  12. *
  13. * Changes by Ronald Bultje <rbultje@ronald.bitfreak.net>
  14. * - moved over to linux>=2.4.x i2c protocol (1/1/2003)
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  29. */
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/delay.h>
  33. #include <linux/errno.h>
  34. #include <linux/fs.h>
  35. #include <linux/kernel.h>
  36. #include <linux/major.h>
  37. #include <linux/slab.h>
  38. #include <linux/mm.h>
  39. #include <linux/pci.h>
  40. #include <linux/signal.h>
  41. #include <asm/io.h>
  42. #include <asm/pgtable.h>
  43. #include <asm/page.h>
  44. #include <linux/sched.h>
  45. #include <linux/types.h>
  46. #include <linux/videodev.h>
  47. #include <asm/uaccess.h>
  48. MODULE_DESCRIPTION("Philips SAA7114H video decoder driver");
  49. MODULE_AUTHOR("Maxim Yevtyushkin");
  50. MODULE_LICENSE("GPL");
  51. #include <linux/i2c.h>
  52. #define I2C_NAME(x) (x)->name
  53. #include <linux/video_decoder.h>
  54. static int debug = 0;
  55. module_param(debug, int, 0);
  56. MODULE_PARM_DESC(debug, "Debug level (0-1)");
  57. #define dprintk(num, format, args...) \
  58. do { \
  59. if (debug >= num) \
  60. printk(format, ##args); \
  61. } while (0)
  62. /* ----------------------------------------------------------------------- */
  63. struct saa7114 {
  64. unsigned char reg[0xf0 * 2];
  65. int norm;
  66. int input;
  67. int enable;
  68. int bright;
  69. int contrast;
  70. int hue;
  71. int sat;
  72. int playback;
  73. };
  74. #define I2C_SAA7114 0x42
  75. #define I2C_SAA7114A 0x40
  76. #define I2C_DELAY 10
  77. //#define SAA_7114_NTSC_HSYNC_START (-3)
  78. //#define SAA_7114_NTSC_HSYNC_STOP (-18)
  79. #define SAA_7114_NTSC_HSYNC_START (-17)
  80. #define SAA_7114_NTSC_HSYNC_STOP (-32)
  81. //#define SAA_7114_NTSC_HOFFSET (5)
  82. #define SAA_7114_NTSC_HOFFSET (6)
  83. #define SAA_7114_NTSC_VOFFSET (10)
  84. #define SAA_7114_NTSC_WIDTH (720)
  85. #define SAA_7114_NTSC_HEIGHT (250)
  86. #define SAA_7114_SECAM_HSYNC_START (-17)
  87. #define SAA_7114_SECAM_HSYNC_STOP (-32)
  88. #define SAA_7114_SECAM_HOFFSET (2)
  89. #define SAA_7114_SECAM_VOFFSET (10)
  90. #define SAA_7114_SECAM_WIDTH (720)
  91. #define SAA_7114_SECAM_HEIGHT (300)
  92. #define SAA_7114_PAL_HSYNC_START (-17)
  93. #define SAA_7114_PAL_HSYNC_STOP (-32)
  94. #define SAA_7114_PAL_HOFFSET (2)
  95. #define SAA_7114_PAL_VOFFSET (10)
  96. #define SAA_7114_PAL_WIDTH (720)
  97. #define SAA_7114_PAL_HEIGHT (300)
  98. #define SAA_7114_VERTICAL_CHROMA_OFFSET 0 //0x50504040
  99. #define SAA_7114_VERTICAL_LUMA_OFFSET 0
  100. #define REG_ADDR(x) (((x) << 1) + 1)
  101. #define LOBYTE(x) ((unsigned char)((x) & 0xff))
  102. #define HIBYTE(x) ((unsigned char)(((x) >> 8) & 0xff))
  103. #define LOWORD(x) ((unsigned short int)((x) & 0xffff))
  104. #define HIWORD(x) ((unsigned short int)(((x) >> 16) & 0xffff))
  105. /* ----------------------------------------------------------------------- */
  106. static inline int
  107. saa7114_write (struct i2c_client *client,
  108. u8 reg,
  109. u8 value)
  110. {
  111. return i2c_smbus_write_byte_data(client, reg, value);
  112. }
  113. static int
  114. saa7114_write_block (struct i2c_client *client,
  115. const u8 *data,
  116. unsigned int len)
  117. {
  118. int ret = -1;
  119. u8 reg;
  120. /* the saa7114 has an autoincrement function, use it if
  121. * the adapter understands raw I2C */
  122. if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  123. /* do raw I2C, not smbus compatible */
  124. u8 block_data[32];
  125. int block_len;
  126. while (len >= 2) {
  127. block_len = 0;
  128. block_data[block_len++] = reg = data[0];
  129. do {
  130. block_data[block_len++] = data[1];
  131. reg++;
  132. len -= 2;
  133. data += 2;
  134. } while (len >= 2 && data[0] == reg &&
  135. block_len < 32);
  136. if ((ret = i2c_master_send(client, block_data,
  137. block_len)) < 0)
  138. break;
  139. }
  140. } else {
  141. /* do some slow I2C emulation kind of thing */
  142. while (len >= 2) {
  143. reg = *data++;
  144. if ((ret = saa7114_write(client, reg,
  145. *data++)) < 0)
  146. break;
  147. len -= 2;
  148. }
  149. }
  150. return ret;
  151. }
  152. static inline int
  153. saa7114_read (struct i2c_client *client,
  154. u8 reg)
  155. {
  156. return i2c_smbus_read_byte_data(client, reg);
  157. }
  158. /* ----------------------------------------------------------------------- */
  159. // initially set NTSC, composite
  160. static const unsigned char init[] = {
  161. 0x00, 0x00, /* 00 - ID byte , chip version,
  162. * read only */
  163. 0x01, 0x08, /* 01 - X,X,X,X, IDEL3 to IDEL0 -
  164. * horizontal increment delay,
  165. * recommended position */
  166. 0x02, 0x00, /* 02 - FUSE=3, GUDL=2, MODE=0 ;
  167. * input control */
  168. 0x03, 0x10, /* 03 - HLNRS=0, VBSL=1, WPOFF=0,
  169. * HOLDG=0, GAFIX=0, GAI1=256, GAI2=256 */
  170. 0x04, 0x90, /* 04 - GAI1=256 */
  171. 0x05, 0x90, /* 05 - GAI2=256 */
  172. 0x06, SAA_7114_NTSC_HSYNC_START, /* 06 - HSB: hsync start,
  173. * depends on the video standard */
  174. 0x07, SAA_7114_NTSC_HSYNC_STOP, /* 07 - HSS: hsync stop, depends
  175. *on the video standard */
  176. 0x08, 0xb8, /* 08 - AUFD=1, FSEL=1, EXFIL=0, VTRC=1,
  177. * HPLL: free running in playback, locked
  178. * in capture, VNOI=0 */
  179. 0x09, 0x80, /* 09 - BYPS=0, PREF=0, BPSS=0, VBLB=0,
  180. * UPTCV=0, APER=1; depends from input */
  181. 0x0a, 0x80, /* 0a - BRIG=128 */
  182. 0x0b, 0x44, /* 0b - CONT=1.109 */
  183. 0x0c, 0x40, /* 0c - SATN=1.0 */
  184. 0x0d, 0x00, /* 0d - HUE=0 */
  185. 0x0e, 0x84, /* 0e - CDTO, CSTD2 to 0, DCVF, FCTC,
  186. * CCOMB; depends from video standard */
  187. 0x0f, 0x24, /* 0f - ACGC,CGAIN6 to CGAIN0; depends
  188. * from video standard */
  189. 0x10, 0x03, /* 10 - OFFU1 to 0, OFFV1 to 0, CHBW,
  190. * LCBW2 to 0 */
  191. 0x11, 0x59, /* 11 - COLO, RTP1, HEDL1 to 0, RTP0,
  192. * YDEL2 to 0 */
  193. 0x12, 0xc9, /* 12 - RT signal control RTSE13 to 10
  194. * and 03 to 00 */
  195. 0x13, 0x80, /* 13 - RT/X port output control */
  196. 0x14, 0x00, /* 14 - analog, ADC, compatibility control */
  197. 0x15, 0x00, /* 15 - VGATE start FID change */
  198. 0x16, 0xfe, /* 16 - VGATE stop */
  199. 0x17, 0x00, /* 17 - Misc., VGATE MSBs */
  200. 0x18, 0x40, /* RAWG */
  201. 0x19, 0x80, /* RAWO */
  202. 0x1a, 0x00,
  203. 0x1b, 0x00,
  204. 0x1c, 0x00,
  205. 0x1d, 0x00,
  206. 0x1e, 0x00,
  207. 0x1f, 0x00, /* status byte, read only */
  208. 0x20, 0x00, /* video decoder reserved part */
  209. 0x21, 0x00,
  210. 0x22, 0x00,
  211. 0x23, 0x00,
  212. 0x24, 0x00,
  213. 0x25, 0x00,
  214. 0x26, 0x00,
  215. 0x27, 0x00,
  216. 0x28, 0x00,
  217. 0x29, 0x00,
  218. 0x2a, 0x00,
  219. 0x2b, 0x00,
  220. 0x2c, 0x00,
  221. 0x2d, 0x00,
  222. 0x2e, 0x00,
  223. 0x2f, 0x00,
  224. 0x30, 0xbc, /* audio clock generator */
  225. 0x31, 0xdf,
  226. 0x32, 0x02,
  227. 0x33, 0x00,
  228. 0x34, 0xcd,
  229. 0x35, 0xcc,
  230. 0x36, 0x3a,
  231. 0x37, 0x00,
  232. 0x38, 0x03,
  233. 0x39, 0x10,
  234. 0x3a, 0x00,
  235. 0x3b, 0x00,
  236. 0x3c, 0x00,
  237. 0x3d, 0x00,
  238. 0x3e, 0x00,
  239. 0x3f, 0x00,
  240. 0x40, 0x00, /* VBI data slicer */
  241. 0x41, 0xff,
  242. 0x42, 0xff,
  243. 0x43, 0xff,
  244. 0x44, 0xff,
  245. 0x45, 0xff,
  246. 0x46, 0xff,
  247. 0x47, 0xff,
  248. 0x48, 0xff,
  249. 0x49, 0xff,
  250. 0x4a, 0xff,
  251. 0x4b, 0xff,
  252. 0x4c, 0xff,
  253. 0x4d, 0xff,
  254. 0x4e, 0xff,
  255. 0x4f, 0xff,
  256. 0x50, 0xff,
  257. 0x51, 0xff,
  258. 0x52, 0xff,
  259. 0x53, 0xff,
  260. 0x54, 0xff,
  261. 0x55, 0xff,
  262. 0x56, 0xff,
  263. 0x57, 0xff,
  264. 0x58, 0x40, // framing code
  265. 0x59, 0x47, // horizontal offset
  266. 0x5a, 0x06, // vertical offset
  267. 0x5b, 0x83, // field offset
  268. 0x5c, 0x00, // reserved
  269. 0x5d, 0x3e, // header and data
  270. 0x5e, 0x00, // sliced data
  271. 0x5f, 0x00, // reserved
  272. 0x60, 0x00, /* video decoder reserved part */
  273. 0x61, 0x00,
  274. 0x62, 0x00,
  275. 0x63, 0x00,
  276. 0x64, 0x00,
  277. 0x65, 0x00,
  278. 0x66, 0x00,
  279. 0x67, 0x00,
  280. 0x68, 0x00,
  281. 0x69, 0x00,
  282. 0x6a, 0x00,
  283. 0x6b, 0x00,
  284. 0x6c, 0x00,
  285. 0x6d, 0x00,
  286. 0x6e, 0x00,
  287. 0x6f, 0x00,
  288. 0x70, 0x00, /* video decoder reserved part */
  289. 0x71, 0x00,
  290. 0x72, 0x00,
  291. 0x73, 0x00,
  292. 0x74, 0x00,
  293. 0x75, 0x00,
  294. 0x76, 0x00,
  295. 0x77, 0x00,
  296. 0x78, 0x00,
  297. 0x79, 0x00,
  298. 0x7a, 0x00,
  299. 0x7b, 0x00,
  300. 0x7c, 0x00,
  301. 0x7d, 0x00,
  302. 0x7e, 0x00,
  303. 0x7f, 0x00,
  304. 0x80, 0x00, /* X-port, I-port and scaler */
  305. 0x81, 0x00,
  306. 0x82, 0x00,
  307. 0x83, 0x00,
  308. 0x84, 0xc5,
  309. 0x85, 0x0d, // hsync and vsync ?
  310. 0x86, 0x40,
  311. 0x87, 0x01,
  312. 0x88, 0x00,
  313. 0x89, 0x00,
  314. 0x8a, 0x00,
  315. 0x8b, 0x00,
  316. 0x8c, 0x00,
  317. 0x8d, 0x00,
  318. 0x8e, 0x00,
  319. 0x8f, 0x00,
  320. 0x90, 0x03, /* Task A definition */
  321. 0x91, 0x08,
  322. 0x92, 0x00,
  323. 0x93, 0x40,
  324. 0x94, 0x00, // window settings
  325. 0x95, 0x00,
  326. 0x96, 0x00,
  327. 0x97, 0x00,
  328. 0x98, 0x00,
  329. 0x99, 0x00,
  330. 0x9a, 0x00,
  331. 0x9b, 0x00,
  332. 0x9c, 0x00,
  333. 0x9d, 0x00,
  334. 0x9e, 0x00,
  335. 0x9f, 0x00,
  336. 0xa0, 0x01, /* horizontal integer prescaling ratio */
  337. 0xa1, 0x00, /* horizontal prescaler accumulation
  338. * sequence length */
  339. 0xa2, 0x00, /* UV FIR filter, Y FIR filter, prescaler
  340. * DC gain */
  341. 0xa3, 0x00,
  342. 0xa4, 0x80, // luminance brightness
  343. 0xa5, 0x40, // luminance gain
  344. 0xa6, 0x40, // chrominance saturation
  345. 0xa7, 0x00,
  346. 0xa8, 0x00, // horizontal luminance scaling increment
  347. 0xa9, 0x04,
  348. 0xaa, 0x00, // horizontal luminance phase offset
  349. 0xab, 0x00,
  350. 0xac, 0x00, // horizontal chrominance scaling increment
  351. 0xad, 0x02,
  352. 0xae, 0x00, // horizontal chrominance phase offset
  353. 0xaf, 0x00,
  354. 0xb0, 0x00, // vertical luminance scaling increment
  355. 0xb1, 0x04,
  356. 0xb2, 0x00, // vertical chrominance scaling increment
  357. 0xb3, 0x04,
  358. 0xb4, 0x00,
  359. 0xb5, 0x00,
  360. 0xb6, 0x00,
  361. 0xb7, 0x00,
  362. 0xb8, 0x00,
  363. 0xb9, 0x00,
  364. 0xba, 0x00,
  365. 0xbb, 0x00,
  366. 0xbc, 0x00,
  367. 0xbd, 0x00,
  368. 0xbe, 0x00,
  369. 0xbf, 0x00,
  370. 0xc0, 0x02, // Task B definition
  371. 0xc1, 0x08,
  372. 0xc2, 0x00,
  373. 0xc3, 0x40,
  374. 0xc4, 0x00, // window settings
  375. 0xc5, 0x00,
  376. 0xc6, 0x00,
  377. 0xc7, 0x00,
  378. 0xc8, 0x00,
  379. 0xc9, 0x00,
  380. 0xca, 0x00,
  381. 0xcb, 0x00,
  382. 0xcc, 0x00,
  383. 0xcd, 0x00,
  384. 0xce, 0x00,
  385. 0xcf, 0x00,
  386. 0xd0, 0x01, // horizontal integer prescaling ratio
  387. 0xd1, 0x00, // horizontal prescaler accumulation sequence length
  388. 0xd2, 0x00, // UV FIR filter, Y FIR filter, prescaler DC gain
  389. 0xd3, 0x00,
  390. 0xd4, 0x80, // luminance brightness
  391. 0xd5, 0x40, // luminance gain
  392. 0xd6, 0x40, // chrominance saturation
  393. 0xd7, 0x00,
  394. 0xd8, 0x00, // horizontal luminance scaling increment
  395. 0xd9, 0x04,
  396. 0xda, 0x00, // horizontal luminance phase offset
  397. 0xdb, 0x00,
  398. 0xdc, 0x00, // horizontal chrominance scaling increment
  399. 0xdd, 0x02,
  400. 0xde, 0x00, // horizontal chrominance phase offset
  401. 0xdf, 0x00,
  402. 0xe0, 0x00, // vertical luminance scaling increment
  403. 0xe1, 0x04,
  404. 0xe2, 0x00, // vertical chrominance scaling increment
  405. 0xe3, 0x04,
  406. 0xe4, 0x00,
  407. 0xe5, 0x00,
  408. 0xe6, 0x00,
  409. 0xe7, 0x00,
  410. 0xe8, 0x00,
  411. 0xe9, 0x00,
  412. 0xea, 0x00,
  413. 0xeb, 0x00,
  414. 0xec, 0x00,
  415. 0xed, 0x00,
  416. 0xee, 0x00,
  417. 0xef, 0x00
  418. };
  419. static int
  420. saa7114_command (struct i2c_client *client,
  421. unsigned int cmd,
  422. void *arg)
  423. {
  424. struct saa7114 *decoder = i2c_get_clientdata(client);
  425. switch (cmd) {
  426. case 0:
  427. //dprintk(1, KERN_INFO "%s: writing init\n", I2C_NAME(client));
  428. //saa7114_write_block(client, init, sizeof(init));
  429. break;
  430. case DECODER_DUMP:
  431. {
  432. int i;
  433. dprintk(1, KERN_INFO "%s: decoder dump\n", I2C_NAME(client));
  434. for (i = 0; i < 32; i += 16) {
  435. int j;
  436. printk(KERN_DEBUG "%s: %03x", I2C_NAME(client), i);
  437. for (j = 0; j < 16; ++j) {
  438. printk(" %02x",
  439. saa7114_read(client, i + j));
  440. }
  441. printk("\n");
  442. }
  443. }
  444. break;
  445. case DECODER_GET_CAPABILITIES:
  446. {
  447. struct video_decoder_capability *cap = arg;
  448. dprintk(1, KERN_DEBUG "%s: decoder get capabilities\n",
  449. I2C_NAME(client));
  450. cap->flags = VIDEO_DECODER_PAL |
  451. VIDEO_DECODER_NTSC |
  452. VIDEO_DECODER_AUTO |
  453. VIDEO_DECODER_CCIR;
  454. cap->inputs = 8;
  455. cap->outputs = 1;
  456. }
  457. break;
  458. case DECODER_GET_STATUS:
  459. {
  460. int *iarg = arg;
  461. int status;
  462. int res;
  463. status = saa7114_read(client, 0x1f);
  464. dprintk(1, KERN_DEBUG "%s status: 0x%02x\n", I2C_NAME(client),
  465. status);
  466. res = 0;
  467. if ((status & (1 << 6)) == 0) {
  468. res |= DECODER_STATUS_GOOD;
  469. }
  470. switch (decoder->norm) {
  471. case VIDEO_MODE_NTSC:
  472. res |= DECODER_STATUS_NTSC;
  473. break;
  474. case VIDEO_MODE_PAL:
  475. res |= DECODER_STATUS_PAL;
  476. break;
  477. case VIDEO_MODE_SECAM:
  478. res |= DECODER_STATUS_SECAM;
  479. break;
  480. default:
  481. case VIDEO_MODE_AUTO:
  482. if ((status & (1 << 5)) != 0) {
  483. res |= DECODER_STATUS_NTSC;
  484. } else {
  485. res |= DECODER_STATUS_PAL;
  486. }
  487. break;
  488. }
  489. if ((status & (1 << 0)) != 0) {
  490. res |= DECODER_STATUS_COLOR;
  491. }
  492. *iarg = res;
  493. }
  494. break;
  495. case DECODER_SET_NORM:
  496. {
  497. int *iarg = arg;
  498. short int hoff = 0, voff = 0, w = 0, h = 0;
  499. dprintk(1, KERN_DEBUG "%s: decoder set norm ",
  500. I2C_NAME(client));
  501. switch (*iarg) {
  502. case VIDEO_MODE_NTSC:
  503. dprintk(1, "NTSC\n");
  504. decoder->reg[REG_ADDR(0x06)] =
  505. SAA_7114_NTSC_HSYNC_START;
  506. decoder->reg[REG_ADDR(0x07)] =
  507. SAA_7114_NTSC_HSYNC_STOP;
  508. decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
  509. decoder->reg[REG_ADDR(0x0e)] = 0x85;
  510. decoder->reg[REG_ADDR(0x0f)] = 0x24;
  511. hoff = SAA_7114_NTSC_HOFFSET;
  512. voff = SAA_7114_NTSC_VOFFSET;
  513. w = SAA_7114_NTSC_WIDTH;
  514. h = SAA_7114_NTSC_HEIGHT;
  515. break;
  516. case VIDEO_MODE_PAL:
  517. dprintk(1, "PAL\n");
  518. decoder->reg[REG_ADDR(0x06)] =
  519. SAA_7114_PAL_HSYNC_START;
  520. decoder->reg[REG_ADDR(0x07)] =
  521. SAA_7114_PAL_HSYNC_STOP;
  522. decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
  523. decoder->reg[REG_ADDR(0x0e)] = 0x81;
  524. decoder->reg[REG_ADDR(0x0f)] = 0x24;
  525. hoff = SAA_7114_PAL_HOFFSET;
  526. voff = SAA_7114_PAL_VOFFSET;
  527. w = SAA_7114_PAL_WIDTH;
  528. h = SAA_7114_PAL_HEIGHT;
  529. break;
  530. default:
  531. dprintk(1, " Unknown video mode!!!\n");
  532. return -EINVAL;
  533. }
  534. decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
  535. decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
  536. decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
  537. decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
  538. decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
  539. decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
  540. decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
  541. decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
  542. decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
  543. decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
  544. decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
  545. decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
  546. decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
  547. decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
  548. decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
  549. decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
  550. decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
  551. decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
  552. decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
  553. decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
  554. decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
  555. decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
  556. decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
  557. decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
  558. saa7114_write(client, 0x80, 0x06); // i-port and scaler back end clock selection, task A&B off
  559. saa7114_write(client, 0x88, 0xd8); // sw reset scaler
  560. saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
  561. saa7114_write_block(client, decoder->reg + (0x06 << 1),
  562. 3 << 1);
  563. saa7114_write_block(client, decoder->reg + (0x0e << 1),
  564. 2 << 1);
  565. saa7114_write_block(client, decoder->reg + (0x5a << 1),
  566. 2 << 1);
  567. saa7114_write_block(client, decoder->reg + (0x94 << 1),
  568. (0x9f + 1 - 0x94) << 1);
  569. saa7114_write_block(client, decoder->reg + (0xc4 << 1),
  570. (0xcf + 1 - 0xc4) << 1);
  571. saa7114_write(client, 0x88, 0xd8); // sw reset scaler
  572. saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
  573. saa7114_write(client, 0x80, 0x36); // i-port and scaler back end clock selection
  574. decoder->norm = *iarg;
  575. }
  576. break;
  577. case DECODER_SET_INPUT:
  578. {
  579. int *iarg = arg;
  580. dprintk(1, KERN_DEBUG "%s: decoder set input (%d)\n",
  581. I2C_NAME(client), *iarg);
  582. if (*iarg < 0 || *iarg > 7) {
  583. return -EINVAL;
  584. }
  585. if (decoder->input != *iarg) {
  586. dprintk(1, KERN_DEBUG "%s: now setting %s input\n",
  587. I2C_NAME(client),
  588. *iarg >= 6 ? "S-Video" : "Composite");
  589. decoder->input = *iarg;
  590. /* select mode */
  591. decoder->reg[REG_ADDR(0x02)] =
  592. (decoder->
  593. reg[REG_ADDR(0x02)] & 0xf0) | (decoder->
  594. input <
  595. 6 ? 0x0 : 0x9);
  596. saa7114_write(client, 0x02,
  597. decoder->reg[REG_ADDR(0x02)]);
  598. /* bypass chrominance trap for modes 6..9 */
  599. decoder->reg[REG_ADDR(0x09)] =
  600. (decoder->
  601. reg[REG_ADDR(0x09)] & 0x7f) | (decoder->
  602. input <
  603. 6 ? 0x0 :
  604. 0x80);
  605. saa7114_write(client, 0x09,
  606. decoder->reg[REG_ADDR(0x09)]);
  607. decoder->reg[REG_ADDR(0x0e)] =
  608. decoder->input <
  609. 6 ? decoder->
  610. reg[REG_ADDR(0x0e)] | 1 : decoder->
  611. reg[REG_ADDR(0x0e)] & ~1;
  612. saa7114_write(client, 0x0e,
  613. decoder->reg[REG_ADDR(0x0e)]);
  614. }
  615. }
  616. break;
  617. case DECODER_SET_OUTPUT:
  618. {
  619. int *iarg = arg;
  620. dprintk(1, KERN_DEBUG "%s: decoder set output\n",
  621. I2C_NAME(client));
  622. /* not much choice of outputs */
  623. if (*iarg != 0) {
  624. return -EINVAL;
  625. }
  626. }
  627. break;
  628. case DECODER_ENABLE_OUTPUT:
  629. {
  630. int *iarg = arg;
  631. int enable = (*iarg != 0);
  632. dprintk(1, KERN_DEBUG "%s: decoder %s output\n",
  633. I2C_NAME(client), enable ? "enable" : "disable");
  634. decoder->playback = !enable;
  635. if (decoder->enable != enable) {
  636. decoder->enable = enable;
  637. /* RJ: If output should be disabled (for
  638. * playing videos), we also need a open PLL.
  639. * The input is set to 0 (where no input
  640. * source is connected), although this
  641. * is not necessary.
  642. *
  643. * If output should be enabled, we have to
  644. * reverse the above.
  645. */
  646. if (decoder->enable) {
  647. decoder->reg[REG_ADDR(0x08)] = 0xb8;
  648. decoder->reg[REG_ADDR(0x12)] = 0xc9;
  649. decoder->reg[REG_ADDR(0x13)] = 0x80;
  650. decoder->reg[REG_ADDR(0x87)] = 0x01;
  651. } else {
  652. decoder->reg[REG_ADDR(0x08)] = 0x7c;
  653. decoder->reg[REG_ADDR(0x12)] = 0x00;
  654. decoder->reg[REG_ADDR(0x13)] = 0x00;
  655. decoder->reg[REG_ADDR(0x87)] = 0x00;
  656. }
  657. saa7114_write_block(client,
  658. decoder->reg + (0x12 << 1),
  659. 2 << 1);
  660. saa7114_write(client, 0x08,
  661. decoder->reg[REG_ADDR(0x08)]);
  662. saa7114_write(client, 0x87,
  663. decoder->reg[REG_ADDR(0x87)]);
  664. saa7114_write(client, 0x88, 0xd8); // sw reset scaler
  665. saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
  666. saa7114_write(client, 0x80, 0x36);
  667. }
  668. }
  669. break;
  670. case DECODER_SET_PICTURE:
  671. {
  672. struct video_picture *pic = arg;
  673. dprintk(1,
  674. KERN_DEBUG
  675. "%s: decoder set picture bright=%d contrast=%d saturation=%d hue=%d\n",
  676. I2C_NAME(client), pic->brightness, pic->contrast,
  677. pic->colour, pic->hue);
  678. if (decoder->bright != pic->brightness) {
  679. /* We want 0 to 255 we get 0-65535 */
  680. decoder->bright = pic->brightness;
  681. saa7114_write(client, 0x0a, decoder->bright >> 8);
  682. }
  683. if (decoder->contrast != pic->contrast) {
  684. /* We want 0 to 127 we get 0-65535 */
  685. decoder->contrast = pic->contrast;
  686. saa7114_write(client, 0x0b,
  687. decoder->contrast >> 9);
  688. }
  689. if (decoder->sat != pic->colour) {
  690. /* We want 0 to 127 we get 0-65535 */
  691. decoder->sat = pic->colour;
  692. saa7114_write(client, 0x0c, decoder->sat >> 9);
  693. }
  694. if (decoder->hue != pic->hue) {
  695. /* We want -128 to 127 we get 0-65535 */
  696. decoder->hue = pic->hue;
  697. saa7114_write(client, 0x0d,
  698. (decoder->hue - 32768) >> 8);
  699. }
  700. }
  701. break;
  702. default:
  703. return -EINVAL;
  704. }
  705. return 0;
  706. }
  707. /* ----------------------------------------------------------------------- */
  708. /*
  709. * Generic i2c probe
  710. * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
  711. */
  712. static unsigned short normal_i2c[] =
  713. { I2C_SAA7114 >> 1, I2C_SAA7114A >> 1, I2C_CLIENT_END };
  714. static unsigned short ignore = I2C_CLIENT_END;
  715. static struct i2c_client_address_data addr_data = {
  716. .normal_i2c = normal_i2c,
  717. .probe = &ignore,
  718. .ignore = &ignore,
  719. };
  720. static struct i2c_driver i2c_driver_saa7114;
  721. static int
  722. saa7114_detect_client (struct i2c_adapter *adapter,
  723. int address,
  724. int kind)
  725. {
  726. int i, err[30];
  727. short int hoff = SAA_7114_NTSC_HOFFSET;
  728. short int voff = SAA_7114_NTSC_VOFFSET;
  729. short int w = SAA_7114_NTSC_WIDTH;
  730. short int h = SAA_7114_NTSC_HEIGHT;
  731. struct i2c_client *client;
  732. struct saa7114 *decoder;
  733. dprintk(1,
  734. KERN_INFO
  735. "saa7114.c: detecting saa7114 client on address 0x%x\n",
  736. address << 1);
  737. /* Check if the adapter supports the needed features */
  738. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  739. return 0;
  740. client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
  741. if (client == 0)
  742. return -ENOMEM;
  743. client->addr = address;
  744. client->adapter = adapter;
  745. client->driver = &i2c_driver_saa7114;
  746. strlcpy(I2C_NAME(client), "saa7114", sizeof(I2C_NAME(client)));
  747. decoder = kzalloc(sizeof(struct saa7114), GFP_KERNEL);
  748. if (decoder == NULL) {
  749. kfree(client);
  750. return -ENOMEM;
  751. }
  752. decoder->norm = VIDEO_MODE_NTSC;
  753. decoder->input = -1;
  754. decoder->enable = 1;
  755. decoder->bright = 32768;
  756. decoder->contrast = 32768;
  757. decoder->hue = 32768;
  758. decoder->sat = 32768;
  759. decoder->playback = 0; // initially capture mode useda
  760. i2c_set_clientdata(client, decoder);
  761. memcpy(decoder->reg, init, sizeof(init));
  762. decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
  763. decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
  764. decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
  765. decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
  766. decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
  767. decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
  768. decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
  769. decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
  770. decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
  771. decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
  772. decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
  773. decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
  774. decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
  775. decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
  776. decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
  777. decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
  778. decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
  779. decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
  780. decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
  781. decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
  782. decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
  783. decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
  784. decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
  785. decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
  786. decoder->reg[REG_ADDR(0xb8)] =
  787. LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
  788. decoder->reg[REG_ADDR(0xb9)] =
  789. HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
  790. decoder->reg[REG_ADDR(0xba)] =
  791. LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
  792. decoder->reg[REG_ADDR(0xbb)] =
  793. HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
  794. decoder->reg[REG_ADDR(0xbc)] =
  795. LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
  796. decoder->reg[REG_ADDR(0xbd)] =
  797. HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
  798. decoder->reg[REG_ADDR(0xbe)] =
  799. LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
  800. decoder->reg[REG_ADDR(0xbf)] =
  801. HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
  802. decoder->reg[REG_ADDR(0xe8)] =
  803. LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
  804. decoder->reg[REG_ADDR(0xe9)] =
  805. HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
  806. decoder->reg[REG_ADDR(0xea)] =
  807. LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
  808. decoder->reg[REG_ADDR(0xeb)] =
  809. HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
  810. decoder->reg[REG_ADDR(0xec)] =
  811. LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
  812. decoder->reg[REG_ADDR(0xed)] =
  813. HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
  814. decoder->reg[REG_ADDR(0xee)] =
  815. LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
  816. decoder->reg[REG_ADDR(0xef)] =
  817. HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
  818. decoder->reg[REG_ADDR(0x13)] = 0x80; // RTC0 on
  819. decoder->reg[REG_ADDR(0x87)] = 0x01; // I-Port
  820. decoder->reg[REG_ADDR(0x12)] = 0xc9; // RTS0
  821. decoder->reg[REG_ADDR(0x02)] = 0xc0; // set composite1 input, aveasy
  822. decoder->reg[REG_ADDR(0x09)] = 0x00; // chrominance trap
  823. decoder->reg[REG_ADDR(0x0e)] |= 1; // combfilter on
  824. dprintk(1, KERN_DEBUG "%s_attach: starting decoder init\n",
  825. I2C_NAME(client));
  826. err[0] =
  827. saa7114_write_block(client, decoder->reg + (0x20 << 1),
  828. 0x10 << 1);
  829. err[1] =
  830. saa7114_write_block(client, decoder->reg + (0x30 << 1),
  831. 0x10 << 1);
  832. err[2] =
  833. saa7114_write_block(client, decoder->reg + (0x63 << 1),
  834. (0x7f + 1 - 0x63) << 1);
  835. err[3] =
  836. saa7114_write_block(client, decoder->reg + (0x89 << 1),
  837. 6 << 1);
  838. err[4] =
  839. saa7114_write_block(client, decoder->reg + (0xb8 << 1),
  840. 8 << 1);
  841. err[5] =
  842. saa7114_write_block(client, decoder->reg + (0xe8 << 1),
  843. 8 << 1);
  844. for (i = 0; i <= 5; i++) {
  845. if (err[i] < 0) {
  846. dprintk(1,
  847. KERN_ERR
  848. "%s_attach: init error %d at stage %d, leaving attach.\n",
  849. I2C_NAME(client), i, err[i]);
  850. kfree(decoder);
  851. kfree(client);
  852. return 0;
  853. }
  854. }
  855. for (i = 6; i < 8; i++) {
  856. dprintk(1,
  857. KERN_DEBUG
  858. "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
  859. I2C_NAME(client), i, saa7114_read(client, i),
  860. decoder->reg[REG_ADDR(i)]);
  861. }
  862. dprintk(1,
  863. KERN_DEBUG
  864. "%s_attach: performing decoder reset sequence\n",
  865. I2C_NAME(client));
  866. err[6] = saa7114_write(client, 0x80, 0x06); // i-port and scaler backend clock selection, task A&B off
  867. err[7] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
  868. err[8] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
  869. for (i = 6; i <= 8; i++) {
  870. if (err[i] < 0) {
  871. dprintk(1,
  872. KERN_ERR
  873. "%s_attach: init error %d at stage %d, leaving attach.\n",
  874. I2C_NAME(client), i, err[i]);
  875. kfree(decoder);
  876. kfree(client);
  877. return 0;
  878. }
  879. }
  880. dprintk(1, KERN_INFO "%s_attach: performing the rest of init\n",
  881. I2C_NAME(client));
  882. err[9] = saa7114_write(client, 0x01, decoder->reg[REG_ADDR(0x01)]);
  883. err[10] = saa7114_write_block(client, decoder->reg + (0x03 << 1), (0x1e + 1 - 0x03) << 1); // big seq
  884. err[11] = saa7114_write_block(client, decoder->reg + (0x40 << 1), (0x5f + 1 - 0x40) << 1); // slicer
  885. err[12] = saa7114_write_block(client, decoder->reg + (0x81 << 1), 2 << 1); // ?
  886. err[13] = saa7114_write_block(client, decoder->reg + (0x83 << 1), 5 << 1); // ?
  887. err[14] = saa7114_write_block(client, decoder->reg + (0x90 << 1), 4 << 1); // Task A
  888. err[15] =
  889. saa7114_write_block(client, decoder->reg + (0x94 << 1),
  890. 12 << 1);
  891. err[16] =
  892. saa7114_write_block(client, decoder->reg + (0xa0 << 1),
  893. 8 << 1);
  894. err[17] =
  895. saa7114_write_block(client, decoder->reg + (0xa8 << 1),
  896. 8 << 1);
  897. err[18] =
  898. saa7114_write_block(client, decoder->reg + (0xb0 << 1),
  899. 8 << 1);
  900. err[19] = saa7114_write_block(client, decoder->reg + (0xc0 << 1), 4 << 1); // Task B
  901. err[15] =
  902. saa7114_write_block(client, decoder->reg + (0xc4 << 1),
  903. 12 << 1);
  904. err[16] =
  905. saa7114_write_block(client, decoder->reg + (0xd0 << 1),
  906. 8 << 1);
  907. err[17] =
  908. saa7114_write_block(client, decoder->reg + (0xd8 << 1),
  909. 8 << 1);
  910. err[18] =
  911. saa7114_write_block(client, decoder->reg + (0xe0 << 1),
  912. 8 << 1);
  913. for (i = 9; i <= 18; i++) {
  914. if (err[i] < 0) {
  915. dprintk(1,
  916. KERN_ERR
  917. "%s_attach: init error %d at stage %d, leaving attach.\n",
  918. I2C_NAME(client), i, err[i]);
  919. kfree(decoder);
  920. kfree(client);
  921. return 0;
  922. }
  923. }
  924. for (i = 6; i < 8; i++) {
  925. dprintk(1,
  926. KERN_DEBUG
  927. "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
  928. I2C_NAME(client), i, saa7114_read(client, i),
  929. decoder->reg[REG_ADDR(i)]);
  930. }
  931. for (i = 0x11; i <= 0x13; i++) {
  932. dprintk(1,
  933. KERN_DEBUG
  934. "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
  935. I2C_NAME(client), i, saa7114_read(client, i),
  936. decoder->reg[REG_ADDR(i)]);
  937. }
  938. dprintk(1, KERN_DEBUG "%s_attach: setting video input\n",
  939. I2C_NAME(client));
  940. err[19] =
  941. saa7114_write(client, 0x02, decoder->reg[REG_ADDR(0x02)]);
  942. err[20] =
  943. saa7114_write(client, 0x09, decoder->reg[REG_ADDR(0x09)]);
  944. err[21] =
  945. saa7114_write(client, 0x0e, decoder->reg[REG_ADDR(0x0e)]);
  946. for (i = 19; i <= 21; i++) {
  947. if (err[i] < 0) {
  948. dprintk(1,
  949. KERN_ERR
  950. "%s_attach: init error %d at stage %d, leaving attach.\n",
  951. I2C_NAME(client), i, err[i]);
  952. kfree(decoder);
  953. kfree(client);
  954. return 0;
  955. }
  956. }
  957. dprintk(1,
  958. KERN_DEBUG
  959. "%s_attach: performing decoder reset sequence\n",
  960. I2C_NAME(client));
  961. err[22] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
  962. err[23] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
  963. err[24] = saa7114_write(client, 0x80, 0x36); // i-port and scaler backend clock selection, task A&B off
  964. for (i = 22; i <= 24; i++) {
  965. if (err[i] < 0) {
  966. dprintk(1,
  967. KERN_ERR
  968. "%s_attach: init error %d at stage %d, leaving attach.\n",
  969. I2C_NAME(client), i, err[i]);
  970. kfree(decoder);
  971. kfree(client);
  972. return 0;
  973. }
  974. }
  975. err[25] = saa7114_write(client, 0x06, init[REG_ADDR(0x06)]);
  976. err[26] = saa7114_write(client, 0x07, init[REG_ADDR(0x07)]);
  977. err[27] = saa7114_write(client, 0x10, init[REG_ADDR(0x10)]);
  978. dprintk(1,
  979. KERN_INFO
  980. "%s_attach: chip version %x, decoder status 0x%02x\n",
  981. I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
  982. saa7114_read(client, 0x1f));
  983. dprintk(1,
  984. KERN_DEBUG
  985. "%s_attach: power save control: 0x%02x, scaler status: 0x%02x\n",
  986. I2C_NAME(client), saa7114_read(client, 0x88),
  987. saa7114_read(client, 0x8f));
  988. for (i = 0x94; i < 0x96; i++) {
  989. dprintk(1,
  990. KERN_DEBUG
  991. "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
  992. I2C_NAME(client), i, saa7114_read(client, i),
  993. decoder->reg[REG_ADDR(i)]);
  994. }
  995. i = i2c_attach_client(client);
  996. if (i) {
  997. kfree(client);
  998. kfree(decoder);
  999. return i;
  1000. }
  1001. //i = saa7114_write_block(client, init, sizeof(init));
  1002. i = 0;
  1003. if (i < 0) {
  1004. dprintk(1, KERN_ERR "%s_attach error: init status %d\n",
  1005. I2C_NAME(client), i);
  1006. } else {
  1007. dprintk(1,
  1008. KERN_INFO
  1009. "%s_attach: chip version %x at address 0x%x\n",
  1010. I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
  1011. client->addr << 1);
  1012. }
  1013. return 0;
  1014. }
  1015. static int
  1016. saa7114_attach_adapter (struct i2c_adapter *adapter)
  1017. {
  1018. dprintk(1,
  1019. KERN_INFO
  1020. "saa7114.c: starting probe for adapter %s (0x%x)\n",
  1021. I2C_NAME(adapter), adapter->id);
  1022. return i2c_probe(adapter, &addr_data, &saa7114_detect_client);
  1023. }
  1024. static int
  1025. saa7114_detach_client (struct i2c_client *client)
  1026. {
  1027. struct saa7114 *decoder = i2c_get_clientdata(client);
  1028. int err;
  1029. err = i2c_detach_client(client);
  1030. if (err) {
  1031. return err;
  1032. }
  1033. kfree(decoder);
  1034. kfree(client);
  1035. return 0;
  1036. }
  1037. /* ----------------------------------------------------------------------- */
  1038. static struct i2c_driver i2c_driver_saa7114 = {
  1039. .driver = {
  1040. .name = "saa7114",
  1041. },
  1042. .id = I2C_DRIVERID_SAA7114,
  1043. .attach_adapter = saa7114_attach_adapter,
  1044. .detach_client = saa7114_detach_client,
  1045. .command = saa7114_command,
  1046. };
  1047. static int __init
  1048. saa7114_init (void)
  1049. {
  1050. return i2c_add_driver(&i2c_driver_saa7114);
  1051. }
  1052. static void __exit
  1053. saa7114_exit (void)
  1054. {
  1055. i2c_del_driver(&i2c_driver_saa7114);
  1056. }
  1057. module_init(saa7114_init);
  1058. module_exit(saa7114_exit);