budget-ci.c 28 KB

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  1. /*
  2. * budget-ci.c: driver for the SAA7146 based Budget DVB cards
  3. *
  4. * Compiled from various sources by Michael Hunold <michael@mihu.de>
  5. *
  6. * msp430 IR support contributed by Jack Thomasson <jkt@Helius.COM>
  7. * partially based on the Siemens DVB driver by Ralph+Marcus Metzler
  8. *
  9. * CI interface support (c) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  27. *
  28. *
  29. * the project's page is at http://www.linuxtv.org/dvb/
  30. */
  31. #include "budget.h"
  32. #include <linux/module.h>
  33. #include <linux/errno.h>
  34. #include <linux/slab.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/input.h>
  37. #include <linux/spinlock.h>
  38. #include "dvb_ca_en50221.h"
  39. #include "stv0299.h"
  40. #include "stv0297.h"
  41. #include "tda1004x.h"
  42. #include "lnbp21.h"
  43. #include "bsbe1.h"
  44. #include "bsru6.h"
  45. #define DEBIADDR_IR 0x1234
  46. #define DEBIADDR_CICONTROL 0x0000
  47. #define DEBIADDR_CIVERSION 0x4000
  48. #define DEBIADDR_IO 0x1000
  49. #define DEBIADDR_ATTR 0x3000
  50. #define CICONTROL_RESET 0x01
  51. #define CICONTROL_ENABLETS 0x02
  52. #define CICONTROL_CAMDETECT 0x08
  53. #define DEBICICTL 0x00420000
  54. #define DEBICICAM 0x02420000
  55. #define SLOTSTATUS_NONE 1
  56. #define SLOTSTATUS_PRESENT 2
  57. #define SLOTSTATUS_RESET 4
  58. #define SLOTSTATUS_READY 8
  59. #define SLOTSTATUS_OCCUPIED (SLOTSTATUS_PRESENT|SLOTSTATUS_RESET|SLOTSTATUS_READY)
  60. struct budget_ci {
  61. struct budget budget;
  62. struct input_dev *input_dev;
  63. struct tasklet_struct msp430_irq_tasklet;
  64. struct tasklet_struct ciintf_irq_tasklet;
  65. int slot_status;
  66. struct dvb_ca_en50221 ca;
  67. char ir_dev_name[50];
  68. u8 tuner_pll_address; /* used for philips_tdm1316l configs */
  69. };
  70. /* from reading the following remotes:
  71. Zenith Universal 7 / TV Mode 807 / VCR Mode 837
  72. Hauppauge (from NOVA-CI-s box product)
  73. i've taken a "middle of the road" approach and note the differences
  74. */
  75. static u16 key_map[64] = {
  76. /* 0x0X */
  77. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6, KEY_7, KEY_8,
  78. KEY_9,
  79. KEY_ENTER,
  80. KEY_RED,
  81. KEY_POWER, /* RADIO on Hauppauge */
  82. KEY_MUTE,
  83. 0,
  84. KEY_A, /* TV on Hauppauge */
  85. /* 0x1X */
  86. KEY_VOLUMEUP, KEY_VOLUMEDOWN,
  87. 0, 0,
  88. KEY_B,
  89. 0, 0, 0, 0, 0, 0, 0,
  90. KEY_UP, KEY_DOWN,
  91. KEY_OPTION, /* RESERVED on Hauppauge */
  92. KEY_BREAK,
  93. /* 0x2X */
  94. KEY_CHANNELUP, KEY_CHANNELDOWN,
  95. KEY_PREVIOUS, /* Prev. Ch on Zenith, SOURCE on Hauppauge */
  96. 0, KEY_RESTART, KEY_OK,
  97. KEY_CYCLEWINDOWS, /* MINIMIZE on Hauppauge */
  98. 0,
  99. KEY_ENTER, /* VCR mode on Zenith */
  100. KEY_PAUSE,
  101. 0,
  102. KEY_RIGHT, KEY_LEFT,
  103. 0,
  104. KEY_MENU, /* FULL SCREEN on Hauppauge */
  105. 0,
  106. /* 0x3X */
  107. KEY_SLOW,
  108. KEY_PREVIOUS, /* VCR mode on Zenith */
  109. KEY_REWIND,
  110. 0,
  111. KEY_FASTFORWARD,
  112. KEY_PLAY, KEY_STOP,
  113. KEY_RECORD,
  114. KEY_TUNER, /* TV/VCR on Zenith */
  115. 0,
  116. KEY_C,
  117. 0,
  118. KEY_EXIT,
  119. KEY_POWER2,
  120. KEY_TUNER, /* VCR mode on Zenith */
  121. 0,
  122. };
  123. static void msp430_ir_debounce(unsigned long data)
  124. {
  125. struct input_dev *dev = (struct input_dev *) data;
  126. if (dev->rep[0] == 0 || dev->rep[0] == ~0) {
  127. input_event(dev, EV_KEY, key_map[dev->repeat_key], !!0);
  128. return;
  129. }
  130. dev->rep[0] = 0;
  131. dev->timer.expires = jiffies + HZ * 350 / 1000;
  132. add_timer(&dev->timer);
  133. input_event(dev, EV_KEY, key_map[dev->repeat_key], 2); /* REPEAT */
  134. }
  135. static void msp430_ir_interrupt(unsigned long data)
  136. {
  137. struct budget_ci *budget_ci = (struct budget_ci *) data;
  138. struct input_dev *dev = budget_ci->input_dev;
  139. unsigned int code =
  140. ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8;
  141. if (code & 0x40) {
  142. code &= 0x3f;
  143. if (timer_pending(&dev->timer)) {
  144. if (code == dev->repeat_key) {
  145. ++dev->rep[0];
  146. return;
  147. }
  148. del_timer(&dev->timer);
  149. input_event(dev, EV_KEY, key_map[dev->repeat_key], !!0);
  150. }
  151. if (!key_map[code]) {
  152. printk("DVB (%s): no key for %02x!\n", __FUNCTION__, code);
  153. return;
  154. }
  155. /* initialize debounce and repeat */
  156. dev->repeat_key = code;
  157. /* Zenith remote _always_ sends 2 sequences */
  158. dev->rep[0] = ~0;
  159. /* 350 milliseconds */
  160. dev->timer.expires = jiffies + HZ * 350 / 1000;
  161. /* MAKE */
  162. input_event(dev, EV_KEY, key_map[code], !0);
  163. add_timer(&dev->timer);
  164. }
  165. }
  166. static int msp430_ir_init(struct budget_ci *budget_ci)
  167. {
  168. struct saa7146_dev *saa = budget_ci->budget.dev;
  169. struct input_dev *input_dev;
  170. int i;
  171. budget_ci->input_dev = input_dev = input_allocate_device();
  172. if (!input_dev)
  173. return -ENOMEM;
  174. sprintf(budget_ci->ir_dev_name, "Budget-CI dvb ir receiver %s", saa->name);
  175. input_dev->name = budget_ci->ir_dev_name;
  176. set_bit(EV_KEY, input_dev->evbit);
  177. for (i = 0; i < ARRAY_SIZE(key_map); i++)
  178. if (key_map[i])
  179. set_bit(key_map[i], input_dev->keybit);
  180. input_register_device(budget_ci->input_dev);
  181. input_dev->timer.function = msp430_ir_debounce;
  182. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_06);
  183. saa7146_setgpio(saa, 3, SAA7146_GPIO_IRQHI);
  184. return 0;
  185. }
  186. static void msp430_ir_deinit(struct budget_ci *budget_ci)
  187. {
  188. struct saa7146_dev *saa = budget_ci->budget.dev;
  189. struct input_dev *dev = budget_ci->input_dev;
  190. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_06);
  191. saa7146_setgpio(saa, 3, SAA7146_GPIO_INPUT);
  192. if (del_timer(&dev->timer))
  193. input_event(dev, EV_KEY, key_map[dev->repeat_key], !!0);
  194. input_unregister_device(dev);
  195. }
  196. static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
  197. {
  198. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  199. if (slot != 0)
  200. return -EINVAL;
  201. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  202. DEBIADDR_ATTR | (address & 0xfff), 1, 1, 0);
  203. }
  204. static int ciintf_write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address, u8 value)
  205. {
  206. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  207. if (slot != 0)
  208. return -EINVAL;
  209. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  210. DEBIADDR_ATTR | (address & 0xfff), 1, value, 1, 0);
  211. }
  212. static int ciintf_read_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address)
  213. {
  214. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  215. if (slot != 0)
  216. return -EINVAL;
  217. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  218. DEBIADDR_IO | (address & 3), 1, 1, 0);
  219. }
  220. static int ciintf_write_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address, u8 value)
  221. {
  222. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  223. if (slot != 0)
  224. return -EINVAL;
  225. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  226. DEBIADDR_IO | (address & 3), 1, value, 1, 0);
  227. }
  228. static int ciintf_slot_reset(struct dvb_ca_en50221 *ca, int slot)
  229. {
  230. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  231. struct saa7146_dev *saa = budget_ci->budget.dev;
  232. if (slot != 0)
  233. return -EINVAL;
  234. // trigger on RISING edge during reset so we know when READY is re-asserted
  235. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  236. budget_ci->slot_status = SLOTSTATUS_RESET;
  237. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  238. msleep(1);
  239. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  240. CICONTROL_RESET, 1, 0);
  241. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  242. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  243. return 0;
  244. }
  245. static int ciintf_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
  246. {
  247. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  248. struct saa7146_dev *saa = budget_ci->budget.dev;
  249. if (slot != 0)
  250. return -EINVAL;
  251. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  252. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  253. return 0;
  254. }
  255. static int ciintf_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
  256. {
  257. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  258. struct saa7146_dev *saa = budget_ci->budget.dev;
  259. int tmp;
  260. if (slot != 0)
  261. return -EINVAL;
  262. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTLO);
  263. tmp = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  264. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  265. tmp | CICONTROL_ENABLETS, 1, 0);
  266. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTA);
  267. return 0;
  268. }
  269. static void ciintf_interrupt(unsigned long data)
  270. {
  271. struct budget_ci *budget_ci = (struct budget_ci *) data;
  272. struct saa7146_dev *saa = budget_ci->budget.dev;
  273. unsigned int flags;
  274. // ensure we don't get spurious IRQs during initialisation
  275. if (!budget_ci->budget.ci_present)
  276. return;
  277. // read the CAM status
  278. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  279. if (flags & CICONTROL_CAMDETECT) {
  280. // GPIO should be set to trigger on falling edge if a CAM is present
  281. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  282. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  283. // CAM insertion IRQ
  284. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  285. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  286. DVB_CA_EN50221_CAMCHANGE_INSERTED);
  287. } else if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  288. // CAM ready (reset completed)
  289. budget_ci->slot_status = SLOTSTATUS_READY;
  290. dvb_ca_en50221_camready_irq(&budget_ci->ca, 0);
  291. } else if (budget_ci->slot_status & SLOTSTATUS_READY) {
  292. // FR/DA IRQ
  293. dvb_ca_en50221_frda_irq(&budget_ci->ca, 0);
  294. }
  295. } else {
  296. // trigger on rising edge if a CAM is not present - when a CAM is inserted, we
  297. // only want to get the IRQ when it sets READY. If we trigger on the falling edge,
  298. // the CAM might not actually be ready yet.
  299. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  300. // generate a CAM removal IRQ if we haven't already
  301. if (budget_ci->slot_status & SLOTSTATUS_OCCUPIED) {
  302. // CAM removal IRQ
  303. budget_ci->slot_status = SLOTSTATUS_NONE;
  304. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  305. DVB_CA_EN50221_CAMCHANGE_REMOVED);
  306. }
  307. }
  308. }
  309. static int ciintf_init(struct budget_ci *budget_ci)
  310. {
  311. struct saa7146_dev *saa = budget_ci->budget.dev;
  312. int flags;
  313. int result;
  314. memset(&budget_ci->ca, 0, sizeof(struct dvb_ca_en50221));
  315. // enable DEBI pins
  316. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16) | 0x800);
  317. // test if it is there
  318. if ((ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CIVERSION, 1, 1, 0) & 0xa0) != 0xa0) {
  319. result = -ENODEV;
  320. goto error;
  321. }
  322. // determine whether a CAM is present or not
  323. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  324. budget_ci->slot_status = SLOTSTATUS_NONE;
  325. if (flags & CICONTROL_CAMDETECT)
  326. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  327. // register CI interface
  328. budget_ci->ca.owner = THIS_MODULE;
  329. budget_ci->ca.read_attribute_mem = ciintf_read_attribute_mem;
  330. budget_ci->ca.write_attribute_mem = ciintf_write_attribute_mem;
  331. budget_ci->ca.read_cam_control = ciintf_read_cam_control;
  332. budget_ci->ca.write_cam_control = ciintf_write_cam_control;
  333. budget_ci->ca.slot_reset = ciintf_slot_reset;
  334. budget_ci->ca.slot_shutdown = ciintf_slot_shutdown;
  335. budget_ci->ca.slot_ts_enable = ciintf_slot_ts_enable;
  336. budget_ci->ca.data = budget_ci;
  337. if ((result = dvb_ca_en50221_init(&budget_ci->budget.dvb_adapter,
  338. &budget_ci->ca,
  339. DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE |
  340. DVB_CA_EN50221_FLAG_IRQ_FR |
  341. DVB_CA_EN50221_FLAG_IRQ_DA, 1)) != 0) {
  342. printk("budget_ci: CI interface detected, but initialisation failed.\n");
  343. goto error;
  344. }
  345. // Setup CI slot IRQ
  346. tasklet_init(&budget_ci->ciintf_irq_tasklet, ciintf_interrupt, (unsigned long) budget_ci);
  347. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  348. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  349. } else {
  350. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  351. }
  352. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_03);
  353. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  354. CICONTROL_RESET, 1, 0);
  355. // success!
  356. printk("budget_ci: CI interface initialised\n");
  357. budget_ci->budget.ci_present = 1;
  358. // forge a fake CI IRQ so the CAM state is setup correctly
  359. flags = DVB_CA_EN50221_CAMCHANGE_REMOVED;
  360. if (budget_ci->slot_status != SLOTSTATUS_NONE)
  361. flags = DVB_CA_EN50221_CAMCHANGE_INSERTED;
  362. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, flags);
  363. return 0;
  364. error:
  365. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  366. return result;
  367. }
  368. static void ciintf_deinit(struct budget_ci *budget_ci)
  369. {
  370. struct saa7146_dev *saa = budget_ci->budget.dev;
  371. // disable CI interrupts
  372. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_03);
  373. saa7146_setgpio(saa, 0, SAA7146_GPIO_INPUT);
  374. tasklet_kill(&budget_ci->ciintf_irq_tasklet);
  375. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  376. msleep(1);
  377. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  378. CICONTROL_RESET, 1, 0);
  379. // disable TS data stream to CI interface
  380. saa7146_setgpio(saa, 1, SAA7146_GPIO_INPUT);
  381. // release the CA device
  382. dvb_ca_en50221_release(&budget_ci->ca);
  383. // disable DEBI pins
  384. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  385. }
  386. static void budget_ci_irq(struct saa7146_dev *dev, u32 * isr)
  387. {
  388. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  389. dprintk(8, "dev: %p, budget_ci: %p\n", dev, budget_ci);
  390. if (*isr & MASK_06)
  391. tasklet_schedule(&budget_ci->msp430_irq_tasklet);
  392. if (*isr & MASK_10)
  393. ttpci_budget_irq10_handler(dev, isr);
  394. if ((*isr & MASK_03) && (budget_ci->budget.ci_present))
  395. tasklet_schedule(&budget_ci->ciintf_irq_tasklet);
  396. }
  397. static u8 philips_su1278_tt_inittab[] = {
  398. 0x01, 0x0f,
  399. 0x02, 0x30,
  400. 0x03, 0x00,
  401. 0x04, 0x5b,
  402. 0x05, 0x85,
  403. 0x06, 0x02,
  404. 0x07, 0x00,
  405. 0x08, 0x02,
  406. 0x09, 0x00,
  407. 0x0C, 0x01,
  408. 0x0D, 0x81,
  409. 0x0E, 0x44,
  410. 0x0f, 0x14,
  411. 0x10, 0x3c,
  412. 0x11, 0x84,
  413. 0x12, 0xda,
  414. 0x13, 0x97,
  415. 0x14, 0x95,
  416. 0x15, 0xc9,
  417. 0x16, 0x19,
  418. 0x17, 0x8c,
  419. 0x18, 0x59,
  420. 0x19, 0xf8,
  421. 0x1a, 0xfe,
  422. 0x1c, 0x7f,
  423. 0x1d, 0x00,
  424. 0x1e, 0x00,
  425. 0x1f, 0x50,
  426. 0x20, 0x00,
  427. 0x21, 0x00,
  428. 0x22, 0x00,
  429. 0x23, 0x00,
  430. 0x28, 0x00,
  431. 0x29, 0x28,
  432. 0x2a, 0x14,
  433. 0x2b, 0x0f,
  434. 0x2c, 0x09,
  435. 0x2d, 0x09,
  436. 0x31, 0x1f,
  437. 0x32, 0x19,
  438. 0x33, 0xfc,
  439. 0x34, 0x93,
  440. 0xff, 0xff
  441. };
  442. static int philips_su1278_tt_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
  443. {
  444. stv0299_writereg(fe, 0x0e, 0x44);
  445. if (srate >= 10000000) {
  446. stv0299_writereg(fe, 0x13, 0x97);
  447. stv0299_writereg(fe, 0x14, 0x95);
  448. stv0299_writereg(fe, 0x15, 0xc9);
  449. stv0299_writereg(fe, 0x17, 0x8c);
  450. stv0299_writereg(fe, 0x1a, 0xfe);
  451. stv0299_writereg(fe, 0x1c, 0x7f);
  452. stv0299_writereg(fe, 0x2d, 0x09);
  453. } else {
  454. stv0299_writereg(fe, 0x13, 0x99);
  455. stv0299_writereg(fe, 0x14, 0x8d);
  456. stv0299_writereg(fe, 0x15, 0xce);
  457. stv0299_writereg(fe, 0x17, 0x43);
  458. stv0299_writereg(fe, 0x1a, 0x1d);
  459. stv0299_writereg(fe, 0x1c, 0x12);
  460. stv0299_writereg(fe, 0x2d, 0x05);
  461. }
  462. stv0299_writereg(fe, 0x0e, 0x23);
  463. stv0299_writereg(fe, 0x0f, 0x94);
  464. stv0299_writereg(fe, 0x10, 0x39);
  465. stv0299_writereg(fe, 0x15, 0xc9);
  466. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  467. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  468. stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
  469. return 0;
  470. }
  471. static int philips_su1278_tt_pll_set(struct dvb_frontend *fe,
  472. struct i2c_adapter *i2c,
  473. struct dvb_frontend_parameters *params)
  474. {
  475. u32 div;
  476. u8 buf[4];
  477. struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) };
  478. if ((params->frequency < 950000) || (params->frequency > 2150000))
  479. return -EINVAL;
  480. div = (params->frequency + (500 - 1)) / 500; // round correctly
  481. buf[0] = (div >> 8) & 0x7f;
  482. buf[1] = div & 0xff;
  483. buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2;
  484. buf[3] = 0x20;
  485. if (params->u.qpsk.symbol_rate < 4000000)
  486. buf[3] |= 1;
  487. if (params->frequency < 1250000)
  488. buf[3] |= 0;
  489. else if (params->frequency < 1550000)
  490. buf[3] |= 0x40;
  491. else if (params->frequency < 2050000)
  492. buf[3] |= 0x80;
  493. else if (params->frequency < 2150000)
  494. buf[3] |= 0xC0;
  495. if (i2c_transfer(i2c, &msg, 1) != 1)
  496. return -EIO;
  497. return 0;
  498. }
  499. static struct stv0299_config philips_su1278_tt_config = {
  500. .demod_address = 0x68,
  501. .inittab = philips_su1278_tt_inittab,
  502. .mclk = 64000000UL,
  503. .invert = 0,
  504. .skip_reinit = 1,
  505. .lock_output = STV0229_LOCKOUTPUT_1,
  506. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  507. .min_delay_ms = 50,
  508. .set_symbol_rate = philips_su1278_tt_set_symbol_rate,
  509. .pll_set = philips_su1278_tt_pll_set,
  510. };
  511. static int philips_tdm1316l_pll_init(struct dvb_frontend *fe)
  512. {
  513. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  514. static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  515. static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 };
  516. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = td1316_init,.len =
  517. sizeof(td1316_init) };
  518. // setup PLL configuration
  519. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  520. return -EIO;
  521. msleep(1);
  522. // disable the mc44BC374c (do not check for errors)
  523. tuner_msg.addr = 0x65;
  524. tuner_msg.buf = disable_mc44BC374c;
  525. tuner_msg.len = sizeof(disable_mc44BC374c);
  526. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) {
  527. i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1);
  528. }
  529. return 0;
  530. }
  531. static int philips_tdm1316l_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  532. {
  533. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  534. u8 tuner_buf[4];
  535. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) };
  536. int tuner_frequency = 0;
  537. u8 band, cp, filter;
  538. // determine charge pump
  539. tuner_frequency = params->frequency + 36130000;
  540. if (tuner_frequency < 87000000)
  541. return -EINVAL;
  542. else if (tuner_frequency < 130000000)
  543. cp = 3;
  544. else if (tuner_frequency < 160000000)
  545. cp = 5;
  546. else if (tuner_frequency < 200000000)
  547. cp = 6;
  548. else if (tuner_frequency < 290000000)
  549. cp = 3;
  550. else if (tuner_frequency < 420000000)
  551. cp = 5;
  552. else if (tuner_frequency < 480000000)
  553. cp = 6;
  554. else if (tuner_frequency < 620000000)
  555. cp = 3;
  556. else if (tuner_frequency < 830000000)
  557. cp = 5;
  558. else if (tuner_frequency < 895000000)
  559. cp = 7;
  560. else
  561. return -EINVAL;
  562. // determine band
  563. if (params->frequency < 49000000)
  564. return -EINVAL;
  565. else if (params->frequency < 159000000)
  566. band = 1;
  567. else if (params->frequency < 444000000)
  568. band = 2;
  569. else if (params->frequency < 861000000)
  570. band = 4;
  571. else
  572. return -EINVAL;
  573. // setup PLL filter and TDA9889
  574. switch (params->u.ofdm.bandwidth) {
  575. case BANDWIDTH_6_MHZ:
  576. tda1004x_write_byte(fe, 0x0C, 0x14);
  577. filter = 0;
  578. break;
  579. case BANDWIDTH_7_MHZ:
  580. tda1004x_write_byte(fe, 0x0C, 0x80);
  581. filter = 0;
  582. break;
  583. case BANDWIDTH_8_MHZ:
  584. tda1004x_write_byte(fe, 0x0C, 0x14);
  585. filter = 1;
  586. break;
  587. default:
  588. return -EINVAL;
  589. }
  590. // calculate divisor
  591. // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
  592. tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000;
  593. // setup tuner buffer
  594. tuner_buf[0] = tuner_frequency >> 8;
  595. tuner_buf[1] = tuner_frequency & 0xff;
  596. tuner_buf[2] = 0xca;
  597. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  598. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  599. return -EIO;
  600. msleep(1);
  601. return 0;
  602. }
  603. static int philips_tdm1316l_request_firmware(struct dvb_frontend *fe,
  604. const struct firmware **fw, char *name)
  605. {
  606. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  607. return request_firmware(fw, name, &budget_ci->budget.dev->pci->dev);
  608. }
  609. static struct tda1004x_config philips_tdm1316l_config = {
  610. .demod_address = 0x8,
  611. .invert = 0,
  612. .invert_oclk = 0,
  613. .xtal_freq = TDA10046_XTAL_4M,
  614. .agc_config = TDA10046_AGC_DEFAULT,
  615. .if_freq = TDA10046_FREQ_3617,
  616. .pll_init = philips_tdm1316l_pll_init,
  617. .pll_set = philips_tdm1316l_pll_set,
  618. .pll_sleep = NULL,
  619. .request_firmware = philips_tdm1316l_request_firmware,
  620. };
  621. static int dvbc_philips_tdm1316l_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  622. {
  623. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  624. u8 tuner_buf[5];
  625. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,
  626. .flags = 0,
  627. .buf = tuner_buf,
  628. .len = sizeof(tuner_buf) };
  629. int tuner_frequency = 0;
  630. u8 band, cp, filter;
  631. // determine charge pump
  632. tuner_frequency = params->frequency + 36125000;
  633. if (tuner_frequency < 87000000)
  634. return -EINVAL;
  635. else if (tuner_frequency < 130000000) {
  636. cp = 3;
  637. band = 1;
  638. } else if (tuner_frequency < 160000000) {
  639. cp = 5;
  640. band = 1;
  641. } else if (tuner_frequency < 200000000) {
  642. cp = 6;
  643. band = 1;
  644. } else if (tuner_frequency < 290000000) {
  645. cp = 3;
  646. band = 2;
  647. } else if (tuner_frequency < 420000000) {
  648. cp = 5;
  649. band = 2;
  650. } else if (tuner_frequency < 480000000) {
  651. cp = 6;
  652. band = 2;
  653. } else if (tuner_frequency < 620000000) {
  654. cp = 3;
  655. band = 4;
  656. } else if (tuner_frequency < 830000000) {
  657. cp = 5;
  658. band = 4;
  659. } else if (tuner_frequency < 895000000) {
  660. cp = 7;
  661. band = 4;
  662. } else
  663. return -EINVAL;
  664. // assume PLL filter should always be 8MHz for the moment.
  665. filter = 1;
  666. // calculate divisor
  667. tuner_frequency = (params->frequency + 36125000 + (62500/2)) / 62500;
  668. // setup tuner buffer
  669. tuner_buf[0] = tuner_frequency >> 8;
  670. tuner_buf[1] = tuner_frequency & 0xff;
  671. tuner_buf[2] = 0xc8;
  672. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  673. tuner_buf[4] = 0x80;
  674. stv0297_enable_plli2c(fe);
  675. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  676. return -EIO;
  677. msleep(50);
  678. stv0297_enable_plli2c(fe);
  679. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  680. return -EIO;
  681. msleep(1);
  682. return 0;
  683. }
  684. static u8 dvbc_philips_tdm1316l_inittab[] = {
  685. 0x80, 0x01,
  686. 0x80, 0x00,
  687. 0x81, 0x01,
  688. 0x81, 0x00,
  689. 0x00, 0x09,
  690. 0x01, 0x69,
  691. 0x03, 0x00,
  692. 0x04, 0x00,
  693. 0x07, 0x00,
  694. 0x08, 0x00,
  695. 0x20, 0x00,
  696. 0x21, 0x40,
  697. 0x22, 0x00,
  698. 0x23, 0x00,
  699. 0x24, 0x40,
  700. 0x25, 0x88,
  701. 0x30, 0xff,
  702. 0x31, 0x00,
  703. 0x32, 0xff,
  704. 0x33, 0x00,
  705. 0x34, 0x50,
  706. 0x35, 0x7f,
  707. 0x36, 0x00,
  708. 0x37, 0x20,
  709. 0x38, 0x00,
  710. 0x40, 0x1c,
  711. 0x41, 0xff,
  712. 0x42, 0x29,
  713. 0x43, 0x20,
  714. 0x44, 0xff,
  715. 0x45, 0x00,
  716. 0x46, 0x00,
  717. 0x49, 0x04,
  718. 0x4a, 0x00,
  719. 0x4b, 0x7b,
  720. 0x52, 0x30,
  721. 0x55, 0xae,
  722. 0x56, 0x47,
  723. 0x57, 0xe1,
  724. 0x58, 0x3a,
  725. 0x5a, 0x1e,
  726. 0x5b, 0x34,
  727. 0x60, 0x00,
  728. 0x63, 0x00,
  729. 0x64, 0x00,
  730. 0x65, 0x00,
  731. 0x66, 0x00,
  732. 0x67, 0x00,
  733. 0x68, 0x00,
  734. 0x69, 0x00,
  735. 0x6a, 0x02,
  736. 0x6b, 0x00,
  737. 0x70, 0xff,
  738. 0x71, 0x00,
  739. 0x72, 0x00,
  740. 0x73, 0x00,
  741. 0x74, 0x0c,
  742. 0x80, 0x00,
  743. 0x81, 0x00,
  744. 0x82, 0x00,
  745. 0x83, 0x00,
  746. 0x84, 0x04,
  747. 0x85, 0x80,
  748. 0x86, 0x24,
  749. 0x87, 0x78,
  750. 0x88, 0x10,
  751. 0x89, 0x00,
  752. 0x90, 0x01,
  753. 0x91, 0x01,
  754. 0xa0, 0x04,
  755. 0xa1, 0x00,
  756. 0xa2, 0x00,
  757. 0xb0, 0x91,
  758. 0xb1, 0x0b,
  759. 0xc0, 0x53,
  760. 0xc1, 0x70,
  761. 0xc2, 0x12,
  762. 0xd0, 0x00,
  763. 0xd1, 0x00,
  764. 0xd2, 0x00,
  765. 0xd3, 0x00,
  766. 0xd4, 0x00,
  767. 0xd5, 0x00,
  768. 0xde, 0x00,
  769. 0xdf, 0x00,
  770. 0x61, 0x38,
  771. 0x62, 0x0a,
  772. 0x53, 0x13,
  773. 0x59, 0x08,
  774. 0xff, 0xff,
  775. };
  776. static struct stv0297_config dvbc_philips_tdm1316l_config = {
  777. .demod_address = 0x1c,
  778. .inittab = dvbc_philips_tdm1316l_inittab,
  779. .invert = 0,
  780. .pll_set = dvbc_philips_tdm1316l_pll_set,
  781. };
  782. static void frontend_init(struct budget_ci *budget_ci)
  783. {
  784. switch (budget_ci->budget.dev->pci->subsystem_device) {
  785. case 0x100c: // Hauppauge/TT Nova-CI budget (stv0299/ALPS BSRU6(tsa5059))
  786. budget_ci->budget.dvb_frontend =
  787. stv0299_attach(&alps_bsru6_config, &budget_ci->budget.i2c_adap);
  788. if (budget_ci->budget.dvb_frontend) {
  789. break;
  790. }
  791. break;
  792. case 0x100f: // Hauppauge/TT Nova-CI budget (stv0299b/Philips su1278(tsa5059))
  793. budget_ci->budget.dvb_frontend =
  794. stv0299_attach(&philips_su1278_tt_config, &budget_ci->budget.i2c_adap);
  795. if (budget_ci->budget.dvb_frontend) {
  796. break;
  797. }
  798. break;
  799. case 0x1010: // TT DVB-C CI budget (stv0297/Philips tdm1316l(tda6651tt))
  800. budget_ci->tuner_pll_address = 0x61;
  801. budget_ci->budget.dvb_frontend =
  802. stv0297_attach(&dvbc_philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  803. if (budget_ci->budget.dvb_frontend) {
  804. break;
  805. }
  806. break;
  807. case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889)
  808. budget_ci->tuner_pll_address = 0x63;
  809. budget_ci->budget.dvb_frontend =
  810. tda10045_attach(&philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  811. if (budget_ci->budget.dvb_frontend) {
  812. break;
  813. }
  814. break;
  815. case 0x1012: // TT DVB-T CI budget (tda10046/Philips tdm1316l(tda6651tt))
  816. budget_ci->tuner_pll_address = 0x60;
  817. budget_ci->budget.dvb_frontend =
  818. tda10046_attach(&philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  819. if (budget_ci->budget.dvb_frontend) {
  820. break;
  821. }
  822. break;
  823. case 0x1017: // TT S-1500 PCI
  824. budget_ci->budget.dvb_frontend = stv0299_attach(&alps_bsbe1_config, &budget_ci->budget.i2c_adap);
  825. if (budget_ci->budget.dvb_frontend) {
  826. budget_ci->budget.dvb_frontend->ops->dishnetwork_send_legacy_command = NULL;
  827. if (lnbp21_init(budget_ci->budget.dvb_frontend, &budget_ci->budget.i2c_adap, LNBP21_LLC, 0)) {
  828. printk("%s: No LNBP21 found!\n", __FUNCTION__);
  829. if (budget_ci->budget.dvb_frontend->ops->release)
  830. budget_ci->budget.dvb_frontend->ops->release(budget_ci->budget.dvb_frontend);
  831. budget_ci->budget.dvb_frontend = NULL;
  832. }
  833. }
  834. break;
  835. }
  836. if (budget_ci->budget.dvb_frontend == NULL) {
  837. printk("budget-ci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
  838. budget_ci->budget.dev->pci->vendor,
  839. budget_ci->budget.dev->pci->device,
  840. budget_ci->budget.dev->pci->subsystem_vendor,
  841. budget_ci->budget.dev->pci->subsystem_device);
  842. } else {
  843. if (dvb_register_frontend
  844. (&budget_ci->budget.dvb_adapter, budget_ci->budget.dvb_frontend)) {
  845. printk("budget-ci: Frontend registration failed!\n");
  846. if (budget_ci->budget.dvb_frontend->ops->release)
  847. budget_ci->budget.dvb_frontend->ops->release(budget_ci->budget.dvb_frontend);
  848. budget_ci->budget.dvb_frontend = NULL;
  849. }
  850. }
  851. }
  852. static int budget_ci_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info)
  853. {
  854. struct budget_ci *budget_ci;
  855. int err;
  856. if (!(budget_ci = kmalloc(sizeof(struct budget_ci), GFP_KERNEL)))
  857. return -ENOMEM;
  858. dprintk(2, "budget_ci: %p\n", budget_ci);
  859. budget_ci->budget.ci_present = 0;
  860. dev->ext_priv = budget_ci;
  861. if ((err = ttpci_budget_init(&budget_ci->budget, dev, info, THIS_MODULE))) {
  862. kfree(budget_ci);
  863. return err;
  864. }
  865. tasklet_init(&budget_ci->msp430_irq_tasklet, msp430_ir_interrupt,
  866. (unsigned long) budget_ci);
  867. msp430_ir_init(budget_ci);
  868. ciintf_init(budget_ci);
  869. budget_ci->budget.dvb_adapter.priv = budget_ci;
  870. frontend_init(budget_ci);
  871. return 0;
  872. }
  873. static int budget_ci_detach(struct saa7146_dev *dev)
  874. {
  875. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  876. struct saa7146_dev *saa = budget_ci->budget.dev;
  877. int err;
  878. if (budget_ci->budget.ci_present)
  879. ciintf_deinit(budget_ci);
  880. if (budget_ci->budget.dvb_frontend)
  881. dvb_unregister_frontend(budget_ci->budget.dvb_frontend);
  882. err = ttpci_budget_deinit(&budget_ci->budget);
  883. tasklet_kill(&budget_ci->msp430_irq_tasklet);
  884. msp430_ir_deinit(budget_ci);
  885. // disable frontend and CI interface
  886. saa7146_setgpio(saa, 2, SAA7146_GPIO_INPUT);
  887. kfree(budget_ci);
  888. return err;
  889. }
  890. static struct saa7146_extension budget_extension;
  891. MAKE_BUDGET_INFO(ttbs2, "TT-Budget/S-1500 PCI", BUDGET_TT);
  892. MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC);
  893. MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT);
  894. MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT);
  895. MAKE_BUDGET_INFO(ttbcci, "TT-Budget-C-CI PCI", BUDGET_TT);
  896. static struct pci_device_id pci_tbl[] = {
  897. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c),
  898. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f),
  899. MAKE_EXTENSION_PCI(ttbcci, 0x13c2, 0x1010),
  900. MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011),
  901. MAKE_EXTENSION_PCI(ttbtci, 0x13c2, 0x1012),
  902. MAKE_EXTENSION_PCI(ttbs2, 0x13c2, 0x1017),
  903. {
  904. .vendor = 0,
  905. }
  906. };
  907. MODULE_DEVICE_TABLE(pci, pci_tbl);
  908. static struct saa7146_extension budget_extension = {
  909. .name = "budget_ci dvb\0",
  910. .flags = SAA7146_I2C_SHORT_DELAY,
  911. .module = THIS_MODULE,
  912. .pci_tbl = &pci_tbl[0],
  913. .attach = budget_ci_attach,
  914. .detach = budget_ci_detach,
  915. .irq_mask = MASK_03 | MASK_06 | MASK_10,
  916. .irq_func = budget_ci_irq,
  917. };
  918. static int __init budget_ci_init(void)
  919. {
  920. return saa7146_register_extension(&budget_extension);
  921. }
  922. static void __exit budget_ci_exit(void)
  923. {
  924. saa7146_unregister_extension(&budget_extension);
  925. }
  926. module_init(budget_ci_init);
  927. module_exit(budget_ci_exit);
  928. MODULE_LICENSE("GPL");
  929. MODULE_AUTHOR("Michael Hunold, Jack Thomasson, Andrew de Quincey, others");
  930. MODULE_DESCRIPTION("driver for the SAA7146 based so-called "
  931. "budget PCI DVB cards w/ CI-module produced by "
  932. "Siemens, Technotrend, Hauppauge");