bt878.c 16 KB

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  1. /*
  2. * bt878.c: part of the driver for the Pinnacle PCTV Sat DVB PCI card
  3. *
  4. * Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@htp-tel.de>
  5. *
  6. * large parts based on the bttv driver
  7. * Copyright (C) 1996,97,98 Ralph Metzler (rjkm@metzlerbros.de)
  8. * & Marcus Metzler (mocm@metzlerbros.de)
  9. * (c) 1999,2000 Gerd Knorr <kraxel@goldbach.in-berlin.de>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  24. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/moduleparam.h>
  29. #include <linux/kernel.h>
  30. #include <linux/pci.h>
  31. #include <asm/io.h>
  32. #include <linux/ioport.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/page.h>
  35. #include <linux/types.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/kmod.h>
  38. #include <linux/vmalloc.h>
  39. #include <linux/init.h>
  40. #include "dmxdev.h"
  41. #include "dvbdev.h"
  42. #include "bt878.h"
  43. #include "dst_priv.h"
  44. /**************************************/
  45. /* Miscellaneous utility definitions */
  46. /**************************************/
  47. static unsigned int bt878_verbose = 1;
  48. static unsigned int bt878_debug;
  49. module_param_named(verbose, bt878_verbose, int, 0444);
  50. MODULE_PARM_DESC(verbose,
  51. "verbose startup messages, default is 1 (yes)");
  52. module_param_named(debug, bt878_debug, int, 0644);
  53. MODULE_PARM_DESC(debug, "Turn on/off debugging, default is 0 (off).");
  54. int bt878_num;
  55. struct bt878 bt878[BT878_MAX];
  56. EXPORT_SYMBOL(bt878_debug);
  57. EXPORT_SYMBOL(bt878_verbose);
  58. EXPORT_SYMBOL(bt878_num);
  59. EXPORT_SYMBOL(bt878);
  60. #define btwrite(dat,adr) bmtwrite((dat), (bt->bt878_mem+(adr)))
  61. #define btread(adr) bmtread(bt->bt878_mem+(adr))
  62. #define btand(dat,adr) btwrite((dat) & btread(adr), adr)
  63. #define btor(dat,adr) btwrite((dat) | btread(adr), adr)
  64. #define btaor(dat,mask,adr) btwrite((dat) | ((mask) & btread(adr)), adr)
  65. #if defined(dprintk)
  66. #undef dprintk
  67. #endif
  68. #define dprintk if(bt878_debug) printk
  69. static void bt878_mem_free(struct bt878 *bt)
  70. {
  71. if (bt->buf_cpu) {
  72. pci_free_consistent(bt->dev, bt->buf_size, bt->buf_cpu,
  73. bt->buf_dma);
  74. bt->buf_cpu = NULL;
  75. }
  76. if (bt->risc_cpu) {
  77. pci_free_consistent(bt->dev, bt->risc_size, bt->risc_cpu,
  78. bt->risc_dma);
  79. bt->risc_cpu = NULL;
  80. }
  81. }
  82. static int bt878_mem_alloc(struct bt878 *bt)
  83. {
  84. if (!bt->buf_cpu) {
  85. bt->buf_size = 128 * 1024;
  86. bt->buf_cpu =
  87. pci_alloc_consistent(bt->dev, bt->buf_size,
  88. &bt->buf_dma);
  89. if (!bt->buf_cpu)
  90. return -ENOMEM;
  91. memset(bt->buf_cpu, 0, bt->buf_size);
  92. }
  93. if (!bt->risc_cpu) {
  94. bt->risc_size = PAGE_SIZE;
  95. bt->risc_cpu =
  96. pci_alloc_consistent(bt->dev, bt->risc_size,
  97. &bt->risc_dma);
  98. if (!bt->risc_cpu) {
  99. bt878_mem_free(bt);
  100. return -ENOMEM;
  101. }
  102. memset(bt->risc_cpu, 0, bt->risc_size);
  103. }
  104. return 0;
  105. }
  106. /* RISC instructions */
  107. #define RISC_WRITE (0x01 << 28)
  108. #define RISC_JUMP (0x07 << 28)
  109. #define RISC_SYNC (0x08 << 28)
  110. /* RISC bits */
  111. #define RISC_WR_SOL (1 << 27)
  112. #define RISC_WR_EOL (1 << 26)
  113. #define RISC_IRQ (1 << 24)
  114. #define RISC_STATUS(status) ((((~status) & 0x0F) << 20) | ((status & 0x0F) << 16))
  115. #define RISC_SYNC_RESYNC (1 << 15)
  116. #define RISC_SYNC_FM1 0x06
  117. #define RISC_SYNC_VRO 0x0C
  118. #define RISC_FLUSH() bt->risc_pos = 0
  119. #define RISC_INSTR(instr) bt->risc_cpu[bt->risc_pos++] = cpu_to_le32(instr)
  120. static int bt878_make_risc(struct bt878 *bt)
  121. {
  122. bt->block_bytes = bt->buf_size >> 4;
  123. bt->block_count = 1 << 4;
  124. bt->line_bytes = bt->block_bytes;
  125. bt->line_count = bt->block_count;
  126. while (bt->line_bytes > 4095) {
  127. bt->line_bytes >>= 1;
  128. bt->line_count <<= 1;
  129. }
  130. if (bt->line_count > 255) {
  131. printk("bt878: buffer size error!\n");
  132. return -EINVAL;
  133. }
  134. return 0;
  135. }
  136. static void bt878_risc_program(struct bt878 *bt, u32 op_sync_orin)
  137. {
  138. u32 buf_pos = 0;
  139. u32 line;
  140. RISC_FLUSH();
  141. RISC_INSTR(RISC_SYNC | RISC_SYNC_FM1 | op_sync_orin);
  142. RISC_INSTR(0);
  143. dprintk("bt878: risc len lines %u, bytes per line %u\n",
  144. bt->line_count, bt->line_bytes);
  145. for (line = 0; line < bt->line_count; line++) {
  146. // At the beginning of every block we issue an IRQ with previous (finished) block number set
  147. if (!(buf_pos % bt->block_bytes))
  148. RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
  149. RISC_IRQ |
  150. RISC_STATUS(((buf_pos /
  151. bt->block_bytes) +
  152. (bt->block_count -
  153. 1)) %
  154. bt->block_count) | bt->
  155. line_bytes);
  156. else
  157. RISC_INSTR(RISC_WRITE | RISC_WR_SOL | RISC_WR_EOL |
  158. bt->line_bytes);
  159. RISC_INSTR(bt->buf_dma + buf_pos);
  160. buf_pos += bt->line_bytes;
  161. }
  162. RISC_INSTR(RISC_SYNC | op_sync_orin | RISC_SYNC_VRO);
  163. RISC_INSTR(0);
  164. RISC_INSTR(RISC_JUMP);
  165. RISC_INSTR(bt->risc_dma);
  166. btwrite((bt->line_count << 16) | bt->line_bytes, BT878_APACK_LEN);
  167. }
  168. /*****************************/
  169. /* Start/Stop grabbing funcs */
  170. /*****************************/
  171. void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
  172. u32 irq_err_ignore)
  173. {
  174. u32 int_mask;
  175. dprintk("bt878 debug: bt878_start (ctl=%8.8x)\n", controlreg);
  176. /* complete the writing of the risc dma program now we have
  177. * the card specifics
  178. */
  179. bt878_risc_program(bt, op_sync_orin);
  180. controlreg &= ~0x1f;
  181. controlreg |= 0x1b;
  182. btwrite(bt->risc_dma, BT878_ARISC_START);
  183. /* original int mask had :
  184. * 6 2 8 4 0
  185. * 1111 1111 1000 0000 0000
  186. * SCERR|OCERR|PABORT|RIPERR|FDSR|FTRGT|FBUS|RISCI
  187. * Hacked for DST to:
  188. * SCERR | OCERR | FDSR | FTRGT | FBUS | RISCI
  189. */
  190. int_mask = BT878_ASCERR | BT878_AOCERR | BT878_APABORT |
  191. BT878_ARIPERR | BT878_APPERR | BT878_AFDSR | BT878_AFTRGT |
  192. BT878_AFBUS | BT878_ARISCI;
  193. /* ignore pesky bits */
  194. int_mask &= ~irq_err_ignore;
  195. btwrite(int_mask, BT878_AINT_MASK);
  196. btwrite(controlreg, BT878_AGPIO_DMA_CTL);
  197. }
  198. void bt878_stop(struct bt878 *bt)
  199. {
  200. u32 stat;
  201. int i = 0;
  202. dprintk("bt878 debug: bt878_stop\n");
  203. btwrite(0, BT878_AINT_MASK);
  204. btand(~0x13, BT878_AGPIO_DMA_CTL);
  205. do {
  206. stat = btread(BT878_AINT_STAT);
  207. if (!(stat & BT878_ARISC_EN))
  208. break;
  209. i++;
  210. } while (i < 500);
  211. dprintk("bt878(%d) debug: bt878_stop, i=%d, stat=0x%8.8x\n",
  212. bt->nr, i, stat);
  213. }
  214. EXPORT_SYMBOL(bt878_start);
  215. EXPORT_SYMBOL(bt878_stop);
  216. /*****************************/
  217. /* Interrupt service routine */
  218. /*****************************/
  219. static irqreturn_t bt878_irq(int irq, void *dev_id, struct pt_regs *regs)
  220. {
  221. u32 stat, astat, mask;
  222. int count;
  223. struct bt878 *bt;
  224. bt = (struct bt878 *) dev_id;
  225. count = 0;
  226. while (1) {
  227. stat = btread(BT878_AINT_STAT);
  228. mask = btread(BT878_AINT_MASK);
  229. if (!(astat = (stat & mask)))
  230. return IRQ_NONE; /* this interrupt is not for me */
  231. /* dprintk("bt878(%d) debug: irq count %d, stat 0x%8.8x, mask 0x%8.8x\n",bt->nr,count,stat,mask); */
  232. btwrite(astat, BT878_AINT_STAT); /* try to clear interupt condition */
  233. if (astat & (BT878_ASCERR | BT878_AOCERR)) {
  234. if (bt878_verbose) {
  235. printk("bt878(%d): irq%s%s risc_pc=%08x\n",
  236. bt->nr,
  237. (astat & BT878_ASCERR) ? " SCERR" :
  238. "",
  239. (astat & BT878_AOCERR) ? " OCERR" :
  240. "", btread(BT878_ARISC_PC));
  241. }
  242. }
  243. if (astat & (BT878_APABORT | BT878_ARIPERR | BT878_APPERR)) {
  244. if (bt878_verbose) {
  245. printk
  246. ("bt878(%d): irq%s%s%s risc_pc=%08x\n",
  247. bt->nr,
  248. (astat & BT878_APABORT) ? " PABORT" :
  249. "",
  250. (astat & BT878_ARIPERR) ? " RIPERR" :
  251. "",
  252. (astat & BT878_APPERR) ? " PPERR" :
  253. "", btread(BT878_ARISC_PC));
  254. }
  255. }
  256. if (astat & (BT878_AFDSR | BT878_AFTRGT | BT878_AFBUS)) {
  257. if (bt878_verbose) {
  258. printk
  259. ("bt878(%d): irq%s%s%s risc_pc=%08x\n",
  260. bt->nr,
  261. (astat & BT878_AFDSR) ? " FDSR" : "",
  262. (astat & BT878_AFTRGT) ? " FTRGT" :
  263. "",
  264. (astat & BT878_AFBUS) ? " FBUS" : "",
  265. btread(BT878_ARISC_PC));
  266. }
  267. }
  268. if (astat & BT878_ARISCI) {
  269. bt->finished_block = (stat & BT878_ARISCS) >> 28;
  270. tasklet_schedule(&bt->tasklet);
  271. break;
  272. }
  273. count++;
  274. if (count > 20) {
  275. btwrite(0, BT878_AINT_MASK);
  276. printk(KERN_ERR
  277. "bt878(%d): IRQ lockup, cleared int mask\n",
  278. bt->nr);
  279. break;
  280. }
  281. }
  282. return IRQ_HANDLED;
  283. }
  284. int
  285. bt878_device_control(struct bt878 *bt, unsigned int cmd, union dst_gpio_packet *mp)
  286. {
  287. int retval;
  288. retval = 0;
  289. if (mutex_lock_interruptible(&bt->gpio_lock))
  290. return -ERESTARTSYS;
  291. /* special gpio signal */
  292. switch (cmd) {
  293. case DST_IG_ENABLE:
  294. // dprintk("dvb_bt8xx: dst enable mask 0x%02x enb 0x%02x \n", mp->dstg.enb.mask, mp->dstg.enb.enable);
  295. retval = bttv_gpio_enable(bt->bttv_nr,
  296. mp->enb.mask,
  297. mp->enb.enable);
  298. break;
  299. case DST_IG_WRITE:
  300. // dprintk("dvb_bt8xx: dst write gpio mask 0x%02x out 0x%02x\n", mp->dstg.outp.mask, mp->dstg.outp.highvals);
  301. retval = bttv_write_gpio(bt->bttv_nr,
  302. mp->outp.mask,
  303. mp->outp.highvals);
  304. break;
  305. case DST_IG_READ:
  306. /* read */
  307. retval = bttv_read_gpio(bt->bttv_nr, &mp->rd.value);
  308. // dprintk("dvb_bt8xx: dst read gpio 0x%02x\n", (unsigned)mp->dstg.rd.value);
  309. break;
  310. case DST_IG_TS:
  311. /* Set packet size */
  312. bt->TS_Size = mp->psize;
  313. break;
  314. default:
  315. retval = -EINVAL;
  316. break;
  317. }
  318. mutex_unlock(&bt->gpio_lock);
  319. return retval;
  320. }
  321. EXPORT_SYMBOL(bt878_device_control);
  322. static struct cards card_list[] __devinitdata = {
  323. { 0x01010071, BTTV_BOARD_NEBULA_DIGITV, "Nebula Electronics DigiTV" },
  324. { 0x07611461, BTTV_BOARD_AVDVBT_761, "AverMedia AverTV DVB-T 761" },
  325. { 0x001c11bd, BTTV_BOARD_PINNACLESAT, "Pinnacle PCTV Sat" },
  326. { 0x002611bd, BTTV_BOARD_TWINHAN_DST, "Pinnacle PCTV SAT CI" },
  327. { 0x00011822, BTTV_BOARD_TWINHAN_DST, "Twinhan VisionPlus DVB" },
  328. { 0xfc00270f, BTTV_BOARD_TWINHAN_DST, "ChainTech digitop DST-1000 DVB-S" },
  329. { 0x07711461, BTTV_BOARD_AVDVBT_771, "AVermedia AverTV DVB-T 771" },
  330. { 0xdb1018ac, BTTV_BOARD_DVICO_DVBT_LITE, "DViCO FusionHDTV DVB-T Lite" },
  331. { 0xd50018ac, BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE, "DViCO FusionHDTV 5 Lite" },
  332. { 0x20007063, BTTV_BOARD_PC_HDTV, "pcHDTV HD-2000 TV"},
  333. { 0, -1, NULL }
  334. };
  335. /***********************/
  336. /* PCI device handling */
  337. /***********************/
  338. static int __devinit bt878_probe(struct pci_dev *dev,
  339. const struct pci_device_id *pci_id)
  340. {
  341. int result = 0, has_dvb = 0, i;
  342. unsigned char lat;
  343. struct bt878 *bt;
  344. #if defined(__powerpc__)
  345. unsigned int cmd;
  346. #endif
  347. unsigned int cardid;
  348. unsigned short id;
  349. struct cards *dvb_cards;
  350. printk(KERN_INFO "bt878: Bt878 AUDIO function found (%d).\n",
  351. bt878_num);
  352. if (pci_enable_device(dev))
  353. return -EIO;
  354. pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &id);
  355. cardid = id << 16;
  356. pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &id);
  357. cardid |= id;
  358. for (i = 0, dvb_cards = card_list; i < ARRAY_SIZE(card_list); i++, dvb_cards++) {
  359. if (cardid == dvb_cards->pci_id) {
  360. printk("%s: card id=[0x%x],[ %s ] has DVB functions.\n",
  361. __func__, cardid, dvb_cards->name);
  362. has_dvb = 1;
  363. }
  364. }
  365. if (!has_dvb) {
  366. printk("%s: card id=[0x%x], Unknown card.\nExiting..\n", __func__, cardid);
  367. result = -EINVAL;
  368. goto fail0;
  369. }
  370. bt = &bt878[bt878_num];
  371. bt->dev = dev;
  372. bt->nr = bt878_num;
  373. bt->shutdown = 0;
  374. bt->id = dev->device;
  375. bt->irq = dev->irq;
  376. bt->bt878_adr = pci_resource_start(dev, 0);
  377. if (!request_mem_region(pci_resource_start(dev, 0),
  378. pci_resource_len(dev, 0), "bt878")) {
  379. result = -EBUSY;
  380. goto fail0;
  381. }
  382. pci_read_config_byte(dev, PCI_CLASS_REVISION, &bt->revision);
  383. pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
  384. printk(KERN_INFO "bt878(%d): Bt%x (rev %d) at %02x:%02x.%x, ",
  385. bt878_num, bt->id, bt->revision, dev->bus->number,
  386. PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
  387. printk("irq: %d, latency: %d, memory: 0x%lx\n",
  388. bt->irq, lat, bt->bt878_adr);
  389. #if defined(__powerpc__)
  390. /* on OpenFirmware machines (PowerMac at least), PCI memory cycle */
  391. /* response on cards with no firmware is not enabled by OF */
  392. pci_read_config_dword(dev, PCI_COMMAND, &cmd);
  393. cmd = (cmd | PCI_COMMAND_MEMORY);
  394. pci_write_config_dword(dev, PCI_COMMAND, cmd);
  395. #endif
  396. #ifdef __sparc__
  397. bt->bt878_mem = (unsigned char *) bt->bt878_adr;
  398. #else
  399. bt->bt878_mem = ioremap(bt->bt878_adr, 0x1000);
  400. #endif
  401. /* clear interrupt mask */
  402. btwrite(0, BT848_INT_MASK);
  403. result = request_irq(bt->irq, bt878_irq,
  404. SA_SHIRQ | SA_INTERRUPT, "bt878",
  405. (void *) bt);
  406. if (result == -EINVAL) {
  407. printk(KERN_ERR "bt878(%d): Bad irq number or handler\n",
  408. bt878_num);
  409. goto fail1;
  410. }
  411. if (result == -EBUSY) {
  412. printk(KERN_ERR
  413. "bt878(%d): IRQ %d busy, change your PnP config in BIOS\n",
  414. bt878_num, bt->irq);
  415. goto fail1;
  416. }
  417. if (result < 0)
  418. goto fail1;
  419. pci_set_master(dev);
  420. pci_set_drvdata(dev, bt);
  421. /* if(init_bt878(btv) < 0) {
  422. bt878_remove(dev);
  423. return -EIO;
  424. }
  425. */
  426. if ((result = bt878_mem_alloc(bt))) {
  427. printk("bt878: failed to allocate memory!\n");
  428. goto fail2;
  429. }
  430. bt878_make_risc(bt);
  431. btwrite(0, BT878_AINT_MASK);
  432. bt878_num++;
  433. return 0;
  434. fail2:
  435. free_irq(bt->irq, bt);
  436. fail1:
  437. release_mem_region(pci_resource_start(bt->dev, 0),
  438. pci_resource_len(bt->dev, 0));
  439. fail0:
  440. pci_disable_device(dev);
  441. return result;
  442. }
  443. static void __devexit bt878_remove(struct pci_dev *pci_dev)
  444. {
  445. u8 command;
  446. struct bt878 *bt = pci_get_drvdata(pci_dev);
  447. if (bt878_verbose)
  448. printk("bt878(%d): unloading\n", bt->nr);
  449. /* turn off all capturing, DMA and IRQs */
  450. btand(~0x13, BT878_AGPIO_DMA_CTL);
  451. /* first disable interrupts before unmapping the memory! */
  452. btwrite(0, BT878_AINT_MASK);
  453. btwrite(~0U, BT878_AINT_STAT);
  454. /* disable PCI bus-mastering */
  455. pci_read_config_byte(bt->dev, PCI_COMMAND, &command);
  456. /* Should this be &=~ ?? */
  457. command &= ~PCI_COMMAND_MASTER;
  458. pci_write_config_byte(bt->dev, PCI_COMMAND, command);
  459. free_irq(bt->irq, bt);
  460. printk(KERN_DEBUG "bt878_mem: 0x%p.\n", bt->bt878_mem);
  461. if (bt->bt878_mem)
  462. iounmap(bt->bt878_mem);
  463. release_mem_region(pci_resource_start(bt->dev, 0),
  464. pci_resource_len(bt->dev, 0));
  465. /* wake up any waiting processes
  466. because shutdown flag is set, no new processes (in this queue)
  467. are expected
  468. */
  469. bt->shutdown = 1;
  470. bt878_mem_free(bt);
  471. pci_set_drvdata(pci_dev, NULL);
  472. pci_disable_device(pci_dev);
  473. return;
  474. }
  475. static struct pci_device_id bt878_pci_tbl[] __devinitdata = {
  476. {PCI_VENDOR_ID_BROOKTREE, PCI_DEVICE_ID_BROOKTREE_878,
  477. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  478. {0,}
  479. };
  480. MODULE_DEVICE_TABLE(pci, bt878_pci_tbl);
  481. static struct pci_driver bt878_pci_driver = {
  482. .name = "bt878",
  483. .id_table = bt878_pci_tbl,
  484. .probe = bt878_probe,
  485. .remove = bt878_remove,
  486. };
  487. static int bt878_pci_driver_registered;
  488. /*******************************/
  489. /* Module management functions */
  490. /*******************************/
  491. static int bt878_init_module(void)
  492. {
  493. bt878_num = 0;
  494. bt878_pci_driver_registered = 0;
  495. printk(KERN_INFO "bt878: AUDIO driver version %d.%d.%d loaded\n",
  496. (BT878_VERSION_CODE >> 16) & 0xff,
  497. (BT878_VERSION_CODE >> 8) & 0xff,
  498. BT878_VERSION_CODE & 0xff);
  499. /*
  500. bt878_check_chipset();
  501. */
  502. /* later we register inside of bt878_find_audio_dma()
  503. * because we may want to ignore certain cards */
  504. bt878_pci_driver_registered = 1;
  505. return pci_register_driver(&bt878_pci_driver);
  506. }
  507. static void bt878_cleanup_module(void)
  508. {
  509. if (bt878_pci_driver_registered) {
  510. bt878_pci_driver_registered = 0;
  511. pci_unregister_driver(&bt878_pci_driver);
  512. }
  513. return;
  514. }
  515. module_init(bt878_init_module);
  516. module_exit(bt878_cleanup_module);
  517. //MODULE_AUTHOR("XXX");
  518. MODULE_LICENSE("GPL");
  519. /*
  520. * Local variables:
  521. * c-basic-offset: 8
  522. * End:
  523. */