therm_pm72.h 8.6 KB

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  1. #ifndef __THERM_PMAC_7_2_H__
  2. #define __THERM_PMAC_7_2_H__
  3. typedef unsigned short fu16;
  4. typedef int fs32;
  5. typedef short fs16;
  6. struct mpu_data
  7. {
  8. u8 signature; /* 0x00 - EEPROM sig. */
  9. u8 bytes_used; /* 0x01 - Bytes used in eeprom (160 ?) */
  10. u8 size; /* 0x02 - EEPROM size (256 ?) */
  11. u8 version; /* 0x03 - EEPROM version */
  12. u32 data_revision; /* 0x04 - Dataset revision */
  13. u8 processor_bin_code[3]; /* 0x08 - Processor BIN code */
  14. u8 bin_code_expansion; /* 0x0b - ??? (padding ?) */
  15. u8 processor_num; /* 0x0c - Number of CPUs on this MPU */
  16. u8 input_mul_bus_div; /* 0x0d - Clock input multiplier/bus divider */
  17. u8 reserved1[2]; /* 0x0e - */
  18. u32 input_clk_freq_high; /* 0x10 - Input clock frequency high */
  19. u8 cpu_nb_target_cycles; /* 0x14 - ??? */
  20. u8 cpu_statlat; /* 0x15 - ??? */
  21. u8 cpu_snooplat; /* 0x16 - ??? */
  22. u8 cpu_snoopacc; /* 0x17 - ??? */
  23. u8 nb_paamwin; /* 0x18 - ??? */
  24. u8 nb_statlat; /* 0x19 - ??? */
  25. u8 nb_snooplat; /* 0x1a - ??? */
  26. u8 nb_snoopwin; /* 0x1b - ??? */
  27. u8 api_bus_mode; /* 0x1c - ??? */
  28. u8 reserved2[3]; /* 0x1d - */
  29. u32 input_clk_freq_low; /* 0x20 - Input clock frequency low */
  30. u8 processor_card_slot; /* 0x24 - Processor card slot number */
  31. u8 reserved3[2]; /* 0x25 - */
  32. u8 padjmax; /* 0x27 - Max power adjustment (Not in OF!) */
  33. u8 ttarget; /* 0x28 - Target temperature */
  34. u8 tmax; /* 0x29 - Max temperature */
  35. u8 pmaxh; /* 0x2a - Max power */
  36. u8 tguardband; /* 0x2b - Guardband temp ??? Hist. len in OSX */
  37. fs32 pid_gp; /* 0x2c - PID proportional gain */
  38. fs32 pid_gr; /* 0x30 - PID reset gain */
  39. fs32 pid_gd; /* 0x34 - PID derivative gain */
  40. fu16 voph; /* 0x38 - Vop High */
  41. fu16 vopl; /* 0x3a - Vop Low */
  42. fs16 nactual_die; /* 0x3c - nActual Die */
  43. fs16 nactual_heatsink; /* 0x3e - nActual Heatsink */
  44. fs16 nactual_system; /* 0x40 - nActual System */
  45. u16 calibration_flags; /* 0x42 - Calibration flags */
  46. fu16 mdiode; /* 0x44 - Diode M value (scaling factor) */
  47. fs16 bdiode; /* 0x46 - Diode B value (offset) */
  48. fs32 theta_heat_sink; /* 0x48 - Theta heat sink */
  49. u16 rminn_intake_fan; /* 0x4c - Intake fan min RPM */
  50. u16 rmaxn_intake_fan; /* 0x4e - Intake fan max RPM */
  51. u16 rminn_exhaust_fan; /* 0x50 - Exhaust fan min RPM */
  52. u16 rmaxn_exhaust_fan; /* 0x52 - Exhaust fan max RPM */
  53. u8 processor_part_num[8]; /* 0x54 - Processor part number XX pumps min/max */
  54. u32 processor_lot_num; /* 0x5c - Processor lot number */
  55. u8 orig_card_sernum[0x10]; /* 0x60 - Card original serial number */
  56. u8 curr_card_sernum[0x10]; /* 0x70 - Card current serial number */
  57. u8 mlb_sernum[0x18]; /* 0x80 - MLB serial number */
  58. u32 checksum1; /* 0x98 - */
  59. u32 checksum2; /* 0x9c - */
  60. }; /* Total size = 0xa0 */
  61. /* Display a 16.16 fixed point value */
  62. #define FIX32TOPRINT(f) ((f) >> 16),((((f) & 0xffff) * 1000) >> 16)
  63. /*
  64. * Maximum number of seconds to be in critical state (after a
  65. * normal shutdown attempt). If the machine isn't down after
  66. * this counter elapses, we force an immediate machine power
  67. * off.
  68. */
  69. #define MAX_CRITICAL_STATE 30
  70. static char * critical_overtemp_path = "/sbin/critical_overtemp";
  71. /*
  72. * This option is "weird" :) Basically, if you define this to 1
  73. * the control loop for the RPMs fans (not PWMs) will apply the
  74. * correction factor obtained from the PID to the _actual_ RPM
  75. * speed read from the FCU.
  76. * If you define the below constant to 0, then it will be
  77. * applied to the setpoint RPM speed, that is basically the
  78. * speed we proviously "asked" for.
  79. *
  80. * I'm not sure which of these Apple's algorithm is supposed
  81. * to use
  82. */
  83. #define RPM_PID_USE_ACTUAL_SPEED 0
  84. /*
  85. * i2c IDs. Currently, we hard code those and assume that
  86. * the FCU is on U3 bus 1 while all sensors are on U3 bus
  87. * 0. This appear to be safe enough for this first version
  88. * of the driver, though I would accept any clean patch
  89. * doing a better use of the device-tree without turning the
  90. * while i2c registration mecanism into a racy mess
  91. *
  92. * Note: Xserve changed this. We have some bits on the K2 bus,
  93. * which I arbitrarily set to 0x200. Ultimately, we really want
  94. * too lookup these in the device-tree though
  95. */
  96. #define FAN_CTRLER_ID 0x15e
  97. #define SUPPLY_MONITOR_ID 0x58
  98. #define SUPPLY_MONITORB_ID 0x5a
  99. #define DRIVES_DALLAS_ID 0x94
  100. #define BACKSIDE_MAX_ID 0x98
  101. #define XSERVE_DIMMS_LM87 0x25a
  102. /*
  103. * Some MAX6690, DS1775, LM87 register definitions
  104. */
  105. #define MAX6690_INT_TEMP 0
  106. #define MAX6690_EXT_TEMP 1
  107. #define DS1775_TEMP 0
  108. #define LM87_INT_TEMP 0x27
  109. /*
  110. * Scaling factors for the AD7417 ADC converters (except
  111. * for the CPU diode which is obtained from the EEPROM).
  112. * Those values are obtained from the property list of
  113. * the darwin driver
  114. */
  115. #define ADC_12V_CURRENT_SCALE 0x0320 /* _AD2 */
  116. #define ADC_CPU_VOLTAGE_SCALE 0x00a0 /* _AD3 */
  117. #define ADC_CPU_CURRENT_SCALE 0x1f40 /* _AD4 */
  118. /*
  119. * PID factors for the U3/Backside fan control loop. We have 2 sets
  120. * of values here, one set for U3 and one set for U3H
  121. */
  122. #define BACKSIDE_FAN_PWM_DEFAULT_ID 1
  123. #define BACKSIDE_FAN_PWM_INDEX 0
  124. #define BACKSIDE_PID_U3_G_d 0x02800000
  125. #define BACKSIDE_PID_U3H_G_d 0x01400000
  126. #define BACKSIDE_PID_RACK_G_d 0x00500000
  127. #define BACKSIDE_PID_G_p 0x00500000
  128. #define BACKSIDE_PID_RACK_G_p 0x0004cccc
  129. #define BACKSIDE_PID_G_r 0x00000000
  130. #define BACKSIDE_PID_U3_INPUT_TARGET 0x00410000
  131. #define BACKSIDE_PID_U3H_INPUT_TARGET 0x004b0000
  132. #define BACKSIDE_PID_RACK_INPUT_TARGET 0x00460000
  133. #define BACKSIDE_PID_INTERVAL 5
  134. #define BACKSIDE_PID_RACK_INTERVAL 1
  135. #define BACKSIDE_PID_OUTPUT_MAX 100
  136. #define BACKSIDE_PID_U3_OUTPUT_MIN 20
  137. #define BACKSIDE_PID_U3H_OUTPUT_MIN 20
  138. #define BACKSIDE_PID_HISTORY_SIZE 2
  139. struct basckside_pid_params
  140. {
  141. s32 G_d;
  142. s32 G_p;
  143. s32 G_r;
  144. s32 input_target;
  145. s32 output_min;
  146. s32 output_max;
  147. s32 interval;
  148. int additive;
  149. };
  150. struct backside_pid_state
  151. {
  152. int ticks;
  153. struct i2c_client * monitor;
  154. s32 sample_history[BACKSIDE_PID_HISTORY_SIZE];
  155. s32 error_history[BACKSIDE_PID_HISTORY_SIZE];
  156. int cur_sample;
  157. s32 last_temp;
  158. int pwm;
  159. int first;
  160. };
  161. /*
  162. * PID factors for the Drive Bay fan control loop
  163. */
  164. #define DRIVES_FAN_RPM_DEFAULT_ID 2
  165. #define DRIVES_FAN_RPM_INDEX 1
  166. #define DRIVES_PID_G_d 0x01e00000
  167. #define DRIVES_PID_G_p 0x00500000
  168. #define DRIVES_PID_G_r 0x00000000
  169. #define DRIVES_PID_INPUT_TARGET 0x00280000
  170. #define DRIVES_PID_INTERVAL 5
  171. #define DRIVES_PID_OUTPUT_MAX 4000
  172. #define DRIVES_PID_OUTPUT_MIN 300
  173. #define DRIVES_PID_HISTORY_SIZE 2
  174. struct drives_pid_state
  175. {
  176. int ticks;
  177. struct i2c_client * monitor;
  178. s32 sample_history[BACKSIDE_PID_HISTORY_SIZE];
  179. s32 error_history[BACKSIDE_PID_HISTORY_SIZE];
  180. int cur_sample;
  181. s32 last_temp;
  182. int rpm;
  183. int first;
  184. };
  185. #define SLOTS_FAN_PWM_DEFAULT_ID 2
  186. #define SLOTS_FAN_PWM_INDEX 2
  187. #define SLOTS_FAN_DEFAULT_PWM 50 /* Do better here ! */
  188. /*
  189. * PID factors for the Xserve DIMM control loop
  190. */
  191. #define DIMM_PID_G_d 0
  192. #define DIMM_PID_G_p 0
  193. #define DIMM_PID_G_r 0x6553600
  194. #define DIMM_PID_INPUT_TARGET 3276800
  195. #define DIMM_PID_INTERVAL 1
  196. #define DIMM_PID_OUTPUT_MAX 14000
  197. #define DIMM_PID_OUTPUT_MIN 4000
  198. #define DIMM_PID_HISTORY_SIZE 20
  199. struct dimm_pid_state
  200. {
  201. int ticks;
  202. struct i2c_client * monitor;
  203. s32 sample_history[DIMM_PID_HISTORY_SIZE];
  204. s32 error_history[DIMM_PID_HISTORY_SIZE];
  205. int cur_sample;
  206. s32 last_temp;
  207. int first;
  208. int output;
  209. };
  210. /* Desktops */
  211. #define CPUA_INTAKE_FAN_RPM_DEFAULT_ID 3
  212. #define CPUA_EXHAUST_FAN_RPM_DEFAULT_ID 4
  213. #define CPUB_INTAKE_FAN_RPM_DEFAULT_ID 5
  214. #define CPUB_EXHAUST_FAN_RPM_DEFAULT_ID 6
  215. #define CPUA_INTAKE_FAN_RPM_INDEX 3
  216. #define CPUA_EXHAUST_FAN_RPM_INDEX 4
  217. #define CPUB_INTAKE_FAN_RPM_INDEX 5
  218. #define CPUB_EXHAUST_FAN_RPM_INDEX 6
  219. #define CPU_INTAKE_SCALE 0x0000f852
  220. #define CPU_TEMP_HISTORY_SIZE 2
  221. #define CPU_POWER_HISTORY_SIZE 10
  222. #define CPU_PID_INTERVAL 1
  223. #define CPU_MAX_OVERTEMP 30
  224. #define CPUA_PUMP_RPM_INDEX 7
  225. #define CPUB_PUMP_RPM_INDEX 8
  226. #define CPU_PUMP_OUTPUT_MAX 3200
  227. #define CPU_PUMP_OUTPUT_MIN 1250
  228. /* Xserve */
  229. #define CPU_A1_FAN_RPM_INDEX 9
  230. #define CPU_A2_FAN_RPM_INDEX 10
  231. #define CPU_A3_FAN_RPM_INDEX 11
  232. #define CPU_B1_FAN_RPM_INDEX 12
  233. #define CPU_B2_FAN_RPM_INDEX 13
  234. #define CPU_B3_FAN_RPM_INDEX 14
  235. struct cpu_pid_state
  236. {
  237. int index;
  238. struct i2c_client * monitor;
  239. struct mpu_data mpu;
  240. int overtemp;
  241. s32 temp_history[CPU_TEMP_HISTORY_SIZE];
  242. int cur_temp;
  243. s32 power_history[CPU_POWER_HISTORY_SIZE];
  244. s32 error_history[CPU_POWER_HISTORY_SIZE];
  245. int cur_power;
  246. int count_power;
  247. int rpm;
  248. int intake_rpm;
  249. s32 voltage;
  250. s32 current_a;
  251. s32 last_temp;
  252. s32 last_power;
  253. int first;
  254. u8 adc_config;
  255. s32 pump_min;
  256. s32 pump_max;
  257. };
  258. /*
  259. * Driver state
  260. */
  261. enum {
  262. state_detached,
  263. state_attaching,
  264. state_attached,
  265. state_detaching,
  266. };
  267. #endif /* __THERM_PMAC_7_2_H__ */