i8042.h 2.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133
  1. #ifndef _I8042_H
  2. #define _I8042_H
  3. #include <linux/config.h>
  4. /*
  5. * Copyright (c) 1999-2002 Vojtech Pavlik
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. */
  11. /*
  12. * Arch-dependent inline functions and defines.
  13. */
  14. #if defined(CONFIG_MACH_JAZZ)
  15. #include "i8042-jazzio.h"
  16. #elif defined(CONFIG_SGI_IP22)
  17. #include "i8042-ip22io.h"
  18. #elif defined(CONFIG_PPC)
  19. #include "i8042-ppcio.h"
  20. #elif defined(CONFIG_SPARC)
  21. #include "i8042-sparcio.h"
  22. #elif defined(CONFIG_X86) || defined(CONFIG_IA64)
  23. #include "i8042-x86ia64io.h"
  24. #else
  25. #include "i8042-io.h"
  26. #endif
  27. /*
  28. * This is in 50us units, the time we wait for the i8042 to react. This
  29. * has to be long enough for the i8042 itself to timeout on sending a byte
  30. * to a non-existent mouse.
  31. */
  32. #define I8042_CTL_TIMEOUT 10000
  33. /*
  34. * When the device isn't opened and it's interrupts aren't used, we poll it at
  35. * regular intervals to see if any characters arrived. If yes, we can start
  36. * probing for any mouse / keyboard connected. This is the period of the
  37. * polling.
  38. */
  39. #define I8042_POLL_PERIOD HZ/20
  40. /*
  41. * Status register bits.
  42. */
  43. #define I8042_STR_PARITY 0x80
  44. #define I8042_STR_TIMEOUT 0x40
  45. #define I8042_STR_AUXDATA 0x20
  46. #define I8042_STR_KEYLOCK 0x10
  47. #define I8042_STR_CMDDAT 0x08
  48. #define I8042_STR_MUXERR 0x04
  49. #define I8042_STR_IBF 0x02
  50. #define I8042_STR_OBF 0x01
  51. /*
  52. * Control register bits.
  53. */
  54. #define I8042_CTR_KBDINT 0x01
  55. #define I8042_CTR_AUXINT 0x02
  56. #define I8042_CTR_IGNKEYLOCK 0x08
  57. #define I8042_CTR_KBDDIS 0x10
  58. #define I8042_CTR_AUXDIS 0x20
  59. #define I8042_CTR_XLATE 0x40
  60. /*
  61. * Commands.
  62. */
  63. #define I8042_CMD_CTL_RCTR 0x0120
  64. #define I8042_CMD_CTL_WCTR 0x1060
  65. #define I8042_CMD_CTL_TEST 0x01aa
  66. #define I8042_CMD_KBD_DISABLE 0x00ad
  67. #define I8042_CMD_KBD_ENABLE 0x00ae
  68. #define I8042_CMD_KBD_TEST 0x01ab
  69. #define I8042_CMD_KBD_LOOP 0x11d2
  70. #define I8042_CMD_AUX_DISABLE 0x00a7
  71. #define I8042_CMD_AUX_ENABLE 0x00a8
  72. #define I8042_CMD_AUX_TEST 0x01a9
  73. #define I8042_CMD_AUX_SEND 0x10d4
  74. #define I8042_CMD_AUX_LOOP 0x11d3
  75. #define I8042_CMD_MUX_PFX 0x0090
  76. #define I8042_CMD_MUX_SEND 0x1090
  77. /*
  78. * Return codes.
  79. */
  80. #define I8042_RET_CTL_TEST 0x55
  81. /*
  82. * Expected maximum internal i8042 buffer size. This is used for flushing
  83. * the i8042 buffers.
  84. */
  85. #define I8042_BUFFER_SIZE 16
  86. /*
  87. * Number of AUX ports on controllers supporting active multiplexing
  88. * specification
  89. */
  90. #define I8042_NUM_MUX_PORTS 4
  91. /*
  92. * Debug.
  93. */
  94. #ifdef DEBUG
  95. static unsigned long i8042_start_time;
  96. #define dbg_init() do { i8042_start_time = jiffies; } while (0)
  97. #define dbg(format, arg...) \
  98. do { \
  99. if (i8042_debug) \
  100. printk(KERN_DEBUG __FILE__ ": " format " [%d]\n" , \
  101. ## arg, (int) (jiffies - i8042_start_time)); \
  102. } while (0)
  103. #else
  104. #define dbg_init() do { } while (0)
  105. #define dbg(format, arg...) do {} while (0)
  106. #endif
  107. #endif /* _I8042_H */