i2c-nforce2.c 10 KB

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  1. /*
  2. SMBus driver for nVidia nForce2 MCP
  3. Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>,
  4. Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
  5. Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
  6. Based on
  7. SMBus 2.0 driver for AMD-8111 IO-Hub
  8. Copyright (c) 2002 Vojtech Pavlik
  9. This program is free software; you can redistribute it and/or modify
  10. it under the terms of the GNU General Public License as published by
  11. the Free Software Foundation; either version 2 of the License, or
  12. (at your option) any later version.
  13. This program is distributed in the hope that it will be useful,
  14. but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. GNU General Public License for more details.
  17. You should have received a copy of the GNU General Public License
  18. along with this program; if not, write to the Free Software
  19. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. /*
  22. SUPPORTED DEVICES PCI ID
  23. nForce2 MCP 0064
  24. nForce2 Ultra 400 MCP 0084
  25. nForce3 Pro150 MCP 00D4
  26. nForce3 250Gb MCP 00E4
  27. nForce4 MCP 0052
  28. nForce4 MCP-04 0034
  29. This driver supports the 2 SMBuses that are included in the MCP of the
  30. nForce2/3/4 chipsets.
  31. */
  32. /* Note: we assume there can only be one nForce2, with two SMBus interfaces */
  33. #include <linux/module.h>
  34. #include <linux/pci.h>
  35. #include <linux/kernel.h>
  36. #include <linux/stddef.h>
  37. #include <linux/sched.h>
  38. #include <linux/ioport.h>
  39. #include <linux/init.h>
  40. #include <linux/i2c.h>
  41. #include <linux/delay.h>
  42. #include <asm/io.h>
  43. MODULE_LICENSE("GPL");
  44. MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@arcor.de>");
  45. MODULE_DESCRIPTION("nForce2 SMBus driver");
  46. struct nforce2_smbus {
  47. struct pci_dev *dev;
  48. struct i2c_adapter adapter;
  49. int base;
  50. int size;
  51. };
  52. /*
  53. * nVidia nForce2 SMBus control register definitions
  54. */
  55. #define NFORCE_PCI_SMB1 0x50
  56. #define NFORCE_PCI_SMB2 0x54
  57. /*
  58. * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
  59. */
  60. #define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
  61. #define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
  62. #define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
  63. #define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
  64. #define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
  65. #define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data bytes */
  66. #define NVIDIA_SMB_ALRM_A (smbus->base + 0x25) /* alarm address */
  67. #define NVIDIA_SMB_ALRM_D (smbus->base + 0x26) /* 2 bytes alarm data */
  68. #define NVIDIA_SMB_STS_DONE 0x80
  69. #define NVIDIA_SMB_STS_ALRM 0x40
  70. #define NVIDIA_SMB_STS_RES 0x20
  71. #define NVIDIA_SMB_STS_STATUS 0x1f
  72. #define NVIDIA_SMB_PRTCL_WRITE 0x00
  73. #define NVIDIA_SMB_PRTCL_READ 0x01
  74. #define NVIDIA_SMB_PRTCL_QUICK 0x02
  75. #define NVIDIA_SMB_PRTCL_BYTE 0x04
  76. #define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
  77. #define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
  78. #define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
  79. #define NVIDIA_SMB_PRTCL_PROC_CALL 0x0c
  80. #define NVIDIA_SMB_PRTCL_BLOCK_PROC_CALL 0x0d
  81. #define NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA 0x4a
  82. #define NVIDIA_SMB_PRTCL_PEC 0x80
  83. static struct pci_driver nforce2_driver;
  84. static s32 nforce2_access(struct i2c_adapter *adap, u16 addr,
  85. unsigned short flags, char read_write,
  86. u8 command, int size, union i2c_smbus_data *data);
  87. static u32 nforce2_func(struct i2c_adapter *adapter);
  88. static struct i2c_algorithm smbus_algorithm = {
  89. .smbus_xfer = nforce2_access,
  90. .functionality = nforce2_func,
  91. };
  92. static struct i2c_adapter nforce2_adapter = {
  93. .owner = THIS_MODULE,
  94. .class = I2C_CLASS_HWMON,
  95. .algo = &smbus_algorithm,
  96. };
  97. /* Return -1 on error. See smbus.h for more information */
  98. static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
  99. unsigned short flags, char read_write,
  100. u8 command, int size, union i2c_smbus_data * data)
  101. {
  102. struct nforce2_smbus *smbus = adap->algo_data;
  103. unsigned char protocol, pec, temp;
  104. unsigned char len = 0; /* to keep the compiler quiet */
  105. int i;
  106. protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
  107. NVIDIA_SMB_PRTCL_WRITE;
  108. pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
  109. switch (size) {
  110. case I2C_SMBUS_QUICK:
  111. protocol |= NVIDIA_SMB_PRTCL_QUICK;
  112. read_write = I2C_SMBUS_WRITE;
  113. break;
  114. case I2C_SMBUS_BYTE:
  115. if (read_write == I2C_SMBUS_WRITE)
  116. outb_p(command, NVIDIA_SMB_CMD);
  117. protocol |= NVIDIA_SMB_PRTCL_BYTE;
  118. break;
  119. case I2C_SMBUS_BYTE_DATA:
  120. outb_p(command, NVIDIA_SMB_CMD);
  121. if (read_write == I2C_SMBUS_WRITE)
  122. outb_p(data->byte, NVIDIA_SMB_DATA);
  123. protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
  124. break;
  125. case I2C_SMBUS_WORD_DATA:
  126. outb_p(command, NVIDIA_SMB_CMD);
  127. if (read_write == I2C_SMBUS_WRITE) {
  128. outb_p(data->word, NVIDIA_SMB_DATA);
  129. outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
  130. }
  131. protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
  132. break;
  133. case I2C_SMBUS_BLOCK_DATA:
  134. outb_p(command, NVIDIA_SMB_CMD);
  135. if (read_write == I2C_SMBUS_WRITE) {
  136. len = min_t(u8, data->block[0], 32);
  137. outb_p(len, NVIDIA_SMB_BCNT);
  138. for (i = 0; i < len; i++)
  139. outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i);
  140. }
  141. protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
  142. break;
  143. case I2C_SMBUS_I2C_BLOCK_DATA:
  144. len = min_t(u8, data->block[0], 32);
  145. outb_p(command, NVIDIA_SMB_CMD);
  146. outb_p(len, NVIDIA_SMB_BCNT);
  147. if (read_write == I2C_SMBUS_WRITE)
  148. for (i = 0; i < len; i++)
  149. outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i);
  150. protocol |= NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA;
  151. break;
  152. case I2C_SMBUS_PROC_CALL:
  153. dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
  154. return -1;
  155. case I2C_SMBUS_BLOCK_PROC_CALL:
  156. dev_err(&adap->dev, "I2C_SMBUS_BLOCK_PROC_CALL not supported!\n");
  157. return -1;
  158. default:
  159. dev_err(&adap->dev, "Unsupported transaction %d\n", size);
  160. return -1;
  161. }
  162. outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
  163. outb_p(protocol, NVIDIA_SMB_PRTCL);
  164. temp = inb_p(NVIDIA_SMB_STS);
  165. if (~temp & NVIDIA_SMB_STS_DONE) {
  166. udelay(500);
  167. temp = inb_p(NVIDIA_SMB_STS);
  168. }
  169. if (~temp & NVIDIA_SMB_STS_DONE) {
  170. msleep(10);
  171. temp = inb_p(NVIDIA_SMB_STS);
  172. }
  173. if ((~temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
  174. dev_dbg(&adap->dev, "SMBus Timeout! (0x%02x)\n", temp);
  175. return -1;
  176. }
  177. if (read_write == I2C_SMBUS_WRITE)
  178. return 0;
  179. switch (size) {
  180. case I2C_SMBUS_BYTE:
  181. case I2C_SMBUS_BYTE_DATA:
  182. data->byte = inb_p(NVIDIA_SMB_DATA);
  183. break;
  184. case I2C_SMBUS_WORD_DATA:
  185. /* case I2C_SMBUS_PROC_CALL: not supported */
  186. data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
  187. break;
  188. case I2C_SMBUS_BLOCK_DATA:
  189. /* case I2C_SMBUS_BLOCK_PROC_CALL: not supported */
  190. len = inb_p(NVIDIA_SMB_BCNT);
  191. len = min_t(u8, len, 32);
  192. case I2C_SMBUS_I2C_BLOCK_DATA:
  193. for (i = 0; i < len; i++)
  194. data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
  195. data->block[0] = len;
  196. break;
  197. }
  198. return 0;
  199. }
  200. static u32 nforce2_func(struct i2c_adapter *adapter)
  201. {
  202. /* other functionality might be possible, but is not tested */
  203. return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
  204. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA /* |
  205. I2C_FUNC_SMBUS_BLOCK_DATA */;
  206. }
  207. static struct pci_device_id nforce2_ids[] = {
  208. { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
  209. { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
  210. { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
  211. { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
  212. { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
  213. { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
  214. { 0 }
  215. };
  216. MODULE_DEVICE_TABLE (pci, nforce2_ids);
  217. static int __devinit nforce2_probe_smb (struct pci_dev *dev, int reg,
  218. struct nforce2_smbus *smbus, char *name)
  219. {
  220. u16 iobase;
  221. int error;
  222. if (pci_read_config_word(dev, reg, &iobase) != PCIBIOS_SUCCESSFUL) {
  223. dev_err(&smbus->adapter.dev, "Error reading PCI config for %s\n", name);
  224. return -1;
  225. }
  226. smbus->dev = dev;
  227. smbus->base = iobase & 0xfffc;
  228. smbus->size = 8;
  229. if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
  230. dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
  231. smbus->base, smbus->base+smbus->size-1, name);
  232. return -1;
  233. }
  234. smbus->adapter = nforce2_adapter;
  235. smbus->adapter.algo_data = smbus;
  236. smbus->adapter.dev.parent = &dev->dev;
  237. snprintf(smbus->adapter.name, I2C_NAME_SIZE,
  238. "SMBus nForce2 adapter at %04x", smbus->base);
  239. error = i2c_add_adapter(&smbus->adapter);
  240. if (error) {
  241. dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
  242. release_region(smbus->base, smbus->size);
  243. return -1;
  244. }
  245. dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
  246. return 0;
  247. }
  248. static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
  249. {
  250. struct nforce2_smbus *smbuses;
  251. int res1, res2;
  252. /* we support 2 SMBus adapters */
  253. if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
  254. return -ENOMEM;
  255. pci_set_drvdata(dev, smbuses);
  256. /* SMBus adapter 1 */
  257. res1 = nforce2_probe_smb (dev, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
  258. if (res1 < 0) {
  259. dev_err(&dev->dev, "Error probing SMB1.\n");
  260. smbuses[0].base = 0; /* to have a check value */
  261. }
  262. res2 = nforce2_probe_smb (dev, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
  263. if (res2 < 0) {
  264. dev_err(&dev->dev, "Error probing SMB2.\n");
  265. smbuses[1].base = 0; /* to have a check value */
  266. }
  267. if ((res1 < 0) && (res2 < 0)) {
  268. /* we did not find even one of the SMBuses, so we give up */
  269. kfree(smbuses);
  270. return -ENODEV;
  271. }
  272. return 0;
  273. }
  274. static void __devexit nforce2_remove(struct pci_dev *dev)
  275. {
  276. struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);
  277. if (smbuses[0].base) {
  278. i2c_del_adapter(&smbuses[0].adapter);
  279. release_region(smbuses[0].base, smbuses[0].size);
  280. }
  281. if (smbuses[1].base) {
  282. i2c_del_adapter(&smbuses[1].adapter);
  283. release_region(smbuses[1].base, smbuses[1].size);
  284. }
  285. kfree(smbuses);
  286. }
  287. static struct pci_driver nforce2_driver = {
  288. .name = "nForce2_smbus",
  289. .id_table = nforce2_ids,
  290. .probe = nforce2_probe,
  291. .remove = __devexit_p(nforce2_remove),
  292. };
  293. static int __init nforce2_init(void)
  294. {
  295. return pci_register_driver(&nforce2_driver);
  296. }
  297. static void __exit nforce2_exit(void)
  298. {
  299. pci_unregister_driver(&nforce2_driver);
  300. }
  301. module_init(nforce2_init);
  302. module_exit(nforce2_exit);